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TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_lpuart.h@156:ff21514d8981, 2017-11-08 (annotated)

Committer:
AnnaBridge
Date:
Wed Nov 08 17:18:06 2017 +0000
Revision:
156:ff21514d8981
Child:
161:aa5281ff4a02
Reverting back to release 154 of the mbed library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 156:ff21514d8981 1 /**
AnnaBridge 156:ff21514d8981 2 ******************************************************************************
AnnaBridge 156:ff21514d8981 3 * @file stm32l4xx_ll_lpuart.h
AnnaBridge 156:ff21514d8981 4 * @author MCD Application Team
AnnaBridge 156:ff21514d8981 5 * @version V1.7.1
AnnaBridge 156:ff21514d8981 6 * @date 21-April-2017
AnnaBridge 156:ff21514d8981 7 * @brief Header file of LPUART LL module.
AnnaBridge 156:ff21514d8981 8 ******************************************************************************
AnnaBridge 156:ff21514d8981 9 * @attention
AnnaBridge 156:ff21514d8981 10 *
AnnaBridge 156:ff21514d8981 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 156:ff21514d8981 12 *
AnnaBridge 156:ff21514d8981 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 156:ff21514d8981 14 * are permitted provided that the following conditions are met:
AnnaBridge 156:ff21514d8981 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 156:ff21514d8981 16 * this list of conditions and the following disclaimer.
AnnaBridge 156:ff21514d8981 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 156:ff21514d8981 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 156:ff21514d8981 19 * and/or other materials provided with the distribution.
AnnaBridge 156:ff21514d8981 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 156:ff21514d8981 21 * may be used to endorse or promote products derived from this software
AnnaBridge 156:ff21514d8981 22 * without specific prior written permission.
AnnaBridge 156:ff21514d8981 23 *
AnnaBridge 156:ff21514d8981 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 156:ff21514d8981 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 156:ff21514d8981 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 156:ff21514d8981 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 156:ff21514d8981 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 156:ff21514d8981 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 156:ff21514d8981 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 156:ff21514d8981 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 156:ff21514d8981 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 156:ff21514d8981 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 156:ff21514d8981 34 *
AnnaBridge 156:ff21514d8981 35 ******************************************************************************
AnnaBridge 156:ff21514d8981 36 */
AnnaBridge 156:ff21514d8981 37
AnnaBridge 156:ff21514d8981 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 156:ff21514d8981 39 #ifndef __STM32L4xx_LL_LPUART_H
AnnaBridge 156:ff21514d8981 40 #define __STM32L4xx_LL_LPUART_H
AnnaBridge 156:ff21514d8981 41
AnnaBridge 156:ff21514d8981 42 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 43 extern "C" {
AnnaBridge 156:ff21514d8981 44 #endif
AnnaBridge 156:ff21514d8981 45
AnnaBridge 156:ff21514d8981 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 47 #include "stm32l4xx.h"
AnnaBridge 156:ff21514d8981 48
AnnaBridge 156:ff21514d8981 49 /** @addtogroup STM32L4xx_LL_Driver
AnnaBridge 156:ff21514d8981 50 * @{
AnnaBridge 156:ff21514d8981 51 */
AnnaBridge 156:ff21514d8981 52
AnnaBridge 156:ff21514d8981 53 #if defined (LPUART1)
AnnaBridge 156:ff21514d8981 54
AnnaBridge 156:ff21514d8981 55 /** @defgroup LPUART_LL LPUART
AnnaBridge 156:ff21514d8981 56 * @{
AnnaBridge 156:ff21514d8981 57 */
AnnaBridge 156:ff21514d8981 58
AnnaBridge 156:ff21514d8981 59 /* Private types -------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 60 /* Private variables ---------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 61
AnnaBridge 156:ff21514d8981 62 /* Private constants ---------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 63 /** @defgroup LPUART_LL_Private_Constants LPUART Private Constants
AnnaBridge 156:ff21514d8981 64 * @{
AnnaBridge 156:ff21514d8981 65 */
AnnaBridge 156:ff21514d8981 66 /* Defines used in Baud Rate related macros and corresponding register setting computation */
AnnaBridge 156:ff21514d8981 67 #define LPUART_LPUARTDIV_FREQ_MUL 256U
AnnaBridge 156:ff21514d8981 68 #define LPUART_BRR_MASK 0x000FFFFFU
AnnaBridge 156:ff21514d8981 69 #define LPUART_BRR_MIN_VALUE 0x00000300U
AnnaBridge 156:ff21514d8981 70 /**
AnnaBridge 156:ff21514d8981 71 * @}
AnnaBridge 156:ff21514d8981 72 */
AnnaBridge 156:ff21514d8981 73
AnnaBridge 156:ff21514d8981 74
AnnaBridge 156:ff21514d8981 75 /* Private macros ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 76 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 156:ff21514d8981 77 /** @defgroup LPUART_LL_Private_Macros LPUART Private Macros
AnnaBridge 156:ff21514d8981 78 * @{
AnnaBridge 156:ff21514d8981 79 */
AnnaBridge 156:ff21514d8981 80 /**
AnnaBridge 156:ff21514d8981 81 * @}
AnnaBridge 156:ff21514d8981 82 */
AnnaBridge 156:ff21514d8981 83 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 156:ff21514d8981 84
AnnaBridge 156:ff21514d8981 85 /* Exported types ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 86 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 156:ff21514d8981 87 /** @defgroup LPUART_LL_ES_INIT LPUART Exported Init structures
AnnaBridge 156:ff21514d8981 88 * @{
AnnaBridge 156:ff21514d8981 89 */
AnnaBridge 156:ff21514d8981 90
AnnaBridge 156:ff21514d8981 91 /**
AnnaBridge 156:ff21514d8981 92 * @brief LL LPUART Init Structure definition
AnnaBridge 156:ff21514d8981 93 */
AnnaBridge 156:ff21514d8981 94 typedef struct
AnnaBridge 156:ff21514d8981 95 {
AnnaBridge 156:ff21514d8981 96 uint32_t BaudRate; /*!< This field defines expected LPUART communication baud rate.
AnnaBridge 156:ff21514d8981 97
AnnaBridge 156:ff21514d8981 98 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetBaudRate().*/
AnnaBridge 156:ff21514d8981 99
AnnaBridge 156:ff21514d8981 100 uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
AnnaBridge 156:ff21514d8981 101 This parameter can be a value of @ref LPUART_LL_EC_DATAWIDTH.
AnnaBridge 156:ff21514d8981 102
AnnaBridge 156:ff21514d8981 103 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetDataWidth().*/
AnnaBridge 156:ff21514d8981 104
AnnaBridge 156:ff21514d8981 105 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
AnnaBridge 156:ff21514d8981 106 This parameter can be a value of @ref LPUART_LL_EC_STOPBITS.
AnnaBridge 156:ff21514d8981 107
AnnaBridge 156:ff21514d8981 108 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetStopBitsLength().*/
AnnaBridge 156:ff21514d8981 109
AnnaBridge 156:ff21514d8981 110 uint32_t Parity; /*!< Specifies the parity mode.
AnnaBridge 156:ff21514d8981 111 This parameter can be a value of @ref LPUART_LL_EC_PARITY.
AnnaBridge 156:ff21514d8981 112
AnnaBridge 156:ff21514d8981 113 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetParity().*/
AnnaBridge 156:ff21514d8981 114
AnnaBridge 156:ff21514d8981 115 uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
AnnaBridge 156:ff21514d8981 116 This parameter can be a value of @ref LPUART_LL_EC_DIRECTION.
AnnaBridge 156:ff21514d8981 117
AnnaBridge 156:ff21514d8981 118 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetTransferDirection().*/
AnnaBridge 156:ff21514d8981 119
AnnaBridge 156:ff21514d8981 120 uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
AnnaBridge 156:ff21514d8981 121 This parameter can be a value of @ref LPUART_LL_EC_HWCONTROL.
AnnaBridge 156:ff21514d8981 122
AnnaBridge 156:ff21514d8981 123 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetHWFlowCtrl().*/
AnnaBridge 156:ff21514d8981 124
AnnaBridge 156:ff21514d8981 125 } LL_LPUART_InitTypeDef;
AnnaBridge 156:ff21514d8981 126
AnnaBridge 156:ff21514d8981 127 /**
AnnaBridge 156:ff21514d8981 128 * @}
AnnaBridge 156:ff21514d8981 129 */
AnnaBridge 156:ff21514d8981 130 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 156:ff21514d8981 131
AnnaBridge 156:ff21514d8981 132 /* Exported constants --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 133 /** @defgroup LPUART_LL_Exported_Constants LPUART Exported Constants
AnnaBridge 156:ff21514d8981 134 * @{
AnnaBridge 156:ff21514d8981 135 */
AnnaBridge 156:ff21514d8981 136
AnnaBridge 156:ff21514d8981 137 /** @defgroup LPUART_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge 156:ff21514d8981 138 * @brief Flags defines which can be used with LL_LPUART_WriteReg function
AnnaBridge 156:ff21514d8981 139 * @{
AnnaBridge 156:ff21514d8981 140 */
AnnaBridge 156:ff21514d8981 141 #define LL_LPUART_ICR_PECF USART_ICR_PECF /*!< Parity error flag */
AnnaBridge 156:ff21514d8981 142 #define LL_LPUART_ICR_FECF USART_ICR_FECF /*!< Framing error flag */
AnnaBridge 156:ff21514d8981 143 #define LL_LPUART_ICR_NCF USART_ICR_NCF /*!< Noise detected flag */
AnnaBridge 156:ff21514d8981 144 #define LL_LPUART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error flag */
AnnaBridge 156:ff21514d8981 145 #define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected flag */
AnnaBridge 156:ff21514d8981 146 #define LL_LPUART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete flag */
AnnaBridge 156:ff21514d8981 147 #define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS flag */
AnnaBridge 156:ff21514d8981 148 #define LL_LPUART_ICR_CMCF USART_ICR_CMCF /*!< Character match flag */
AnnaBridge 156:ff21514d8981 149 #define LL_LPUART_ICR_WUCF USART_ICR_WUCF /*!< Wakeup from Stop mode flag */
AnnaBridge 156:ff21514d8981 150 /**
AnnaBridge 156:ff21514d8981 151 * @}
AnnaBridge 156:ff21514d8981 152 */
AnnaBridge 156:ff21514d8981 153
AnnaBridge 156:ff21514d8981 154 /** @defgroup LPUART_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 156:ff21514d8981 155 * @brief Flags defines which can be used with LL_LPUART_ReadReg function
AnnaBridge 156:ff21514d8981 156 * @{
AnnaBridge 156:ff21514d8981 157 */
AnnaBridge 156:ff21514d8981 158 #define LL_LPUART_ISR_PE USART_ISR_PE /*!< Parity error flag */
AnnaBridge 156:ff21514d8981 159 #define LL_LPUART_ISR_FE USART_ISR_FE /*!< Framing error flag */
AnnaBridge 156:ff21514d8981 160 #define LL_LPUART_ISR_NE USART_ISR_NE /*!< Noise detected flag */
AnnaBridge 156:ff21514d8981 161 #define LL_LPUART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */
AnnaBridge 156:ff21514d8981 162 #define LL_LPUART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */
AnnaBridge 156:ff21514d8981 163 #define LL_LPUART_ISR_RXNE USART_ISR_RXNE /*!< Read data register not empty flag */
AnnaBridge 156:ff21514d8981 164 #define LL_LPUART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */
AnnaBridge 156:ff21514d8981 165 #define LL_LPUART_ISR_TXE USART_ISR_TXE /*!< Transmit data register empty flag */
AnnaBridge 156:ff21514d8981 166 #define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */
AnnaBridge 156:ff21514d8981 167 #define LL_LPUART_ISR_CTS USART_ISR_CTS /*!< CTS flag */
AnnaBridge 156:ff21514d8981 168 #define LL_LPUART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */
AnnaBridge 156:ff21514d8981 169 #define LL_LPUART_ISR_CMF USART_ISR_CMF /*!< Character match flag */
AnnaBridge 156:ff21514d8981 170 #define LL_LPUART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */
AnnaBridge 156:ff21514d8981 171 #define LL_LPUART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from Mute mode flag */
AnnaBridge 156:ff21514d8981 172 #define LL_LPUART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop mode flag */
AnnaBridge 156:ff21514d8981 173 #define LL_LPUART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */
AnnaBridge 156:ff21514d8981 174 #define LL_LPUART_ISR_REACK USART_ISR_REACK /*!< Receive enable acknowledge flag */
AnnaBridge 156:ff21514d8981 175 /**
AnnaBridge 156:ff21514d8981 176 * @}
AnnaBridge 156:ff21514d8981 177 */
AnnaBridge 156:ff21514d8981 178
AnnaBridge 156:ff21514d8981 179 /** @defgroup LPUART_LL_EC_IT IT Defines
AnnaBridge 156:ff21514d8981 180 * @brief IT defines which can be used with LL_LPUART_ReadReg and LL_LPUART_WriteReg functions
AnnaBridge 156:ff21514d8981 181 * @{
AnnaBridge 156:ff21514d8981 182 */
AnnaBridge 156:ff21514d8981 183 #define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
AnnaBridge 156:ff21514d8981 184 #define LL_LPUART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
AnnaBridge 156:ff21514d8981 185 #define LL_LPUART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
AnnaBridge 156:ff21514d8981 186 #define LL_LPUART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
AnnaBridge 156:ff21514d8981 187 #define LL_LPUART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
AnnaBridge 156:ff21514d8981 188 #define LL_LPUART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */
AnnaBridge 156:ff21514d8981 189 #define LL_LPUART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
AnnaBridge 156:ff21514d8981 190 #define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
AnnaBridge 156:ff21514d8981 191 #define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop mode interrupt enable */
AnnaBridge 156:ff21514d8981 192 /**
AnnaBridge 156:ff21514d8981 193 * @}
AnnaBridge 156:ff21514d8981 194 */
AnnaBridge 156:ff21514d8981 195
AnnaBridge 156:ff21514d8981 196 /** @defgroup LPUART_LL_EC_DIRECTION Direction
AnnaBridge 156:ff21514d8981 197 * @{
AnnaBridge 156:ff21514d8981 198 */
AnnaBridge 156:ff21514d8981 199 #define LL_LPUART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */
AnnaBridge 156:ff21514d8981 200 #define LL_LPUART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
AnnaBridge 156:ff21514d8981 201 #define LL_LPUART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
AnnaBridge 156:ff21514d8981 202 #define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
AnnaBridge 156:ff21514d8981 203 /**
AnnaBridge 156:ff21514d8981 204 * @}
AnnaBridge 156:ff21514d8981 205 */
AnnaBridge 156:ff21514d8981 206
AnnaBridge 156:ff21514d8981 207 /** @defgroup LPUART_LL_EC_PARITY Parity Control
AnnaBridge 156:ff21514d8981 208 * @{
AnnaBridge 156:ff21514d8981 209 */
AnnaBridge 156:ff21514d8981 210 #define LL_LPUART_PARITY_NONE 0x00000000U /*!< Parity control disabled */
AnnaBridge 156:ff21514d8981 211 #define LL_LPUART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
AnnaBridge 156:ff21514d8981 212 #define LL_LPUART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
AnnaBridge 156:ff21514d8981 213 /**
AnnaBridge 156:ff21514d8981 214 * @}
AnnaBridge 156:ff21514d8981 215 */
AnnaBridge 156:ff21514d8981 216
AnnaBridge 156:ff21514d8981 217 /** @defgroup LPUART_LL_EC_WAKEUP Wakeup
AnnaBridge 156:ff21514d8981 218 * @{
AnnaBridge 156:ff21514d8981 219 */
AnnaBridge 156:ff21514d8981 220 #define LL_LPUART_WAKEUP_IDLELINE 0x00000000U /*!< LPUART wake up from Mute mode on Idle Line */
AnnaBridge 156:ff21514d8981 221 #define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< LPUART wake up from Mute mode on Address Mark */
AnnaBridge 156:ff21514d8981 222 /**
AnnaBridge 156:ff21514d8981 223 * @}
AnnaBridge 156:ff21514d8981 224 */
AnnaBridge 156:ff21514d8981 225
AnnaBridge 156:ff21514d8981 226 /** @defgroup LPUART_LL_EC_DATAWIDTH Datawidth
AnnaBridge 156:ff21514d8981 227 * @{
AnnaBridge 156:ff21514d8981 228 */
AnnaBridge 156:ff21514d8981 229 #define LL_LPUART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */
AnnaBridge 156:ff21514d8981 230 #define LL_LPUART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
AnnaBridge 156:ff21514d8981 231 #define LL_LPUART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
AnnaBridge 156:ff21514d8981 232 /**
AnnaBridge 156:ff21514d8981 233 * @}
AnnaBridge 156:ff21514d8981 234 */
AnnaBridge 156:ff21514d8981 235
AnnaBridge 156:ff21514d8981 236 /** @defgroup LPUART_LL_EC_STOPBITS Stop Bits
AnnaBridge 156:ff21514d8981 237 * @{
AnnaBridge 156:ff21514d8981 238 */
AnnaBridge 156:ff21514d8981 239 #define LL_LPUART_STOPBITS_1 0x00000000U /*!< 1 stop bit */
AnnaBridge 156:ff21514d8981 240 #define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
AnnaBridge 156:ff21514d8981 241 /**
AnnaBridge 156:ff21514d8981 242 * @}
AnnaBridge 156:ff21514d8981 243 */
AnnaBridge 156:ff21514d8981 244
AnnaBridge 156:ff21514d8981 245 /** @defgroup LPUART_LL_EC_TXRX TX RX Pins Swap
AnnaBridge 156:ff21514d8981 246 * @{
AnnaBridge 156:ff21514d8981 247 */
AnnaBridge 156:ff21514d8981 248 #define LL_LPUART_TXRX_STANDARD 0x00000000U /*!< TX/RX pins are used as defined in standard pinout */
AnnaBridge 156:ff21514d8981 249 #define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions are swapped. */
AnnaBridge 156:ff21514d8981 250 /**
AnnaBridge 156:ff21514d8981 251 * @}
AnnaBridge 156:ff21514d8981 252 */
AnnaBridge 156:ff21514d8981 253
AnnaBridge 156:ff21514d8981 254 /** @defgroup LPUART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion
AnnaBridge 156:ff21514d8981 255 * @{
AnnaBridge 156:ff21514d8981 256 */
AnnaBridge 156:ff21514d8981 257 #define LL_LPUART_RXPIN_LEVEL_STANDARD 0x00000000U /*!< RX pin signal works using the standard logic levels */
AnnaBridge 156:ff21514d8981 258 #define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal values are inverted. */
AnnaBridge 156:ff21514d8981 259 /**
AnnaBridge 156:ff21514d8981 260 * @}
AnnaBridge 156:ff21514d8981 261 */
AnnaBridge 156:ff21514d8981 262
AnnaBridge 156:ff21514d8981 263 /** @defgroup LPUART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
AnnaBridge 156:ff21514d8981 264 * @{
AnnaBridge 156:ff21514d8981 265 */
AnnaBridge 156:ff21514d8981 266 #define LL_LPUART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works using the standard logic levels */
AnnaBridge 156:ff21514d8981 267 #define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are inverted. */
AnnaBridge 156:ff21514d8981 268 /**
AnnaBridge 156:ff21514d8981 269 * @}
AnnaBridge 156:ff21514d8981 270 */
AnnaBridge 156:ff21514d8981 271
AnnaBridge 156:ff21514d8981 272 /** @defgroup LPUART_LL_EC_BINARY_LOGIC Binary Data Inversion
AnnaBridge 156:ff21514d8981 273 * @{
AnnaBridge 156:ff21514d8981 274 */
AnnaBridge 156:ff21514d8981 275 #define LL_LPUART_BINARY_LOGIC_POSITIVE 0x00000000U /*!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) */
AnnaBridge 156:ff21514d8981 276 #define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. */
AnnaBridge 156:ff21514d8981 277 /**
AnnaBridge 156:ff21514d8981 278 * @}
AnnaBridge 156:ff21514d8981 279 */
AnnaBridge 156:ff21514d8981 280
AnnaBridge 156:ff21514d8981 281 /** @defgroup LPUART_LL_EC_BITORDER Bit Order
AnnaBridge 156:ff21514d8981 282 * @{
AnnaBridge 156:ff21514d8981 283 */
AnnaBridge 156:ff21514d8981 284 #define LL_LPUART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/received with data bit 0 first, following the start bit */
AnnaBridge 156:ff21514d8981 285 #define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/received with the MSB first, following the start bit */
AnnaBridge 156:ff21514d8981 286 /**
AnnaBridge 156:ff21514d8981 287 * @}
AnnaBridge 156:ff21514d8981 288 */
AnnaBridge 156:ff21514d8981 289
AnnaBridge 156:ff21514d8981 290 /** @defgroup LPUART_LL_EC_ADDRESS_DETECT Address Length Detection
AnnaBridge 156:ff21514d8981 291 * @{
AnnaBridge 156:ff21514d8981 292 */
AnnaBridge 156:ff21514d8981 293 #define LL_LPUART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit address detection method selected */
AnnaBridge 156:ff21514d8981 294 #define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection (in 8-bit data mode) method selected */
AnnaBridge 156:ff21514d8981 295 /**
AnnaBridge 156:ff21514d8981 296 * @}
AnnaBridge 156:ff21514d8981 297 */
AnnaBridge 156:ff21514d8981 298
AnnaBridge 156:ff21514d8981 299 /** @defgroup LPUART_LL_EC_HWCONTROL Hardware Control
AnnaBridge 156:ff21514d8981 300 * @{
AnnaBridge 156:ff21514d8981 301 */
AnnaBridge 156:ff21514d8981 302 #define LL_LPUART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */
AnnaBridge 156:ff21514d8981 303 #define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
AnnaBridge 156:ff21514d8981 304 #define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
AnnaBridge 156:ff21514d8981 305 #define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
AnnaBridge 156:ff21514d8981 306 /**
AnnaBridge 156:ff21514d8981 307 * @}
AnnaBridge 156:ff21514d8981 308 */
AnnaBridge 156:ff21514d8981 309
AnnaBridge 156:ff21514d8981 310 /** @defgroup LPUART_LL_EC_WAKEUP_ON Wakeup Activation
AnnaBridge 156:ff21514d8981 311 * @{
AnnaBridge 156:ff21514d8981 312 */
AnnaBridge 156:ff21514d8981 313 #define LL_LPUART_WAKEUP_ON_ADDRESS 0x00000000U /*!< Wake up active on address match */
AnnaBridge 156:ff21514d8981 314 #define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake up active on Start bit detection */
AnnaBridge 156:ff21514d8981 315 #define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake up active on RXNE */
AnnaBridge 156:ff21514d8981 316 /**
AnnaBridge 156:ff21514d8981 317 * @}
AnnaBridge 156:ff21514d8981 318 */
AnnaBridge 156:ff21514d8981 319
AnnaBridge 156:ff21514d8981 320 /** @defgroup LPUART_LL_EC_DE_POLARITY Driver Enable Polarity
AnnaBridge 156:ff21514d8981 321 * @{
AnnaBridge 156:ff21514d8981 322 */
AnnaBridge 156:ff21514d8981 323 #define LL_LPUART_DE_POLARITY_HIGH 0x00000000U /*!< DE signal is active high */
AnnaBridge 156:ff21514d8981 324 #define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is active low */
AnnaBridge 156:ff21514d8981 325 /**
AnnaBridge 156:ff21514d8981 326 * @}
AnnaBridge 156:ff21514d8981 327 */
AnnaBridge 156:ff21514d8981 328
AnnaBridge 156:ff21514d8981 329 /** @defgroup LPUART_LL_EC_DMA_REG_DATA DMA Register Data
AnnaBridge 156:ff21514d8981 330 * @{
AnnaBridge 156:ff21514d8981 331 */
AnnaBridge 156:ff21514d8981 332 #define LL_LPUART_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */
AnnaBridge 156:ff21514d8981 333 #define LL_LPUART_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */
AnnaBridge 156:ff21514d8981 334 /**
AnnaBridge 156:ff21514d8981 335 * @}
AnnaBridge 156:ff21514d8981 336 */
AnnaBridge 156:ff21514d8981 337
AnnaBridge 156:ff21514d8981 338 /**
AnnaBridge 156:ff21514d8981 339 * @}
AnnaBridge 156:ff21514d8981 340 */
AnnaBridge 156:ff21514d8981 341
AnnaBridge 156:ff21514d8981 342 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 343 /** @defgroup LPUART_LL_Exported_Macros LPUART Exported Macros
AnnaBridge 156:ff21514d8981 344 * @{
AnnaBridge 156:ff21514d8981 345 */
AnnaBridge 156:ff21514d8981 346
AnnaBridge 156:ff21514d8981 347 /** @defgroup LPUART_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 156:ff21514d8981 348 * @{
AnnaBridge 156:ff21514d8981 349 */
AnnaBridge 156:ff21514d8981 350
AnnaBridge 156:ff21514d8981 351 /**
AnnaBridge 156:ff21514d8981 352 * @brief Write a value in LPUART register
AnnaBridge 156:ff21514d8981 353 * @param __INSTANCE__ LPUART Instance
AnnaBridge 156:ff21514d8981 354 * @param __REG__ Register to be written
AnnaBridge 156:ff21514d8981 355 * @param __VALUE__ Value to be written in the register
AnnaBridge 156:ff21514d8981 356 * @retval None
AnnaBridge 156:ff21514d8981 357 */
AnnaBridge 156:ff21514d8981 358 #define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 156:ff21514d8981 359
AnnaBridge 156:ff21514d8981 360 /**
AnnaBridge 156:ff21514d8981 361 * @brief Read a value in LPUART register
AnnaBridge 156:ff21514d8981 362 * @param __INSTANCE__ LPUART Instance
AnnaBridge 156:ff21514d8981 363 * @param __REG__ Register to be read
AnnaBridge 156:ff21514d8981 364 * @retval Register value
AnnaBridge 156:ff21514d8981 365 */
AnnaBridge 156:ff21514d8981 366 #define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 156:ff21514d8981 367 /**
AnnaBridge 156:ff21514d8981 368 * @}
AnnaBridge 156:ff21514d8981 369 */
AnnaBridge 156:ff21514d8981 370
AnnaBridge 156:ff21514d8981 371 /** @defgroup LPUART_LL_EM_Exported_Macros_Helper Helper Macros
AnnaBridge 156:ff21514d8981 372 * @{
AnnaBridge 156:ff21514d8981 373 */
AnnaBridge 156:ff21514d8981 374
AnnaBridge 156:ff21514d8981 375 /**
AnnaBridge 156:ff21514d8981 376 * @brief Compute LPUARTDIV value according to Peripheral Clock and
AnnaBridge 156:ff21514d8981 377 * expected Baud Rate (20-bit value of LPUARTDIV is returned)
AnnaBridge 156:ff21514d8981 378 * @param __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance
AnnaBridge 156:ff21514d8981 379 * @param __BAUDRATE__ Baud Rate value to achieve
AnnaBridge 156:ff21514d8981 380 * @retval LPUARTDIV value to be used for BRR register filling
AnnaBridge 156:ff21514d8981 381 */
AnnaBridge 156:ff21514d8981 382 #define __LL_LPUART_DIV(__PERIPHCLK__, __BAUDRATE__) (((((uint64_t)(__PERIPHCLK__)*LPUART_LPUARTDIV_FREQ_MUL) + ((__BAUDRATE__)/2))/(__BAUDRATE__)) & LPUART_BRR_MASK)
AnnaBridge 156:ff21514d8981 383
AnnaBridge 156:ff21514d8981 384 /**
AnnaBridge 156:ff21514d8981 385 * @}
AnnaBridge 156:ff21514d8981 386 */
AnnaBridge 156:ff21514d8981 387
AnnaBridge 156:ff21514d8981 388 /**
AnnaBridge 156:ff21514d8981 389 * @}
AnnaBridge 156:ff21514d8981 390 */
AnnaBridge 156:ff21514d8981 391
AnnaBridge 156:ff21514d8981 392 /* Exported functions --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 393 /** @defgroup LPUART_LL_Exported_Functions LPUART Exported Functions
AnnaBridge 156:ff21514d8981 394 * @{
AnnaBridge 156:ff21514d8981 395 */
AnnaBridge 156:ff21514d8981 396
AnnaBridge 156:ff21514d8981 397 /** @defgroup LPUART_LL_EF_Configuration Configuration functions
AnnaBridge 156:ff21514d8981 398 * @{
AnnaBridge 156:ff21514d8981 399 */
AnnaBridge 156:ff21514d8981 400
AnnaBridge 156:ff21514d8981 401 /**
AnnaBridge 156:ff21514d8981 402 * @brief LPUART Enable
AnnaBridge 156:ff21514d8981 403 * @rmtoll CR1 UE LL_LPUART_Enable
AnnaBridge 156:ff21514d8981 404 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 405 * @retval None
AnnaBridge 156:ff21514d8981 406 */
AnnaBridge 156:ff21514d8981 407 __STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 408 {
AnnaBridge 156:ff21514d8981 409 SET_BIT(LPUARTx->CR1, USART_CR1_UE);
AnnaBridge 156:ff21514d8981 410 }
AnnaBridge 156:ff21514d8981 411
AnnaBridge 156:ff21514d8981 412 /**
AnnaBridge 156:ff21514d8981 413 * @brief LPUART Disable
AnnaBridge 156:ff21514d8981 414 * @note When LPUART is disabled, LPUART prescalers and outputs are stopped immediately,
AnnaBridge 156:ff21514d8981 415 * and current operations are discarded. The configuration of the LPUART is kept, but all the status
AnnaBridge 156:ff21514d8981 416 * flags, in the LPUARTx_ISR are set to their default values.
AnnaBridge 156:ff21514d8981 417 * @note In order to go into low-power mode without generating errors on the line,
AnnaBridge 156:ff21514d8981 418 * the TE bit must be reset before and the software must wait
AnnaBridge 156:ff21514d8981 419 * for the TC bit in the LPUART_ISR to be set before resetting the UE bit.
AnnaBridge 156:ff21514d8981 420 * The DMA requests are also reset when UE = 0 so the DMA channel must
AnnaBridge 156:ff21514d8981 421 * be disabled before resetting the UE bit.
AnnaBridge 156:ff21514d8981 422 * @rmtoll CR1 UE LL_LPUART_Disable
AnnaBridge 156:ff21514d8981 423 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 424 * @retval None
AnnaBridge 156:ff21514d8981 425 */
AnnaBridge 156:ff21514d8981 426 __STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 427 {
AnnaBridge 156:ff21514d8981 428 CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE);
AnnaBridge 156:ff21514d8981 429 }
AnnaBridge 156:ff21514d8981 430
AnnaBridge 156:ff21514d8981 431 /**
AnnaBridge 156:ff21514d8981 432 * @brief Indicate if LPUART is enabled
AnnaBridge 156:ff21514d8981 433 * @rmtoll CR1 UE LL_LPUART_IsEnabled
AnnaBridge 156:ff21514d8981 434 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 435 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 436 */
AnnaBridge 156:ff21514d8981 437 __STATIC_INLINE uint32_t LL_LPUART_IsEnabled(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 438 {
AnnaBridge 156:ff21514d8981 439 return (READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
AnnaBridge 156:ff21514d8981 440 }
AnnaBridge 156:ff21514d8981 441
AnnaBridge 156:ff21514d8981 442 /**
AnnaBridge 156:ff21514d8981 443 * @brief LPUART enabled in STOP Mode
AnnaBridge 156:ff21514d8981 444 * @note When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provided that
AnnaBridge 156:ff21514d8981 445 * LPUART clock selection is HSI or LSE in RCC.
AnnaBridge 156:ff21514d8981 446 * @rmtoll CR1 UESM LL_LPUART_EnableInStopMode
AnnaBridge 156:ff21514d8981 447 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 448 * @retval None
AnnaBridge 156:ff21514d8981 449 */
AnnaBridge 156:ff21514d8981 450 __STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 451 {
AnnaBridge 156:ff21514d8981 452 SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
AnnaBridge 156:ff21514d8981 453 }
AnnaBridge 156:ff21514d8981 454
AnnaBridge 156:ff21514d8981 455 /**
AnnaBridge 156:ff21514d8981 456 * @brief LPUART disabled in STOP Mode
AnnaBridge 156:ff21514d8981 457 * @note When this function is disabled, LPUART is not able to wake up the MCU from Stop mode
AnnaBridge 156:ff21514d8981 458 * @rmtoll CR1 UESM LL_LPUART_DisableInStopMode
AnnaBridge 156:ff21514d8981 459 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 460 * @retval None
AnnaBridge 156:ff21514d8981 461 */
AnnaBridge 156:ff21514d8981 462 __STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 463 {
AnnaBridge 156:ff21514d8981 464 CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM);
AnnaBridge 156:ff21514d8981 465 }
AnnaBridge 156:ff21514d8981 466
AnnaBridge 156:ff21514d8981 467 /**
AnnaBridge 156:ff21514d8981 468 * @brief Indicate if LPUART is enabled in STOP Mode
AnnaBridge 156:ff21514d8981 469 * (able to wake up MCU from Stop mode or not)
AnnaBridge 156:ff21514d8981 470 * @rmtoll CR1 UESM LL_LPUART_IsEnabledInStopMode
AnnaBridge 156:ff21514d8981 471 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 472 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 473 */
AnnaBridge 156:ff21514d8981 474 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 475 {
AnnaBridge 156:ff21514d8981 476 return (READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM));
AnnaBridge 156:ff21514d8981 477 }
AnnaBridge 156:ff21514d8981 478
AnnaBridge 156:ff21514d8981 479 /**
AnnaBridge 156:ff21514d8981 480 * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
AnnaBridge 156:ff21514d8981 481 * @rmtoll CR1 RE LL_LPUART_EnableDirectionRx
AnnaBridge 156:ff21514d8981 482 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 483 * @retval None
AnnaBridge 156:ff21514d8981 484 */
AnnaBridge 156:ff21514d8981 485 __STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 486 {
AnnaBridge 156:ff21514d8981 487 SET_BIT(LPUARTx->CR1, USART_CR1_RE);
AnnaBridge 156:ff21514d8981 488 }
AnnaBridge 156:ff21514d8981 489
AnnaBridge 156:ff21514d8981 490 /**
AnnaBridge 156:ff21514d8981 491 * @brief Receiver Disable
AnnaBridge 156:ff21514d8981 492 * @rmtoll CR1 RE LL_LPUART_DisableDirectionRx
AnnaBridge 156:ff21514d8981 493 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 494 * @retval None
AnnaBridge 156:ff21514d8981 495 */
AnnaBridge 156:ff21514d8981 496 __STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 497 {
AnnaBridge 156:ff21514d8981 498 CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE);
AnnaBridge 156:ff21514d8981 499 }
AnnaBridge 156:ff21514d8981 500
AnnaBridge 156:ff21514d8981 501 /**
AnnaBridge 156:ff21514d8981 502 * @brief Transmitter Enable
AnnaBridge 156:ff21514d8981 503 * @rmtoll CR1 TE LL_LPUART_EnableDirectionTx
AnnaBridge 156:ff21514d8981 504 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 505 * @retval None
AnnaBridge 156:ff21514d8981 506 */
AnnaBridge 156:ff21514d8981 507 __STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 508 {
AnnaBridge 156:ff21514d8981 509 SET_BIT(LPUARTx->CR1, USART_CR1_TE);
AnnaBridge 156:ff21514d8981 510 }
AnnaBridge 156:ff21514d8981 511
AnnaBridge 156:ff21514d8981 512 /**
AnnaBridge 156:ff21514d8981 513 * @brief Transmitter Disable
AnnaBridge 156:ff21514d8981 514 * @rmtoll CR1 TE LL_LPUART_DisableDirectionTx
AnnaBridge 156:ff21514d8981 515 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 516 * @retval None
AnnaBridge 156:ff21514d8981 517 */
AnnaBridge 156:ff21514d8981 518 __STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 519 {
AnnaBridge 156:ff21514d8981 520 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE);
AnnaBridge 156:ff21514d8981 521 }
AnnaBridge 156:ff21514d8981 522
AnnaBridge 156:ff21514d8981 523 /**
AnnaBridge 156:ff21514d8981 524 * @brief Configure simultaneously enabled/disabled states
AnnaBridge 156:ff21514d8981 525 * of Transmitter and Receiver
AnnaBridge 156:ff21514d8981 526 * @rmtoll CR1 RE LL_LPUART_SetTransferDirection\n
AnnaBridge 156:ff21514d8981 527 * CR1 TE LL_LPUART_SetTransferDirection
AnnaBridge 156:ff21514d8981 528 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 529 * @param TransferDirection This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 530 * @arg @ref LL_LPUART_DIRECTION_NONE
AnnaBridge 156:ff21514d8981 531 * @arg @ref LL_LPUART_DIRECTION_RX
AnnaBridge 156:ff21514d8981 532 * @arg @ref LL_LPUART_DIRECTION_TX
AnnaBridge 156:ff21514d8981 533 * @arg @ref LL_LPUART_DIRECTION_TX_RX
AnnaBridge 156:ff21514d8981 534 * @retval None
AnnaBridge 156:ff21514d8981 535 */
AnnaBridge 156:ff21514d8981 536 __STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection)
AnnaBridge 156:ff21514d8981 537 {
AnnaBridge 156:ff21514d8981 538 MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
AnnaBridge 156:ff21514d8981 539 }
AnnaBridge 156:ff21514d8981 540
AnnaBridge 156:ff21514d8981 541 /**
AnnaBridge 156:ff21514d8981 542 * @brief Return enabled/disabled states of Transmitter and Receiver
AnnaBridge 156:ff21514d8981 543 * @rmtoll CR1 RE LL_LPUART_GetTransferDirection\n
AnnaBridge 156:ff21514d8981 544 * CR1 TE LL_LPUART_GetTransferDirection
AnnaBridge 156:ff21514d8981 545 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 546 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 547 * @arg @ref LL_LPUART_DIRECTION_NONE
AnnaBridge 156:ff21514d8981 548 * @arg @ref LL_LPUART_DIRECTION_RX
AnnaBridge 156:ff21514d8981 549 * @arg @ref LL_LPUART_DIRECTION_TX
AnnaBridge 156:ff21514d8981 550 * @arg @ref LL_LPUART_DIRECTION_TX_RX
AnnaBridge 156:ff21514d8981 551 */
AnnaBridge 156:ff21514d8981 552 __STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 553 {
AnnaBridge 156:ff21514d8981 554 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE));
AnnaBridge 156:ff21514d8981 555 }
AnnaBridge 156:ff21514d8981 556
AnnaBridge 156:ff21514d8981 557 /**
AnnaBridge 156:ff21514d8981 558 * @brief Configure Parity (enabled/disabled and parity mode if enabled)
AnnaBridge 156:ff21514d8981 559 * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
AnnaBridge 156:ff21514d8981 560 * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
AnnaBridge 156:ff21514d8981 561 * (depending on data width) and parity is checked on the received data.
AnnaBridge 156:ff21514d8981 562 * @rmtoll CR1 PS LL_LPUART_SetParity\n
AnnaBridge 156:ff21514d8981 563 * CR1 PCE LL_LPUART_SetParity
AnnaBridge 156:ff21514d8981 564 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 565 * @param Parity This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 566 * @arg @ref LL_LPUART_PARITY_NONE
AnnaBridge 156:ff21514d8981 567 * @arg @ref LL_LPUART_PARITY_EVEN
AnnaBridge 156:ff21514d8981 568 * @arg @ref LL_LPUART_PARITY_ODD
AnnaBridge 156:ff21514d8981 569 * @retval None
AnnaBridge 156:ff21514d8981 570 */
AnnaBridge 156:ff21514d8981 571 __STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity)
AnnaBridge 156:ff21514d8981 572 {
AnnaBridge 156:ff21514d8981 573 MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
AnnaBridge 156:ff21514d8981 574 }
AnnaBridge 156:ff21514d8981 575
AnnaBridge 156:ff21514d8981 576 /**
AnnaBridge 156:ff21514d8981 577 * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
AnnaBridge 156:ff21514d8981 578 * @rmtoll CR1 PS LL_LPUART_GetParity\n
AnnaBridge 156:ff21514d8981 579 * CR1 PCE LL_LPUART_GetParity
AnnaBridge 156:ff21514d8981 580 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 581 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 582 * @arg @ref LL_LPUART_PARITY_NONE
AnnaBridge 156:ff21514d8981 583 * @arg @ref LL_LPUART_PARITY_EVEN
AnnaBridge 156:ff21514d8981 584 * @arg @ref LL_LPUART_PARITY_ODD
AnnaBridge 156:ff21514d8981 585 */
AnnaBridge 156:ff21514d8981 586 __STATIC_INLINE uint32_t LL_LPUART_GetParity(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 587 {
AnnaBridge 156:ff21514d8981 588 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
AnnaBridge 156:ff21514d8981 589 }
AnnaBridge 156:ff21514d8981 590
AnnaBridge 156:ff21514d8981 591 /**
AnnaBridge 156:ff21514d8981 592 * @brief Set Receiver Wake Up method from Mute mode.
AnnaBridge 156:ff21514d8981 593 * @rmtoll CR1 WAKE LL_LPUART_SetWakeUpMethod
AnnaBridge 156:ff21514d8981 594 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 595 * @param Method This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 596 * @arg @ref LL_LPUART_WAKEUP_IDLELINE
AnnaBridge 156:ff21514d8981 597 * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
AnnaBridge 156:ff21514d8981 598 * @retval None
AnnaBridge 156:ff21514d8981 599 */
AnnaBridge 156:ff21514d8981 600 __STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method)
AnnaBridge 156:ff21514d8981 601 {
AnnaBridge 156:ff21514d8981 602 MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method);
AnnaBridge 156:ff21514d8981 603 }
AnnaBridge 156:ff21514d8981 604
AnnaBridge 156:ff21514d8981 605 /**
AnnaBridge 156:ff21514d8981 606 * @brief Return Receiver Wake Up method from Mute mode
AnnaBridge 156:ff21514d8981 607 * @rmtoll CR1 WAKE LL_LPUART_GetWakeUpMethod
AnnaBridge 156:ff21514d8981 608 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 609 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 610 * @arg @ref LL_LPUART_WAKEUP_IDLELINE
AnnaBridge 156:ff21514d8981 611 * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
AnnaBridge 156:ff21514d8981 612 */
AnnaBridge 156:ff21514d8981 613 __STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 614 {
AnnaBridge 156:ff21514d8981 615 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE));
AnnaBridge 156:ff21514d8981 616 }
AnnaBridge 156:ff21514d8981 617
AnnaBridge 156:ff21514d8981 618 /**
AnnaBridge 156:ff21514d8981 619 * @brief Set Word length (nb of data bits, excluding start and stop bits)
AnnaBridge 156:ff21514d8981 620 * @rmtoll CR1 M LL_LPUART_SetDataWidth
AnnaBridge 156:ff21514d8981 621 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 622 * @param DataWidth This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 623 * @arg @ref LL_LPUART_DATAWIDTH_7B
AnnaBridge 156:ff21514d8981 624 * @arg @ref LL_LPUART_DATAWIDTH_8B
AnnaBridge 156:ff21514d8981 625 * @arg @ref LL_LPUART_DATAWIDTH_9B
AnnaBridge 156:ff21514d8981 626 * @retval None
AnnaBridge 156:ff21514d8981 627 */
AnnaBridge 156:ff21514d8981 628 __STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth)
AnnaBridge 156:ff21514d8981 629 {
AnnaBridge 156:ff21514d8981 630 MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth);
AnnaBridge 156:ff21514d8981 631 }
AnnaBridge 156:ff21514d8981 632
AnnaBridge 156:ff21514d8981 633 /**
AnnaBridge 156:ff21514d8981 634 * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
AnnaBridge 156:ff21514d8981 635 * @rmtoll CR1 M LL_LPUART_GetDataWidth
AnnaBridge 156:ff21514d8981 636 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 637 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 638 * @arg @ref LL_LPUART_DATAWIDTH_7B
AnnaBridge 156:ff21514d8981 639 * @arg @ref LL_LPUART_DATAWIDTH_8B
AnnaBridge 156:ff21514d8981 640 * @arg @ref LL_LPUART_DATAWIDTH_9B
AnnaBridge 156:ff21514d8981 641 */
AnnaBridge 156:ff21514d8981 642 __STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 643 {
AnnaBridge 156:ff21514d8981 644 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M));
AnnaBridge 156:ff21514d8981 645 }
AnnaBridge 156:ff21514d8981 646
AnnaBridge 156:ff21514d8981 647 /**
AnnaBridge 156:ff21514d8981 648 * @brief Allow switch between Mute Mode and Active mode
AnnaBridge 156:ff21514d8981 649 * @rmtoll CR1 MME LL_LPUART_EnableMuteMode
AnnaBridge 156:ff21514d8981 650 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 651 * @retval None
AnnaBridge 156:ff21514d8981 652 */
AnnaBridge 156:ff21514d8981 653 __STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 654 {
AnnaBridge 156:ff21514d8981 655 SET_BIT(LPUARTx->CR1, USART_CR1_MME);
AnnaBridge 156:ff21514d8981 656 }
AnnaBridge 156:ff21514d8981 657
AnnaBridge 156:ff21514d8981 658 /**
AnnaBridge 156:ff21514d8981 659 * @brief Prevent Mute Mode use. Set Receiver in active mode permanently.
AnnaBridge 156:ff21514d8981 660 * @rmtoll CR1 MME LL_LPUART_DisableMuteMode
AnnaBridge 156:ff21514d8981 661 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 662 * @retval None
AnnaBridge 156:ff21514d8981 663 */
AnnaBridge 156:ff21514d8981 664 __STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 665 {
AnnaBridge 156:ff21514d8981 666 CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME);
AnnaBridge 156:ff21514d8981 667 }
AnnaBridge 156:ff21514d8981 668
AnnaBridge 156:ff21514d8981 669 /**
AnnaBridge 156:ff21514d8981 670 * @brief Indicate if switch between Mute Mode and Active mode is allowed
AnnaBridge 156:ff21514d8981 671 * @rmtoll CR1 MME LL_LPUART_IsEnabledMuteMode
AnnaBridge 156:ff21514d8981 672 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 673 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 674 */
AnnaBridge 156:ff21514d8981 675 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 676 {
AnnaBridge 156:ff21514d8981 677 return (READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
AnnaBridge 156:ff21514d8981 678 }
AnnaBridge 156:ff21514d8981 679
AnnaBridge 156:ff21514d8981 680 /**
AnnaBridge 156:ff21514d8981 681 * @brief Set the length of the stop bits
AnnaBridge 156:ff21514d8981 682 * @rmtoll CR2 STOP LL_LPUART_SetStopBitsLength
AnnaBridge 156:ff21514d8981 683 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 684 * @param StopBits This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 685 * @arg @ref LL_LPUART_STOPBITS_1
AnnaBridge 156:ff21514d8981 686 * @arg @ref LL_LPUART_STOPBITS_2
AnnaBridge 156:ff21514d8981 687 * @retval None
AnnaBridge 156:ff21514d8981 688 */
AnnaBridge 156:ff21514d8981 689 __STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits)
AnnaBridge 156:ff21514d8981 690 {
AnnaBridge 156:ff21514d8981 691 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
AnnaBridge 156:ff21514d8981 692 }
AnnaBridge 156:ff21514d8981 693
AnnaBridge 156:ff21514d8981 694 /**
AnnaBridge 156:ff21514d8981 695 * @brief Retrieve the length of the stop bits
AnnaBridge 156:ff21514d8981 696 * @rmtoll CR2 STOP LL_LPUART_GetStopBitsLength
AnnaBridge 156:ff21514d8981 697 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 698 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 699 * @arg @ref LL_LPUART_STOPBITS_1
AnnaBridge 156:ff21514d8981 700 * @arg @ref LL_LPUART_STOPBITS_2
AnnaBridge 156:ff21514d8981 701 */
AnnaBridge 156:ff21514d8981 702 __STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 703 {
AnnaBridge 156:ff21514d8981 704 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP));
AnnaBridge 156:ff21514d8981 705 }
AnnaBridge 156:ff21514d8981 706
AnnaBridge 156:ff21514d8981 707 /**
AnnaBridge 156:ff21514d8981 708 * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
AnnaBridge 156:ff21514d8981 709 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 156:ff21514d8981 710 * - Data Width configuration using @ref LL_LPUART_SetDataWidth() function
AnnaBridge 156:ff21514d8981 711 * - Parity Control and mode configuration using @ref LL_LPUART_SetParity() function
AnnaBridge 156:ff21514d8981 712 * - Stop bits configuration using @ref LL_LPUART_SetStopBitsLength() function
AnnaBridge 156:ff21514d8981 713 * @rmtoll CR1 PS LL_LPUART_ConfigCharacter\n
AnnaBridge 156:ff21514d8981 714 * CR1 PCE LL_LPUART_ConfigCharacter\n
AnnaBridge 156:ff21514d8981 715 * CR1 M LL_LPUART_ConfigCharacter\n
AnnaBridge 156:ff21514d8981 716 * CR2 STOP LL_LPUART_ConfigCharacter
AnnaBridge 156:ff21514d8981 717 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 718 * @param DataWidth This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 719 * @arg @ref LL_LPUART_DATAWIDTH_7B
AnnaBridge 156:ff21514d8981 720 * @arg @ref LL_LPUART_DATAWIDTH_8B
AnnaBridge 156:ff21514d8981 721 * @arg @ref LL_LPUART_DATAWIDTH_9B
AnnaBridge 156:ff21514d8981 722 * @param Parity This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 723 * @arg @ref LL_LPUART_PARITY_NONE
AnnaBridge 156:ff21514d8981 724 * @arg @ref LL_LPUART_PARITY_EVEN
AnnaBridge 156:ff21514d8981 725 * @arg @ref LL_LPUART_PARITY_ODD
AnnaBridge 156:ff21514d8981 726 * @param StopBits This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 727 * @arg @ref LL_LPUART_STOPBITS_1
AnnaBridge 156:ff21514d8981 728 * @arg @ref LL_LPUART_STOPBITS_2
AnnaBridge 156:ff21514d8981 729 * @retval None
AnnaBridge 156:ff21514d8981 730 */
AnnaBridge 156:ff21514d8981 731 __STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity,
AnnaBridge 156:ff21514d8981 732 uint32_t StopBits)
AnnaBridge 156:ff21514d8981 733 {
AnnaBridge 156:ff21514d8981 734 MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
AnnaBridge 156:ff21514d8981 735 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
AnnaBridge 156:ff21514d8981 736 }
AnnaBridge 156:ff21514d8981 737
AnnaBridge 156:ff21514d8981 738 /**
AnnaBridge 156:ff21514d8981 739 * @brief Configure TX/RX pins swapping setting.
AnnaBridge 156:ff21514d8981 740 * @rmtoll CR2 SWAP LL_LPUART_SetTXRXSwap
AnnaBridge 156:ff21514d8981 741 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 742 * @param SwapConfig This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 743 * @arg @ref LL_LPUART_TXRX_STANDARD
AnnaBridge 156:ff21514d8981 744 * @arg @ref LL_LPUART_TXRX_SWAPPED
AnnaBridge 156:ff21514d8981 745 * @retval None
AnnaBridge 156:ff21514d8981 746 */
AnnaBridge 156:ff21514d8981 747 __STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig)
AnnaBridge 156:ff21514d8981 748 {
AnnaBridge 156:ff21514d8981 749 MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig);
AnnaBridge 156:ff21514d8981 750 }
AnnaBridge 156:ff21514d8981 751
AnnaBridge 156:ff21514d8981 752 /**
AnnaBridge 156:ff21514d8981 753 * @brief Retrieve TX/RX pins swapping configuration.
AnnaBridge 156:ff21514d8981 754 * @rmtoll CR2 SWAP LL_LPUART_GetTXRXSwap
AnnaBridge 156:ff21514d8981 755 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 756 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 757 * @arg @ref LL_LPUART_TXRX_STANDARD
AnnaBridge 156:ff21514d8981 758 * @arg @ref LL_LPUART_TXRX_SWAPPED
AnnaBridge 156:ff21514d8981 759 */
AnnaBridge 156:ff21514d8981 760 __STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 761 {
AnnaBridge 156:ff21514d8981 762 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP));
AnnaBridge 156:ff21514d8981 763 }
AnnaBridge 156:ff21514d8981 764
AnnaBridge 156:ff21514d8981 765 /**
AnnaBridge 156:ff21514d8981 766 * @brief Configure RX pin active level logic
AnnaBridge 156:ff21514d8981 767 * @rmtoll CR2 RXINV LL_LPUART_SetRXPinLevel
AnnaBridge 156:ff21514d8981 768 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 769 * @param PinInvMethod This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 770 * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
AnnaBridge 156:ff21514d8981 771 * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
AnnaBridge 156:ff21514d8981 772 * @retval None
AnnaBridge 156:ff21514d8981 773 */
AnnaBridge 156:ff21514d8981 774 __STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
AnnaBridge 156:ff21514d8981 775 {
AnnaBridge 156:ff21514d8981 776 MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod);
AnnaBridge 156:ff21514d8981 777 }
AnnaBridge 156:ff21514d8981 778
AnnaBridge 156:ff21514d8981 779 /**
AnnaBridge 156:ff21514d8981 780 * @brief Retrieve RX pin active level logic configuration
AnnaBridge 156:ff21514d8981 781 * @rmtoll CR2 RXINV LL_LPUART_GetRXPinLevel
AnnaBridge 156:ff21514d8981 782 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 783 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 784 * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
AnnaBridge 156:ff21514d8981 785 * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
AnnaBridge 156:ff21514d8981 786 */
AnnaBridge 156:ff21514d8981 787 __STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 788 {
AnnaBridge 156:ff21514d8981 789 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV));
AnnaBridge 156:ff21514d8981 790 }
AnnaBridge 156:ff21514d8981 791
AnnaBridge 156:ff21514d8981 792 /**
AnnaBridge 156:ff21514d8981 793 * @brief Configure TX pin active level logic
AnnaBridge 156:ff21514d8981 794 * @rmtoll CR2 TXINV LL_LPUART_SetTXPinLevel
AnnaBridge 156:ff21514d8981 795 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 796 * @param PinInvMethod This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 797 * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
AnnaBridge 156:ff21514d8981 798 * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
AnnaBridge 156:ff21514d8981 799 * @retval None
AnnaBridge 156:ff21514d8981 800 */
AnnaBridge 156:ff21514d8981 801 __STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
AnnaBridge 156:ff21514d8981 802 {
AnnaBridge 156:ff21514d8981 803 MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod);
AnnaBridge 156:ff21514d8981 804 }
AnnaBridge 156:ff21514d8981 805
AnnaBridge 156:ff21514d8981 806 /**
AnnaBridge 156:ff21514d8981 807 * @brief Retrieve TX pin active level logic configuration
AnnaBridge 156:ff21514d8981 808 * @rmtoll CR2 TXINV LL_LPUART_GetTXPinLevel
AnnaBridge 156:ff21514d8981 809 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 810 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 811 * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
AnnaBridge 156:ff21514d8981 812 * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
AnnaBridge 156:ff21514d8981 813 */
AnnaBridge 156:ff21514d8981 814 __STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 815 {
AnnaBridge 156:ff21514d8981 816 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV));
AnnaBridge 156:ff21514d8981 817 }
AnnaBridge 156:ff21514d8981 818
AnnaBridge 156:ff21514d8981 819 /**
AnnaBridge 156:ff21514d8981 820 * @brief Configure Binary data logic.
AnnaBridge 156:ff21514d8981 821 *
AnnaBridge 156:ff21514d8981 822 * @note Allow to define how Logical data from the data register are send/received :
AnnaBridge 156:ff21514d8981 823 * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
AnnaBridge 156:ff21514d8981 824 * @rmtoll CR2 DATAINV LL_LPUART_SetBinaryDataLogic
AnnaBridge 156:ff21514d8981 825 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 826 * @param DataLogic This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 827 * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
AnnaBridge 156:ff21514d8981 828 * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
AnnaBridge 156:ff21514d8981 829 * @retval None
AnnaBridge 156:ff21514d8981 830 */
AnnaBridge 156:ff21514d8981 831 __STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic)
AnnaBridge 156:ff21514d8981 832 {
AnnaBridge 156:ff21514d8981 833 MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic);
AnnaBridge 156:ff21514d8981 834 }
AnnaBridge 156:ff21514d8981 835
AnnaBridge 156:ff21514d8981 836 /**
AnnaBridge 156:ff21514d8981 837 * @brief Retrieve Binary data configuration
AnnaBridge 156:ff21514d8981 838 * @rmtoll CR2 DATAINV LL_LPUART_GetBinaryDataLogic
AnnaBridge 156:ff21514d8981 839 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 840 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 841 * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
AnnaBridge 156:ff21514d8981 842 * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
AnnaBridge 156:ff21514d8981 843 */
AnnaBridge 156:ff21514d8981 844 __STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 845 {
AnnaBridge 156:ff21514d8981 846 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV));
AnnaBridge 156:ff21514d8981 847 }
AnnaBridge 156:ff21514d8981 848
AnnaBridge 156:ff21514d8981 849 /**
AnnaBridge 156:ff21514d8981 850 * @brief Configure transfer bit order (either Less or Most Significant Bit First)
AnnaBridge 156:ff21514d8981 851 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
AnnaBridge 156:ff21514d8981 852 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
AnnaBridge 156:ff21514d8981 853 * @rmtoll CR2 MSBFIRST LL_LPUART_SetTransferBitOrder
AnnaBridge 156:ff21514d8981 854 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 855 * @param BitOrder This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 856 * @arg @ref LL_LPUART_BITORDER_LSBFIRST
AnnaBridge 156:ff21514d8981 857 * @arg @ref LL_LPUART_BITORDER_MSBFIRST
AnnaBridge 156:ff21514d8981 858 * @retval None
AnnaBridge 156:ff21514d8981 859 */
AnnaBridge 156:ff21514d8981 860 __STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder)
AnnaBridge 156:ff21514d8981 861 {
AnnaBridge 156:ff21514d8981 862 MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
AnnaBridge 156:ff21514d8981 863 }
AnnaBridge 156:ff21514d8981 864
AnnaBridge 156:ff21514d8981 865 /**
AnnaBridge 156:ff21514d8981 866 * @brief Return transfer bit order (either Less or Most Significant Bit First)
AnnaBridge 156:ff21514d8981 867 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
AnnaBridge 156:ff21514d8981 868 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
AnnaBridge 156:ff21514d8981 869 * @rmtoll CR2 MSBFIRST LL_LPUART_GetTransferBitOrder
AnnaBridge 156:ff21514d8981 870 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 871 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 872 * @arg @ref LL_LPUART_BITORDER_LSBFIRST
AnnaBridge 156:ff21514d8981 873 * @arg @ref LL_LPUART_BITORDER_MSBFIRST
AnnaBridge 156:ff21514d8981 874 */
AnnaBridge 156:ff21514d8981 875 __STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 876 {
AnnaBridge 156:ff21514d8981 877 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST));
AnnaBridge 156:ff21514d8981 878 }
AnnaBridge 156:ff21514d8981 879
AnnaBridge 156:ff21514d8981 880 /**
AnnaBridge 156:ff21514d8981 881 * @brief Set Address of the LPUART node.
AnnaBridge 156:ff21514d8981 882 * @note This is used in multiprocessor communication during Mute mode or Stop mode,
AnnaBridge 156:ff21514d8981 883 * for wake up with address mark detection.
AnnaBridge 156:ff21514d8981 884 * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7.
AnnaBridge 156:ff21514d8981 885 * (b7-b4 should be set to 0)
AnnaBridge 156:ff21514d8981 886 * 8bits address node is used when 7-bit Address Detection is selected in ADDM7.
AnnaBridge 156:ff21514d8981 887 * (This is used in multiprocessor communication during Mute mode or Stop mode,
AnnaBridge 156:ff21514d8981 888 * for wake up with 7-bit address mark detection.
AnnaBridge 156:ff21514d8981 889 * The MSB of the character sent by the transmitter should be equal to 1.
AnnaBridge 156:ff21514d8981 890 * It may also be used for character detection during normal reception,
AnnaBridge 156:ff21514d8981 891 * Mute mode inactive (for example, end of block detection in ModBus protocol).
AnnaBridge 156:ff21514d8981 892 * In this case, the whole received character (8-bit) is compared to the ADD[7:0]
AnnaBridge 156:ff21514d8981 893 * value and CMF flag is set on match)
AnnaBridge 156:ff21514d8981 894 * @rmtoll CR2 ADD LL_LPUART_ConfigNodeAddress\n
AnnaBridge 156:ff21514d8981 895 * CR2 ADDM7 LL_LPUART_ConfigNodeAddress
AnnaBridge 156:ff21514d8981 896 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 897 * @param AddressLen This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 898 * @arg @ref LL_LPUART_ADDRESS_DETECT_4B
AnnaBridge 156:ff21514d8981 899 * @arg @ref LL_LPUART_ADDRESS_DETECT_7B
AnnaBridge 156:ff21514d8981 900 * @param NodeAddress 4 or 7 bit Address of the LPUART node.
AnnaBridge 156:ff21514d8981 901 * @retval None
AnnaBridge 156:ff21514d8981 902 */
AnnaBridge 156:ff21514d8981 903 __STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress)
AnnaBridge 156:ff21514d8981 904 {
AnnaBridge 156:ff21514d8981 905 MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
AnnaBridge 156:ff21514d8981 906 (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos)));
AnnaBridge 156:ff21514d8981 907 }
AnnaBridge 156:ff21514d8981 908
AnnaBridge 156:ff21514d8981 909 /**
AnnaBridge 156:ff21514d8981 910 * @brief Return 8 bit Address of the LPUART node as set in ADD field of CR2.
AnnaBridge 156:ff21514d8981 911 * @note If 4-bit Address Detection is selected in ADDM7,
AnnaBridge 156:ff21514d8981 912 * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
AnnaBridge 156:ff21514d8981 913 * If 7-bit Address Detection is selected in ADDM7,
AnnaBridge 156:ff21514d8981 914 * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
AnnaBridge 156:ff21514d8981 915 * @rmtoll CR2 ADD LL_LPUART_GetNodeAddress
AnnaBridge 156:ff21514d8981 916 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 917 * @retval Address of the LPUART node (Value between Min_Data=0 and Max_Data=255)
AnnaBridge 156:ff21514d8981 918 */
AnnaBridge 156:ff21514d8981 919 __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 920 {
AnnaBridge 156:ff21514d8981 921 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos);
AnnaBridge 156:ff21514d8981 922 }
AnnaBridge 156:ff21514d8981 923
AnnaBridge 156:ff21514d8981 924 /**
AnnaBridge 156:ff21514d8981 925 * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
AnnaBridge 156:ff21514d8981 926 * @rmtoll CR2 ADDM7 LL_LPUART_GetNodeAddressLen
AnnaBridge 156:ff21514d8981 927 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 928 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 929 * @arg @ref LL_LPUART_ADDRESS_DETECT_4B
AnnaBridge 156:ff21514d8981 930 * @arg @ref LL_LPUART_ADDRESS_DETECT_7B
AnnaBridge 156:ff21514d8981 931 */
AnnaBridge 156:ff21514d8981 932 __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 933 {
AnnaBridge 156:ff21514d8981 934 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7));
AnnaBridge 156:ff21514d8981 935 }
AnnaBridge 156:ff21514d8981 936
AnnaBridge 156:ff21514d8981 937 /**
AnnaBridge 156:ff21514d8981 938 * @brief Enable RTS HW Flow Control
AnnaBridge 156:ff21514d8981 939 * @rmtoll CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl
AnnaBridge 156:ff21514d8981 940 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 941 * @retval None
AnnaBridge 156:ff21514d8981 942 */
AnnaBridge 156:ff21514d8981 943 __STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 944 {
AnnaBridge 156:ff21514d8981 945 SET_BIT(LPUARTx->CR3, USART_CR3_RTSE);
AnnaBridge 156:ff21514d8981 946 }
AnnaBridge 156:ff21514d8981 947
AnnaBridge 156:ff21514d8981 948 /**
AnnaBridge 156:ff21514d8981 949 * @brief Disable RTS HW Flow Control
AnnaBridge 156:ff21514d8981 950 * @rmtoll CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl
AnnaBridge 156:ff21514d8981 951 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 952 * @retval None
AnnaBridge 156:ff21514d8981 953 */
AnnaBridge 156:ff21514d8981 954 __STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 955 {
AnnaBridge 156:ff21514d8981 956 CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE);
AnnaBridge 156:ff21514d8981 957 }
AnnaBridge 156:ff21514d8981 958
AnnaBridge 156:ff21514d8981 959 /**
AnnaBridge 156:ff21514d8981 960 * @brief Enable CTS HW Flow Control
AnnaBridge 156:ff21514d8981 961 * @rmtoll CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl
AnnaBridge 156:ff21514d8981 962 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 963 * @retval None
AnnaBridge 156:ff21514d8981 964 */
AnnaBridge 156:ff21514d8981 965 __STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 966 {
AnnaBridge 156:ff21514d8981 967 SET_BIT(LPUARTx->CR3, USART_CR3_CTSE);
AnnaBridge 156:ff21514d8981 968 }
AnnaBridge 156:ff21514d8981 969
AnnaBridge 156:ff21514d8981 970 /**
AnnaBridge 156:ff21514d8981 971 * @brief Disable CTS HW Flow Control
AnnaBridge 156:ff21514d8981 972 * @rmtoll CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl
AnnaBridge 156:ff21514d8981 973 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 974 * @retval None
AnnaBridge 156:ff21514d8981 975 */
AnnaBridge 156:ff21514d8981 976 __STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 977 {
AnnaBridge 156:ff21514d8981 978 CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE);
AnnaBridge 156:ff21514d8981 979 }
AnnaBridge 156:ff21514d8981 980
AnnaBridge 156:ff21514d8981 981 /**
AnnaBridge 156:ff21514d8981 982 * @brief Configure HW Flow Control mode (both CTS and RTS)
AnnaBridge 156:ff21514d8981 983 * @rmtoll CR3 RTSE LL_LPUART_SetHWFlowCtrl\n
AnnaBridge 156:ff21514d8981 984 * CR3 CTSE LL_LPUART_SetHWFlowCtrl
AnnaBridge 156:ff21514d8981 985 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 986 * @param HardwareFlowControl This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 987 * @arg @ref LL_LPUART_HWCONTROL_NONE
AnnaBridge 156:ff21514d8981 988 * @arg @ref LL_LPUART_HWCONTROL_RTS
AnnaBridge 156:ff21514d8981 989 * @arg @ref LL_LPUART_HWCONTROL_CTS
AnnaBridge 156:ff21514d8981 990 * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
AnnaBridge 156:ff21514d8981 991 * @retval None
AnnaBridge 156:ff21514d8981 992 */
AnnaBridge 156:ff21514d8981 993 __STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl)
AnnaBridge 156:ff21514d8981 994 {
AnnaBridge 156:ff21514d8981 995 MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
AnnaBridge 156:ff21514d8981 996 }
AnnaBridge 156:ff21514d8981 997
AnnaBridge 156:ff21514d8981 998 /**
AnnaBridge 156:ff21514d8981 999 * @brief Return HW Flow Control configuration (both CTS and RTS)
AnnaBridge 156:ff21514d8981 1000 * @rmtoll CR3 RTSE LL_LPUART_GetHWFlowCtrl\n
AnnaBridge 156:ff21514d8981 1001 * CR3 CTSE LL_LPUART_GetHWFlowCtrl
AnnaBridge 156:ff21514d8981 1002 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1003 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 1004 * @arg @ref LL_LPUART_HWCONTROL_NONE
AnnaBridge 156:ff21514d8981 1005 * @arg @ref LL_LPUART_HWCONTROL_RTS
AnnaBridge 156:ff21514d8981 1006 * @arg @ref LL_LPUART_HWCONTROL_CTS
AnnaBridge 156:ff21514d8981 1007 * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
AnnaBridge 156:ff21514d8981 1008 */
AnnaBridge 156:ff21514d8981 1009 __STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1010 {
AnnaBridge 156:ff21514d8981 1011 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
AnnaBridge 156:ff21514d8981 1012 }
AnnaBridge 156:ff21514d8981 1013
AnnaBridge 156:ff21514d8981 1014 /**
AnnaBridge 156:ff21514d8981 1015 * @brief Enable Overrun detection
AnnaBridge 156:ff21514d8981 1016 * @rmtoll CR3 OVRDIS LL_LPUART_EnableOverrunDetect
AnnaBridge 156:ff21514d8981 1017 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1018 * @retval None
AnnaBridge 156:ff21514d8981 1019 */
AnnaBridge 156:ff21514d8981 1020 __STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1021 {
AnnaBridge 156:ff21514d8981 1022 CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
AnnaBridge 156:ff21514d8981 1023 }
AnnaBridge 156:ff21514d8981 1024
AnnaBridge 156:ff21514d8981 1025 /**
AnnaBridge 156:ff21514d8981 1026 * @brief Disable Overrun detection
AnnaBridge 156:ff21514d8981 1027 * @rmtoll CR3 OVRDIS LL_LPUART_DisableOverrunDetect
AnnaBridge 156:ff21514d8981 1028 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1029 * @retval None
AnnaBridge 156:ff21514d8981 1030 */
AnnaBridge 156:ff21514d8981 1031 __STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1032 {
AnnaBridge 156:ff21514d8981 1033 SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
AnnaBridge 156:ff21514d8981 1034 }
AnnaBridge 156:ff21514d8981 1035
AnnaBridge 156:ff21514d8981 1036 /**
AnnaBridge 156:ff21514d8981 1037 * @brief Indicate if Overrun detection is enabled
AnnaBridge 156:ff21514d8981 1038 * @rmtoll CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect
AnnaBridge 156:ff21514d8981 1039 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1040 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1041 */
AnnaBridge 156:ff21514d8981 1042 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1043 {
AnnaBridge 156:ff21514d8981 1044 return (READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS);
AnnaBridge 156:ff21514d8981 1045 }
AnnaBridge 156:ff21514d8981 1046
AnnaBridge 156:ff21514d8981 1047 /**
AnnaBridge 156:ff21514d8981 1048 * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
AnnaBridge 156:ff21514d8981 1049 * @rmtoll CR3 WUS LL_LPUART_SetWKUPType
AnnaBridge 156:ff21514d8981 1050 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1051 * @param Type This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 1052 * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
AnnaBridge 156:ff21514d8981 1053 * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
AnnaBridge 156:ff21514d8981 1054 * @arg @ref LL_LPUART_WAKEUP_ON_RXNE
AnnaBridge 156:ff21514d8981 1055 * @retval None
AnnaBridge 156:ff21514d8981 1056 */
AnnaBridge 156:ff21514d8981 1057 __STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type)
AnnaBridge 156:ff21514d8981 1058 {
AnnaBridge 156:ff21514d8981 1059 MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type);
AnnaBridge 156:ff21514d8981 1060 }
AnnaBridge 156:ff21514d8981 1061
AnnaBridge 156:ff21514d8981 1062 /**
AnnaBridge 156:ff21514d8981 1063 * @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits)
AnnaBridge 156:ff21514d8981 1064 * @rmtoll CR3 WUS LL_LPUART_GetWKUPType
AnnaBridge 156:ff21514d8981 1065 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1066 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 1067 * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
AnnaBridge 156:ff21514d8981 1068 * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
AnnaBridge 156:ff21514d8981 1069 * @arg @ref LL_LPUART_WAKEUP_ON_RXNE
AnnaBridge 156:ff21514d8981 1070 */
AnnaBridge 156:ff21514d8981 1071 __STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1072 {
AnnaBridge 156:ff21514d8981 1073 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS));
AnnaBridge 156:ff21514d8981 1074 }
AnnaBridge 156:ff21514d8981 1075
AnnaBridge 156:ff21514d8981 1076 /**
AnnaBridge 156:ff21514d8981 1077 * @brief Configure LPUART BRR register for achieving expected Baud Rate value.
AnnaBridge 156:ff21514d8981 1078 *
AnnaBridge 156:ff21514d8981 1079 * @note Compute and set LPUARTDIV value in BRR Register (full BRR content)
AnnaBridge 156:ff21514d8981 1080 * according to used Peripheral Clock and expected Baud Rate values
AnnaBridge 156:ff21514d8981 1081 * @note Peripheral clock and Baud Rate values provided as function parameters should be valid
AnnaBridge 156:ff21514d8981 1082 * (Baud rate value != 0).
AnnaBridge 156:ff21514d8981 1083 * @note Provided that LPUARTx_BRR must be > = 0x300 and LPUART_BRR is 20-bit,
AnnaBridge 156:ff21514d8981 1084 * a care should be taken when generating high baud rates using high PeriphClk
AnnaBridge 156:ff21514d8981 1085 * values. PeriphClk must be in the range [3 x BaudRate, 4096 x BaudRate].
AnnaBridge 156:ff21514d8981 1086 * @rmtoll BRR BRR LL_LPUART_SetBaudRate
AnnaBridge 156:ff21514d8981 1087 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1088 * @param PeriphClk Peripheral Clock
AnnaBridge 156:ff21514d8981 1089 * @param BaudRate Baud Rate
AnnaBridge 156:ff21514d8981 1090 * @retval None
AnnaBridge 156:ff21514d8981 1091 */
AnnaBridge 156:ff21514d8981 1092 __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t BaudRate)
AnnaBridge 156:ff21514d8981 1093 {
AnnaBridge 156:ff21514d8981 1094 LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
AnnaBridge 156:ff21514d8981 1095 }
AnnaBridge 156:ff21514d8981 1096
AnnaBridge 156:ff21514d8981 1097 /**
AnnaBridge 156:ff21514d8981 1098 * @brief Return current Baud Rate value, according to LPUARTDIV present in BRR register
AnnaBridge 156:ff21514d8981 1099 * (full BRR content), and to used Peripheral Clock values
AnnaBridge 156:ff21514d8981 1100 * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
AnnaBridge 156:ff21514d8981 1101 * @rmtoll BRR BRR LL_LPUART_GetBaudRate
AnnaBridge 156:ff21514d8981 1102 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1103 * @param PeriphClk Peripheral Clock
AnnaBridge 156:ff21514d8981 1104 * @retval Baud Rate
AnnaBridge 156:ff21514d8981 1105 */
AnnaBridge 156:ff21514d8981 1106 __STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk)
AnnaBridge 156:ff21514d8981 1107 {
AnnaBridge 156:ff21514d8981 1108 register uint32_t lpuartdiv = 0x0U;
AnnaBridge 156:ff21514d8981 1109 register uint32_t brrresult = 0x0U;
AnnaBridge 156:ff21514d8981 1110
AnnaBridge 156:ff21514d8981 1111 lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK;
AnnaBridge 156:ff21514d8981 1112
AnnaBridge 156:ff21514d8981 1113 if (lpuartdiv >= LPUART_BRR_MIN_VALUE)
AnnaBridge 156:ff21514d8981 1114 {
AnnaBridge 156:ff21514d8981 1115 brrresult = (uint32_t)(((uint64_t)(PeriphClk) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
AnnaBridge 156:ff21514d8981 1116 }
AnnaBridge 156:ff21514d8981 1117
AnnaBridge 156:ff21514d8981 1118 return (brrresult);
AnnaBridge 156:ff21514d8981 1119 }
AnnaBridge 156:ff21514d8981 1120
AnnaBridge 156:ff21514d8981 1121 /**
AnnaBridge 156:ff21514d8981 1122 * @}
AnnaBridge 156:ff21514d8981 1123 */
AnnaBridge 156:ff21514d8981 1124
AnnaBridge 156:ff21514d8981 1125 /** @defgroup LPUART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
AnnaBridge 156:ff21514d8981 1126 * @{
AnnaBridge 156:ff21514d8981 1127 */
AnnaBridge 156:ff21514d8981 1128
AnnaBridge 156:ff21514d8981 1129 /**
AnnaBridge 156:ff21514d8981 1130 * @brief Enable Single Wire Half-Duplex mode
AnnaBridge 156:ff21514d8981 1131 * @rmtoll CR3 HDSEL LL_LPUART_EnableHalfDuplex
AnnaBridge 156:ff21514d8981 1132 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1133 * @retval None
AnnaBridge 156:ff21514d8981 1134 */
AnnaBridge 156:ff21514d8981 1135 __STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1136 {
AnnaBridge 156:ff21514d8981 1137 SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
AnnaBridge 156:ff21514d8981 1138 }
AnnaBridge 156:ff21514d8981 1139
AnnaBridge 156:ff21514d8981 1140 /**
AnnaBridge 156:ff21514d8981 1141 * @brief Disable Single Wire Half-Duplex mode
AnnaBridge 156:ff21514d8981 1142 * @rmtoll CR3 HDSEL LL_LPUART_DisableHalfDuplex
AnnaBridge 156:ff21514d8981 1143 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1144 * @retval None
AnnaBridge 156:ff21514d8981 1145 */
AnnaBridge 156:ff21514d8981 1146 __STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1147 {
AnnaBridge 156:ff21514d8981 1148 CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
AnnaBridge 156:ff21514d8981 1149 }
AnnaBridge 156:ff21514d8981 1150
AnnaBridge 156:ff21514d8981 1151 /**
AnnaBridge 156:ff21514d8981 1152 * @brief Indicate if Single Wire Half-Duplex mode is enabled
AnnaBridge 156:ff21514d8981 1153 * @rmtoll CR3 HDSEL LL_LPUART_IsEnabledHalfDuplex
AnnaBridge 156:ff21514d8981 1154 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1155 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1156 */
AnnaBridge 156:ff21514d8981 1157 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1158 {
AnnaBridge 156:ff21514d8981 1159 return (READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
AnnaBridge 156:ff21514d8981 1160 }
AnnaBridge 156:ff21514d8981 1161
AnnaBridge 156:ff21514d8981 1162 /**
AnnaBridge 156:ff21514d8981 1163 * @}
AnnaBridge 156:ff21514d8981 1164 */
AnnaBridge 156:ff21514d8981 1165
AnnaBridge 156:ff21514d8981 1166 /** @defgroup LPUART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
AnnaBridge 156:ff21514d8981 1167 * @{
AnnaBridge 156:ff21514d8981 1168 */
AnnaBridge 156:ff21514d8981 1169
AnnaBridge 156:ff21514d8981 1170 /**
AnnaBridge 156:ff21514d8981 1171 * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits).
AnnaBridge 156:ff21514d8981 1172 * @rmtoll CR1 DEDT LL_LPUART_SetDEDeassertionTime
AnnaBridge 156:ff21514d8981 1173 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1174 * @param Time Value between Min_Data=0 and Max_Data=31
AnnaBridge 156:ff21514d8981 1175 * @retval None
AnnaBridge 156:ff21514d8981 1176 */
AnnaBridge 156:ff21514d8981 1177 __STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
AnnaBridge 156:ff21514d8981 1178 {
AnnaBridge 156:ff21514d8981 1179 MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
AnnaBridge 156:ff21514d8981 1180 }
AnnaBridge 156:ff21514d8981 1181
AnnaBridge 156:ff21514d8981 1182 /**
AnnaBridge 156:ff21514d8981 1183 * @brief Return DEDT (Driver Enable De-Assertion Time)
AnnaBridge 156:ff21514d8981 1184 * @rmtoll CR1 DEDT LL_LPUART_GetDEDeassertionTime
AnnaBridge 156:ff21514d8981 1185 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1186 * @retval Time value expressed on 5 bits ([4:0] bits) : c
AnnaBridge 156:ff21514d8981 1187 */
AnnaBridge 156:ff21514d8981 1188 __STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1189 {
AnnaBridge 156:ff21514d8981 1190 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos);
AnnaBridge 156:ff21514d8981 1191 }
AnnaBridge 156:ff21514d8981 1192
AnnaBridge 156:ff21514d8981 1193 /**
AnnaBridge 156:ff21514d8981 1194 * @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits).
AnnaBridge 156:ff21514d8981 1195 * @rmtoll CR1 DEAT LL_LPUART_SetDEAssertionTime
AnnaBridge 156:ff21514d8981 1196 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1197 * @param Time Value between Min_Data=0 and Max_Data=31
AnnaBridge 156:ff21514d8981 1198 * @retval None
AnnaBridge 156:ff21514d8981 1199 */
AnnaBridge 156:ff21514d8981 1200 __STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
AnnaBridge 156:ff21514d8981 1201 {
AnnaBridge 156:ff21514d8981 1202 MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
AnnaBridge 156:ff21514d8981 1203 }
AnnaBridge 156:ff21514d8981 1204
AnnaBridge 156:ff21514d8981 1205 /**
AnnaBridge 156:ff21514d8981 1206 * @brief Return DEAT (Driver Enable Assertion Time)
AnnaBridge 156:ff21514d8981 1207 * @rmtoll CR1 DEAT LL_LPUART_GetDEAssertionTime
AnnaBridge 156:ff21514d8981 1208 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1209 * @retval Time value expressed on 5 bits ([4:0] bits) : Time Value between Min_Data=0 and Max_Data=31
AnnaBridge 156:ff21514d8981 1210 */
AnnaBridge 156:ff21514d8981 1211 __STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1212 {
AnnaBridge 156:ff21514d8981 1213 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos);
AnnaBridge 156:ff21514d8981 1214 }
AnnaBridge 156:ff21514d8981 1215
AnnaBridge 156:ff21514d8981 1216 /**
AnnaBridge 156:ff21514d8981 1217 * @brief Enable Driver Enable (DE) Mode
AnnaBridge 156:ff21514d8981 1218 * @rmtoll CR3 DEM LL_LPUART_EnableDEMode
AnnaBridge 156:ff21514d8981 1219 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1220 * @retval None
AnnaBridge 156:ff21514d8981 1221 */
AnnaBridge 156:ff21514d8981 1222 __STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1223 {
AnnaBridge 156:ff21514d8981 1224 SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
AnnaBridge 156:ff21514d8981 1225 }
AnnaBridge 156:ff21514d8981 1226
AnnaBridge 156:ff21514d8981 1227 /**
AnnaBridge 156:ff21514d8981 1228 * @brief Disable Driver Enable (DE) Mode
AnnaBridge 156:ff21514d8981 1229 * @rmtoll CR3 DEM LL_LPUART_DisableDEMode
AnnaBridge 156:ff21514d8981 1230 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1231 * @retval None
AnnaBridge 156:ff21514d8981 1232 */
AnnaBridge 156:ff21514d8981 1233 __STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1234 {
AnnaBridge 156:ff21514d8981 1235 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DEM);
AnnaBridge 156:ff21514d8981 1236 }
AnnaBridge 156:ff21514d8981 1237
AnnaBridge 156:ff21514d8981 1238 /**
AnnaBridge 156:ff21514d8981 1239 * @brief Indicate if Driver Enable (DE) Mode is enabled
AnnaBridge 156:ff21514d8981 1240 * @rmtoll CR3 DEM LL_LPUART_IsEnabledDEMode
AnnaBridge 156:ff21514d8981 1241 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1242 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1243 */
AnnaBridge 156:ff21514d8981 1244 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1245 {
AnnaBridge 156:ff21514d8981 1246 return (READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM));
AnnaBridge 156:ff21514d8981 1247 }
AnnaBridge 156:ff21514d8981 1248
AnnaBridge 156:ff21514d8981 1249 /**
AnnaBridge 156:ff21514d8981 1250 * @brief Select Driver Enable Polarity
AnnaBridge 156:ff21514d8981 1251 * @rmtoll CR3 DEP LL_LPUART_SetDESignalPolarity
AnnaBridge 156:ff21514d8981 1252 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1253 * @param Polarity This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 1254 * @arg @ref LL_LPUART_DE_POLARITY_HIGH
AnnaBridge 156:ff21514d8981 1255 * @arg @ref LL_LPUART_DE_POLARITY_LOW
AnnaBridge 156:ff21514d8981 1256 * @retval None
AnnaBridge 156:ff21514d8981 1257 */
AnnaBridge 156:ff21514d8981 1258 __STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
AnnaBridge 156:ff21514d8981 1259 {
AnnaBridge 156:ff21514d8981 1260 MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
AnnaBridge 156:ff21514d8981 1261 }
AnnaBridge 156:ff21514d8981 1262
AnnaBridge 156:ff21514d8981 1263 /**
AnnaBridge 156:ff21514d8981 1264 * @brief Return Driver Enable Polarity
AnnaBridge 156:ff21514d8981 1265 * @rmtoll CR3 DEP LL_LPUART_GetDESignalPolarity
AnnaBridge 156:ff21514d8981 1266 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1267 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 1268 * @arg @ref LL_LPUART_DE_POLARITY_HIGH
AnnaBridge 156:ff21514d8981 1269 * @arg @ref LL_LPUART_DE_POLARITY_LOW
AnnaBridge 156:ff21514d8981 1270 */
AnnaBridge 156:ff21514d8981 1271 __STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1272 {
AnnaBridge 156:ff21514d8981 1273 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP));
AnnaBridge 156:ff21514d8981 1274 }
AnnaBridge 156:ff21514d8981 1275
AnnaBridge 156:ff21514d8981 1276 /**
AnnaBridge 156:ff21514d8981 1277 * @}
AnnaBridge 156:ff21514d8981 1278 */
AnnaBridge 156:ff21514d8981 1279
AnnaBridge 156:ff21514d8981 1280 /** @defgroup LPUART_LL_EF_FLAG_Management FLAG_Management
AnnaBridge 156:ff21514d8981 1281 * @{
AnnaBridge 156:ff21514d8981 1282 */
AnnaBridge 156:ff21514d8981 1283
AnnaBridge 156:ff21514d8981 1284 /**
AnnaBridge 156:ff21514d8981 1285 * @brief Check if the LPUART Parity Error Flag is set or not
AnnaBridge 156:ff21514d8981 1286 * @rmtoll ISR PE LL_LPUART_IsActiveFlag_PE
AnnaBridge 156:ff21514d8981 1287 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1288 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1289 */
AnnaBridge 156:ff21514d8981 1290 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1291 {
AnnaBridge 156:ff21514d8981 1292 return (READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE));
AnnaBridge 156:ff21514d8981 1293 }
AnnaBridge 156:ff21514d8981 1294
AnnaBridge 156:ff21514d8981 1295 /**
AnnaBridge 156:ff21514d8981 1296 * @brief Check if the LPUART Framing Error Flag is set or not
AnnaBridge 156:ff21514d8981 1297 * @rmtoll ISR FE LL_LPUART_IsActiveFlag_FE
AnnaBridge 156:ff21514d8981 1298 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1299 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1300 */
AnnaBridge 156:ff21514d8981 1301 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1302 {
AnnaBridge 156:ff21514d8981 1303 return (READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE));
AnnaBridge 156:ff21514d8981 1304 }
AnnaBridge 156:ff21514d8981 1305
AnnaBridge 156:ff21514d8981 1306 /**
AnnaBridge 156:ff21514d8981 1307 * @brief Check if the LPUART Noise error detected Flag is set or not
AnnaBridge 156:ff21514d8981 1308 * @rmtoll ISR NE LL_LPUART_IsActiveFlag_NE
AnnaBridge 156:ff21514d8981 1309 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1310 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1311 */
AnnaBridge 156:ff21514d8981 1312 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1313 {
AnnaBridge 156:ff21514d8981 1314 return (READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE));
AnnaBridge 156:ff21514d8981 1315 }
AnnaBridge 156:ff21514d8981 1316
AnnaBridge 156:ff21514d8981 1317 /**
AnnaBridge 156:ff21514d8981 1318 * @brief Check if the LPUART OverRun Error Flag is set or not
AnnaBridge 156:ff21514d8981 1319 * @rmtoll ISR ORE LL_LPUART_IsActiveFlag_ORE
AnnaBridge 156:ff21514d8981 1320 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1321 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1322 */
AnnaBridge 156:ff21514d8981 1323 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1324 {
AnnaBridge 156:ff21514d8981 1325 return (READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE));
AnnaBridge 156:ff21514d8981 1326 }
AnnaBridge 156:ff21514d8981 1327
AnnaBridge 156:ff21514d8981 1328 /**
AnnaBridge 156:ff21514d8981 1329 * @brief Check if the LPUART IDLE line detected Flag is set or not
AnnaBridge 156:ff21514d8981 1330 * @rmtoll ISR IDLE LL_LPUART_IsActiveFlag_IDLE
AnnaBridge 156:ff21514d8981 1331 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1332 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1333 */
AnnaBridge 156:ff21514d8981 1334 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1335 {
AnnaBridge 156:ff21514d8981 1336 return (READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE));
AnnaBridge 156:ff21514d8981 1337 }
AnnaBridge 156:ff21514d8981 1338
AnnaBridge 156:ff21514d8981 1339 /**
AnnaBridge 156:ff21514d8981 1340 * @brief Check if the LPUART Read Data Register Not Empty Flag is set or not
AnnaBridge 156:ff21514d8981 1341 * @rmtoll ISR RXNE LL_LPUART_IsActiveFlag_RXNE
AnnaBridge 156:ff21514d8981 1342 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1343 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1344 */
AnnaBridge 156:ff21514d8981 1345 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1346 {
AnnaBridge 156:ff21514d8981 1347 return (READ_BIT(LPUARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE));
AnnaBridge 156:ff21514d8981 1348 }
AnnaBridge 156:ff21514d8981 1349
AnnaBridge 156:ff21514d8981 1350 /**
AnnaBridge 156:ff21514d8981 1351 * @brief Check if the LPUART Transmission Complete Flag is set or not
AnnaBridge 156:ff21514d8981 1352 * @rmtoll ISR TC LL_LPUART_IsActiveFlag_TC
AnnaBridge 156:ff21514d8981 1353 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1354 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1355 */
AnnaBridge 156:ff21514d8981 1356 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1357 {
AnnaBridge 156:ff21514d8981 1358 return (READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC));
AnnaBridge 156:ff21514d8981 1359 }
AnnaBridge 156:ff21514d8981 1360
AnnaBridge 156:ff21514d8981 1361 /**
AnnaBridge 156:ff21514d8981 1362 * @brief Check if the LPUART Transmit Data Register Empty Flag is set or not
AnnaBridge 156:ff21514d8981 1363 * @rmtoll ISR TXE LL_LPUART_IsActiveFlag_TXE
AnnaBridge 156:ff21514d8981 1364 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1365 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1366 */
AnnaBridge 156:ff21514d8981 1367 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1368 {
AnnaBridge 156:ff21514d8981 1369 return (READ_BIT(LPUARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE));
AnnaBridge 156:ff21514d8981 1370 }
AnnaBridge 156:ff21514d8981 1371
AnnaBridge 156:ff21514d8981 1372 /**
AnnaBridge 156:ff21514d8981 1373 * @brief Check if the LPUART CTS interrupt Flag is set or not
AnnaBridge 156:ff21514d8981 1374 * @rmtoll ISR CTSIF LL_LPUART_IsActiveFlag_nCTS
AnnaBridge 156:ff21514d8981 1375 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1376 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1377 */
AnnaBridge 156:ff21514d8981 1378 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1379 {
AnnaBridge 156:ff21514d8981 1380 return (READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF));
AnnaBridge 156:ff21514d8981 1381 }
AnnaBridge 156:ff21514d8981 1382
AnnaBridge 156:ff21514d8981 1383 /**
AnnaBridge 156:ff21514d8981 1384 * @brief Check if the LPUART CTS Flag is set or not
AnnaBridge 156:ff21514d8981 1385 * @rmtoll ISR CTS LL_LPUART_IsActiveFlag_CTS
AnnaBridge 156:ff21514d8981 1386 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1387 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1388 */
AnnaBridge 156:ff21514d8981 1389 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1390 {
AnnaBridge 156:ff21514d8981 1391 return (READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS));
AnnaBridge 156:ff21514d8981 1392 }
AnnaBridge 156:ff21514d8981 1393
AnnaBridge 156:ff21514d8981 1394 /**
AnnaBridge 156:ff21514d8981 1395 * @brief Check if the LPUART Busy Flag is set or not
AnnaBridge 156:ff21514d8981 1396 * @rmtoll ISR BUSY LL_LPUART_IsActiveFlag_BUSY
AnnaBridge 156:ff21514d8981 1397 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1398 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1399 */
AnnaBridge 156:ff21514d8981 1400 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1401 {
AnnaBridge 156:ff21514d8981 1402 return (READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY));
AnnaBridge 156:ff21514d8981 1403 }
AnnaBridge 156:ff21514d8981 1404
AnnaBridge 156:ff21514d8981 1405 /**
AnnaBridge 156:ff21514d8981 1406 * @brief Check if the LPUART Character Match Flag is set or not
AnnaBridge 156:ff21514d8981 1407 * @rmtoll ISR CMF LL_LPUART_IsActiveFlag_CM
AnnaBridge 156:ff21514d8981 1408 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1409 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1410 */
AnnaBridge 156:ff21514d8981 1411 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1412 {
AnnaBridge 156:ff21514d8981 1413 return (READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF));
AnnaBridge 156:ff21514d8981 1414 }
AnnaBridge 156:ff21514d8981 1415
AnnaBridge 156:ff21514d8981 1416 /**
AnnaBridge 156:ff21514d8981 1417 * @brief Check if the LPUART Send Break Flag is set or not
AnnaBridge 156:ff21514d8981 1418 * @rmtoll ISR SBKF LL_LPUART_IsActiveFlag_SBK
AnnaBridge 156:ff21514d8981 1419 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1420 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1421 */
AnnaBridge 156:ff21514d8981 1422 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1423 {
AnnaBridge 156:ff21514d8981 1424 return (READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF));
AnnaBridge 156:ff21514d8981 1425 }
AnnaBridge 156:ff21514d8981 1426
AnnaBridge 156:ff21514d8981 1427 /**
AnnaBridge 156:ff21514d8981 1428 * @brief Check if the LPUART Receive Wake Up from mute mode Flag is set or not
AnnaBridge 156:ff21514d8981 1429 * @rmtoll ISR RWU LL_LPUART_IsActiveFlag_RWU
AnnaBridge 156:ff21514d8981 1430 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1431 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1432 */
AnnaBridge 156:ff21514d8981 1433 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1434 {
AnnaBridge 156:ff21514d8981 1435 return (READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU));
AnnaBridge 156:ff21514d8981 1436 }
AnnaBridge 156:ff21514d8981 1437
AnnaBridge 156:ff21514d8981 1438 /**
AnnaBridge 156:ff21514d8981 1439 * @brief Check if the LPUART Wake Up from stop mode Flag is set or not
AnnaBridge 156:ff21514d8981 1440 * @rmtoll ISR WUF LL_LPUART_IsActiveFlag_WKUP
AnnaBridge 156:ff21514d8981 1441 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1442 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1443 */
AnnaBridge 156:ff21514d8981 1444 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1445 {
AnnaBridge 156:ff21514d8981 1446 return (READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF));
AnnaBridge 156:ff21514d8981 1447 }
AnnaBridge 156:ff21514d8981 1448
AnnaBridge 156:ff21514d8981 1449 /**
AnnaBridge 156:ff21514d8981 1450 * @brief Check if the LPUART Transmit Enable Acknowledge Flag is set or not
AnnaBridge 156:ff21514d8981 1451 * @rmtoll ISR TEACK LL_LPUART_IsActiveFlag_TEACK
AnnaBridge 156:ff21514d8981 1452 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1453 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1454 */
AnnaBridge 156:ff21514d8981 1455 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1456 {
AnnaBridge 156:ff21514d8981 1457 return (READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK));
AnnaBridge 156:ff21514d8981 1458 }
AnnaBridge 156:ff21514d8981 1459
AnnaBridge 156:ff21514d8981 1460 /**
AnnaBridge 156:ff21514d8981 1461 * @brief Check if the LPUART Receive Enable Acknowledge Flag is set or not
AnnaBridge 156:ff21514d8981 1462 * @rmtoll ISR REACK LL_LPUART_IsActiveFlag_REACK
AnnaBridge 156:ff21514d8981 1463 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1464 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1465 */
AnnaBridge 156:ff21514d8981 1466 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1467 {
AnnaBridge 156:ff21514d8981 1468 return (READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK));
AnnaBridge 156:ff21514d8981 1469 }
AnnaBridge 156:ff21514d8981 1470
AnnaBridge 156:ff21514d8981 1471 /**
AnnaBridge 156:ff21514d8981 1472 * @brief Clear Parity Error Flag
AnnaBridge 156:ff21514d8981 1473 * @rmtoll ICR PECF LL_LPUART_ClearFlag_PE
AnnaBridge 156:ff21514d8981 1474 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1475 * @retval None
AnnaBridge 156:ff21514d8981 1476 */
AnnaBridge 156:ff21514d8981 1477 __STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1478 {
AnnaBridge 156:ff21514d8981 1479 WRITE_REG(LPUARTx->ICR, USART_ICR_PECF);
AnnaBridge 156:ff21514d8981 1480 }
AnnaBridge 156:ff21514d8981 1481
AnnaBridge 156:ff21514d8981 1482 /**
AnnaBridge 156:ff21514d8981 1483 * @brief Clear Framing Error Flag
AnnaBridge 156:ff21514d8981 1484 * @rmtoll ICR FECF LL_LPUART_ClearFlag_FE
AnnaBridge 156:ff21514d8981 1485 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1486 * @retval None
AnnaBridge 156:ff21514d8981 1487 */
AnnaBridge 156:ff21514d8981 1488 __STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1489 {
AnnaBridge 156:ff21514d8981 1490 WRITE_REG(LPUARTx->ICR, USART_ICR_FECF);
AnnaBridge 156:ff21514d8981 1491 }
AnnaBridge 156:ff21514d8981 1492
AnnaBridge 156:ff21514d8981 1493 /**
AnnaBridge 156:ff21514d8981 1494 * @brief Clear Noise detected Flag
AnnaBridge 156:ff21514d8981 1495 * @rmtoll ICR NCF LL_LPUART_ClearFlag_NE
AnnaBridge 156:ff21514d8981 1496 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1497 * @retval None
AnnaBridge 156:ff21514d8981 1498 */
AnnaBridge 156:ff21514d8981 1499 __STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1500 {
AnnaBridge 156:ff21514d8981 1501 WRITE_REG(LPUARTx->ICR, USART_ICR_NCF);
AnnaBridge 156:ff21514d8981 1502 }
AnnaBridge 156:ff21514d8981 1503
AnnaBridge 156:ff21514d8981 1504 /**
AnnaBridge 156:ff21514d8981 1505 * @brief Clear OverRun Error Flag
AnnaBridge 156:ff21514d8981 1506 * @rmtoll ICR ORECF LL_LPUART_ClearFlag_ORE
AnnaBridge 156:ff21514d8981 1507 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1508 * @retval None
AnnaBridge 156:ff21514d8981 1509 */
AnnaBridge 156:ff21514d8981 1510 __STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1511 {
AnnaBridge 156:ff21514d8981 1512 WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF);
AnnaBridge 156:ff21514d8981 1513 }
AnnaBridge 156:ff21514d8981 1514
AnnaBridge 156:ff21514d8981 1515 /**
AnnaBridge 156:ff21514d8981 1516 * @brief Clear IDLE line detected Flag
AnnaBridge 156:ff21514d8981 1517 * @rmtoll ICR IDLECF LL_LPUART_ClearFlag_IDLE
AnnaBridge 156:ff21514d8981 1518 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1519 * @retval None
AnnaBridge 156:ff21514d8981 1520 */
AnnaBridge 156:ff21514d8981 1521 __STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1522 {
AnnaBridge 156:ff21514d8981 1523 WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF);
AnnaBridge 156:ff21514d8981 1524 }
AnnaBridge 156:ff21514d8981 1525
AnnaBridge 156:ff21514d8981 1526 /**
AnnaBridge 156:ff21514d8981 1527 * @brief Clear Transmission Complete Flag
AnnaBridge 156:ff21514d8981 1528 * @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC
AnnaBridge 156:ff21514d8981 1529 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1530 * @retval None
AnnaBridge 156:ff21514d8981 1531 */
AnnaBridge 156:ff21514d8981 1532 __STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1533 {
AnnaBridge 156:ff21514d8981 1534 WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF);
AnnaBridge 156:ff21514d8981 1535 }
AnnaBridge 156:ff21514d8981 1536
AnnaBridge 156:ff21514d8981 1537 /**
AnnaBridge 156:ff21514d8981 1538 * @brief Clear CTS Interrupt Flag
AnnaBridge 156:ff21514d8981 1539 * @rmtoll ICR CTSCF LL_LPUART_ClearFlag_nCTS
AnnaBridge 156:ff21514d8981 1540 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1541 * @retval None
AnnaBridge 156:ff21514d8981 1542 */
AnnaBridge 156:ff21514d8981 1543 __STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1544 {
AnnaBridge 156:ff21514d8981 1545 WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF);
AnnaBridge 156:ff21514d8981 1546 }
AnnaBridge 156:ff21514d8981 1547
AnnaBridge 156:ff21514d8981 1548 /**
AnnaBridge 156:ff21514d8981 1549 * @brief Clear Character Match Flag
AnnaBridge 156:ff21514d8981 1550 * @rmtoll ICR CMCF LL_LPUART_ClearFlag_CM
AnnaBridge 156:ff21514d8981 1551 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1552 * @retval None
AnnaBridge 156:ff21514d8981 1553 */
AnnaBridge 156:ff21514d8981 1554 __STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1555 {
AnnaBridge 156:ff21514d8981 1556 WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF);
AnnaBridge 156:ff21514d8981 1557 }
AnnaBridge 156:ff21514d8981 1558
AnnaBridge 156:ff21514d8981 1559 /**
AnnaBridge 156:ff21514d8981 1560 * @brief Clear Wake Up from stop mode Flag
AnnaBridge 156:ff21514d8981 1561 * @rmtoll ICR WUCF LL_LPUART_ClearFlag_WKUP
AnnaBridge 156:ff21514d8981 1562 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1563 * @retval None
AnnaBridge 156:ff21514d8981 1564 */
AnnaBridge 156:ff21514d8981 1565 __STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1566 {
AnnaBridge 156:ff21514d8981 1567 WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF);
AnnaBridge 156:ff21514d8981 1568 }
AnnaBridge 156:ff21514d8981 1569
AnnaBridge 156:ff21514d8981 1570 /**
AnnaBridge 156:ff21514d8981 1571 * @}
AnnaBridge 156:ff21514d8981 1572 */
AnnaBridge 156:ff21514d8981 1573
AnnaBridge 156:ff21514d8981 1574 /** @defgroup LPUART_LL_EF_IT_Management IT_Management
AnnaBridge 156:ff21514d8981 1575 * @{
AnnaBridge 156:ff21514d8981 1576 */
AnnaBridge 156:ff21514d8981 1577
AnnaBridge 156:ff21514d8981 1578 /**
AnnaBridge 156:ff21514d8981 1579 * @brief Enable IDLE Interrupt
AnnaBridge 156:ff21514d8981 1580 * @rmtoll CR1 IDLEIE LL_LPUART_EnableIT_IDLE
AnnaBridge 156:ff21514d8981 1581 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1582 * @retval None
AnnaBridge 156:ff21514d8981 1583 */
AnnaBridge 156:ff21514d8981 1584 __STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1585 {
AnnaBridge 156:ff21514d8981 1586 SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
AnnaBridge 156:ff21514d8981 1587 }
AnnaBridge 156:ff21514d8981 1588
AnnaBridge 156:ff21514d8981 1589 /**
AnnaBridge 156:ff21514d8981 1590 * @brief Enable RX Not Empty Interrupt
AnnaBridge 156:ff21514d8981 1591 * @rmtoll CR1 RXNEIE LL_LPUART_EnableIT_RXNE
AnnaBridge 156:ff21514d8981 1592 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1593 * @retval None
AnnaBridge 156:ff21514d8981 1594 */
AnnaBridge 156:ff21514d8981 1595 __STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1596 {
AnnaBridge 156:ff21514d8981 1597 SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
AnnaBridge 156:ff21514d8981 1598 }
AnnaBridge 156:ff21514d8981 1599
AnnaBridge 156:ff21514d8981 1600 /**
AnnaBridge 156:ff21514d8981 1601 * @brief Enable Transmission Complete Interrupt
AnnaBridge 156:ff21514d8981 1602 * @rmtoll CR1 TCIE LL_LPUART_EnableIT_TC
AnnaBridge 156:ff21514d8981 1603 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1604 * @retval None
AnnaBridge 156:ff21514d8981 1605 */
AnnaBridge 156:ff21514d8981 1606 __STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1607 {
AnnaBridge 156:ff21514d8981 1608 SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
AnnaBridge 156:ff21514d8981 1609 }
AnnaBridge 156:ff21514d8981 1610
AnnaBridge 156:ff21514d8981 1611 /**
AnnaBridge 156:ff21514d8981 1612 * @brief Enable TX Empty Interrupt
AnnaBridge 156:ff21514d8981 1613 * @rmtoll CR1 TXEIE LL_LPUART_EnableIT_TXE
AnnaBridge 156:ff21514d8981 1614 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1615 * @retval None
AnnaBridge 156:ff21514d8981 1616 */
AnnaBridge 156:ff21514d8981 1617 __STATIC_INLINE void LL_LPUART_EnableIT_TXE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1618 {
AnnaBridge 156:ff21514d8981 1619 SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
AnnaBridge 156:ff21514d8981 1620 }
AnnaBridge 156:ff21514d8981 1621
AnnaBridge 156:ff21514d8981 1622 /**
AnnaBridge 156:ff21514d8981 1623 * @brief Enable Parity Error Interrupt
AnnaBridge 156:ff21514d8981 1624 * @rmtoll CR1 PEIE LL_LPUART_EnableIT_PE
AnnaBridge 156:ff21514d8981 1625 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1626 * @retval None
AnnaBridge 156:ff21514d8981 1627 */
AnnaBridge 156:ff21514d8981 1628 __STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1629 {
AnnaBridge 156:ff21514d8981 1630 SET_BIT(LPUARTx->CR1, USART_CR1_PEIE);
AnnaBridge 156:ff21514d8981 1631 }
AnnaBridge 156:ff21514d8981 1632
AnnaBridge 156:ff21514d8981 1633 /**
AnnaBridge 156:ff21514d8981 1634 * @brief Enable Character Match Interrupt
AnnaBridge 156:ff21514d8981 1635 * @rmtoll CR1 CMIE LL_LPUART_EnableIT_CM
AnnaBridge 156:ff21514d8981 1636 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1637 * @retval None
AnnaBridge 156:ff21514d8981 1638 */
AnnaBridge 156:ff21514d8981 1639 __STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1640 {
AnnaBridge 156:ff21514d8981 1641 SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
AnnaBridge 156:ff21514d8981 1642 }
AnnaBridge 156:ff21514d8981 1643
AnnaBridge 156:ff21514d8981 1644 /**
AnnaBridge 156:ff21514d8981 1645 * @brief Enable Error Interrupt
AnnaBridge 156:ff21514d8981 1646 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
AnnaBridge 156:ff21514d8981 1647 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
AnnaBridge 156:ff21514d8981 1648 * - 0: Interrupt is inhibited
AnnaBridge 156:ff21514d8981 1649 * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
AnnaBridge 156:ff21514d8981 1650 * @rmtoll CR3 EIE LL_LPUART_EnableIT_ERROR
AnnaBridge 156:ff21514d8981 1651 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1652 * @retval None
AnnaBridge 156:ff21514d8981 1653 */
AnnaBridge 156:ff21514d8981 1654 __STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1655 {
AnnaBridge 156:ff21514d8981 1656 SET_BIT(LPUARTx->CR3, USART_CR3_EIE);
AnnaBridge 156:ff21514d8981 1657 }
AnnaBridge 156:ff21514d8981 1658
AnnaBridge 156:ff21514d8981 1659 /**
AnnaBridge 156:ff21514d8981 1660 * @brief Enable CTS Interrupt
AnnaBridge 156:ff21514d8981 1661 * @rmtoll CR3 CTSIE LL_LPUART_EnableIT_CTS
AnnaBridge 156:ff21514d8981 1662 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1663 * @retval None
AnnaBridge 156:ff21514d8981 1664 */
AnnaBridge 156:ff21514d8981 1665 __STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1666 {
AnnaBridge 156:ff21514d8981 1667 SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
AnnaBridge 156:ff21514d8981 1668 }
AnnaBridge 156:ff21514d8981 1669
AnnaBridge 156:ff21514d8981 1670 /**
AnnaBridge 156:ff21514d8981 1671 * @brief Enable Wake Up from Stop Mode Interrupt
AnnaBridge 156:ff21514d8981 1672 * @rmtoll CR3 WUFIE LL_LPUART_EnableIT_WKUP
AnnaBridge 156:ff21514d8981 1673 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1674 * @retval None
AnnaBridge 156:ff21514d8981 1675 */
AnnaBridge 156:ff21514d8981 1676 __STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1677 {
AnnaBridge 156:ff21514d8981 1678 SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
AnnaBridge 156:ff21514d8981 1679 }
AnnaBridge 156:ff21514d8981 1680
AnnaBridge 156:ff21514d8981 1681 /**
AnnaBridge 156:ff21514d8981 1682 * @brief Disable IDLE Interrupt
AnnaBridge 156:ff21514d8981 1683 * @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE
AnnaBridge 156:ff21514d8981 1684 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1685 * @retval None
AnnaBridge 156:ff21514d8981 1686 */
AnnaBridge 156:ff21514d8981 1687 __STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1688 {
AnnaBridge 156:ff21514d8981 1689 CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
AnnaBridge 156:ff21514d8981 1690 }
AnnaBridge 156:ff21514d8981 1691
AnnaBridge 156:ff21514d8981 1692 /**
AnnaBridge 156:ff21514d8981 1693 * @brief Disable RX Not Empty Interrupt
AnnaBridge 156:ff21514d8981 1694 * @rmtoll CR1 RXNEIE LL_LPUART_DisableIT_RXNE
AnnaBridge 156:ff21514d8981 1695 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1696 * @retval None
AnnaBridge 156:ff21514d8981 1697 */
AnnaBridge 156:ff21514d8981 1698 __STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1699 {
AnnaBridge 156:ff21514d8981 1700 CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
AnnaBridge 156:ff21514d8981 1701 }
AnnaBridge 156:ff21514d8981 1702
AnnaBridge 156:ff21514d8981 1703 /**
AnnaBridge 156:ff21514d8981 1704 * @brief Disable Transmission Complete Interrupt
AnnaBridge 156:ff21514d8981 1705 * @rmtoll CR1 TCIE LL_LPUART_DisableIT_TC
AnnaBridge 156:ff21514d8981 1706 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1707 * @retval None
AnnaBridge 156:ff21514d8981 1708 */
AnnaBridge 156:ff21514d8981 1709 __STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1710 {
AnnaBridge 156:ff21514d8981 1711 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
AnnaBridge 156:ff21514d8981 1712 }
AnnaBridge 156:ff21514d8981 1713
AnnaBridge 156:ff21514d8981 1714 /**
AnnaBridge 156:ff21514d8981 1715 * @brief Disable TX Empty Interrupt
AnnaBridge 156:ff21514d8981 1716 * @rmtoll CR1 TXEIE LL_LPUART_DisableIT_TXE
AnnaBridge 156:ff21514d8981 1717 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1718 * @retval None
AnnaBridge 156:ff21514d8981 1719 */
AnnaBridge 156:ff21514d8981 1720 __STATIC_INLINE void LL_LPUART_DisableIT_TXE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1721 {
AnnaBridge 156:ff21514d8981 1722 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
AnnaBridge 156:ff21514d8981 1723 }
AnnaBridge 156:ff21514d8981 1724
AnnaBridge 156:ff21514d8981 1725 /**
AnnaBridge 156:ff21514d8981 1726 * @brief Disable Parity Error Interrupt
AnnaBridge 156:ff21514d8981 1727 * @rmtoll CR1 PEIE LL_LPUART_DisableIT_PE
AnnaBridge 156:ff21514d8981 1728 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1729 * @retval None
AnnaBridge 156:ff21514d8981 1730 */
AnnaBridge 156:ff21514d8981 1731 __STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1732 {
AnnaBridge 156:ff21514d8981 1733 CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE);
AnnaBridge 156:ff21514d8981 1734 }
AnnaBridge 156:ff21514d8981 1735
AnnaBridge 156:ff21514d8981 1736 /**
AnnaBridge 156:ff21514d8981 1737 * @brief Disable Character Match Interrupt
AnnaBridge 156:ff21514d8981 1738 * @rmtoll CR1 CMIE LL_LPUART_DisableIT_CM
AnnaBridge 156:ff21514d8981 1739 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1740 * @retval None
AnnaBridge 156:ff21514d8981 1741 */
AnnaBridge 156:ff21514d8981 1742 __STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1743 {
AnnaBridge 156:ff21514d8981 1744 CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
AnnaBridge 156:ff21514d8981 1745 }
AnnaBridge 156:ff21514d8981 1746
AnnaBridge 156:ff21514d8981 1747 /**
AnnaBridge 156:ff21514d8981 1748 * @brief Disable Error Interrupt
AnnaBridge 156:ff21514d8981 1749 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
AnnaBridge 156:ff21514d8981 1750 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
AnnaBridge 156:ff21514d8981 1751 * - 0: Interrupt is inhibited
AnnaBridge 156:ff21514d8981 1752 * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
AnnaBridge 156:ff21514d8981 1753 * @rmtoll CR3 EIE LL_LPUART_DisableIT_ERROR
AnnaBridge 156:ff21514d8981 1754 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1755 * @retval None
AnnaBridge 156:ff21514d8981 1756 */
AnnaBridge 156:ff21514d8981 1757 __STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1758 {
AnnaBridge 156:ff21514d8981 1759 CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE);
AnnaBridge 156:ff21514d8981 1760 }
AnnaBridge 156:ff21514d8981 1761
AnnaBridge 156:ff21514d8981 1762 /**
AnnaBridge 156:ff21514d8981 1763 * @brief Disable CTS Interrupt
AnnaBridge 156:ff21514d8981 1764 * @rmtoll CR3 CTSIE LL_LPUART_DisableIT_CTS
AnnaBridge 156:ff21514d8981 1765 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1766 * @retval None
AnnaBridge 156:ff21514d8981 1767 */
AnnaBridge 156:ff21514d8981 1768 __STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1769 {
AnnaBridge 156:ff21514d8981 1770 CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
AnnaBridge 156:ff21514d8981 1771 }
AnnaBridge 156:ff21514d8981 1772
AnnaBridge 156:ff21514d8981 1773 /**
AnnaBridge 156:ff21514d8981 1774 * @brief Disable Wake Up from Stop Mode Interrupt
AnnaBridge 156:ff21514d8981 1775 * @rmtoll CR3 WUFIE LL_LPUART_DisableIT_WKUP
AnnaBridge 156:ff21514d8981 1776 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1777 * @retval None
AnnaBridge 156:ff21514d8981 1778 */
AnnaBridge 156:ff21514d8981 1779 __STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1780 {
AnnaBridge 156:ff21514d8981 1781 CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
AnnaBridge 156:ff21514d8981 1782 }
AnnaBridge 156:ff21514d8981 1783
AnnaBridge 156:ff21514d8981 1784 /**
AnnaBridge 156:ff21514d8981 1785 * @brief Check if the LPUART IDLE Interrupt source is enabled or disabled.
AnnaBridge 156:ff21514d8981 1786 * @rmtoll CR1 IDLEIE LL_LPUART_IsEnabledIT_IDLE
AnnaBridge 156:ff21514d8981 1787 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1788 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1789 */
AnnaBridge 156:ff21514d8981 1790 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1791 {
AnnaBridge 156:ff21514d8981 1792 return (READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
AnnaBridge 156:ff21514d8981 1793 }
AnnaBridge 156:ff21514d8981 1794
AnnaBridge 156:ff21514d8981 1795 /**
AnnaBridge 156:ff21514d8981 1796 * @brief Check if the LPUART RX Not Empty Interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1797 * @rmtoll CR1 RXNEIE LL_LPUART_IsEnabledIT_RXNE
AnnaBridge 156:ff21514d8981 1798 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1799 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1800 */
AnnaBridge 156:ff21514d8981 1801 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1802 {
AnnaBridge 156:ff21514d8981 1803 return (READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
AnnaBridge 156:ff21514d8981 1804 }
AnnaBridge 156:ff21514d8981 1805
AnnaBridge 156:ff21514d8981 1806 /**
AnnaBridge 156:ff21514d8981 1807 * @brief Check if the LPUART Transmission Complete Interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1808 * @rmtoll CR1 TCIE LL_LPUART_IsEnabledIT_TC
AnnaBridge 156:ff21514d8981 1809 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1810 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1811 */
AnnaBridge 156:ff21514d8981 1812 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1813 {
AnnaBridge 156:ff21514d8981 1814 return (READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
AnnaBridge 156:ff21514d8981 1815 }
AnnaBridge 156:ff21514d8981 1816
AnnaBridge 156:ff21514d8981 1817 /**
AnnaBridge 156:ff21514d8981 1818 * @brief Check if the LPUART TX Empty Interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1819 * @rmtoll CR1 TXEIE LL_LPUART_IsEnabledIT_TXE
AnnaBridge 156:ff21514d8981 1820 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1821 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1822 */
AnnaBridge 156:ff21514d8981 1823 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1824 {
AnnaBridge 156:ff21514d8981 1825 return (READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
AnnaBridge 156:ff21514d8981 1826 }
AnnaBridge 156:ff21514d8981 1827
AnnaBridge 156:ff21514d8981 1828 /**
AnnaBridge 156:ff21514d8981 1829 * @brief Check if the LPUART Parity Error Interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1830 * @rmtoll CR1 PEIE LL_LPUART_IsEnabledIT_PE
AnnaBridge 156:ff21514d8981 1831 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1832 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1833 */
AnnaBridge 156:ff21514d8981 1834 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1835 {
AnnaBridge 156:ff21514d8981 1836 return (READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
AnnaBridge 156:ff21514d8981 1837 }
AnnaBridge 156:ff21514d8981 1838
AnnaBridge 156:ff21514d8981 1839 /**
AnnaBridge 156:ff21514d8981 1840 * @brief Check if the LPUART Character Match Interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1841 * @rmtoll CR1 CMIE LL_LPUART_IsEnabledIT_CM
AnnaBridge 156:ff21514d8981 1842 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1843 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1844 */
AnnaBridge 156:ff21514d8981 1845 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1846 {
AnnaBridge 156:ff21514d8981 1847 return (READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE));
AnnaBridge 156:ff21514d8981 1848 }
AnnaBridge 156:ff21514d8981 1849
AnnaBridge 156:ff21514d8981 1850 /**
AnnaBridge 156:ff21514d8981 1851 * @brief Check if the LPUART Error Interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1852 * @rmtoll CR3 EIE LL_LPUART_IsEnabledIT_ERROR
AnnaBridge 156:ff21514d8981 1853 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1854 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1855 */
AnnaBridge 156:ff21514d8981 1856 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1857 {
AnnaBridge 156:ff21514d8981 1858 return (READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
AnnaBridge 156:ff21514d8981 1859 }
AnnaBridge 156:ff21514d8981 1860
AnnaBridge 156:ff21514d8981 1861 /**
AnnaBridge 156:ff21514d8981 1862 * @brief Check if the LPUART CTS Interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1863 * @rmtoll CR3 CTSIE LL_LPUART_IsEnabledIT_CTS
AnnaBridge 156:ff21514d8981 1864 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1865 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1866 */
AnnaBridge 156:ff21514d8981 1867 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1868 {
AnnaBridge 156:ff21514d8981 1869 return (READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
AnnaBridge 156:ff21514d8981 1870 }
AnnaBridge 156:ff21514d8981 1871
AnnaBridge 156:ff21514d8981 1872 /**
AnnaBridge 156:ff21514d8981 1873 * @brief Check if the LPUART Wake Up from Stop Mode Interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1874 * @rmtoll CR3 WUFIE LL_LPUART_IsEnabledIT_WKUP
AnnaBridge 156:ff21514d8981 1875 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1876 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1877 */
AnnaBridge 156:ff21514d8981 1878 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1879 {
AnnaBridge 156:ff21514d8981 1880 return (READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE));
AnnaBridge 156:ff21514d8981 1881 }
AnnaBridge 156:ff21514d8981 1882
AnnaBridge 156:ff21514d8981 1883 /**
AnnaBridge 156:ff21514d8981 1884 * @}
AnnaBridge 156:ff21514d8981 1885 */
AnnaBridge 156:ff21514d8981 1886
AnnaBridge 156:ff21514d8981 1887 /** @defgroup LPUART_LL_EF_DMA_Management DMA_Management
AnnaBridge 156:ff21514d8981 1888 * @{
AnnaBridge 156:ff21514d8981 1889 */
AnnaBridge 156:ff21514d8981 1890
AnnaBridge 156:ff21514d8981 1891 /**
AnnaBridge 156:ff21514d8981 1892 * @brief Enable DMA Mode for reception
AnnaBridge 156:ff21514d8981 1893 * @rmtoll CR3 DMAR LL_LPUART_EnableDMAReq_RX
AnnaBridge 156:ff21514d8981 1894 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1895 * @retval None
AnnaBridge 156:ff21514d8981 1896 */
AnnaBridge 156:ff21514d8981 1897 __STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1898 {
AnnaBridge 156:ff21514d8981 1899 SET_BIT(LPUARTx->CR3, USART_CR3_DMAR);
AnnaBridge 156:ff21514d8981 1900 }
AnnaBridge 156:ff21514d8981 1901
AnnaBridge 156:ff21514d8981 1902 /**
AnnaBridge 156:ff21514d8981 1903 * @brief Disable DMA Mode for reception
AnnaBridge 156:ff21514d8981 1904 * @rmtoll CR3 DMAR LL_LPUART_DisableDMAReq_RX
AnnaBridge 156:ff21514d8981 1905 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1906 * @retval None
AnnaBridge 156:ff21514d8981 1907 */
AnnaBridge 156:ff21514d8981 1908 __STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1909 {
AnnaBridge 156:ff21514d8981 1910 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR);
AnnaBridge 156:ff21514d8981 1911 }
AnnaBridge 156:ff21514d8981 1912
AnnaBridge 156:ff21514d8981 1913 /**
AnnaBridge 156:ff21514d8981 1914 * @brief Check if DMA Mode is enabled for reception
AnnaBridge 156:ff21514d8981 1915 * @rmtoll CR3 DMAR LL_LPUART_IsEnabledDMAReq_RX
AnnaBridge 156:ff21514d8981 1916 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1917 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1918 */
AnnaBridge 156:ff21514d8981 1919 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1920 {
AnnaBridge 156:ff21514d8981 1921 return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
AnnaBridge 156:ff21514d8981 1922 }
AnnaBridge 156:ff21514d8981 1923
AnnaBridge 156:ff21514d8981 1924 /**
AnnaBridge 156:ff21514d8981 1925 * @brief Enable DMA Mode for transmission
AnnaBridge 156:ff21514d8981 1926 * @rmtoll CR3 DMAT LL_LPUART_EnableDMAReq_TX
AnnaBridge 156:ff21514d8981 1927 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1928 * @retval None
AnnaBridge 156:ff21514d8981 1929 */
AnnaBridge 156:ff21514d8981 1930 __STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1931 {
AnnaBridge 156:ff21514d8981 1932 SET_BIT(LPUARTx->CR3, USART_CR3_DMAT);
AnnaBridge 156:ff21514d8981 1933 }
AnnaBridge 156:ff21514d8981 1934
AnnaBridge 156:ff21514d8981 1935 /**
AnnaBridge 156:ff21514d8981 1936 * @brief Disable DMA Mode for transmission
AnnaBridge 156:ff21514d8981 1937 * @rmtoll CR3 DMAT LL_LPUART_DisableDMAReq_TX
AnnaBridge 156:ff21514d8981 1938 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1939 * @retval None
AnnaBridge 156:ff21514d8981 1940 */
AnnaBridge 156:ff21514d8981 1941 __STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1942 {
AnnaBridge 156:ff21514d8981 1943 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT);
AnnaBridge 156:ff21514d8981 1944 }
AnnaBridge 156:ff21514d8981 1945
AnnaBridge 156:ff21514d8981 1946 /**
AnnaBridge 156:ff21514d8981 1947 * @brief Check if DMA Mode is enabled for transmission
AnnaBridge 156:ff21514d8981 1948 * @rmtoll CR3 DMAT LL_LPUART_IsEnabledDMAReq_TX
AnnaBridge 156:ff21514d8981 1949 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1950 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1951 */
AnnaBridge 156:ff21514d8981 1952 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1953 {
AnnaBridge 156:ff21514d8981 1954 return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
AnnaBridge 156:ff21514d8981 1955 }
AnnaBridge 156:ff21514d8981 1956
AnnaBridge 156:ff21514d8981 1957 /**
AnnaBridge 156:ff21514d8981 1958 * @brief Enable DMA Disabling on Reception Error
AnnaBridge 156:ff21514d8981 1959 * @rmtoll CR3 DDRE LL_LPUART_EnableDMADeactOnRxErr
AnnaBridge 156:ff21514d8981 1960 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1961 * @retval None
AnnaBridge 156:ff21514d8981 1962 */
AnnaBridge 156:ff21514d8981 1963 __STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1964 {
AnnaBridge 156:ff21514d8981 1965 SET_BIT(LPUARTx->CR3, USART_CR3_DDRE);
AnnaBridge 156:ff21514d8981 1966 }
AnnaBridge 156:ff21514d8981 1967
AnnaBridge 156:ff21514d8981 1968 /**
AnnaBridge 156:ff21514d8981 1969 * @brief Disable DMA Disabling on Reception Error
AnnaBridge 156:ff21514d8981 1970 * @rmtoll CR3 DDRE LL_LPUART_DisableDMADeactOnRxErr
AnnaBridge 156:ff21514d8981 1971 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1972 * @retval None
AnnaBridge 156:ff21514d8981 1973 */
AnnaBridge 156:ff21514d8981 1974 __STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1975 {
AnnaBridge 156:ff21514d8981 1976 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE);
AnnaBridge 156:ff21514d8981 1977 }
AnnaBridge 156:ff21514d8981 1978
AnnaBridge 156:ff21514d8981 1979 /**
AnnaBridge 156:ff21514d8981 1980 * @brief Indicate if DMA Disabling on Reception Error is disabled
AnnaBridge 156:ff21514d8981 1981 * @rmtoll CR3 DDRE LL_LPUART_IsEnabledDMADeactOnRxErr
AnnaBridge 156:ff21514d8981 1982 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1983 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1984 */
AnnaBridge 156:ff21514d8981 1985 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 1986 {
AnnaBridge 156:ff21514d8981 1987 return (READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE));
AnnaBridge 156:ff21514d8981 1988 }
AnnaBridge 156:ff21514d8981 1989
AnnaBridge 156:ff21514d8981 1990 /**
AnnaBridge 156:ff21514d8981 1991 * @brief Get the LPUART data register address used for DMA transfer
AnnaBridge 156:ff21514d8981 1992 * @rmtoll RDR RDR LL_LPUART_DMA_GetRegAddr\n
AnnaBridge 156:ff21514d8981 1993 * @rmtoll TDR TDR LL_LPUART_DMA_GetRegAddr
AnnaBridge 156:ff21514d8981 1994 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 1995 * @param Direction This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 1996 * @arg @ref LL_LPUART_DMA_REG_DATA_TRANSMIT
AnnaBridge 156:ff21514d8981 1997 * @arg @ref LL_LPUART_DMA_REG_DATA_RECEIVE
AnnaBridge 156:ff21514d8981 1998 * @retval Address of data register
AnnaBridge 156:ff21514d8981 1999 */
AnnaBridge 156:ff21514d8981 2000 __STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(USART_TypeDef *LPUARTx, uint32_t Direction)
AnnaBridge 156:ff21514d8981 2001 {
AnnaBridge 156:ff21514d8981 2002 register uint32_t data_reg_addr = 0U;
AnnaBridge 156:ff21514d8981 2003
AnnaBridge 156:ff21514d8981 2004 if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT)
AnnaBridge 156:ff21514d8981 2005 {
AnnaBridge 156:ff21514d8981 2006 /* return address of TDR register */
AnnaBridge 156:ff21514d8981 2007 data_reg_addr = (uint32_t) &(LPUARTx->TDR);
AnnaBridge 156:ff21514d8981 2008 }
AnnaBridge 156:ff21514d8981 2009 else
AnnaBridge 156:ff21514d8981 2010 {
AnnaBridge 156:ff21514d8981 2011 /* return address of RDR register */
AnnaBridge 156:ff21514d8981 2012 data_reg_addr = (uint32_t) &(LPUARTx->RDR);
AnnaBridge 156:ff21514d8981 2013 }
AnnaBridge 156:ff21514d8981 2014
AnnaBridge 156:ff21514d8981 2015 return data_reg_addr;
AnnaBridge 156:ff21514d8981 2016 }
AnnaBridge 156:ff21514d8981 2017
AnnaBridge 156:ff21514d8981 2018 /**
AnnaBridge 156:ff21514d8981 2019 * @}
AnnaBridge 156:ff21514d8981 2020 */
AnnaBridge 156:ff21514d8981 2021
AnnaBridge 156:ff21514d8981 2022 /** @defgroup LPUART_LL_EF_Data_Management Data_Management
AnnaBridge 156:ff21514d8981 2023 * @{
AnnaBridge 156:ff21514d8981 2024 */
AnnaBridge 156:ff21514d8981 2025
AnnaBridge 156:ff21514d8981 2026 /**
AnnaBridge 156:ff21514d8981 2027 * @brief Read Receiver Data register (Receive Data value, 8 bits)
AnnaBridge 156:ff21514d8981 2028 * @rmtoll RDR RDR LL_LPUART_ReceiveData8
AnnaBridge 156:ff21514d8981 2029 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 2030 * @retval Time Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 156:ff21514d8981 2031 */
AnnaBridge 156:ff21514d8981 2032 __STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 2033 {
AnnaBridge 156:ff21514d8981 2034 return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
AnnaBridge 156:ff21514d8981 2035 }
AnnaBridge 156:ff21514d8981 2036
AnnaBridge 156:ff21514d8981 2037 /**
AnnaBridge 156:ff21514d8981 2038 * @brief Read Receiver Data register (Receive Data value, 9 bits)
AnnaBridge 156:ff21514d8981 2039 * @rmtoll RDR RDR LL_LPUART_ReceiveData9
AnnaBridge 156:ff21514d8981 2040 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 2041 * @retval Time Value between Min_Data=0x00 and Max_Data=0x1FF
AnnaBridge 156:ff21514d8981 2042 */
AnnaBridge 156:ff21514d8981 2043 __STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 2044 {
AnnaBridge 156:ff21514d8981 2045 return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
AnnaBridge 156:ff21514d8981 2046 }
AnnaBridge 156:ff21514d8981 2047
AnnaBridge 156:ff21514d8981 2048 /**
AnnaBridge 156:ff21514d8981 2049 * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
AnnaBridge 156:ff21514d8981 2050 * @rmtoll TDR TDR LL_LPUART_TransmitData8
AnnaBridge 156:ff21514d8981 2051 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 2052 * @param Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 156:ff21514d8981 2053 * @retval None
AnnaBridge 156:ff21514d8981 2054 */
AnnaBridge 156:ff21514d8981 2055 __STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value)
AnnaBridge 156:ff21514d8981 2056 {
AnnaBridge 156:ff21514d8981 2057 LPUARTx->TDR = Value;
AnnaBridge 156:ff21514d8981 2058 }
AnnaBridge 156:ff21514d8981 2059
AnnaBridge 156:ff21514d8981 2060 /**
AnnaBridge 156:ff21514d8981 2061 * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
AnnaBridge 156:ff21514d8981 2062 * @rmtoll TDR TDR LL_LPUART_TransmitData9
AnnaBridge 156:ff21514d8981 2063 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 2064 * @param Value between Min_Data=0x00 and Max_Data=0x1FF
AnnaBridge 156:ff21514d8981 2065 * @retval None
AnnaBridge 156:ff21514d8981 2066 */
AnnaBridge 156:ff21514d8981 2067 __STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value)
AnnaBridge 156:ff21514d8981 2068 {
AnnaBridge 156:ff21514d8981 2069 LPUARTx->TDR = Value & 0x1FFU;
AnnaBridge 156:ff21514d8981 2070 }
AnnaBridge 156:ff21514d8981 2071
AnnaBridge 156:ff21514d8981 2072 /**
AnnaBridge 156:ff21514d8981 2073 * @}
AnnaBridge 156:ff21514d8981 2074 */
AnnaBridge 156:ff21514d8981 2075
AnnaBridge 156:ff21514d8981 2076 /** @defgroup LPUART_LL_EF_Execution Execution
AnnaBridge 156:ff21514d8981 2077 * @{
AnnaBridge 156:ff21514d8981 2078 */
AnnaBridge 156:ff21514d8981 2079
AnnaBridge 156:ff21514d8981 2080 /**
AnnaBridge 156:ff21514d8981 2081 * @brief Request Break sending
AnnaBridge 156:ff21514d8981 2082 * @rmtoll RQR SBKRQ LL_LPUART_RequestBreakSending
AnnaBridge 156:ff21514d8981 2083 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 2084 * @retval None
AnnaBridge 156:ff21514d8981 2085 */
AnnaBridge 156:ff21514d8981 2086 __STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 2087 {
AnnaBridge 156:ff21514d8981 2088 SET_BIT(LPUARTx->RQR, USART_RQR_SBKRQ);
AnnaBridge 156:ff21514d8981 2089 }
AnnaBridge 156:ff21514d8981 2090
AnnaBridge 156:ff21514d8981 2091 /**
AnnaBridge 156:ff21514d8981 2092 * @brief Put LPUART in mute mode and set the RWU flag
AnnaBridge 156:ff21514d8981 2093 * @rmtoll RQR MMRQ LL_LPUART_RequestEnterMuteMode
AnnaBridge 156:ff21514d8981 2094 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 2095 * @retval None
AnnaBridge 156:ff21514d8981 2096 */
AnnaBridge 156:ff21514d8981 2097 __STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 2098 {
AnnaBridge 156:ff21514d8981 2099 SET_BIT(LPUARTx->RQR, USART_RQR_MMRQ);
AnnaBridge 156:ff21514d8981 2100 }
AnnaBridge 156:ff21514d8981 2101
AnnaBridge 156:ff21514d8981 2102 /**
AnnaBridge 156:ff21514d8981 2103 * @brief Request a Receive Data flush
AnnaBridge 156:ff21514d8981 2104 * @rmtoll RQR RXFRQ LL_LPUART_RequestRxDataFlush
AnnaBridge 156:ff21514d8981 2105 * @param LPUARTx LPUART Instance
AnnaBridge 156:ff21514d8981 2106 * @retval None
AnnaBridge 156:ff21514d8981 2107 */
AnnaBridge 156:ff21514d8981 2108 __STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx)
AnnaBridge 156:ff21514d8981 2109 {
AnnaBridge 156:ff21514d8981 2110 SET_BIT(LPUARTx->RQR, USART_RQR_RXFRQ);
AnnaBridge 156:ff21514d8981 2111 }
AnnaBridge 156:ff21514d8981 2112
AnnaBridge 156:ff21514d8981 2113 /**
AnnaBridge 156:ff21514d8981 2114 * @}
AnnaBridge 156:ff21514d8981 2115 */
AnnaBridge 156:ff21514d8981 2116
AnnaBridge 156:ff21514d8981 2117 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 156:ff21514d8981 2118 /** @defgroup LPUART_LL_EF_Init Initialization and de-initialization functions
AnnaBridge 156:ff21514d8981 2119 * @{
AnnaBridge 156:ff21514d8981 2120 */
AnnaBridge 156:ff21514d8981 2121 ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx);
AnnaBridge 156:ff21514d8981 2122 ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct);
AnnaBridge 156:ff21514d8981 2123 void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct);
AnnaBridge 156:ff21514d8981 2124 /**
AnnaBridge 156:ff21514d8981 2125 * @}
AnnaBridge 156:ff21514d8981 2126 */
AnnaBridge 156:ff21514d8981 2127 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 156:ff21514d8981 2128
AnnaBridge 156:ff21514d8981 2129 /**
AnnaBridge 156:ff21514d8981 2130 * @}
AnnaBridge 156:ff21514d8981 2131 */
AnnaBridge 156:ff21514d8981 2132
AnnaBridge 156:ff21514d8981 2133 /**
AnnaBridge 156:ff21514d8981 2134 * @}
AnnaBridge 156:ff21514d8981 2135 */
AnnaBridge 156:ff21514d8981 2136
AnnaBridge 156:ff21514d8981 2137 #endif /* LPUART1 */
AnnaBridge 156:ff21514d8981 2138
AnnaBridge 156:ff21514d8981 2139 /**
AnnaBridge 156:ff21514d8981 2140 * @}
AnnaBridge 156:ff21514d8981 2141 */
AnnaBridge 156:ff21514d8981 2142
AnnaBridge 156:ff21514d8981 2143 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 2144 }
AnnaBridge 156:ff21514d8981 2145 #endif
AnnaBridge 156:ff21514d8981 2146
AnnaBridge 156:ff21514d8981 2147 #endif /* __STM32L4xx_LL_LPUART_H */
AnnaBridge 156:ff21514d8981 2148
AnnaBridge 156:ff21514d8981 2149 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/