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TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_crs.h@156:ff21514d8981, 2017-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Nov 08 17:18:06 2017 +0000
- Revision:
- 156:ff21514d8981
- Child:
- 161:aa5281ff4a02
Reverting back to release 154 of the mbed library
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 156:ff21514d8981 | 1 | /** |
| AnnaBridge | 156:ff21514d8981 | 2 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 3 | * @file stm32l4xx_ll_crs.h |
| AnnaBridge | 156:ff21514d8981 | 4 | * @author MCD Application Team |
| AnnaBridge | 156:ff21514d8981 | 5 | * @version V1.7.1 |
| AnnaBridge | 156:ff21514d8981 | 6 | * @date 21-April-2017 |
| AnnaBridge | 156:ff21514d8981 | 7 | * @brief Header file of CRS LL module. |
| AnnaBridge | 156:ff21514d8981 | 8 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 9 | * @attention |
| AnnaBridge | 156:ff21514d8981 | 10 | * |
| AnnaBridge | 156:ff21514d8981 | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 156:ff21514d8981 | 12 | * |
| AnnaBridge | 156:ff21514d8981 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 156:ff21514d8981 | 14 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 156:ff21514d8981 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 156:ff21514d8981 | 16 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 156:ff21514d8981 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 156:ff21514d8981 | 18 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 156:ff21514d8981 | 19 | * and/or other materials provided with the distribution. |
| AnnaBridge | 156:ff21514d8981 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 156:ff21514d8981 | 21 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 156:ff21514d8981 | 22 | * without specific prior written permission. |
| AnnaBridge | 156:ff21514d8981 | 23 | * |
| AnnaBridge | 156:ff21514d8981 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 156:ff21514d8981 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 156:ff21514d8981 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 156:ff21514d8981 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 156:ff21514d8981 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 156:ff21514d8981 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 156:ff21514d8981 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 156:ff21514d8981 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 156:ff21514d8981 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 156:ff21514d8981 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 156:ff21514d8981 | 34 | * |
| AnnaBridge | 156:ff21514d8981 | 35 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 36 | */ |
| AnnaBridge | 156:ff21514d8981 | 37 | |
| AnnaBridge | 156:ff21514d8981 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 39 | #ifndef __STM32L4xx_LL_CRS_H |
| AnnaBridge | 156:ff21514d8981 | 40 | #define __STM32L4xx_LL_CRS_H |
| AnnaBridge | 156:ff21514d8981 | 41 | |
| AnnaBridge | 156:ff21514d8981 | 42 | #ifdef __cplusplus |
| AnnaBridge | 156:ff21514d8981 | 43 | extern "C" { |
| AnnaBridge | 156:ff21514d8981 | 44 | #endif |
| AnnaBridge | 156:ff21514d8981 | 45 | |
| AnnaBridge | 156:ff21514d8981 | 46 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 47 | #include "stm32l4xx.h" |
| AnnaBridge | 156:ff21514d8981 | 48 | |
| AnnaBridge | 156:ff21514d8981 | 49 | /** @addtogroup STM32L4xx_LL_Driver |
| AnnaBridge | 156:ff21514d8981 | 50 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 51 | */ |
| AnnaBridge | 156:ff21514d8981 | 52 | |
| AnnaBridge | 156:ff21514d8981 | 53 | #if defined(CRS) |
| AnnaBridge | 156:ff21514d8981 | 54 | |
| AnnaBridge | 156:ff21514d8981 | 55 | /** @defgroup CRS_LL CRS |
| AnnaBridge | 156:ff21514d8981 | 56 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 57 | */ |
| AnnaBridge | 156:ff21514d8981 | 58 | |
| AnnaBridge | 156:ff21514d8981 | 59 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 60 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 61 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 62 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 63 | |
| AnnaBridge | 156:ff21514d8981 | 64 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 65 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 66 | /** @defgroup CRS_LL_Exported_Constants CRS Exported Constants |
| AnnaBridge | 156:ff21514d8981 | 67 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 68 | */ |
| AnnaBridge | 156:ff21514d8981 | 69 | |
| AnnaBridge | 156:ff21514d8981 | 70 | /** @defgroup CRS_LL_EC_GET_FLAG Get Flags Defines |
| AnnaBridge | 156:ff21514d8981 | 71 | * @brief Flags defines which can be used with LL_CRS_ReadReg function |
| AnnaBridge | 156:ff21514d8981 | 72 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 73 | */ |
| AnnaBridge | 156:ff21514d8981 | 74 | #define LL_CRS_ISR_SYNCOKF CRS_ISR_SYNCOKF |
| AnnaBridge | 156:ff21514d8981 | 75 | #define LL_CRS_ISR_SYNCWARNF CRS_ISR_SYNCWARNF |
| AnnaBridge | 156:ff21514d8981 | 76 | #define LL_CRS_ISR_ERRF CRS_ISR_ERRF |
| AnnaBridge | 156:ff21514d8981 | 77 | #define LL_CRS_ISR_ESYNCF CRS_ISR_ESYNCF |
| AnnaBridge | 156:ff21514d8981 | 78 | #define LL_CRS_ISR_SYNCERR CRS_ISR_SYNCERR |
| AnnaBridge | 156:ff21514d8981 | 79 | #define LL_CRS_ISR_SYNCMISS CRS_ISR_SYNCMISS |
| AnnaBridge | 156:ff21514d8981 | 80 | #define LL_CRS_ISR_TRIMOVF CRS_ISR_TRIMOVF |
| AnnaBridge | 156:ff21514d8981 | 81 | /** |
| AnnaBridge | 156:ff21514d8981 | 82 | * @} |
| AnnaBridge | 156:ff21514d8981 | 83 | */ |
| AnnaBridge | 156:ff21514d8981 | 84 | |
| AnnaBridge | 156:ff21514d8981 | 85 | /** @defgroup CRS_LL_EC_IT IT Defines |
| AnnaBridge | 156:ff21514d8981 | 86 | * @brief IT defines which can be used with LL_CRS_ReadReg and LL_CRS_WriteReg functions |
| AnnaBridge | 156:ff21514d8981 | 87 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 88 | */ |
| AnnaBridge | 156:ff21514d8981 | 89 | #define LL_CRS_CR_SYNCOKIE CRS_CR_SYNCOKIE |
| AnnaBridge | 156:ff21514d8981 | 90 | #define LL_CRS_CR_SYNCWARNIE CRS_CR_SYNCWARNIE |
| AnnaBridge | 156:ff21514d8981 | 91 | #define LL_CRS_CR_ERRIE CRS_CR_ERRIE |
| AnnaBridge | 156:ff21514d8981 | 92 | #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE |
| AnnaBridge | 156:ff21514d8981 | 93 | /** |
| AnnaBridge | 156:ff21514d8981 | 94 | * @} |
| AnnaBridge | 156:ff21514d8981 | 95 | */ |
| AnnaBridge | 156:ff21514d8981 | 96 | |
| AnnaBridge | 156:ff21514d8981 | 97 | /** @defgroup CRS_LL_EC_SYNC_DIV Synchronization Signal Divider |
| AnnaBridge | 156:ff21514d8981 | 98 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 99 | */ |
| AnnaBridge | 156:ff21514d8981 | 100 | #define LL_CRS_SYNC_DIV_1 ((uint32_t)0x00U) /*!< Synchro Signal not divided (default) */ |
| AnnaBridge | 156:ff21514d8981 | 101 | #define LL_CRS_SYNC_DIV_2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */ |
| AnnaBridge | 156:ff21514d8981 | 102 | #define LL_CRS_SYNC_DIV_4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */ |
| AnnaBridge | 156:ff21514d8981 | 103 | #define LL_CRS_SYNC_DIV_8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */ |
| AnnaBridge | 156:ff21514d8981 | 104 | #define LL_CRS_SYNC_DIV_16 CRS_CFGR_SYNCDIV_2 /*!< Synchro Signal divided by 16 */ |
| AnnaBridge | 156:ff21514d8981 | 105 | #define LL_CRS_SYNC_DIV_32 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */ |
| AnnaBridge | 156:ff21514d8981 | 106 | #define LL_CRS_SYNC_DIV_64 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */ |
| AnnaBridge | 156:ff21514d8981 | 107 | #define LL_CRS_SYNC_DIV_128 CRS_CFGR_SYNCDIV /*!< Synchro Signal divided by 128 */ |
| AnnaBridge | 156:ff21514d8981 | 108 | /** |
| AnnaBridge | 156:ff21514d8981 | 109 | * @} |
| AnnaBridge | 156:ff21514d8981 | 110 | */ |
| AnnaBridge | 156:ff21514d8981 | 111 | |
| AnnaBridge | 156:ff21514d8981 | 112 | /** @defgroup CRS_LL_EC_SYNC_SOURCE Synchronization Signal Source |
| AnnaBridge | 156:ff21514d8981 | 113 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 114 | */ |
| AnnaBridge | 156:ff21514d8981 | 115 | #define LL_CRS_SYNC_SOURCE_GPIO ((uint32_t)0x00U) /*!< Synchro Signal soucre GPIO */ |
| AnnaBridge | 156:ff21514d8981 | 116 | #define LL_CRS_SYNC_SOURCE_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */ |
| AnnaBridge | 156:ff21514d8981 | 117 | #define LL_CRS_SYNC_SOURCE_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF (default)*/ |
| AnnaBridge | 156:ff21514d8981 | 118 | /** |
| AnnaBridge | 156:ff21514d8981 | 119 | * @} |
| AnnaBridge | 156:ff21514d8981 | 120 | */ |
| AnnaBridge | 156:ff21514d8981 | 121 | |
| AnnaBridge | 156:ff21514d8981 | 122 | /** @defgroup CRS_LL_EC_SYNC_POLARITY Synchronization Signal Polarity |
| AnnaBridge | 156:ff21514d8981 | 123 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 124 | */ |
| AnnaBridge | 156:ff21514d8981 | 125 | #define LL_CRS_SYNC_POLARITY_RISING ((uint32_t)0x00U) /*!< Synchro Active on rising edge (default) */ |
| AnnaBridge | 156:ff21514d8981 | 126 | #define LL_CRS_SYNC_POLARITY_FALLING CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */ |
| AnnaBridge | 156:ff21514d8981 | 127 | /** |
| AnnaBridge | 156:ff21514d8981 | 128 | * @} |
| AnnaBridge | 156:ff21514d8981 | 129 | */ |
| AnnaBridge | 156:ff21514d8981 | 130 | |
| AnnaBridge | 156:ff21514d8981 | 131 | /** @defgroup CRS_LL_EC_FREQERRORDIR Frequency Error Direction |
| AnnaBridge | 156:ff21514d8981 | 132 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 133 | */ |
| AnnaBridge | 156:ff21514d8981 | 134 | #define LL_CRS_FREQ_ERROR_DIR_UP ((uint32_t)0x00U) /*!< Upcounting direction, the actual frequency is above the target */ |
| AnnaBridge | 156:ff21514d8981 | 135 | #define LL_CRS_FREQ_ERROR_DIR_DOWN ((uint32_t)CRS_ISR_FEDIR) /*!< Downcounting direction, the actual frequency is below the target */ |
| AnnaBridge | 156:ff21514d8981 | 136 | /** |
| AnnaBridge | 156:ff21514d8981 | 137 | * @} |
| AnnaBridge | 156:ff21514d8981 | 138 | */ |
| AnnaBridge | 156:ff21514d8981 | 139 | |
| AnnaBridge | 156:ff21514d8981 | 140 | /** @defgroup CRS_LL_EC_DEFAULTVALUES Default Values |
| AnnaBridge | 156:ff21514d8981 | 141 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 142 | */ |
| AnnaBridge | 156:ff21514d8981 | 143 | /** |
| AnnaBridge | 156:ff21514d8981 | 144 | * @brief Reset value of the RELOAD field |
| AnnaBridge | 156:ff21514d8981 | 145 | * @note The reset value of the RELOAD field corresponds to a target frequency of 48 MHz |
| AnnaBridge | 156:ff21514d8981 | 146 | * and a synchronization signal frequency of 1 kHz (SOF signal from USB) |
| AnnaBridge | 156:ff21514d8981 | 147 | */ |
| AnnaBridge | 156:ff21514d8981 | 148 | #define LL_CRS_RELOADVALUE_DEFAULT ((uint32_t)0xBB7FU) |
| AnnaBridge | 156:ff21514d8981 | 149 | |
| AnnaBridge | 156:ff21514d8981 | 150 | /** |
| AnnaBridge | 156:ff21514d8981 | 151 | * @brief Reset value of Frequency error limit. |
| AnnaBridge | 156:ff21514d8981 | 152 | */ |
| AnnaBridge | 156:ff21514d8981 | 153 | #define LL_CRS_ERRORLIMIT_DEFAULT ((uint32_t)0x22U) |
| AnnaBridge | 156:ff21514d8981 | 154 | |
| AnnaBridge | 156:ff21514d8981 | 155 | /** |
| AnnaBridge | 156:ff21514d8981 | 156 | * @brief Reset value of the HSI48 Calibration field |
| AnnaBridge | 156:ff21514d8981 | 157 | * @note The default value is 32, which corresponds to the middle of the trimming interval. |
| AnnaBridge | 156:ff21514d8981 | 158 | * The trimming step is around 67 kHz between two consecutive TRIM steps. |
| AnnaBridge | 156:ff21514d8981 | 159 | * A higher TRIM value corresponds to a higher output frequency |
| AnnaBridge | 156:ff21514d8981 | 160 | */ |
| AnnaBridge | 156:ff21514d8981 | 161 | #define LL_CRS_HSI48CALIBRATION_DEFAULT ((uint32_t)0x20U) |
| AnnaBridge | 156:ff21514d8981 | 162 | /** |
| AnnaBridge | 156:ff21514d8981 | 163 | * @} |
| AnnaBridge | 156:ff21514d8981 | 164 | */ |
| AnnaBridge | 156:ff21514d8981 | 165 | |
| AnnaBridge | 156:ff21514d8981 | 166 | /** |
| AnnaBridge | 156:ff21514d8981 | 167 | * @} |
| AnnaBridge | 156:ff21514d8981 | 168 | */ |
| AnnaBridge | 156:ff21514d8981 | 169 | |
| AnnaBridge | 156:ff21514d8981 | 170 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 171 | /** @defgroup CRS_LL_Exported_Macros CRS Exported Macros |
| AnnaBridge | 156:ff21514d8981 | 172 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 173 | */ |
| AnnaBridge | 156:ff21514d8981 | 174 | |
| AnnaBridge | 156:ff21514d8981 | 175 | /** @defgroup CRS_LL_EM_WRITE_READ Common Write and read registers Macros |
| AnnaBridge | 156:ff21514d8981 | 176 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 177 | */ |
| AnnaBridge | 156:ff21514d8981 | 178 | |
| AnnaBridge | 156:ff21514d8981 | 179 | /** |
| AnnaBridge | 156:ff21514d8981 | 180 | * @brief Write a value in CRS register |
| AnnaBridge | 156:ff21514d8981 | 181 | * @param __INSTANCE__ CRS Instance |
| AnnaBridge | 156:ff21514d8981 | 182 | * @param __REG__ Register to be written |
| AnnaBridge | 156:ff21514d8981 | 183 | * @param __VALUE__ Value to be written in the register |
| AnnaBridge | 156:ff21514d8981 | 184 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 185 | */ |
| AnnaBridge | 156:ff21514d8981 | 186 | #define LL_CRS_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
| AnnaBridge | 156:ff21514d8981 | 187 | |
| AnnaBridge | 156:ff21514d8981 | 188 | /** |
| AnnaBridge | 156:ff21514d8981 | 189 | * @brief Read a value in CRS register |
| AnnaBridge | 156:ff21514d8981 | 190 | * @param __INSTANCE__ CRS Instance |
| AnnaBridge | 156:ff21514d8981 | 191 | * @param __REG__ Register to be read |
| AnnaBridge | 156:ff21514d8981 | 192 | * @retval Register value |
| AnnaBridge | 156:ff21514d8981 | 193 | */ |
| AnnaBridge | 156:ff21514d8981 | 194 | #define LL_CRS_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
| AnnaBridge | 156:ff21514d8981 | 195 | /** |
| AnnaBridge | 156:ff21514d8981 | 196 | * @} |
| AnnaBridge | 156:ff21514d8981 | 197 | */ |
| AnnaBridge | 156:ff21514d8981 | 198 | |
| AnnaBridge | 156:ff21514d8981 | 199 | /** @defgroup CRS_LL_EM_Exported_Macros_Calculate_Reload Exported_Macros_Calculate_Reload |
| AnnaBridge | 156:ff21514d8981 | 200 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 201 | */ |
| AnnaBridge | 156:ff21514d8981 | 202 | |
| AnnaBridge | 156:ff21514d8981 | 203 | /** |
| AnnaBridge | 156:ff21514d8981 | 204 | * @brief Macro to calculate reload value to be set in CRS register according to target and sync frequencies |
| AnnaBridge | 156:ff21514d8981 | 205 | * @note The RELOAD value should be selected according to the ratio between |
| AnnaBridge | 156:ff21514d8981 | 206 | * the target frequency and the frequency of the synchronization source after |
| AnnaBridge | 156:ff21514d8981 | 207 | * prescaling. It is then decreased by one in order to reach the expected |
| AnnaBridge | 156:ff21514d8981 | 208 | * synchronization on the zero value. The formula is the following: |
| AnnaBridge | 156:ff21514d8981 | 209 | * RELOAD = (fTARGET / fSYNC) -1 |
| AnnaBridge | 156:ff21514d8981 | 210 | * @param __FTARGET__ Target frequency (value in Hz) |
| AnnaBridge | 156:ff21514d8981 | 211 | * @param __FSYNC__ Synchronization signal frequency (value in Hz) |
| AnnaBridge | 156:ff21514d8981 | 212 | * @retval Reload value (in Hz) |
| AnnaBridge | 156:ff21514d8981 | 213 | */ |
| AnnaBridge | 156:ff21514d8981 | 214 | #define __LL_CRS_CALC_CALCULATE_RELOADVALUE(__FTARGET__, __FSYNC__) (((__FTARGET__) / (__FSYNC__)) - 1U) |
| AnnaBridge | 156:ff21514d8981 | 215 | |
| AnnaBridge | 156:ff21514d8981 | 216 | /** |
| AnnaBridge | 156:ff21514d8981 | 217 | * @} |
| AnnaBridge | 156:ff21514d8981 | 218 | */ |
| AnnaBridge | 156:ff21514d8981 | 219 | |
| AnnaBridge | 156:ff21514d8981 | 220 | /** |
| AnnaBridge | 156:ff21514d8981 | 221 | * @} |
| AnnaBridge | 156:ff21514d8981 | 222 | */ |
| AnnaBridge | 156:ff21514d8981 | 223 | |
| AnnaBridge | 156:ff21514d8981 | 224 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 225 | /** @defgroup CRS_LL_Exported_Functions CRS Exported Functions |
| AnnaBridge | 156:ff21514d8981 | 226 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 227 | */ |
| AnnaBridge | 156:ff21514d8981 | 228 | |
| AnnaBridge | 156:ff21514d8981 | 229 | /** @defgroup CRS_LL_EF_Configuration Configuration |
| AnnaBridge | 156:ff21514d8981 | 230 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 231 | */ |
| AnnaBridge | 156:ff21514d8981 | 232 | |
| AnnaBridge | 156:ff21514d8981 | 233 | /** |
| AnnaBridge | 156:ff21514d8981 | 234 | * @brief Enable Frequency error counter |
| AnnaBridge | 156:ff21514d8981 | 235 | * @note When this bit is set, the CRS_CFGR register is write-protected and cannot be modified |
| AnnaBridge | 156:ff21514d8981 | 236 | * @rmtoll CR CEN LL_CRS_EnableFreqErrorCounter |
| AnnaBridge | 156:ff21514d8981 | 237 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 238 | */ |
| AnnaBridge | 156:ff21514d8981 | 239 | __STATIC_INLINE void LL_CRS_EnableFreqErrorCounter(void) |
| AnnaBridge | 156:ff21514d8981 | 240 | { |
| AnnaBridge | 156:ff21514d8981 | 241 | SET_BIT(CRS->CR, CRS_CR_CEN); |
| AnnaBridge | 156:ff21514d8981 | 242 | } |
| AnnaBridge | 156:ff21514d8981 | 243 | |
| AnnaBridge | 156:ff21514d8981 | 244 | /** |
| AnnaBridge | 156:ff21514d8981 | 245 | * @brief Disable Frequency error counter |
| AnnaBridge | 156:ff21514d8981 | 246 | * @rmtoll CR CEN LL_CRS_DisableFreqErrorCounter |
| AnnaBridge | 156:ff21514d8981 | 247 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 248 | */ |
| AnnaBridge | 156:ff21514d8981 | 249 | __STATIC_INLINE void LL_CRS_DisableFreqErrorCounter(void) |
| AnnaBridge | 156:ff21514d8981 | 250 | { |
| AnnaBridge | 156:ff21514d8981 | 251 | CLEAR_BIT(CRS->CR, CRS_CR_CEN); |
| AnnaBridge | 156:ff21514d8981 | 252 | } |
| AnnaBridge | 156:ff21514d8981 | 253 | |
| AnnaBridge | 156:ff21514d8981 | 254 | /** |
| AnnaBridge | 156:ff21514d8981 | 255 | * @brief Check if Frequency error counter is enabled or not |
| AnnaBridge | 156:ff21514d8981 | 256 | * @rmtoll CR CEN LL_CRS_IsEnabledFreqErrorCounter |
| AnnaBridge | 156:ff21514d8981 | 257 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 258 | */ |
| AnnaBridge | 156:ff21514d8981 | 259 | __STATIC_INLINE uint32_t LL_CRS_IsEnabledFreqErrorCounter(void) |
| AnnaBridge | 156:ff21514d8981 | 260 | { |
| AnnaBridge | 156:ff21514d8981 | 261 | return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)); |
| AnnaBridge | 156:ff21514d8981 | 262 | } |
| AnnaBridge | 156:ff21514d8981 | 263 | |
| AnnaBridge | 156:ff21514d8981 | 264 | /** |
| AnnaBridge | 156:ff21514d8981 | 265 | * @brief Enable Automatic trimming counter |
| AnnaBridge | 156:ff21514d8981 | 266 | * @rmtoll CR AUTOTRIMEN LL_CRS_EnableAutoTrimming |
| AnnaBridge | 156:ff21514d8981 | 267 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 268 | */ |
| AnnaBridge | 156:ff21514d8981 | 269 | __STATIC_INLINE void LL_CRS_EnableAutoTrimming(void) |
| AnnaBridge | 156:ff21514d8981 | 270 | { |
| AnnaBridge | 156:ff21514d8981 | 271 | SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); |
| AnnaBridge | 156:ff21514d8981 | 272 | } |
| AnnaBridge | 156:ff21514d8981 | 273 | |
| AnnaBridge | 156:ff21514d8981 | 274 | /** |
| AnnaBridge | 156:ff21514d8981 | 275 | * @brief Disable Automatic trimming counter |
| AnnaBridge | 156:ff21514d8981 | 276 | * @rmtoll CR AUTOTRIMEN LL_CRS_DisableAutoTrimming |
| AnnaBridge | 156:ff21514d8981 | 277 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 278 | */ |
| AnnaBridge | 156:ff21514d8981 | 279 | __STATIC_INLINE void LL_CRS_DisableAutoTrimming(void) |
| AnnaBridge | 156:ff21514d8981 | 280 | { |
| AnnaBridge | 156:ff21514d8981 | 281 | CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); |
| AnnaBridge | 156:ff21514d8981 | 282 | } |
| AnnaBridge | 156:ff21514d8981 | 283 | |
| AnnaBridge | 156:ff21514d8981 | 284 | /** |
| AnnaBridge | 156:ff21514d8981 | 285 | * @brief Check if Automatic trimming is enabled or not |
| AnnaBridge | 156:ff21514d8981 | 286 | * @rmtoll CR AUTOTRIMEN LL_CRS_IsEnabledAutoTrimming |
| AnnaBridge | 156:ff21514d8981 | 287 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 288 | */ |
| AnnaBridge | 156:ff21514d8981 | 289 | __STATIC_INLINE uint32_t LL_CRS_IsEnabledAutoTrimming(void) |
| AnnaBridge | 156:ff21514d8981 | 290 | { |
| AnnaBridge | 156:ff21514d8981 | 291 | return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)); |
| AnnaBridge | 156:ff21514d8981 | 292 | } |
| AnnaBridge | 156:ff21514d8981 | 293 | |
| AnnaBridge | 156:ff21514d8981 | 294 | /** |
| AnnaBridge | 156:ff21514d8981 | 295 | * @brief Set HSI48 oscillator smooth trimming |
| AnnaBridge | 156:ff21514d8981 | 296 | * @note When the AUTOTRIMEN bit is set, this field is controlled by hardware and is read-only |
| AnnaBridge | 156:ff21514d8981 | 297 | * @rmtoll CR TRIM LL_CRS_SetHSI48SmoothTrimming |
| AnnaBridge | 156:ff21514d8981 | 298 | * @param Value a number between Min_Data = 0 and Max_Data = 63 |
| AnnaBridge | 156:ff21514d8981 | 299 | * @note Default value can be set thanks to @ref LL_CRS_HSI48CALIBRATION_DEFAULT |
| AnnaBridge | 156:ff21514d8981 | 300 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 301 | */ |
| AnnaBridge | 156:ff21514d8981 | 302 | __STATIC_INLINE void LL_CRS_SetHSI48SmoothTrimming(uint32_t Value) |
| AnnaBridge | 156:ff21514d8981 | 303 | { |
| AnnaBridge | 156:ff21514d8981 | 304 | MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); |
| AnnaBridge | 156:ff21514d8981 | 305 | } |
| AnnaBridge | 156:ff21514d8981 | 306 | |
| AnnaBridge | 156:ff21514d8981 | 307 | /** |
| AnnaBridge | 156:ff21514d8981 | 308 | * @brief Get HSI48 oscillator smooth trimming |
| AnnaBridge | 156:ff21514d8981 | 309 | * @rmtoll CR TRIM LL_CRS_GetHSI48SmoothTrimming |
| AnnaBridge | 156:ff21514d8981 | 310 | * @retval a number between Min_Data = 0 and Max_Data = 63 |
| AnnaBridge | 156:ff21514d8981 | 311 | */ |
| AnnaBridge | 156:ff21514d8981 | 312 | __STATIC_INLINE uint32_t LL_CRS_GetHSI48SmoothTrimming(void) |
| AnnaBridge | 156:ff21514d8981 | 313 | { |
| AnnaBridge | 156:ff21514d8981 | 314 | return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); |
| AnnaBridge | 156:ff21514d8981 | 315 | } |
| AnnaBridge | 156:ff21514d8981 | 316 | |
| AnnaBridge | 156:ff21514d8981 | 317 | /** |
| AnnaBridge | 156:ff21514d8981 | 318 | * @brief Set counter reload value |
| AnnaBridge | 156:ff21514d8981 | 319 | * @rmtoll CFGR RELOAD LL_CRS_SetReloadCounter |
| AnnaBridge | 156:ff21514d8981 | 320 | * @param Value a number between Min_Data = 0 and Max_Data = 0xFFFF |
| AnnaBridge | 156:ff21514d8981 | 321 | * @note Default value can be set thanks to @ref LL_CRS_RELOADVALUE_DEFAULT |
| AnnaBridge | 156:ff21514d8981 | 322 | * Otherwise it can be calculated in using macro @ref __LL_CRS_CALC_CALCULATE_RELOADVALUE (_FTARGET_, _FSYNC_) |
| AnnaBridge | 156:ff21514d8981 | 323 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 324 | */ |
| AnnaBridge | 156:ff21514d8981 | 325 | __STATIC_INLINE void LL_CRS_SetReloadCounter(uint32_t Value) |
| AnnaBridge | 156:ff21514d8981 | 326 | { |
| AnnaBridge | 156:ff21514d8981 | 327 | MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); |
| AnnaBridge | 156:ff21514d8981 | 328 | } |
| AnnaBridge | 156:ff21514d8981 | 329 | |
| AnnaBridge | 156:ff21514d8981 | 330 | /** |
| AnnaBridge | 156:ff21514d8981 | 331 | * @brief Get counter reload value |
| AnnaBridge | 156:ff21514d8981 | 332 | * @rmtoll CFGR RELOAD LL_CRS_GetReloadCounter |
| AnnaBridge | 156:ff21514d8981 | 333 | * @retval a number between Min_Data = 0 and Max_Data = 0xFFFF |
| AnnaBridge | 156:ff21514d8981 | 334 | */ |
| AnnaBridge | 156:ff21514d8981 | 335 | __STATIC_INLINE uint32_t LL_CRS_GetReloadCounter(void) |
| AnnaBridge | 156:ff21514d8981 | 336 | { |
| AnnaBridge | 156:ff21514d8981 | 337 | return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); |
| AnnaBridge | 156:ff21514d8981 | 338 | } |
| AnnaBridge | 156:ff21514d8981 | 339 | |
| AnnaBridge | 156:ff21514d8981 | 340 | /** |
| AnnaBridge | 156:ff21514d8981 | 341 | * @brief Set frequency error limit |
| AnnaBridge | 156:ff21514d8981 | 342 | * @rmtoll CFGR FELIM LL_CRS_SetFreqErrorLimit |
| AnnaBridge | 156:ff21514d8981 | 343 | * @param Value a number between Min_Data = 0 and Max_Data = 255 |
| AnnaBridge | 156:ff21514d8981 | 344 | * @note Default value can be set thanks to @ref LL_CRS_ERRORLIMIT_DEFAULT |
| AnnaBridge | 156:ff21514d8981 | 345 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 346 | */ |
| AnnaBridge | 156:ff21514d8981 | 347 | __STATIC_INLINE void LL_CRS_SetFreqErrorLimit(uint32_t Value) |
| AnnaBridge | 156:ff21514d8981 | 348 | { |
| AnnaBridge | 156:ff21514d8981 | 349 | MODIFY_REG(CRS->CFGR, CRS_CFGR_FELIM, Value << CRS_CFGR_FELIM_Pos); |
| AnnaBridge | 156:ff21514d8981 | 350 | } |
| AnnaBridge | 156:ff21514d8981 | 351 | |
| AnnaBridge | 156:ff21514d8981 | 352 | /** |
| AnnaBridge | 156:ff21514d8981 | 353 | * @brief Get frequency error limit |
| AnnaBridge | 156:ff21514d8981 | 354 | * @rmtoll CFGR FELIM LL_CRS_GetFreqErrorLimit |
| AnnaBridge | 156:ff21514d8981 | 355 | * @retval A number between Min_Data = 0 and Max_Data = 255 |
| AnnaBridge | 156:ff21514d8981 | 356 | */ |
| AnnaBridge | 156:ff21514d8981 | 357 | __STATIC_INLINE uint32_t LL_CRS_GetFreqErrorLimit(void) |
| AnnaBridge | 156:ff21514d8981 | 358 | { |
| AnnaBridge | 156:ff21514d8981 | 359 | return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_FELIM) >> CRS_CFGR_FELIM_Pos); |
| AnnaBridge | 156:ff21514d8981 | 360 | } |
| AnnaBridge | 156:ff21514d8981 | 361 | |
| AnnaBridge | 156:ff21514d8981 | 362 | /** |
| AnnaBridge | 156:ff21514d8981 | 363 | * @brief Set division factor for SYNC signal |
| AnnaBridge | 156:ff21514d8981 | 364 | * @rmtoll CFGR SYNCDIV LL_CRS_SetSyncDivider |
| AnnaBridge | 156:ff21514d8981 | 365 | * @param Divider This parameter can be one of the following values: |
| AnnaBridge | 156:ff21514d8981 | 366 | * @arg @ref LL_CRS_SYNC_DIV_1 |
| AnnaBridge | 156:ff21514d8981 | 367 | * @arg @ref LL_CRS_SYNC_DIV_2 |
| AnnaBridge | 156:ff21514d8981 | 368 | * @arg @ref LL_CRS_SYNC_DIV_4 |
| AnnaBridge | 156:ff21514d8981 | 369 | * @arg @ref LL_CRS_SYNC_DIV_8 |
| AnnaBridge | 156:ff21514d8981 | 370 | * @arg @ref LL_CRS_SYNC_DIV_16 |
| AnnaBridge | 156:ff21514d8981 | 371 | * @arg @ref LL_CRS_SYNC_DIV_32 |
| AnnaBridge | 156:ff21514d8981 | 372 | * @arg @ref LL_CRS_SYNC_DIV_64 |
| AnnaBridge | 156:ff21514d8981 | 373 | * @arg @ref LL_CRS_SYNC_DIV_128 |
| AnnaBridge | 156:ff21514d8981 | 374 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 375 | */ |
| AnnaBridge | 156:ff21514d8981 | 376 | __STATIC_INLINE void LL_CRS_SetSyncDivider(uint32_t Divider) |
| AnnaBridge | 156:ff21514d8981 | 377 | { |
| AnnaBridge | 156:ff21514d8981 | 378 | MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCDIV, Divider); |
| AnnaBridge | 156:ff21514d8981 | 379 | } |
| AnnaBridge | 156:ff21514d8981 | 380 | |
| AnnaBridge | 156:ff21514d8981 | 381 | /** |
| AnnaBridge | 156:ff21514d8981 | 382 | * @brief Get division factor for SYNC signal |
| AnnaBridge | 156:ff21514d8981 | 383 | * @rmtoll CFGR SYNCDIV LL_CRS_GetSyncDivider |
| AnnaBridge | 156:ff21514d8981 | 384 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 156:ff21514d8981 | 385 | * @arg @ref LL_CRS_SYNC_DIV_1 |
| AnnaBridge | 156:ff21514d8981 | 386 | * @arg @ref LL_CRS_SYNC_DIV_2 |
| AnnaBridge | 156:ff21514d8981 | 387 | * @arg @ref LL_CRS_SYNC_DIV_4 |
| AnnaBridge | 156:ff21514d8981 | 388 | * @arg @ref LL_CRS_SYNC_DIV_8 |
| AnnaBridge | 156:ff21514d8981 | 389 | * @arg @ref LL_CRS_SYNC_DIV_16 |
| AnnaBridge | 156:ff21514d8981 | 390 | * @arg @ref LL_CRS_SYNC_DIV_32 |
| AnnaBridge | 156:ff21514d8981 | 391 | * @arg @ref LL_CRS_SYNC_DIV_64 |
| AnnaBridge | 156:ff21514d8981 | 392 | * @arg @ref LL_CRS_SYNC_DIV_128 |
| AnnaBridge | 156:ff21514d8981 | 393 | */ |
| AnnaBridge | 156:ff21514d8981 | 394 | __STATIC_INLINE uint32_t LL_CRS_GetSyncDivider(void) |
| AnnaBridge | 156:ff21514d8981 | 395 | { |
| AnnaBridge | 156:ff21514d8981 | 396 | return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCDIV)); |
| AnnaBridge | 156:ff21514d8981 | 397 | } |
| AnnaBridge | 156:ff21514d8981 | 398 | |
| AnnaBridge | 156:ff21514d8981 | 399 | /** |
| AnnaBridge | 156:ff21514d8981 | 400 | * @brief Set SYNC signal source |
| AnnaBridge | 156:ff21514d8981 | 401 | * @rmtoll CFGR SYNCSRC LL_CRS_SetSyncSignalSource |
| AnnaBridge | 156:ff21514d8981 | 402 | * @param Source This parameter can be one of the following values: |
| AnnaBridge | 156:ff21514d8981 | 403 | * @arg @ref LL_CRS_SYNC_SOURCE_GPIO |
| AnnaBridge | 156:ff21514d8981 | 404 | * @arg @ref LL_CRS_SYNC_SOURCE_LSE |
| AnnaBridge | 156:ff21514d8981 | 405 | * @arg @ref LL_CRS_SYNC_SOURCE_USB |
| AnnaBridge | 156:ff21514d8981 | 406 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 407 | */ |
| AnnaBridge | 156:ff21514d8981 | 408 | __STATIC_INLINE void LL_CRS_SetSyncSignalSource(uint32_t Source) |
| AnnaBridge | 156:ff21514d8981 | 409 | { |
| AnnaBridge | 156:ff21514d8981 | 410 | MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCSRC, Source); |
| AnnaBridge | 156:ff21514d8981 | 411 | } |
| AnnaBridge | 156:ff21514d8981 | 412 | |
| AnnaBridge | 156:ff21514d8981 | 413 | /** |
| AnnaBridge | 156:ff21514d8981 | 414 | * @brief Get SYNC signal source |
| AnnaBridge | 156:ff21514d8981 | 415 | * @rmtoll CFGR SYNCSRC LL_CRS_GetSyncSignalSource |
| AnnaBridge | 156:ff21514d8981 | 416 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 156:ff21514d8981 | 417 | * @arg @ref LL_CRS_SYNC_SOURCE_GPIO |
| AnnaBridge | 156:ff21514d8981 | 418 | * @arg @ref LL_CRS_SYNC_SOURCE_LSE |
| AnnaBridge | 156:ff21514d8981 | 419 | * @arg @ref LL_CRS_SYNC_SOURCE_USB |
| AnnaBridge | 156:ff21514d8981 | 420 | */ |
| AnnaBridge | 156:ff21514d8981 | 421 | __STATIC_INLINE uint32_t LL_CRS_GetSyncSignalSource(void) |
| AnnaBridge | 156:ff21514d8981 | 422 | { |
| AnnaBridge | 156:ff21514d8981 | 423 | return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCSRC)); |
| AnnaBridge | 156:ff21514d8981 | 424 | } |
| AnnaBridge | 156:ff21514d8981 | 425 | |
| AnnaBridge | 156:ff21514d8981 | 426 | /** |
| AnnaBridge | 156:ff21514d8981 | 427 | * @brief Set input polarity for the SYNC signal source |
| AnnaBridge | 156:ff21514d8981 | 428 | * @rmtoll CFGR SYNCPOL LL_CRS_SetSyncPolarity |
| AnnaBridge | 156:ff21514d8981 | 429 | * @param Polarity This parameter can be one of the following values: |
| AnnaBridge | 156:ff21514d8981 | 430 | * @arg @ref LL_CRS_SYNC_POLARITY_RISING |
| AnnaBridge | 156:ff21514d8981 | 431 | * @arg @ref LL_CRS_SYNC_POLARITY_FALLING |
| AnnaBridge | 156:ff21514d8981 | 432 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 433 | */ |
| AnnaBridge | 156:ff21514d8981 | 434 | __STATIC_INLINE void LL_CRS_SetSyncPolarity(uint32_t Polarity) |
| AnnaBridge | 156:ff21514d8981 | 435 | { |
| AnnaBridge | 156:ff21514d8981 | 436 | MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCPOL, Polarity); |
| AnnaBridge | 156:ff21514d8981 | 437 | } |
| AnnaBridge | 156:ff21514d8981 | 438 | |
| AnnaBridge | 156:ff21514d8981 | 439 | /** |
| AnnaBridge | 156:ff21514d8981 | 440 | * @brief Get input polarity for the SYNC signal source |
| AnnaBridge | 156:ff21514d8981 | 441 | * @rmtoll CFGR SYNCPOL LL_CRS_GetSyncPolarity |
| AnnaBridge | 156:ff21514d8981 | 442 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 156:ff21514d8981 | 443 | * @arg @ref LL_CRS_SYNC_POLARITY_RISING |
| AnnaBridge | 156:ff21514d8981 | 444 | * @arg @ref LL_CRS_SYNC_POLARITY_FALLING |
| AnnaBridge | 156:ff21514d8981 | 445 | */ |
| AnnaBridge | 156:ff21514d8981 | 446 | __STATIC_INLINE uint32_t LL_CRS_GetSyncPolarity(void) |
| AnnaBridge | 156:ff21514d8981 | 447 | { |
| AnnaBridge | 156:ff21514d8981 | 448 | return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCPOL)); |
| AnnaBridge | 156:ff21514d8981 | 449 | } |
| AnnaBridge | 156:ff21514d8981 | 450 | |
| AnnaBridge | 156:ff21514d8981 | 451 | /** |
| AnnaBridge | 156:ff21514d8981 | 452 | * @brief Configure CRS for the synchronization |
| AnnaBridge | 156:ff21514d8981 | 453 | * @rmtoll CR TRIM LL_CRS_ConfigSynchronization\n |
| AnnaBridge | 156:ff21514d8981 | 454 | * CFGR RELOAD LL_CRS_ConfigSynchronization\n |
| AnnaBridge | 156:ff21514d8981 | 455 | * CFGR FELIM LL_CRS_ConfigSynchronization\n |
| AnnaBridge | 156:ff21514d8981 | 456 | * CFGR SYNCDIV LL_CRS_ConfigSynchronization\n |
| AnnaBridge | 156:ff21514d8981 | 457 | * CFGR SYNCSRC LL_CRS_ConfigSynchronization\n |
| AnnaBridge | 156:ff21514d8981 | 458 | * CFGR SYNCPOL LL_CRS_ConfigSynchronization |
| AnnaBridge | 156:ff21514d8981 | 459 | * @param HSI48CalibrationValue a number between Min_Data = 0 and Max_Data = 63 |
| AnnaBridge | 156:ff21514d8981 | 460 | * @param ErrorLimitValue a number between Min_Data = 0 and Max_Data = 0xFFFF |
| AnnaBridge | 156:ff21514d8981 | 461 | * @param ReloadValue a number between Min_Data = 0 and Max_Data = 255 |
| AnnaBridge | 156:ff21514d8981 | 462 | * @param Settings This parameter can be a combination of the following values: |
| AnnaBridge | 156:ff21514d8981 | 463 | * @arg @ref LL_CRS_SYNC_DIV_1 or @ref LL_CRS_SYNC_DIV_2 or @ref LL_CRS_SYNC_DIV_4 or @ref LL_CRS_SYNC_DIV_8 |
| AnnaBridge | 156:ff21514d8981 | 464 | * or @ref LL_CRS_SYNC_DIV_16 or @ref LL_CRS_SYNC_DIV_32 or @ref LL_CRS_SYNC_DIV_64 or @ref LL_CRS_SYNC_DIV_128 |
| AnnaBridge | 156:ff21514d8981 | 465 | * @arg @ref LL_CRS_SYNC_SOURCE_GPIO or @ref LL_CRS_SYNC_SOURCE_LSE or @ref LL_CRS_SYNC_SOURCE_USB |
| AnnaBridge | 156:ff21514d8981 | 466 | * @arg @ref LL_CRS_SYNC_POLARITY_RISING or @ref LL_CRS_SYNC_POLARITY_FALLING |
| AnnaBridge | 156:ff21514d8981 | 467 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 468 | */ |
| AnnaBridge | 156:ff21514d8981 | 469 | __STATIC_INLINE void LL_CRS_ConfigSynchronization(uint32_t HSI48CalibrationValue, uint32_t ErrorLimitValue, uint32_t ReloadValue, uint32_t Settings) |
| AnnaBridge | 156:ff21514d8981 | 470 | { |
| AnnaBridge | 156:ff21514d8981 | 471 | MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue); |
| AnnaBridge | 156:ff21514d8981 | 472 | MODIFY_REG(CRS->CFGR, |
| AnnaBridge | 156:ff21514d8981 | 473 | CRS_CFGR_RELOAD | CRS_CFGR_FELIM | CRS_CFGR_SYNCDIV | CRS_CFGR_SYNCSRC | CRS_CFGR_SYNCPOL, |
| AnnaBridge | 156:ff21514d8981 | 474 | ReloadValue | (ErrorLimitValue << CRS_CFGR_FELIM_Pos) | Settings); |
| AnnaBridge | 156:ff21514d8981 | 475 | } |
| AnnaBridge | 156:ff21514d8981 | 476 | |
| AnnaBridge | 156:ff21514d8981 | 477 | /** |
| AnnaBridge | 156:ff21514d8981 | 478 | * @} |
| AnnaBridge | 156:ff21514d8981 | 479 | */ |
| AnnaBridge | 156:ff21514d8981 | 480 | |
| AnnaBridge | 156:ff21514d8981 | 481 | /** @defgroup CRS_LL_EF_CRS_Management CRS_Management |
| AnnaBridge | 156:ff21514d8981 | 482 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 483 | */ |
| AnnaBridge | 156:ff21514d8981 | 484 | |
| AnnaBridge | 156:ff21514d8981 | 485 | /** |
| AnnaBridge | 156:ff21514d8981 | 486 | * @brief Generate software SYNC event |
| AnnaBridge | 156:ff21514d8981 | 487 | * @rmtoll CR SWSYNC LL_CRS_GenerateEvent_SWSYNC |
| AnnaBridge | 156:ff21514d8981 | 488 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 489 | */ |
| AnnaBridge | 156:ff21514d8981 | 490 | __STATIC_INLINE void LL_CRS_GenerateEvent_SWSYNC(void) |
| AnnaBridge | 156:ff21514d8981 | 491 | { |
| AnnaBridge | 156:ff21514d8981 | 492 | SET_BIT(CRS->CR, CRS_CR_SWSYNC); |
| AnnaBridge | 156:ff21514d8981 | 493 | } |
| AnnaBridge | 156:ff21514d8981 | 494 | |
| AnnaBridge | 156:ff21514d8981 | 495 | /** |
| AnnaBridge | 156:ff21514d8981 | 496 | * @brief Get the frequency error direction latched in the time of the last |
| AnnaBridge | 156:ff21514d8981 | 497 | * SYNC event |
| AnnaBridge | 156:ff21514d8981 | 498 | * @rmtoll ISR FEDIR LL_CRS_GetFreqErrorDirection |
| AnnaBridge | 156:ff21514d8981 | 499 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 156:ff21514d8981 | 500 | * @arg @ref LL_CRS_FREQ_ERROR_DIR_UP |
| AnnaBridge | 156:ff21514d8981 | 501 | * @arg @ref LL_CRS_FREQ_ERROR_DIR_DOWN |
| AnnaBridge | 156:ff21514d8981 | 502 | */ |
| AnnaBridge | 156:ff21514d8981 | 503 | __STATIC_INLINE uint32_t LL_CRS_GetFreqErrorDirection(void) |
| AnnaBridge | 156:ff21514d8981 | 504 | { |
| AnnaBridge | 156:ff21514d8981 | 505 | return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); |
| AnnaBridge | 156:ff21514d8981 | 506 | } |
| AnnaBridge | 156:ff21514d8981 | 507 | |
| AnnaBridge | 156:ff21514d8981 | 508 | /** |
| AnnaBridge | 156:ff21514d8981 | 509 | * @brief Get the frequency error counter value latched in the time of the last SYNC event |
| AnnaBridge | 156:ff21514d8981 | 510 | * @rmtoll ISR FECAP LL_CRS_GetFreqErrorCapture |
| AnnaBridge | 156:ff21514d8981 | 511 | * @retval A number between Min_Data = 0x0000 and Max_Data = 0xFFFF |
| AnnaBridge | 156:ff21514d8981 | 512 | */ |
| AnnaBridge | 156:ff21514d8981 | 513 | __STATIC_INLINE uint32_t LL_CRS_GetFreqErrorCapture(void) |
| AnnaBridge | 156:ff21514d8981 | 514 | { |
| AnnaBridge | 156:ff21514d8981 | 515 | return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos); |
| AnnaBridge | 156:ff21514d8981 | 516 | } |
| AnnaBridge | 156:ff21514d8981 | 517 | |
| AnnaBridge | 156:ff21514d8981 | 518 | /** |
| AnnaBridge | 156:ff21514d8981 | 519 | * @} |
| AnnaBridge | 156:ff21514d8981 | 520 | */ |
| AnnaBridge | 156:ff21514d8981 | 521 | |
| AnnaBridge | 156:ff21514d8981 | 522 | /** @defgroup CRS_LL_EF_FLAG_Management FLAG_Management |
| AnnaBridge | 156:ff21514d8981 | 523 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 524 | */ |
| AnnaBridge | 156:ff21514d8981 | 525 | |
| AnnaBridge | 156:ff21514d8981 | 526 | /** |
| AnnaBridge | 156:ff21514d8981 | 527 | * @brief Check if SYNC event OK signal occurred or not |
| AnnaBridge | 156:ff21514d8981 | 528 | * @rmtoll ISR SYNCOKF LL_CRS_IsActiveFlag_SYNCOK |
| AnnaBridge | 156:ff21514d8981 | 529 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 530 | */ |
| AnnaBridge | 156:ff21514d8981 | 531 | __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCOK(void) |
| AnnaBridge | 156:ff21514d8981 | 532 | { |
| AnnaBridge | 156:ff21514d8981 | 533 | return (READ_BIT(CRS->ISR, CRS_ISR_SYNCOKF) == (CRS_ISR_SYNCOKF)); |
| AnnaBridge | 156:ff21514d8981 | 534 | } |
| AnnaBridge | 156:ff21514d8981 | 535 | |
| AnnaBridge | 156:ff21514d8981 | 536 | /** |
| AnnaBridge | 156:ff21514d8981 | 537 | * @brief Check if SYNC warning signal occurred or not |
| AnnaBridge | 156:ff21514d8981 | 538 | * @rmtoll ISR SYNCWARNF LL_CRS_IsActiveFlag_SYNCWARN |
| AnnaBridge | 156:ff21514d8981 | 539 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 540 | */ |
| AnnaBridge | 156:ff21514d8981 | 541 | __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCWARN(void) |
| AnnaBridge | 156:ff21514d8981 | 542 | { |
| AnnaBridge | 156:ff21514d8981 | 543 | return (READ_BIT(CRS->ISR, CRS_ISR_SYNCWARNF) == (CRS_ISR_SYNCWARNF)); |
| AnnaBridge | 156:ff21514d8981 | 544 | } |
| AnnaBridge | 156:ff21514d8981 | 545 | |
| AnnaBridge | 156:ff21514d8981 | 546 | /** |
| AnnaBridge | 156:ff21514d8981 | 547 | * @brief Check if Synchronization or trimming error signal occurred or not |
| AnnaBridge | 156:ff21514d8981 | 548 | * @rmtoll ISR ERRF LL_CRS_IsActiveFlag_ERR |
| AnnaBridge | 156:ff21514d8981 | 549 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 550 | */ |
| AnnaBridge | 156:ff21514d8981 | 551 | __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ERR(void) |
| AnnaBridge | 156:ff21514d8981 | 552 | { |
| AnnaBridge | 156:ff21514d8981 | 553 | return (READ_BIT(CRS->ISR, CRS_ISR_ERRF) == (CRS_ISR_ERRF)); |
| AnnaBridge | 156:ff21514d8981 | 554 | } |
| AnnaBridge | 156:ff21514d8981 | 555 | |
| AnnaBridge | 156:ff21514d8981 | 556 | /** |
| AnnaBridge | 156:ff21514d8981 | 557 | * @brief Check if Expected SYNC signal occurred or not |
| AnnaBridge | 156:ff21514d8981 | 558 | * @rmtoll ISR ESYNCF LL_CRS_IsActiveFlag_ESYNC |
| AnnaBridge | 156:ff21514d8981 | 559 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 560 | */ |
| AnnaBridge | 156:ff21514d8981 | 561 | __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ESYNC(void) |
| AnnaBridge | 156:ff21514d8981 | 562 | { |
| AnnaBridge | 156:ff21514d8981 | 563 | return (READ_BIT(CRS->ISR, CRS_ISR_ESYNCF) == (CRS_ISR_ESYNCF)); |
| AnnaBridge | 156:ff21514d8981 | 564 | } |
| AnnaBridge | 156:ff21514d8981 | 565 | |
| AnnaBridge | 156:ff21514d8981 | 566 | /** |
| AnnaBridge | 156:ff21514d8981 | 567 | * @brief Check if SYNC error signal occurred or not |
| AnnaBridge | 156:ff21514d8981 | 568 | * @rmtoll ISR SYNCERR LL_CRS_IsActiveFlag_SYNCERR |
| AnnaBridge | 156:ff21514d8981 | 569 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 570 | */ |
| AnnaBridge | 156:ff21514d8981 | 571 | __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCERR(void) |
| AnnaBridge | 156:ff21514d8981 | 572 | { |
| AnnaBridge | 156:ff21514d8981 | 573 | return (READ_BIT(CRS->ISR, CRS_ISR_SYNCERR) == (CRS_ISR_SYNCERR)); |
| AnnaBridge | 156:ff21514d8981 | 574 | } |
| AnnaBridge | 156:ff21514d8981 | 575 | |
| AnnaBridge | 156:ff21514d8981 | 576 | /** |
| AnnaBridge | 156:ff21514d8981 | 577 | * @brief Check if SYNC missed error signal occurred or not |
| AnnaBridge | 156:ff21514d8981 | 578 | * @rmtoll ISR SYNCMISS LL_CRS_IsActiveFlag_SYNCMISS |
| AnnaBridge | 156:ff21514d8981 | 579 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 580 | */ |
| AnnaBridge | 156:ff21514d8981 | 581 | __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCMISS(void) |
| AnnaBridge | 156:ff21514d8981 | 582 | { |
| AnnaBridge | 156:ff21514d8981 | 583 | return (READ_BIT(CRS->ISR, CRS_ISR_SYNCMISS) == (CRS_ISR_SYNCMISS)); |
| AnnaBridge | 156:ff21514d8981 | 584 | } |
| AnnaBridge | 156:ff21514d8981 | 585 | |
| AnnaBridge | 156:ff21514d8981 | 586 | /** |
| AnnaBridge | 156:ff21514d8981 | 587 | * @brief Check if Trimming overflow or underflow occurred or not |
| AnnaBridge | 156:ff21514d8981 | 588 | * @rmtoll ISR TRIMOVF LL_CRS_IsActiveFlag_TRIMOVF |
| AnnaBridge | 156:ff21514d8981 | 589 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 590 | */ |
| AnnaBridge | 156:ff21514d8981 | 591 | __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_TRIMOVF(void) |
| AnnaBridge | 156:ff21514d8981 | 592 | { |
| AnnaBridge | 156:ff21514d8981 | 593 | return (READ_BIT(CRS->ISR, CRS_ISR_TRIMOVF) == (CRS_ISR_TRIMOVF)); |
| AnnaBridge | 156:ff21514d8981 | 594 | } |
| AnnaBridge | 156:ff21514d8981 | 595 | |
| AnnaBridge | 156:ff21514d8981 | 596 | /** |
| AnnaBridge | 156:ff21514d8981 | 597 | * @brief Clear the SYNC event OK flag |
| AnnaBridge | 156:ff21514d8981 | 598 | * @rmtoll ICR SYNCOKC LL_CRS_ClearFlag_SYNCOK |
| AnnaBridge | 156:ff21514d8981 | 599 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 600 | */ |
| AnnaBridge | 156:ff21514d8981 | 601 | __STATIC_INLINE void LL_CRS_ClearFlag_SYNCOK(void) |
| AnnaBridge | 156:ff21514d8981 | 602 | { |
| AnnaBridge | 156:ff21514d8981 | 603 | WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC); |
| AnnaBridge | 156:ff21514d8981 | 604 | } |
| AnnaBridge | 156:ff21514d8981 | 605 | |
| AnnaBridge | 156:ff21514d8981 | 606 | /** |
| AnnaBridge | 156:ff21514d8981 | 607 | * @brief Clear the SYNC warning flag |
| AnnaBridge | 156:ff21514d8981 | 608 | * @rmtoll ICR SYNCWARNC LL_CRS_ClearFlag_SYNCWARN |
| AnnaBridge | 156:ff21514d8981 | 609 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 610 | */ |
| AnnaBridge | 156:ff21514d8981 | 611 | __STATIC_INLINE void LL_CRS_ClearFlag_SYNCWARN(void) |
| AnnaBridge | 156:ff21514d8981 | 612 | { |
| AnnaBridge | 156:ff21514d8981 | 613 | WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC); |
| AnnaBridge | 156:ff21514d8981 | 614 | } |
| AnnaBridge | 156:ff21514d8981 | 615 | |
| AnnaBridge | 156:ff21514d8981 | 616 | /** |
| AnnaBridge | 156:ff21514d8981 | 617 | * @brief Clear TRIMOVF, SYNCMISS and SYNCERR bits and consequently also |
| AnnaBridge | 156:ff21514d8981 | 618 | * the ERR flag |
| AnnaBridge | 156:ff21514d8981 | 619 | * @rmtoll ICR ERRC LL_CRS_ClearFlag_ERR |
| AnnaBridge | 156:ff21514d8981 | 620 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 621 | */ |
| AnnaBridge | 156:ff21514d8981 | 622 | __STATIC_INLINE void LL_CRS_ClearFlag_ERR(void) |
| AnnaBridge | 156:ff21514d8981 | 623 | { |
| AnnaBridge | 156:ff21514d8981 | 624 | WRITE_REG(CRS->ICR, CRS_ICR_ERRC); |
| AnnaBridge | 156:ff21514d8981 | 625 | } |
| AnnaBridge | 156:ff21514d8981 | 626 | |
| AnnaBridge | 156:ff21514d8981 | 627 | /** |
| AnnaBridge | 156:ff21514d8981 | 628 | * @brief Clear Expected SYNC flag |
| AnnaBridge | 156:ff21514d8981 | 629 | * @rmtoll ICR ESYNCC LL_CRS_ClearFlag_ESYNC |
| AnnaBridge | 156:ff21514d8981 | 630 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 631 | */ |
| AnnaBridge | 156:ff21514d8981 | 632 | __STATIC_INLINE void LL_CRS_ClearFlag_ESYNC(void) |
| AnnaBridge | 156:ff21514d8981 | 633 | { |
| AnnaBridge | 156:ff21514d8981 | 634 | WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC); |
| AnnaBridge | 156:ff21514d8981 | 635 | } |
| AnnaBridge | 156:ff21514d8981 | 636 | |
| AnnaBridge | 156:ff21514d8981 | 637 | /** |
| AnnaBridge | 156:ff21514d8981 | 638 | * @} |
| AnnaBridge | 156:ff21514d8981 | 639 | */ |
| AnnaBridge | 156:ff21514d8981 | 640 | |
| AnnaBridge | 156:ff21514d8981 | 641 | /** @defgroup CRS_LL_EF_IT_Management IT_Management |
| AnnaBridge | 156:ff21514d8981 | 642 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 643 | */ |
| AnnaBridge | 156:ff21514d8981 | 644 | |
| AnnaBridge | 156:ff21514d8981 | 645 | /** |
| AnnaBridge | 156:ff21514d8981 | 646 | * @brief Enable SYNC event OK interrupt |
| AnnaBridge | 156:ff21514d8981 | 647 | * @rmtoll CR SYNCOKIE LL_CRS_EnableIT_SYNCOK |
| AnnaBridge | 156:ff21514d8981 | 648 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 649 | */ |
| AnnaBridge | 156:ff21514d8981 | 650 | __STATIC_INLINE void LL_CRS_EnableIT_SYNCOK(void) |
| AnnaBridge | 156:ff21514d8981 | 651 | { |
| AnnaBridge | 156:ff21514d8981 | 652 | SET_BIT(CRS->CR, CRS_CR_SYNCOKIE); |
| AnnaBridge | 156:ff21514d8981 | 653 | } |
| AnnaBridge | 156:ff21514d8981 | 654 | |
| AnnaBridge | 156:ff21514d8981 | 655 | /** |
| AnnaBridge | 156:ff21514d8981 | 656 | * @brief Disable SYNC event OK interrupt |
| AnnaBridge | 156:ff21514d8981 | 657 | * @rmtoll CR SYNCOKIE LL_CRS_DisableIT_SYNCOK |
| AnnaBridge | 156:ff21514d8981 | 658 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 659 | */ |
| AnnaBridge | 156:ff21514d8981 | 660 | __STATIC_INLINE void LL_CRS_DisableIT_SYNCOK(void) |
| AnnaBridge | 156:ff21514d8981 | 661 | { |
| AnnaBridge | 156:ff21514d8981 | 662 | CLEAR_BIT(CRS->CR, CRS_CR_SYNCOKIE); |
| AnnaBridge | 156:ff21514d8981 | 663 | } |
| AnnaBridge | 156:ff21514d8981 | 664 | |
| AnnaBridge | 156:ff21514d8981 | 665 | /** |
| AnnaBridge | 156:ff21514d8981 | 666 | * @brief Check if SYNC event OK interrupt is enabled or not |
| AnnaBridge | 156:ff21514d8981 | 667 | * @rmtoll CR SYNCOKIE LL_CRS_IsEnabledIT_SYNCOK |
| AnnaBridge | 156:ff21514d8981 | 668 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 669 | */ |
| AnnaBridge | 156:ff21514d8981 | 670 | __STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCOK(void) |
| AnnaBridge | 156:ff21514d8981 | 671 | { |
| AnnaBridge | 156:ff21514d8981 | 672 | return (READ_BIT(CRS->CR, CRS_CR_SYNCOKIE) == (CRS_CR_SYNCOKIE)); |
| AnnaBridge | 156:ff21514d8981 | 673 | } |
| AnnaBridge | 156:ff21514d8981 | 674 | |
| AnnaBridge | 156:ff21514d8981 | 675 | /** |
| AnnaBridge | 156:ff21514d8981 | 676 | * @brief Enable SYNC warning interrupt |
| AnnaBridge | 156:ff21514d8981 | 677 | * @rmtoll CR SYNCWARNIE LL_CRS_EnableIT_SYNCWARN |
| AnnaBridge | 156:ff21514d8981 | 678 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 679 | */ |
| AnnaBridge | 156:ff21514d8981 | 680 | __STATIC_INLINE void LL_CRS_EnableIT_SYNCWARN(void) |
| AnnaBridge | 156:ff21514d8981 | 681 | { |
| AnnaBridge | 156:ff21514d8981 | 682 | SET_BIT(CRS->CR, CRS_CR_SYNCWARNIE); |
| AnnaBridge | 156:ff21514d8981 | 683 | } |
| AnnaBridge | 156:ff21514d8981 | 684 | |
| AnnaBridge | 156:ff21514d8981 | 685 | /** |
| AnnaBridge | 156:ff21514d8981 | 686 | * @brief Disable SYNC warning interrupt |
| AnnaBridge | 156:ff21514d8981 | 687 | * @rmtoll CR SYNCWARNIE LL_CRS_DisableIT_SYNCWARN |
| AnnaBridge | 156:ff21514d8981 | 688 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 689 | */ |
| AnnaBridge | 156:ff21514d8981 | 690 | __STATIC_INLINE void LL_CRS_DisableIT_SYNCWARN(void) |
| AnnaBridge | 156:ff21514d8981 | 691 | { |
| AnnaBridge | 156:ff21514d8981 | 692 | CLEAR_BIT(CRS->CR, CRS_CR_SYNCWARNIE); |
| AnnaBridge | 156:ff21514d8981 | 693 | } |
| AnnaBridge | 156:ff21514d8981 | 694 | |
| AnnaBridge | 156:ff21514d8981 | 695 | /** |
| AnnaBridge | 156:ff21514d8981 | 696 | * @brief Check if SYNC warning interrupt is enabled or not |
| AnnaBridge | 156:ff21514d8981 | 697 | * @rmtoll CR SYNCWARNIE LL_CRS_IsEnabledIT_SYNCWARN |
| AnnaBridge | 156:ff21514d8981 | 698 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 699 | */ |
| AnnaBridge | 156:ff21514d8981 | 700 | __STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCWARN(void) |
| AnnaBridge | 156:ff21514d8981 | 701 | { |
| AnnaBridge | 156:ff21514d8981 | 702 | return (READ_BIT(CRS->CR, CRS_CR_SYNCWARNIE) == (CRS_CR_SYNCWARNIE)); |
| AnnaBridge | 156:ff21514d8981 | 703 | } |
| AnnaBridge | 156:ff21514d8981 | 704 | |
| AnnaBridge | 156:ff21514d8981 | 705 | /** |
| AnnaBridge | 156:ff21514d8981 | 706 | * @brief Enable Synchronization or trimming error interrupt |
| AnnaBridge | 156:ff21514d8981 | 707 | * @rmtoll CR ERRIE LL_CRS_EnableIT_ERR |
| AnnaBridge | 156:ff21514d8981 | 708 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 709 | */ |
| AnnaBridge | 156:ff21514d8981 | 710 | __STATIC_INLINE void LL_CRS_EnableIT_ERR(void) |
| AnnaBridge | 156:ff21514d8981 | 711 | { |
| AnnaBridge | 156:ff21514d8981 | 712 | SET_BIT(CRS->CR, CRS_CR_ERRIE); |
| AnnaBridge | 156:ff21514d8981 | 713 | } |
| AnnaBridge | 156:ff21514d8981 | 714 | |
| AnnaBridge | 156:ff21514d8981 | 715 | /** |
| AnnaBridge | 156:ff21514d8981 | 716 | * @brief Disable Synchronization or trimming error interrupt |
| AnnaBridge | 156:ff21514d8981 | 717 | * @rmtoll CR ERRIE LL_CRS_DisableIT_ERR |
| AnnaBridge | 156:ff21514d8981 | 718 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 719 | */ |
| AnnaBridge | 156:ff21514d8981 | 720 | __STATIC_INLINE void LL_CRS_DisableIT_ERR(void) |
| AnnaBridge | 156:ff21514d8981 | 721 | { |
| AnnaBridge | 156:ff21514d8981 | 722 | CLEAR_BIT(CRS->CR, CRS_CR_ERRIE); |
| AnnaBridge | 156:ff21514d8981 | 723 | } |
| AnnaBridge | 156:ff21514d8981 | 724 | |
| AnnaBridge | 156:ff21514d8981 | 725 | /** |
| AnnaBridge | 156:ff21514d8981 | 726 | * @brief Check if Synchronization or trimming error interrupt is enabled or not |
| AnnaBridge | 156:ff21514d8981 | 727 | * @rmtoll CR ERRIE LL_CRS_IsEnabledIT_ERR |
| AnnaBridge | 156:ff21514d8981 | 728 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 729 | */ |
| AnnaBridge | 156:ff21514d8981 | 730 | __STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ERR(void) |
| AnnaBridge | 156:ff21514d8981 | 731 | { |
| AnnaBridge | 156:ff21514d8981 | 732 | return (READ_BIT(CRS->CR, CRS_CR_ERRIE) == (CRS_CR_ERRIE)); |
| AnnaBridge | 156:ff21514d8981 | 733 | } |
| AnnaBridge | 156:ff21514d8981 | 734 | |
| AnnaBridge | 156:ff21514d8981 | 735 | /** |
| AnnaBridge | 156:ff21514d8981 | 736 | * @brief Enable Expected SYNC interrupt |
| AnnaBridge | 156:ff21514d8981 | 737 | * @rmtoll CR ESYNCIE LL_CRS_EnableIT_ESYNC |
| AnnaBridge | 156:ff21514d8981 | 738 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 739 | */ |
| AnnaBridge | 156:ff21514d8981 | 740 | __STATIC_INLINE void LL_CRS_EnableIT_ESYNC(void) |
| AnnaBridge | 156:ff21514d8981 | 741 | { |
| AnnaBridge | 156:ff21514d8981 | 742 | SET_BIT(CRS->CR, CRS_CR_ESYNCIE); |
| AnnaBridge | 156:ff21514d8981 | 743 | } |
| AnnaBridge | 156:ff21514d8981 | 744 | |
| AnnaBridge | 156:ff21514d8981 | 745 | /** |
| AnnaBridge | 156:ff21514d8981 | 746 | * @brief Disable Expected SYNC interrupt |
| AnnaBridge | 156:ff21514d8981 | 747 | * @rmtoll CR ESYNCIE LL_CRS_DisableIT_ESYNC |
| AnnaBridge | 156:ff21514d8981 | 748 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 749 | */ |
| AnnaBridge | 156:ff21514d8981 | 750 | __STATIC_INLINE void LL_CRS_DisableIT_ESYNC(void) |
| AnnaBridge | 156:ff21514d8981 | 751 | { |
| AnnaBridge | 156:ff21514d8981 | 752 | CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); |
| AnnaBridge | 156:ff21514d8981 | 753 | } |
| AnnaBridge | 156:ff21514d8981 | 754 | |
| AnnaBridge | 156:ff21514d8981 | 755 | /** |
| AnnaBridge | 156:ff21514d8981 | 756 | * @brief Check if Expected SYNC interrupt is enabled or not |
| AnnaBridge | 156:ff21514d8981 | 757 | * @rmtoll CR ESYNCIE LL_CRS_IsEnabledIT_ESYNC |
| AnnaBridge | 156:ff21514d8981 | 758 | * @retval State of bit (1 or 0). |
| AnnaBridge | 156:ff21514d8981 | 759 | */ |
| AnnaBridge | 156:ff21514d8981 | 760 | __STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ESYNC(void) |
| AnnaBridge | 156:ff21514d8981 | 761 | { |
| AnnaBridge | 156:ff21514d8981 | 762 | return (READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)); |
| AnnaBridge | 156:ff21514d8981 | 763 | } |
| AnnaBridge | 156:ff21514d8981 | 764 | |
| AnnaBridge | 156:ff21514d8981 | 765 | /** |
| AnnaBridge | 156:ff21514d8981 | 766 | * @} |
| AnnaBridge | 156:ff21514d8981 | 767 | */ |
| AnnaBridge | 156:ff21514d8981 | 768 | |
| AnnaBridge | 156:ff21514d8981 | 769 | #if defined(USE_FULL_LL_DRIVER) |
| AnnaBridge | 156:ff21514d8981 | 770 | /** @defgroup CRS_LL_EF_Init Initialization and de-initialization functions |
| AnnaBridge | 156:ff21514d8981 | 771 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 772 | */ |
| AnnaBridge | 156:ff21514d8981 | 773 | |
| AnnaBridge | 156:ff21514d8981 | 774 | ErrorStatus LL_CRS_DeInit(void); |
| AnnaBridge | 156:ff21514d8981 | 775 | |
| AnnaBridge | 156:ff21514d8981 | 776 | /** |
| AnnaBridge | 156:ff21514d8981 | 777 | * @} |
| AnnaBridge | 156:ff21514d8981 | 778 | */ |
| AnnaBridge | 156:ff21514d8981 | 779 | #endif /* USE_FULL_LL_DRIVER */ |
| AnnaBridge | 156:ff21514d8981 | 780 | |
| AnnaBridge | 156:ff21514d8981 | 781 | /** |
| AnnaBridge | 156:ff21514d8981 | 782 | * @} |
| AnnaBridge | 156:ff21514d8981 | 783 | */ |
| AnnaBridge | 156:ff21514d8981 | 784 | |
| AnnaBridge | 156:ff21514d8981 | 785 | /** |
| AnnaBridge | 156:ff21514d8981 | 786 | * @} |
| AnnaBridge | 156:ff21514d8981 | 787 | */ |
| AnnaBridge | 156:ff21514d8981 | 788 | |
| AnnaBridge | 156:ff21514d8981 | 789 | #endif /* defined(CRS) */ |
| AnnaBridge | 156:ff21514d8981 | 790 | |
| AnnaBridge | 156:ff21514d8981 | 791 | /** |
| AnnaBridge | 156:ff21514d8981 | 792 | * @} |
| AnnaBridge | 156:ff21514d8981 | 793 | */ |
| AnnaBridge | 156:ff21514d8981 | 794 | |
| AnnaBridge | 156:ff21514d8981 | 795 | #ifdef __cplusplus |
| AnnaBridge | 156:ff21514d8981 | 796 | } |
| AnnaBridge | 156:ff21514d8981 | 797 | #endif |
| AnnaBridge | 156:ff21514d8981 | 798 | |
| AnnaBridge | 156:ff21514d8981 | 799 | #endif /* __STM32L4xx_LL_CRS_H */ |
| AnnaBridge | 156:ff21514d8981 | 800 | |
| AnnaBridge | 156:ff21514d8981 | 801 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
