mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_nand.h@156:ff21514d8981, 2017-11-08 (annotated)

Committer:
AnnaBridge
Date:
Wed Nov 08 17:18:06 2017 +0000
Revision:
156:ff21514d8981
Child:
161:aa5281ff4a02
Reverting back to release 154 of the mbed library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 156:ff21514d8981 1 /**
AnnaBridge 156:ff21514d8981 2 ******************************************************************************
AnnaBridge 156:ff21514d8981 3 * @file stm32l4xx_hal_nand.h
AnnaBridge 156:ff21514d8981 4 * @author MCD Application Team
AnnaBridge 156:ff21514d8981 5 * @version V1.7.1
AnnaBridge 156:ff21514d8981 6 * @date 21-April-2017
AnnaBridge 156:ff21514d8981 7 * @brief Header file of NAND HAL module.
AnnaBridge 156:ff21514d8981 8 ******************************************************************************
AnnaBridge 156:ff21514d8981 9 * @attention
AnnaBridge 156:ff21514d8981 10 *
AnnaBridge 156:ff21514d8981 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 156:ff21514d8981 12 *
AnnaBridge 156:ff21514d8981 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 156:ff21514d8981 14 * are permitted provided that the following conditions are met:
AnnaBridge 156:ff21514d8981 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 156:ff21514d8981 16 * this list of conditions and the following disclaimer.
AnnaBridge 156:ff21514d8981 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 156:ff21514d8981 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 156:ff21514d8981 19 * and/or other materials provided with the distribution.
AnnaBridge 156:ff21514d8981 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 156:ff21514d8981 21 * may be used to endorse or promote products derived from this software
AnnaBridge 156:ff21514d8981 22 * without specific prior written permission.
AnnaBridge 156:ff21514d8981 23 *
AnnaBridge 156:ff21514d8981 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 156:ff21514d8981 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 156:ff21514d8981 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 156:ff21514d8981 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 156:ff21514d8981 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 156:ff21514d8981 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 156:ff21514d8981 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 156:ff21514d8981 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 156:ff21514d8981 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 156:ff21514d8981 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 156:ff21514d8981 34 *
AnnaBridge 156:ff21514d8981 35 ******************************************************************************
AnnaBridge 156:ff21514d8981 36 */
AnnaBridge 156:ff21514d8981 37
AnnaBridge 156:ff21514d8981 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 156:ff21514d8981 39 #ifndef __STM32L4xx_HAL_NAND_H
AnnaBridge 156:ff21514d8981 40 #define __STM32L4xx_HAL_NAND_H
AnnaBridge 156:ff21514d8981 41
AnnaBridge 156:ff21514d8981 42 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 43 extern "C" {
AnnaBridge 156:ff21514d8981 44 #endif
AnnaBridge 156:ff21514d8981 45
AnnaBridge 156:ff21514d8981 46 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
AnnaBridge 156:ff21514d8981 47 defined(STM32L496xx) || defined(STM32L4A6xx)
AnnaBridge 156:ff21514d8981 48
AnnaBridge 156:ff21514d8981 49 /* Includes ------------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 50 #include "stm32l4xx_ll_fmc.h"
AnnaBridge 156:ff21514d8981 51
AnnaBridge 156:ff21514d8981 52 /** @addtogroup STM32L4xx_HAL_Driver
AnnaBridge 156:ff21514d8981 53 * @{
AnnaBridge 156:ff21514d8981 54 */
AnnaBridge 156:ff21514d8981 55
AnnaBridge 156:ff21514d8981 56 /** @addtogroup NAND
AnnaBridge 156:ff21514d8981 57 * @{
AnnaBridge 156:ff21514d8981 58 */
AnnaBridge 156:ff21514d8981 59
AnnaBridge 156:ff21514d8981 60 /** @addtogroup NAND_Private_Constants
AnnaBridge 156:ff21514d8981 61 * @{
AnnaBridge 156:ff21514d8981 62 */
AnnaBridge 156:ff21514d8981 63
AnnaBridge 156:ff21514d8981 64 #define NAND_DEVICE FMC_BANK3
AnnaBridge 156:ff21514d8981 65 #define NAND_WRITE_TIMEOUT ((uint32_t)1000)
AnnaBridge 156:ff21514d8981 66
AnnaBridge 156:ff21514d8981 67 #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
AnnaBridge 156:ff21514d8981 68 #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
AnnaBridge 156:ff21514d8981 69
AnnaBridge 156:ff21514d8981 70 #define NAND_CMD_AREA_A ((uint8_t)0x00)
AnnaBridge 156:ff21514d8981 71 #define NAND_CMD_AREA_B ((uint8_t)0x01)
AnnaBridge 156:ff21514d8981 72 #define NAND_CMD_AREA_C ((uint8_t)0x50)
AnnaBridge 156:ff21514d8981 73 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
AnnaBridge 156:ff21514d8981 74
AnnaBridge 156:ff21514d8981 75 #define NAND_CMD_WRITE0 ((uint8_t)0x80)
AnnaBridge 156:ff21514d8981 76 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
AnnaBridge 156:ff21514d8981 77 #define NAND_CMD_ERASE0 ((uint8_t)0x60)
AnnaBridge 156:ff21514d8981 78 #define NAND_CMD_ERASE1 ((uint8_t)0xD0)
AnnaBridge 156:ff21514d8981 79 #define NAND_CMD_READID ((uint8_t)0x90)
AnnaBridge 156:ff21514d8981 80 #define NAND_CMD_STATUS ((uint8_t)0x70)
AnnaBridge 156:ff21514d8981 81 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
AnnaBridge 156:ff21514d8981 82 #define NAND_CMD_RESET ((uint8_t)0xFF)
AnnaBridge 156:ff21514d8981 83
AnnaBridge 156:ff21514d8981 84 /* NAND memory status */
AnnaBridge 156:ff21514d8981 85 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100)
AnnaBridge 156:ff21514d8981 86 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200)
AnnaBridge 156:ff21514d8981 87 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400)
AnnaBridge 156:ff21514d8981 88 #define NAND_BUSY ((uint32_t)0x00000000)
AnnaBridge 156:ff21514d8981 89 #define NAND_ERROR ((uint32_t)0x00000001)
AnnaBridge 156:ff21514d8981 90 #define NAND_READY ((uint32_t)0x00000040)
AnnaBridge 156:ff21514d8981 91
AnnaBridge 156:ff21514d8981 92 /**
AnnaBridge 156:ff21514d8981 93 * @}
AnnaBridge 156:ff21514d8981 94 */
AnnaBridge 156:ff21514d8981 95
AnnaBridge 156:ff21514d8981 96 /** @addtogroup NAND_Private_Macros
AnnaBridge 156:ff21514d8981 97 * @{
AnnaBridge 156:ff21514d8981 98 */
AnnaBridge 156:ff21514d8981 99
AnnaBridge 156:ff21514d8981 100 /**
AnnaBridge 156:ff21514d8981 101 * @brief NAND memory address computation.
AnnaBridge 156:ff21514d8981 102 * @param __ADDRESS__: NAND memory address.
AnnaBridge 156:ff21514d8981 103 * @param __HANDLE__: NAND handle.
AnnaBridge 156:ff21514d8981 104 * @retval NAND Raw address value
AnnaBridge 156:ff21514d8981 105 */
AnnaBridge 156:ff21514d8981 106 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) (((__ADDRESS__)->Page) + \
AnnaBridge 156:ff21514d8981 107 (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize * ((__HANDLE__)->Info.PageSize + (__HANDLE__)->Info.SpareAreaSize))))
AnnaBridge 156:ff21514d8981 108
AnnaBridge 156:ff21514d8981 109 /**
AnnaBridge 156:ff21514d8981 110 * @brief NAND memory address cycling.
AnnaBridge 156:ff21514d8981 111 * @param __ADDRESS__: NAND memory address.
AnnaBridge 156:ff21514d8981 112 * @retval NAND address cycling value.
AnnaBridge 156:ff21514d8981 113 */
AnnaBridge 156:ff21514d8981 114 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
AnnaBridge 156:ff21514d8981 115 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
AnnaBridge 156:ff21514d8981 116 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
AnnaBridge 156:ff21514d8981 117 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
AnnaBridge 156:ff21514d8981 118
AnnaBridge 156:ff21514d8981 119 /**
AnnaBridge 156:ff21514d8981 120 * @}
AnnaBridge 156:ff21514d8981 121 */
AnnaBridge 156:ff21514d8981 122
AnnaBridge 156:ff21514d8981 123 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 124 /* Exported types ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 125 /** @defgroup NAND_Exported_Types NAND Exported Types
AnnaBridge 156:ff21514d8981 126 * @{
AnnaBridge 156:ff21514d8981 127 */
AnnaBridge 156:ff21514d8981 128
AnnaBridge 156:ff21514d8981 129 /**
AnnaBridge 156:ff21514d8981 130 * @brief HAL NAND State structures definition
AnnaBridge 156:ff21514d8981 131 */
AnnaBridge 156:ff21514d8981 132 typedef enum
AnnaBridge 156:ff21514d8981 133 {
AnnaBridge 156:ff21514d8981 134 HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */
AnnaBridge 156:ff21514d8981 135 HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */
AnnaBridge 156:ff21514d8981 136 HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */
AnnaBridge 156:ff21514d8981 137 HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */
AnnaBridge 156:ff21514d8981 138 }HAL_NAND_StateTypeDef;
AnnaBridge 156:ff21514d8981 139
AnnaBridge 156:ff21514d8981 140 /**
AnnaBridge 156:ff21514d8981 141 * @brief NAND Memory electronic signature Structure definition
AnnaBridge 156:ff21514d8981 142 */
AnnaBridge 156:ff21514d8981 143 typedef struct
AnnaBridge 156:ff21514d8981 144 {
AnnaBridge 156:ff21514d8981 145 /*<! NAND memory electronic signature maker and device IDs */
AnnaBridge 156:ff21514d8981 146
AnnaBridge 156:ff21514d8981 147 uint8_t Maker_Id;
AnnaBridge 156:ff21514d8981 148
AnnaBridge 156:ff21514d8981 149 uint8_t Device_Id;
AnnaBridge 156:ff21514d8981 150
AnnaBridge 156:ff21514d8981 151 uint8_t Third_Id;
AnnaBridge 156:ff21514d8981 152
AnnaBridge 156:ff21514d8981 153 uint8_t Fourth_Id;
AnnaBridge 156:ff21514d8981 154 }NAND_IDTypeDef;
AnnaBridge 156:ff21514d8981 155
AnnaBridge 156:ff21514d8981 156 /**
AnnaBridge 156:ff21514d8981 157 * @brief NAND Memory address Structure definition
AnnaBridge 156:ff21514d8981 158 */
AnnaBridge 156:ff21514d8981 159 typedef struct
AnnaBridge 156:ff21514d8981 160 {
AnnaBridge 156:ff21514d8981 161 uint16_t Page; /*!< NAND memory Page address */
AnnaBridge 156:ff21514d8981 162
AnnaBridge 156:ff21514d8981 163 uint16_t Zone; /*!< NAND memory Zone address */
AnnaBridge 156:ff21514d8981 164
AnnaBridge 156:ff21514d8981 165 uint16_t Block; /*!< NAND memory Block address */
AnnaBridge 156:ff21514d8981 166
AnnaBridge 156:ff21514d8981 167 }NAND_AddressTypeDef;
AnnaBridge 156:ff21514d8981 168
AnnaBridge 156:ff21514d8981 169 /**
AnnaBridge 156:ff21514d8981 170 * @brief NAND Memory info Structure definition
AnnaBridge 156:ff21514d8981 171 */
AnnaBridge 156:ff21514d8981 172 typedef struct
AnnaBridge 156:ff21514d8981 173 {
AnnaBridge 156:ff21514d8981 174 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */
AnnaBridge 156:ff21514d8981 175
AnnaBridge 156:ff21514d8981 176 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */
AnnaBridge 156:ff21514d8981 177
AnnaBridge 156:ff21514d8981 178 uint32_t BlockSize; /*!< NAND memory block size number of pages */
AnnaBridge 156:ff21514d8981 179
AnnaBridge 156:ff21514d8981 180 uint32_t BlockNbr; /*!< NAND memory number of blocks */
AnnaBridge 156:ff21514d8981 181
AnnaBridge 156:ff21514d8981 182 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */
AnnaBridge 156:ff21514d8981 183 }NAND_InfoTypeDef;
AnnaBridge 156:ff21514d8981 184
AnnaBridge 156:ff21514d8981 185 /**
AnnaBridge 156:ff21514d8981 186 * @brief NAND handle Structure definition
AnnaBridge 156:ff21514d8981 187 */
AnnaBridge 156:ff21514d8981 188 typedef struct
AnnaBridge 156:ff21514d8981 189 {
AnnaBridge 156:ff21514d8981 190 FMC_NAND_TypeDef *Instance; /*!< Register base address */
AnnaBridge 156:ff21514d8981 191
AnnaBridge 156:ff21514d8981 192 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
AnnaBridge 156:ff21514d8981 193
AnnaBridge 156:ff21514d8981 194 HAL_LockTypeDef Lock; /*!< NAND locking object */
AnnaBridge 156:ff21514d8981 195
AnnaBridge 156:ff21514d8981 196 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
AnnaBridge 156:ff21514d8981 197
AnnaBridge 156:ff21514d8981 198 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
AnnaBridge 156:ff21514d8981 199 }NAND_HandleTypeDef;
AnnaBridge 156:ff21514d8981 200
AnnaBridge 156:ff21514d8981 201 /**
AnnaBridge 156:ff21514d8981 202 * @}
AnnaBridge 156:ff21514d8981 203 */
AnnaBridge 156:ff21514d8981 204
AnnaBridge 156:ff21514d8981 205 /* Exported constants --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 206 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 207 /** @defgroup NAND_Exported_Macros NAND Exported Macros
AnnaBridge 156:ff21514d8981 208 * @{
AnnaBridge 156:ff21514d8981 209 */
AnnaBridge 156:ff21514d8981 210
AnnaBridge 156:ff21514d8981 211 /** @brief Reset NAND handle state.
AnnaBridge 156:ff21514d8981 212 * @param __HANDLE__: specifies the NAND handle.
AnnaBridge 156:ff21514d8981 213 * @retval None
AnnaBridge 156:ff21514d8981 214 */
AnnaBridge 156:ff21514d8981 215 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
AnnaBridge 156:ff21514d8981 216
AnnaBridge 156:ff21514d8981 217 /**
AnnaBridge 156:ff21514d8981 218 * @}
AnnaBridge 156:ff21514d8981 219 */
AnnaBridge 156:ff21514d8981 220
AnnaBridge 156:ff21514d8981 221 /* Exported functions --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 222 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
AnnaBridge 156:ff21514d8981 223 * @{
AnnaBridge 156:ff21514d8981 224 */
AnnaBridge 156:ff21514d8981 225
AnnaBridge 156:ff21514d8981 226 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 156:ff21514d8981 227 * @{
AnnaBridge 156:ff21514d8981 228 */
AnnaBridge 156:ff21514d8981 229
AnnaBridge 156:ff21514d8981 230 /* Initialization/de-initialization functions ********************************/
AnnaBridge 156:ff21514d8981 231 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
AnnaBridge 156:ff21514d8981 232 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 156:ff21514d8981 233 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
AnnaBridge 156:ff21514d8981 234 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 156:ff21514d8981 235 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
AnnaBridge 156:ff21514d8981 236 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
AnnaBridge 156:ff21514d8981 237
AnnaBridge 156:ff21514d8981 238 /**
AnnaBridge 156:ff21514d8981 239 * @}
AnnaBridge 156:ff21514d8981 240 */
AnnaBridge 156:ff21514d8981 241
AnnaBridge 156:ff21514d8981 242 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
AnnaBridge 156:ff21514d8981 243 * @{
AnnaBridge 156:ff21514d8981 244 */
AnnaBridge 156:ff21514d8981 245
AnnaBridge 156:ff21514d8981 246 /* IO operation functions ****************************************************/
AnnaBridge 156:ff21514d8981 247 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
AnnaBridge 156:ff21514d8981 248 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
AnnaBridge 156:ff21514d8981 249 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
AnnaBridge 156:ff21514d8981 250 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
AnnaBridge 156:ff21514d8981 251 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
AnnaBridge 156:ff21514d8981 252 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
AnnaBridge 156:ff21514d8981 253 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 156:ff21514d8981 254 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
AnnaBridge 156:ff21514d8981 255 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 156:ff21514d8981 256
AnnaBridge 156:ff21514d8981 257 /**
AnnaBridge 156:ff21514d8981 258 * @}
AnnaBridge 156:ff21514d8981 259 */
AnnaBridge 156:ff21514d8981 260
AnnaBridge 156:ff21514d8981 261 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 156:ff21514d8981 262 * @{
AnnaBridge 156:ff21514d8981 263 */
AnnaBridge 156:ff21514d8981 264
AnnaBridge 156:ff21514d8981 265 /* NAND Control functions ****************************************************/
AnnaBridge 156:ff21514d8981 266 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
AnnaBridge 156:ff21514d8981 267 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
AnnaBridge 156:ff21514d8981 268 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
AnnaBridge 156:ff21514d8981 269
AnnaBridge 156:ff21514d8981 270 /**
AnnaBridge 156:ff21514d8981 271 * @}
AnnaBridge 156:ff21514d8981 272 */
AnnaBridge 156:ff21514d8981 273
AnnaBridge 156:ff21514d8981 274 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 156:ff21514d8981 275 * @{
AnnaBridge 156:ff21514d8981 276 */
AnnaBridge 156:ff21514d8981 277
AnnaBridge 156:ff21514d8981 278 /* NAND State functions *******************************************************/
AnnaBridge 156:ff21514d8981 279 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
AnnaBridge 156:ff21514d8981 280 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
AnnaBridge 156:ff21514d8981 281
AnnaBridge 156:ff21514d8981 282 /**
AnnaBridge 156:ff21514d8981 283 * @}
AnnaBridge 156:ff21514d8981 284 */
AnnaBridge 156:ff21514d8981 285
AnnaBridge 156:ff21514d8981 286 /**
AnnaBridge 156:ff21514d8981 287 * @}
AnnaBridge 156:ff21514d8981 288 */
AnnaBridge 156:ff21514d8981 289
AnnaBridge 156:ff21514d8981 290 /**
AnnaBridge 156:ff21514d8981 291 * @}
AnnaBridge 156:ff21514d8981 292 */
AnnaBridge 156:ff21514d8981 293
AnnaBridge 156:ff21514d8981 294 /**
AnnaBridge 156:ff21514d8981 295 * @}
AnnaBridge 156:ff21514d8981 296 */
AnnaBridge 156:ff21514d8981 297
AnnaBridge 156:ff21514d8981 298 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
AnnaBridge 156:ff21514d8981 299 /* STM32L496xx || STM32L4A6xx || */
AnnaBridge 156:ff21514d8981 300
AnnaBridge 156:ff21514d8981 301 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 302 }
AnnaBridge 156:ff21514d8981 303 #endif
AnnaBridge 156:ff21514d8981 304
AnnaBridge 156:ff21514d8981 305 #endif /* __STM32L4xx_HAL_NAND_H */
AnnaBridge 156:ff21514d8981 306
AnnaBridge 156:ff21514d8981 307 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/