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TARGET_NUCLEO_L011K4/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_dma.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:: Kojto
Date:: Tue Feb 14 11:24:20 2017 +0000
Revision:: 136:ef9c61f8c49f

Release 136 of the mbed library

Ports for Upcoming Targets

Fixes and Changes

3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	136:ef9c61f8c49f	1	/**
Kojto	136:ef9c61f8c49f	2	******************************************************************************
Kojto	136:ef9c61f8c49f	3	* @file stm32l0xx_ll_dma.h
Kojto	136:ef9c61f8c49f	4	* @author MCD Application Team
Kojto	136:ef9c61f8c49f	5	* @version V1.7.0
Kojto	136:ef9c61f8c49f	6	* @date 31-May-2016
Kojto	136:ef9c61f8c49f	7	* @brief Header file of DMA LL module.
Kojto	136:ef9c61f8c49f	8	******************************************************************************
Kojto	136:ef9c61f8c49f	9	* @attention
Kojto	136:ef9c61f8c49f	10	*
Kojto	136:ef9c61f8c49f	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto	136:ef9c61f8c49f	12	*
Kojto	136:ef9c61f8c49f	13	* Redistribution and use in source and binary forms, with or without modification,
Kojto	136:ef9c61f8c49f	14	* are permitted provided that the following conditions are met:
Kojto	136:ef9c61f8c49f	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	136:ef9c61f8c49f	16	* this list of conditions and the following disclaimer.
Kojto	136:ef9c61f8c49f	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	136:ef9c61f8c49f	18	* this list of conditions and the following disclaimer in the documentation
Kojto	136:ef9c61f8c49f	19	* and/or other materials provided with the distribution.
Kojto	136:ef9c61f8c49f	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	136:ef9c61f8c49f	21	* may be used to endorse or promote products derived from this software
Kojto	136:ef9c61f8c49f	22	* without specific prior written permission.
Kojto	136:ef9c61f8c49f	23	*
Kojto	136:ef9c61f8c49f	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	136:ef9c61f8c49f	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	136:ef9c61f8c49f	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	136:ef9c61f8c49f	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	136:ef9c61f8c49f	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	136:ef9c61f8c49f	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	136:ef9c61f8c49f	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	136:ef9c61f8c49f	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	136:ef9c61f8c49f	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	136:ef9c61f8c49f	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	136:ef9c61f8c49f	34	*
Kojto	136:ef9c61f8c49f	35	******************************************************************************
Kojto	136:ef9c61f8c49f	36	*/
Kojto	136:ef9c61f8c49f	37
Kojto	136:ef9c61f8c49f	38	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	136:ef9c61f8c49f	39	#ifndef __STM32L0xx_LL_DMA_H
Kojto	136:ef9c61f8c49f	40	#define __STM32L0xx_LL_DMA_H
Kojto	136:ef9c61f8c49f	41
Kojto	136:ef9c61f8c49f	42	#ifdef __cplusplus
Kojto	136:ef9c61f8c49f	43	extern "C" {
Kojto	136:ef9c61f8c49f	44	#endif
Kojto	136:ef9c61f8c49f	45
Kojto	136:ef9c61f8c49f	46	/* Includes ------------------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	47	#include "stm32l0xx.h"
Kojto	136:ef9c61f8c49f	48
Kojto	136:ef9c61f8c49f	49	/** @addtogroup STM32L0xx_LL_Driver
Kojto	136:ef9c61f8c49f	50	* @{
Kojto	136:ef9c61f8c49f	51	*/
Kojto	136:ef9c61f8c49f	52
Kojto	136:ef9c61f8c49f	53	#if defined (DMA1)
Kojto	136:ef9c61f8c49f	54
Kojto	136:ef9c61f8c49f	55	/** @defgroup DMA_LL DMA
Kojto	136:ef9c61f8c49f	56	* @{
Kojto	136:ef9c61f8c49f	57	*/
Kojto	136:ef9c61f8c49f	58
Kojto	136:ef9c61f8c49f	59	/* Private types -------------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	60	/* Private variables ---------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	61	/** @defgroup DMA_LL_Private_Variables DMA Private Variables
Kojto	136:ef9c61f8c49f	62	* @{
Kojto	136:ef9c61f8c49f	63	*/
Kojto	136:ef9c61f8c49f	64	/* Array used to get the DMA channel register offset versus channel index LL_DMA_CHANNEL_x */
Kojto	136:ef9c61f8c49f	65	static const uint8_t CHANNEL_OFFSET_TAB[] =
Kojto	136:ef9c61f8c49f	66	{
Kojto	136:ef9c61f8c49f	67	(uint8_t)(DMA1_Channel1_BASE - DMA1_BASE),
Kojto	136:ef9c61f8c49f	68	(uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
Kojto	136:ef9c61f8c49f	69	(uint8_t)(DMA1_Channel3_BASE - DMA1_BASE),
Kojto	136:ef9c61f8c49f	70	(uint8_t)(DMA1_Channel4_BASE - DMA1_BASE),
Kojto	136:ef9c61f8c49f	71	(uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
Kojto	136:ef9c61f8c49f	72	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	73	(uint8_t)(DMA1_Channel6_BASE - DMA1_BASE),
Kojto	136:ef9c61f8c49f	74	#endif /DMA1_Channel6/
Kojto	136:ef9c61f8c49f	75	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	76	(uint8_t)(DMA1_Channel7_BASE - DMA1_BASE)
Kojto	136:ef9c61f8c49f	77	#endif /DMA1_Channel7/
Kojto	136:ef9c61f8c49f	78	};
Kojto	136:ef9c61f8c49f	79	/**
Kojto	136:ef9c61f8c49f	80	* @}
Kojto	136:ef9c61f8c49f	81	*/
Kojto	136:ef9c61f8c49f	82
Kojto	136:ef9c61f8c49f	83	/* Private constants ---------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	84	/** @defgroup DMA_LL_Private_Constants DMA Private Constants
Kojto	136:ef9c61f8c49f	85	* @{
Kojto	136:ef9c61f8c49f	86	*/
Kojto	136:ef9c61f8c49f	87	/* Define used to get CSELR register offset */
Kojto	136:ef9c61f8c49f	88	#define DMA_CSELR_OFFSET (uint32_t)(DMA1_CSELR_BASE - DMA1_BASE)
Kojto	136:ef9c61f8c49f	89
Kojto	136:ef9c61f8c49f	90	/* Defines used for the bit position in the register and perform offsets */
Kojto	136:ef9c61f8c49f	91	#define DMA_POSITION_CSELR_CXS ((Channel-1U)*4U)
Kojto	136:ef9c61f8c49f	92	/**
Kojto	136:ef9c61f8c49f	93	* @}
Kojto	136:ef9c61f8c49f	94	*/
Kojto	136:ef9c61f8c49f	95
Kojto	136:ef9c61f8c49f	96	/* Private macros ------------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	97	#if defined(USE_FULL_LL_DRIVER)
Kojto	136:ef9c61f8c49f	98	/** @defgroup DMA_LL_Private_Macros DMA Private Macros
Kojto	136:ef9c61f8c49f	99	* @{
Kojto	136:ef9c61f8c49f	100	*/
Kojto	136:ef9c61f8c49f	101	/**
Kojto	136:ef9c61f8c49f	102	* @}
Kojto	136:ef9c61f8c49f	103	*/
Kojto	136:ef9c61f8c49f	104	#endif /USE_FULL_LL_DRIVER/
Kojto	136:ef9c61f8c49f	105
Kojto	136:ef9c61f8c49f	106	/* Exported types ------------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	107	#if defined(USE_FULL_LL_DRIVER)
Kojto	136:ef9c61f8c49f	108	/** @defgroup DMA_LL_ES_INIT DMA Exported Init structure
Kojto	136:ef9c61f8c49f	109	* @{
Kojto	136:ef9c61f8c49f	110	*/
Kojto	136:ef9c61f8c49f	111	typedef struct
Kojto	136:ef9c61f8c49f	112	{
Kojto	136:ef9c61f8c49f	113	uint32_t PeriphOrM2MSrcAddress; /*!< Specifies the peripheral base address for DMA transfer
Kojto	136:ef9c61f8c49f	114	or as Source base address in case of memory to memory transfer direction.
Kojto	136:ef9c61f8c49f	115
Kojto	136:ef9c61f8c49f	116	This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
Kojto	136:ef9c61f8c49f	117
Kojto	136:ef9c61f8c49f	118	uint32_t MemoryOrM2MDstAddress; /*!< Specifies the memory base address for DMA transfer
Kojto	136:ef9c61f8c49f	119	or as Destination base address in case of memory to memory transfer direction.
Kojto	136:ef9c61f8c49f	120
Kojto	136:ef9c61f8c49f	121	This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
Kojto	136:ef9c61f8c49f	122
Kojto	136:ef9c61f8c49f	123	uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
Kojto	136:ef9c61f8c49f	124	from memory to memory or from peripheral to memory.
Kojto	136:ef9c61f8c49f	125	This parameter can be a value of @ref DMA_LL_EC_DIRECTION
Kojto	136:ef9c61f8c49f	126
Kojto	136:ef9c61f8c49f	127	This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataTransferDirection(). */
Kojto	136:ef9c61f8c49f	128
Kojto	136:ef9c61f8c49f	129	uint32_t Mode; /*!< Specifies the normal or circular operation mode.
Kojto	136:ef9c61f8c49f	130	This parameter can be a value of @ref DMA_LL_EC_MODE
Kojto	136:ef9c61f8c49f	131	@note: The circular buffer mode cannot be used if the memory to memory
Kojto	136:ef9c61f8c49f	132	data transfer direction is configured on the selected Channel
Kojto	136:ef9c61f8c49f	133
Kojto	136:ef9c61f8c49f	134	This feature can be modified afterwards using unitary function @ref LL_DMA_SetMode(). */
Kojto	136:ef9c61f8c49f	135
Kojto	136:ef9c61f8c49f	136	uint32_t PeriphOrM2MSrcIncMode; /*!< Specifies whether the Peripheral address or Source address in case of memory to memory transfer direction
Kojto	136:ef9c61f8c49f	137	is incremented or not.
Kojto	136:ef9c61f8c49f	138	This parameter can be a value of @ref DMA_LL_EC_PERIPH
Kojto	136:ef9c61f8c49f	139
Kojto	136:ef9c61f8c49f	140	This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphIncMode(). */
Kojto	136:ef9c61f8c49f	141
Kojto	136:ef9c61f8c49f	142	uint32_t MemoryOrM2MDstIncMode; /*!< Specifies whether the Memory address or Destination address in case of memory to memory transfer direction
Kojto	136:ef9c61f8c49f	143	is incremented or not.
Kojto	136:ef9c61f8c49f	144	This parameter can be a value of @ref DMA_LL_EC_MEMORY
Kojto	136:ef9c61f8c49f	145
Kojto	136:ef9c61f8c49f	146	This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemoryIncMode(). */
Kojto	136:ef9c61f8c49f	147
Kojto	136:ef9c61f8c49f	148	uint32_t PeriphOrM2MSrcDataSize; /*!< Specifies the Peripheral data size alignment or Source data size alignment (byte, half word, word)
Kojto	136:ef9c61f8c49f	149	in case of memory to memory transfer direction.
Kojto	136:ef9c61f8c49f	150	This parameter can be a value of @ref DMA_LL_EC_PDATAALIGN
Kojto	136:ef9c61f8c49f	151
Kojto	136:ef9c61f8c49f	152	This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphSize(). */
Kojto	136:ef9c61f8c49f	153
Kojto	136:ef9c61f8c49f	154	uint32_t MemoryOrM2MDstDataSize; /*!< Specifies the Memory data size alignment or Destination data size alignment (byte, half word, word)
Kojto	136:ef9c61f8c49f	155	in case of memory to memory transfer direction.
Kojto	136:ef9c61f8c49f	156	This parameter can be a value of @ref DMA_LL_EC_MDATAALIGN
Kojto	136:ef9c61f8c49f	157
Kojto	136:ef9c61f8c49f	158	This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemorySize(). */
Kojto	136:ef9c61f8c49f	159
Kojto	136:ef9c61f8c49f	160	uint32_t NbData; /*!< Specifies the number of data to transfer, in data unit.
Kojto	136:ef9c61f8c49f	161	The data unit is equal to the source buffer configuration set in PeripheralSize
Kojto	136:ef9c61f8c49f	162	or MemorySize parameters depending in the transfer direction.
Kojto	136:ef9c61f8c49f	163	This parameter must be a value between Min_Data = 0 and Max_Data = 0x0000FFFF
Kojto	136:ef9c61f8c49f	164
Kojto	136:ef9c61f8c49f	165	This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataLength(). */
Kojto	136:ef9c61f8c49f	166
Kojto	136:ef9c61f8c49f	167	uint32_t PeriphRequest; /*!< Specifies the peripheral request.
Kojto	136:ef9c61f8c49f	168	This parameter can be a value of @ref DMA_LL_EC_REQUEST
Kojto	136:ef9c61f8c49f	169
Kojto	136:ef9c61f8c49f	170	This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphRequest(). */
Kojto	136:ef9c61f8c49f	171
Kojto	136:ef9c61f8c49f	172	uint32_t Priority; /*!< Specifies the channel priority level.
Kojto	136:ef9c61f8c49f	173	This parameter can be a value of @ref DMA_LL_EC_PRIORITY
Kojto	136:ef9c61f8c49f	174
Kojto	136:ef9c61f8c49f	175	This feature can be modified afterwards using unitary function @ref LL_DMA_SetChannelPriorityLevel(). */
Kojto	136:ef9c61f8c49f	176
Kojto	136:ef9c61f8c49f	177	} LL_DMA_InitTypeDef;
Kojto	136:ef9c61f8c49f	178	/**
Kojto	136:ef9c61f8c49f	179	* @}
Kojto	136:ef9c61f8c49f	180	*/
Kojto	136:ef9c61f8c49f	181	#endif /USE_FULL_LL_DRIVER/
Kojto	136:ef9c61f8c49f	182
Kojto	136:ef9c61f8c49f	183	/* Exported constants --------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	184	/** @defgroup DMA_LL_Exported_Constants DMA Exported Constants
Kojto	136:ef9c61f8c49f	185	* @{
Kojto	136:ef9c61f8c49f	186	*/
Kojto	136:ef9c61f8c49f	187	/** @defgroup DMA_LL_EC_CLEAR_FLAG Clear Flags Defines
Kojto	136:ef9c61f8c49f	188	* @brief Flags defines which can be used with LL_DMA_WriteReg function
Kojto	136:ef9c61f8c49f	189	* @{
Kojto	136:ef9c61f8c49f	190	*/
Kojto	136:ef9c61f8c49f	191	#define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /!< Channel 1 global flag /
Kojto	136:ef9c61f8c49f	192	#define LL_DMA_IFCR_CTCIF1 DMA_IFCR_CTCIF1 /!< Channel 1 transfer complete flag /
Kojto	136:ef9c61f8c49f	193	#define LL_DMA_IFCR_CHTIF1 DMA_IFCR_CHTIF1 /!< Channel 1 half transfer flag /
Kojto	136:ef9c61f8c49f	194	#define LL_DMA_IFCR_CTEIF1 DMA_IFCR_CTEIF1 /!< Channel 1 transfer error flag /
Kojto	136:ef9c61f8c49f	195	#define LL_DMA_IFCR_CGIF2 DMA_IFCR_CGIF2 /!< Channel 2 global flag /
Kojto	136:ef9c61f8c49f	196	#define LL_DMA_IFCR_CTCIF2 DMA_IFCR_CTCIF2 /!< Channel 2 transfer complete flag /
Kojto	136:ef9c61f8c49f	197	#define LL_DMA_IFCR_CHTIF2 DMA_IFCR_CHTIF2 /!< Channel 2 half transfer flag /
Kojto	136:ef9c61f8c49f	198	#define LL_DMA_IFCR_CTEIF2 DMA_IFCR_CTEIF2 /!< Channel 2 transfer error flag /
Kojto	136:ef9c61f8c49f	199	#define LL_DMA_IFCR_CGIF3 DMA_IFCR_CGIF3 /!< Channel 3 global flag /
Kojto	136:ef9c61f8c49f	200	#define LL_DMA_IFCR_CTCIF3 DMA_IFCR_CTCIF3 /!< Channel 3 transfer complete flag /
Kojto	136:ef9c61f8c49f	201	#define LL_DMA_IFCR_CHTIF3 DMA_IFCR_CHTIF3 /!< Channel 3 half transfer flag /
Kojto	136:ef9c61f8c49f	202	#define LL_DMA_IFCR_CTEIF3 DMA_IFCR_CTEIF3 /!< Channel 3 transfer error flag /
Kojto	136:ef9c61f8c49f	203	#define LL_DMA_IFCR_CGIF4 DMA_IFCR_CGIF4 /!< Channel 4 global flag /
Kojto	136:ef9c61f8c49f	204	#define LL_DMA_IFCR_CTCIF4 DMA_IFCR_CTCIF4 /!< Channel 4 transfer complete flag /
Kojto	136:ef9c61f8c49f	205	#define LL_DMA_IFCR_CHTIF4 DMA_IFCR_CHTIF4 /!< Channel 4 half transfer flag /
Kojto	136:ef9c61f8c49f	206	#define LL_DMA_IFCR_CTEIF4 DMA_IFCR_CTEIF4 /!< Channel 4 transfer error flag /
Kojto	136:ef9c61f8c49f	207	#define LL_DMA_IFCR_CGIF5 DMA_IFCR_CGIF5 /!< Channel 5 global flag /
Kojto	136:ef9c61f8c49f	208	#define LL_DMA_IFCR_CTCIF5 DMA_IFCR_CTCIF5 /!< Channel 5 transfer complete flag /
Kojto	136:ef9c61f8c49f	209	#define LL_DMA_IFCR_CHTIF5 DMA_IFCR_CHTIF5 /!< Channel 5 half transfer flag /
Kojto	136:ef9c61f8c49f	210	#define LL_DMA_IFCR_CTEIF5 DMA_IFCR_CTEIF5 /!< Channel 5 transfer error flag /
Kojto	136:ef9c61f8c49f	211	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	212	#define LL_DMA_IFCR_CGIF6 DMA_IFCR_CGIF6 /!< Channel 6 global flag /
Kojto	136:ef9c61f8c49f	213	#define LL_DMA_IFCR_CTCIF6 DMA_IFCR_CTCIF6 /!< Channel 6 transfer complete flag /
Kojto	136:ef9c61f8c49f	214	#define LL_DMA_IFCR_CHTIF6 DMA_IFCR_CHTIF6 /!< Channel 6 half transfer flag /
Kojto	136:ef9c61f8c49f	215	#define LL_DMA_IFCR_CTEIF6 DMA_IFCR_CTEIF6 /!< Channel 6 transfer error flag /
Kojto	136:ef9c61f8c49f	216	#endif
Kojto	136:ef9c61f8c49f	217	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	218	#define LL_DMA_IFCR_CGIF7 DMA_IFCR_CGIF7 /!< Channel 7 global flag /
Kojto	136:ef9c61f8c49f	219	#define LL_DMA_IFCR_CTCIF7 DMA_IFCR_CTCIF7 /!< Channel 7 transfer complete flag /
Kojto	136:ef9c61f8c49f	220	#define LL_DMA_IFCR_CHTIF7 DMA_IFCR_CHTIF7 /!< Channel 7 half transfer flag /
Kojto	136:ef9c61f8c49f	221	#define LL_DMA_IFCR_CTEIF7 DMA_IFCR_CTEIF7 /!< Channel 7 transfer error flag /
Kojto	136:ef9c61f8c49f	222	#endif
Kojto	136:ef9c61f8c49f	223	/**
Kojto	136:ef9c61f8c49f	224	* @}
Kojto	136:ef9c61f8c49f	225	*/
Kojto	136:ef9c61f8c49f	226
Kojto	136:ef9c61f8c49f	227	/** @defgroup DMA_LL_EC_GET_FLAG Get Flags Defines
Kojto	136:ef9c61f8c49f	228	* @brief Flags defines which can be used with LL_DMA_ReadReg function
Kojto	136:ef9c61f8c49f	229	* @{
Kojto	136:ef9c61f8c49f	230	*/
Kojto	136:ef9c61f8c49f	231	#define LL_DMA_ISR_GIF1 DMA_ISR_GIF1 /!< Channel 1 global flag /
Kojto	136:ef9c61f8c49f	232	#define LL_DMA_ISR_TCIF1 DMA_ISR_TCIF1 /!< Channel 1 transfer complete flag /
Kojto	136:ef9c61f8c49f	233	#define LL_DMA_ISR_HTIF1 DMA_ISR_HTIF1 /!< Channel 1 half transfer flag /
Kojto	136:ef9c61f8c49f	234	#define LL_DMA_ISR_TEIF1 DMA_ISR_TEIF1 /!< Channel 1 transfer error flag /
Kojto	136:ef9c61f8c49f	235	#define LL_DMA_ISR_GIF2 DMA_ISR_GIF2 /!< Channel 2 global flag /
Kojto	136:ef9c61f8c49f	236	#define LL_DMA_ISR_TCIF2 DMA_ISR_TCIF2 /!< Channel 2 transfer complete flag /
Kojto	136:ef9c61f8c49f	237	#define LL_DMA_ISR_HTIF2 DMA_ISR_HTIF2 /!< Channel 2 half transfer flag /
Kojto	136:ef9c61f8c49f	238	#define LL_DMA_ISR_TEIF2 DMA_ISR_TEIF2 /!< Channel 2 transfer error flag /
Kojto	136:ef9c61f8c49f	239	#define LL_DMA_ISR_GIF3 DMA_ISR_GIF3 /!< Channel 3 global flag /
Kojto	136:ef9c61f8c49f	240	#define LL_DMA_ISR_TCIF3 DMA_ISR_TCIF3 /!< Channel 3 transfer complete flag /
Kojto	136:ef9c61f8c49f	241	#define LL_DMA_ISR_HTIF3 DMA_ISR_HTIF3 /!< Channel 3 half transfer flag /
Kojto	136:ef9c61f8c49f	242	#define LL_DMA_ISR_TEIF3 DMA_ISR_TEIF3 /!< Channel 3 transfer error flag /
Kojto	136:ef9c61f8c49f	243	#define LL_DMA_ISR_GIF4 DMA_ISR_GIF4 /!< Channel 4 global flag /
Kojto	136:ef9c61f8c49f	244	#define LL_DMA_ISR_TCIF4 DMA_ISR_TCIF4 /!< Channel 4 transfer complete flag /
Kojto	136:ef9c61f8c49f	245	#define LL_DMA_ISR_HTIF4 DMA_ISR_HTIF4 /!< Channel 4 half transfer flag /
Kojto	136:ef9c61f8c49f	246	#define LL_DMA_ISR_TEIF4 DMA_ISR_TEIF4 /!< Channel 4 transfer error flag /
Kojto	136:ef9c61f8c49f	247	#define LL_DMA_ISR_GIF5 DMA_ISR_GIF5 /!< Channel 5 global flag /
Kojto	136:ef9c61f8c49f	248	#define LL_DMA_ISR_TCIF5 DMA_ISR_TCIF5 /!< Channel 5 transfer complete flag /
Kojto	136:ef9c61f8c49f	249	#define LL_DMA_ISR_HTIF5 DMA_ISR_HTIF5 /!< Channel 5 half transfer flag /
Kojto	136:ef9c61f8c49f	250	#define LL_DMA_ISR_TEIF5 DMA_ISR_TEIF5 /!< Channel 5 transfer error flag /
Kojto	136:ef9c61f8c49f	251	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	252	#define LL_DMA_ISR_GIF6 DMA_ISR_GIF6 /!< Channel 6 global flag /
Kojto	136:ef9c61f8c49f	253	#define LL_DMA_ISR_TCIF6 DMA_ISR_TCIF6 /!< Channel 6 transfer complete flag /
Kojto	136:ef9c61f8c49f	254	#define LL_DMA_ISR_HTIF6 DMA_ISR_HTIF6 /!< Channel 6 half transfer flag /
Kojto	136:ef9c61f8c49f	255	#define LL_DMA_ISR_TEIF6 DMA_ISR_TEIF6 /!< Channel 6 transfer error flag /
Kojto	136:ef9c61f8c49f	256	#endif
Kojto	136:ef9c61f8c49f	257	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	258	#define LL_DMA_ISR_GIF7 DMA_ISR_GIF7 /!< Channel 7 global flag /
Kojto	136:ef9c61f8c49f	259	#define LL_DMA_ISR_TCIF7 DMA_ISR_TCIF7 /!< Channel 7 transfer complete flag /
Kojto	136:ef9c61f8c49f	260	#define LL_DMA_ISR_HTIF7 DMA_ISR_HTIF7 /!< Channel 7 half transfer flag /
Kojto	136:ef9c61f8c49f	261	#define LL_DMA_ISR_TEIF7 DMA_ISR_TEIF7 /!< Channel 7 transfer error flag /
Kojto	136:ef9c61f8c49f	262	#endif
Kojto	136:ef9c61f8c49f	263	/**
Kojto	136:ef9c61f8c49f	264	* @}
Kojto	136:ef9c61f8c49f	265	*/
Kojto	136:ef9c61f8c49f	266
Kojto	136:ef9c61f8c49f	267	/** @defgroup DMA_LL_EC_IT IT Defines
Kojto	136:ef9c61f8c49f	268	* @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMA_WriteReg functions
Kojto	136:ef9c61f8c49f	269	* @{
Kojto	136:ef9c61f8c49f	270	*/
Kojto	136:ef9c61f8c49f	271	#define LL_DMA_CCR_TCIE DMA_CCR_TCIE /!< Transfer complete interrupt /
Kojto	136:ef9c61f8c49f	272	#define LL_DMA_CCR_HTIE DMA_CCR_HTIE /!< Half Transfer interrupt /
Kojto	136:ef9c61f8c49f	273	#define LL_DMA_CCR_TEIE DMA_CCR_TEIE /!< Transfer error interrupt /
Kojto	136:ef9c61f8c49f	274	/**
Kojto	136:ef9c61f8c49f	275	* @}
Kojto	136:ef9c61f8c49f	276	*/
Kojto	136:ef9c61f8c49f	277
Kojto	136:ef9c61f8c49f	278	/** @defgroup DMA_LL_EC_CHANNEL CHANNEL
Kojto	136:ef9c61f8c49f	279	* @{
Kojto	136:ef9c61f8c49f	280	*/
Kojto	136:ef9c61f8c49f	281	#define LL_DMA_CHANNEL_1 ((uint32_t)0x00000001U) /!< DMA Channel 1 /
Kojto	136:ef9c61f8c49f	282	#define LL_DMA_CHANNEL_2 ((uint32_t)0x00000002U) /!< DMA Channel 2 /
Kojto	136:ef9c61f8c49f	283	#define LL_DMA_CHANNEL_3 ((uint32_t)0x00000003U) /!< DMA Channel 3 /
Kojto	136:ef9c61f8c49f	284	#define LL_DMA_CHANNEL_4 ((uint32_t)0x00000004U) /!< DMA Channel 4 /
Kojto	136:ef9c61f8c49f	285	#define LL_DMA_CHANNEL_5 ((uint32_t)0x00000005U) /!< DMA Channel 5 /
Kojto	136:ef9c61f8c49f	286	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	287	#define LL_DMA_CHANNEL_6 ((uint32_t)0x00000006U) /!< DMA Channel 6 /
Kojto	136:ef9c61f8c49f	288	#endif
Kojto	136:ef9c61f8c49f	289	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	290	#define LL_DMA_CHANNEL_7 ((uint32_t)0x00000007U) /!< DMA Channel 7 /
Kojto	136:ef9c61f8c49f	291	#endif
Kojto	136:ef9c61f8c49f	292	#if defined(USE_FULL_LL_DRIVER)
Kojto	136:ef9c61f8c49f	293	#define LL_DMA_CHANNEL_ALL ((uint32_t)0xFFFF0000U) /!< DMA Channel all (used only for function @ref LL_DMA_DeInit(). /
Kojto	136:ef9c61f8c49f	294	#endif /USE_FULL_LL_DRIVER/
Kojto	136:ef9c61f8c49f	295	/**
Kojto	136:ef9c61f8c49f	296	* @}
Kojto	136:ef9c61f8c49f	297	*/
Kojto	136:ef9c61f8c49f	298
Kojto	136:ef9c61f8c49f	299	/** @defgroup DMA_LL_EC_DIRECTION Transfer Direction
Kojto	136:ef9c61f8c49f	300	* @{
Kojto	136:ef9c61f8c49f	301	*/
Kojto	136:ef9c61f8c49f	302	#define LL_DMA_DIRECTION_PERIPH_TO_MEMORY ((uint32_t)0x00000000U) /!< Peripheral to memory direction /
Kojto	136:ef9c61f8c49f	303	#define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_CCR_DIR /!< Memory to peripheral direction /
Kojto	136:ef9c61f8c49f	304	#define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_CCR_MEM2MEM /!< Memory to memory direction /
Kojto	136:ef9c61f8c49f	305	/**
Kojto	136:ef9c61f8c49f	306	* @}
Kojto	136:ef9c61f8c49f	307	*/
Kojto	136:ef9c61f8c49f	308
Kojto	136:ef9c61f8c49f	309	/** @defgroup DMA_LL_EC_MODE Transfer mode
Kojto	136:ef9c61f8c49f	310	* @{
Kojto	136:ef9c61f8c49f	311	*/
Kojto	136:ef9c61f8c49f	312	#define LL_DMA_MODE_NORMAL ((uint32_t)0x00000000U) /!< Normal Mode /
Kojto	136:ef9c61f8c49f	313	#define LL_DMA_MODE_CIRCULAR DMA_CCR_CIRC /!< Circular Mode /
Kojto	136:ef9c61f8c49f	314	/**
Kojto	136:ef9c61f8c49f	315	* @}
Kojto	136:ef9c61f8c49f	316	*/
Kojto	136:ef9c61f8c49f	317
Kojto	136:ef9c61f8c49f	318	/** @defgroup DMA_LL_EC_PERIPH Peripheral increment mode
Kojto	136:ef9c61f8c49f	319	* @{
Kojto	136:ef9c61f8c49f	320	*/
Kojto	136:ef9c61f8c49f	321	#define LL_DMA_PERIPH_INCREMENT DMA_CCR_PINC /!< Peripheral increment mode Enable /
Kojto	136:ef9c61f8c49f	322	#define LL_DMA_PERIPH_NOINCREMENT ((uint32_t)0x00000000U) /!< Peripheral increment mode Disable /
Kojto	136:ef9c61f8c49f	323	/**
Kojto	136:ef9c61f8c49f	324	* @}
Kojto	136:ef9c61f8c49f	325	*/
Kojto	136:ef9c61f8c49f	326
Kojto	136:ef9c61f8c49f	327	/** @defgroup DMA_LL_EC_MEMORY Memory increment mode
Kojto	136:ef9c61f8c49f	328	* @{
Kojto	136:ef9c61f8c49f	329	*/
Kojto	136:ef9c61f8c49f	330	#define LL_DMA_MEMORY_INCREMENT DMA_CCR_MINC /!< Memory increment mode Enable /
Kojto	136:ef9c61f8c49f	331	#define LL_DMA_MEMORY_NOINCREMENT ((uint32_t)0x00000000U) /!< Memory increment mode Disable /
Kojto	136:ef9c61f8c49f	332	/**
Kojto	136:ef9c61f8c49f	333	* @}
Kojto	136:ef9c61f8c49f	334	*/
Kojto	136:ef9c61f8c49f	335
Kojto	136:ef9c61f8c49f	336	/** @defgroup DMA_LL_EC_PDATAALIGN Peripheral data alignment
Kojto	136:ef9c61f8c49f	337	* @{
Kojto	136:ef9c61f8c49f	338	*/
Kojto	136:ef9c61f8c49f	339	#define LL_DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000U) /!< Peripheral data alignment : Byte /
Kojto	136:ef9c61f8c49f	340	#define LL_DMA_PDATAALIGN_HALFWORD DMA_CCR_PSIZE_0 /!< Peripheral data alignment : HalfWord /
Kojto	136:ef9c61f8c49f	341	#define LL_DMA_PDATAALIGN_WORD DMA_CCR_PSIZE_1 /!< Peripheral data alignment : Word /
Kojto	136:ef9c61f8c49f	342	/**
Kojto	136:ef9c61f8c49f	343	* @}
Kojto	136:ef9c61f8c49f	344	*/
Kojto	136:ef9c61f8c49f	345
Kojto	136:ef9c61f8c49f	346	/** @defgroup DMA_LL_EC_MDATAALIGN Memory data alignment
Kojto	136:ef9c61f8c49f	347	* @{
Kojto	136:ef9c61f8c49f	348	*/
Kojto	136:ef9c61f8c49f	349	#define LL_DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000U) /!< Memory data alignment : Byte /
Kojto	136:ef9c61f8c49f	350	#define LL_DMA_MDATAALIGN_HALFWORD DMA_CCR_MSIZE_0 /!< Memory data alignment : HalfWord /
Kojto	136:ef9c61f8c49f	351	#define LL_DMA_MDATAALIGN_WORD DMA_CCR_MSIZE_1 /!< Memory data alignment : Word /
Kojto	136:ef9c61f8c49f	352	/**
Kojto	136:ef9c61f8c49f	353	* @}
Kojto	136:ef9c61f8c49f	354	*/
Kojto	136:ef9c61f8c49f	355
Kojto	136:ef9c61f8c49f	356	/** @defgroup DMA_LL_EC_PRIORITY Transfer Priority level
Kojto	136:ef9c61f8c49f	357	* @{
Kojto	136:ef9c61f8c49f	358	*/
Kojto	136:ef9c61f8c49f	359	#define LL_DMA_PRIORITY_LOW ((uint32_t)0x00000000U) /!< Priority level : Low /
Kojto	136:ef9c61f8c49f	360	#define LL_DMA_PRIORITY_MEDIUM DMA_CCR_PL_0 /!< Priority level : Medium /
Kojto	136:ef9c61f8c49f	361	#define LL_DMA_PRIORITY_HIGH DMA_CCR_PL_1 /!< Priority level : High /
Kojto	136:ef9c61f8c49f	362	#define LL_DMA_PRIORITY_VERYHIGH DMA_CCR_PL /!< Priority level : Very_High /
Kojto	136:ef9c61f8c49f	363	/**
Kojto	136:ef9c61f8c49f	364	* @}
Kojto	136:ef9c61f8c49f	365	*/
Kojto	136:ef9c61f8c49f	366
Kojto	136:ef9c61f8c49f	367	/** @defgroup DMA_LL_EC_REQUEST Transfer peripheral request
Kojto	136:ef9c61f8c49f	368	* @{
Kojto	136:ef9c61f8c49f	369	*/
Kojto	136:ef9c61f8c49f	370	#define LL_DMA_REQUEST_0 ((uint32_t)0x00000000U) /!< DMA peripheral request 0 /
Kojto	136:ef9c61f8c49f	371	#define LL_DMA_REQUEST_1 ((uint32_t)0x00000001U) /!< DMA peripheral request 1 /
Kojto	136:ef9c61f8c49f	372	#define LL_DMA_REQUEST_2 ((uint32_t)0x00000002U) /!< DMA peripheral request 2 /
Kojto	136:ef9c61f8c49f	373	#define LL_DMA_REQUEST_3 ((uint32_t)0x00000003U) /!< DMA peripheral request 3 /
Kojto	136:ef9c61f8c49f	374	#define LL_DMA_REQUEST_4 ((uint32_t)0x00000004U) /!< DMA peripheral request 4 /
Kojto	136:ef9c61f8c49f	375	#define LL_DMA_REQUEST_5 ((uint32_t)0x00000005U) /!< DMA peripheral request 5 /
Kojto	136:ef9c61f8c49f	376	#define LL_DMA_REQUEST_6 ((uint32_t)0x00000006U) /!< DMA peripheral request 6 /
Kojto	136:ef9c61f8c49f	377	#define LL_DMA_REQUEST_7 ((uint32_t)0x00000007U) /!< DMA peripheral request 7 /
Kojto	136:ef9c61f8c49f	378	#define LL_DMA_REQUEST_8 ((uint32_t)0x00000008U) /!< DMA peripheral request 8 /
Kojto	136:ef9c61f8c49f	379	#define LL_DMA_REQUEST_9 ((uint32_t)0x00000009U) /!< DMA peripheral request 9 /
Kojto	136:ef9c61f8c49f	380	#define LL_DMA_REQUEST_10 ((uint32_t)0x0000000AU) /!< DMA peripheral request 10 /
Kojto	136:ef9c61f8c49f	381	#define LL_DMA_REQUEST_11 ((uint32_t)0x0000000BU) /!< DMA peripheral request 11 /
Kojto	136:ef9c61f8c49f	382	#define LL_DMA_REQUEST_12 ((uint32_t)0x0000000CU) /!< DMA peripheral request 12 /
Kojto	136:ef9c61f8c49f	383	#define LL_DMA_REQUEST_13 ((uint32_t)0x0000000DU) /!< DMA peripheral request 13 /
Kojto	136:ef9c61f8c49f	384	#define LL_DMA_REQUEST_14 ((uint32_t)0x0000000EU) /!< DMA peripheral request 14 /
Kojto	136:ef9c61f8c49f	385	#define LL_DMA_REQUEST_15 ((uint32_t)0x0000000FU) /!< DMA peripheral request 15 /
Kojto	136:ef9c61f8c49f	386	/**
Kojto	136:ef9c61f8c49f	387	* @}
Kojto	136:ef9c61f8c49f	388	*/
Kojto	136:ef9c61f8c49f	389
Kojto	136:ef9c61f8c49f	390	/**
Kojto	136:ef9c61f8c49f	391	* @}
Kojto	136:ef9c61f8c49f	392	*/
Kojto	136:ef9c61f8c49f	393
Kojto	136:ef9c61f8c49f	394	/* Exported macro ------------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	395	/** @defgroup DMA_LL_Exported_Macros DMA Exported Macros
Kojto	136:ef9c61f8c49f	396	* @{
Kojto	136:ef9c61f8c49f	397	*/
Kojto	136:ef9c61f8c49f	398
Kojto	136:ef9c61f8c49f	399	/** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros
Kojto	136:ef9c61f8c49f	400	* @{
Kojto	136:ef9c61f8c49f	401	*/
Kojto	136:ef9c61f8c49f	402	/**
Kojto	136:ef9c61f8c49f	403	* @brief Write a value in DMA register
Kojto	136:ef9c61f8c49f	404	* @param __INSTANCE__ DMA Instance
Kojto	136:ef9c61f8c49f	405	* @param __REG__ Register to be written
Kojto	136:ef9c61f8c49f	406	* @param __VALUE__ Value to be written in the register
Kojto	136:ef9c61f8c49f	407	* @retval None
Kojto	136:ef9c61f8c49f	408	*/
Kojto	136:ef9c61f8c49f	409	#define LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
Kojto	136:ef9c61f8c49f	410
Kojto	136:ef9c61f8c49f	411	/**
Kojto	136:ef9c61f8c49f	412	* @brief Read a value in DMA register
Kojto	136:ef9c61f8c49f	413	* @param __INSTANCE__ DMA Instance
Kojto	136:ef9c61f8c49f	414	* @param __REG__ Register to be read
Kojto	136:ef9c61f8c49f	415	* @retval Register value
Kojto	136:ef9c61f8c49f	416	*/
Kojto	136:ef9c61f8c49f	417	#define LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
Kojto	136:ef9c61f8c49f	418	/**
Kojto	136:ef9c61f8c49f	419	* @}
Kojto	136:ef9c61f8c49f	420	*/
Kojto	136:ef9c61f8c49f	421
Kojto	136:ef9c61f8c49f	422	/** @defgroup DMA_LL_EM_CONVERT_DMAxCHANNELy Convert DMAxChannely
Kojto	136:ef9c61f8c49f	423	* @{
Kojto	136:ef9c61f8c49f	424	*/
Kojto	136:ef9c61f8c49f	425	/**
Kojto	136:ef9c61f8c49f	426	* @brief Convert DMAx_Channely into DMAx
Kojto	136:ef9c61f8c49f	427	* @param __CHANNEL_INSTANCE__ DMAx_Channely
Kojto	136:ef9c61f8c49f	428	* @retval DMAx
Kojto	136:ef9c61f8c49f	429	*/
Kojto	136:ef9c61f8c49f	430	#define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (DMA1)
Kojto	136:ef9c61f8c49f	431
Kojto	136:ef9c61f8c49f	432	/**
Kojto	136:ef9c61f8c49f	433	* @brief Convert DMAx_Channely into LL_DMA_CHANNEL_y
Kojto	136:ef9c61f8c49f	434	* @param __CHANNEL_INSTANCE__ DMAx_Channely
Kojto	136:ef9c61f8c49f	435	* @retval LL_DMA_CHANNEL_y
Kojto	136:ef9c61f8c49f	436	*/
Kojto	136:ef9c61f8c49f	437	#if defined (DMA1_Channel6) && defined (DMA1_Channel7)
Kojto	136:ef9c61f8c49f	438	#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \
Kojto	136:ef9c61f8c49f	439	(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
Kojto	136:ef9c61f8c49f	440	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
Kojto	136:ef9c61f8c49f	441	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
Kojto	136:ef9c61f8c49f	442	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
Kojto	136:ef9c61f8c49f	443	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \
Kojto	136:ef9c61f8c49f	444	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel6)) ? LL_DMA_CHANNEL_6 : \
Kojto	136:ef9c61f8c49f	445	LL_DMA_CHANNEL_7)
Kojto	136:ef9c61f8c49f	446	#elif defined (DMA1_Channel6)
Kojto	136:ef9c61f8c49f	447	#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \
Kojto	136:ef9c61f8c49f	448	(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
Kojto	136:ef9c61f8c49f	449	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
Kojto	136:ef9c61f8c49f	450	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
Kojto	136:ef9c61f8c49f	451	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
Kojto	136:ef9c61f8c49f	452	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \
Kojto	136:ef9c61f8c49f	453	LL_DMA_CHANNEL_6)
Kojto	136:ef9c61f8c49f	454	#else
Kojto	136:ef9c61f8c49f	455	#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \
Kojto	136:ef9c61f8c49f	456	(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
Kojto	136:ef9c61f8c49f	457	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
Kojto	136:ef9c61f8c49f	458	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
Kojto	136:ef9c61f8c49f	459	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
Kojto	136:ef9c61f8c49f	460	LL_DMA_CHANNEL_5)
Kojto	136:ef9c61f8c49f	461	#endif /* DMA1_Channel6 && DMA1_Channel7 */
Kojto	136:ef9c61f8c49f	462
Kojto	136:ef9c61f8c49f	463	/**
Kojto	136:ef9c61f8c49f	464	* @brief Convert DMA Instance DMAx and LL_DMA_CHANNEL_y into DMAx_Channely
Kojto	136:ef9c61f8c49f	465	* @param __DMA_INSTANCE__ DMAx
Kojto	136:ef9c61f8c49f	466	* @param __CHANNEL__ LL_DMA_CHANNEL_y
Kojto	136:ef9c61f8c49f	467	* @retval DMAx_Channely
Kojto	136:ef9c61f8c49f	468	*/
Kojto	136:ef9c61f8c49f	469	#if defined (DMA1_Channel6) && defined (DMA1_Channel7)
Kojto	136:ef9c61f8c49f	470	#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \
Kojto	136:ef9c61f8c49f	471	((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
Kojto	136:ef9c61f8c49f	472	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
Kojto	136:ef9c61f8c49f	473	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
Kojto	136:ef9c61f8c49f	474	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
Kojto	136:ef9c61f8c49f	475	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \
Kojto	136:ef9c61f8c49f	476	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_6))) ? DMA1_Channel6 : \
Kojto	136:ef9c61f8c49f	477	DMA1_Channel7)
Kojto	136:ef9c61f8c49f	478	#elif defined (DMA1_Channel6)
Kojto	136:ef9c61f8c49f	479	#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \
Kojto	136:ef9c61f8c49f	480	((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
Kojto	136:ef9c61f8c49f	481	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
Kojto	136:ef9c61f8c49f	482	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
Kojto	136:ef9c61f8c49f	483	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
Kojto	136:ef9c61f8c49f	484	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \
Kojto	136:ef9c61f8c49f	485	DMA1_Channel6)
Kojto	136:ef9c61f8c49f	486	#else
Kojto	136:ef9c61f8c49f	487	#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \
Kojto	136:ef9c61f8c49f	488	((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
Kojto	136:ef9c61f8c49f	489	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
Kojto	136:ef9c61f8c49f	490	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
Kojto	136:ef9c61f8c49f	491	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
Kojto	136:ef9c61f8c49f	492	DMA1_Channel5)
Kojto	136:ef9c61f8c49f	493	#endif /* DMA1_Channel6 && DMA1_Channel7 */
Kojto	136:ef9c61f8c49f	494
Kojto	136:ef9c61f8c49f	495	/**
Kojto	136:ef9c61f8c49f	496	* @}
Kojto	136:ef9c61f8c49f	497	*/
Kojto	136:ef9c61f8c49f	498
Kojto	136:ef9c61f8c49f	499	/**
Kojto	136:ef9c61f8c49f	500	* @}
Kojto	136:ef9c61f8c49f	501	*/
Kojto	136:ef9c61f8c49f	502
Kojto	136:ef9c61f8c49f	503	/* Exported functions --------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	504	/** @defgroup DMA_LL_Exported_Functions DMA Exported Functions
Kojto	136:ef9c61f8c49f	505	* @{
Kojto	136:ef9c61f8c49f	506	*/
Kojto	136:ef9c61f8c49f	507
Kojto	136:ef9c61f8c49f	508	/** @defgroup DMA_LL_EF_Configuration Configuration
Kojto	136:ef9c61f8c49f	509	* @{
Kojto	136:ef9c61f8c49f	510	*/
Kojto	136:ef9c61f8c49f	511	/**
Kojto	136:ef9c61f8c49f	512	* @brief Enable DMA channel.
Kojto	136:ef9c61f8c49f	513	* @rmtoll CCR EN LL_DMA_EnableChannel
Kojto	136:ef9c61f8c49f	514	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	515	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	516	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	517	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	518	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	519	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	520	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	521	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	522	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	523	* @retval None
Kojto	136:ef9c61f8c49f	524	*/
Kojto	136:ef9c61f8c49f	525	__STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	526	{
Kojto	136:ef9c61f8c49f	527	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_EN);
Kojto	136:ef9c61f8c49f	528	}
Kojto	136:ef9c61f8c49f	529
Kojto	136:ef9c61f8c49f	530	/**
Kojto	136:ef9c61f8c49f	531	* @brief Disable DMA channel.
Kojto	136:ef9c61f8c49f	532	* @rmtoll CCR EN LL_DMA_DisableChannel
Kojto	136:ef9c61f8c49f	533	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	534	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	535	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	536	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	537	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	538	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	539	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	540	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	541	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	542	* @retval None
Kojto	136:ef9c61f8c49f	543	*/
Kojto	136:ef9c61f8c49f	544	__STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	545	{
Kojto	136:ef9c61f8c49f	546	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_EN);
Kojto	136:ef9c61f8c49f	547	}
Kojto	136:ef9c61f8c49f	548
Kojto	136:ef9c61f8c49f	549	/**
Kojto	136:ef9c61f8c49f	550	* @brief Check if DMA channel is enabled or disabled.
Kojto	136:ef9c61f8c49f	551	* @rmtoll CCR EN LL_DMA_IsEnabledChannel
Kojto	136:ef9c61f8c49f	552	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	553	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	554	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	555	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	556	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	557	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	558	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	559	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	560	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	561	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	562	*/
Kojto	136:ef9c61f8c49f	563	__STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	564	{
Kojto	136:ef9c61f8c49f	565	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	566	DMA_CCR_EN) == (DMA_CCR_EN));
Kojto	136:ef9c61f8c49f	567	}
Kojto	136:ef9c61f8c49f	568
Kojto	136:ef9c61f8c49f	569	/**
Kojto	136:ef9c61f8c49f	570	* @brief Configure all parameters link to DMA transfer.
Kojto	136:ef9c61f8c49f	571	* @rmtoll CCR DIR LL_DMA_ConfigTransfer\n
Kojto	136:ef9c61f8c49f	572	* CCR MEM2MEM LL_DMA_ConfigTransfer\n
Kojto	136:ef9c61f8c49f	573	* CCR CIRC LL_DMA_ConfigTransfer\n
Kojto	136:ef9c61f8c49f	574	* CCR PINC LL_DMA_ConfigTransfer\n
Kojto	136:ef9c61f8c49f	575	* CCR MINC LL_DMA_ConfigTransfer\n
Kojto	136:ef9c61f8c49f	576	* CCR PSIZE LL_DMA_ConfigTransfer\n
Kojto	136:ef9c61f8c49f	577	* CCR MSIZE LL_DMA_ConfigTransfer\n
Kojto	136:ef9c61f8c49f	578	* CCR PL LL_DMA_ConfigTransfer
Kojto	136:ef9c61f8c49f	579	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	580	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	581	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	582	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	583	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	584	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	585	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	586	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	587	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	588	* @param Configuration This parameter must be a combination of all the following values:
Kojto	136:ef9c61f8c49f	589	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY or @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH or @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	136:ef9c61f8c49f	590	* @arg @ref LL_DMA_MODE_NORMAL or @ref LL_DMA_MODE_CIRCULAR
Kojto	136:ef9c61f8c49f	591	* @arg @ref LL_DMA_PERIPH_INCREMENT or @ref LL_DMA_PERIPH_NOINCREMENT
Kojto	136:ef9c61f8c49f	592	* @arg @ref LL_DMA_MEMORY_INCREMENT or @ref LL_DMA_MEMORY_NOINCREMENT
Kojto	136:ef9c61f8c49f	593	* @arg @ref LL_DMA_PDATAALIGN_BYTE or @ref LL_DMA_PDATAALIGN_HALFWORD or @ref LL_DMA_PDATAALIGN_WORD
Kojto	136:ef9c61f8c49f	594	* @arg @ref LL_DMA_MDATAALIGN_BYTE or @ref LL_DMA_MDATAALIGN_HALFWORD or @ref LL_DMA_MDATAALIGN_WORD
Kojto	136:ef9c61f8c49f	595	* @arg @ref LL_DMA_PRIORITY_LOW or @ref LL_DMA_PRIORITY_MEDIUM or @ref LL_DMA_PRIORITY_HIGH or @ref LL_DMA_PRIORITY_VERYHIGH
Kojto	136:ef9c61f8c49f	596	* @retval None
Kojto	136:ef9c61f8c49f	597	*/
Kojto	136:ef9c61f8c49f	598	__STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configuration)
Kojto	136:ef9c61f8c49f	599	{
Kojto	136:ef9c61f8c49f	600	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	601	DMA_CCR_DIR \| DMA_CCR_MEM2MEM \| DMA_CCR_CIRC \| DMA_CCR_PINC \| DMA_CCR_MINC \| DMA_CCR_PSIZE \| DMA_CCR_MSIZE \| DMA_CCR_PL,
Kojto	136:ef9c61f8c49f	602	Configuration);
Kojto	136:ef9c61f8c49f	603	}
Kojto	136:ef9c61f8c49f	604
Kojto	136:ef9c61f8c49f	605	/**
Kojto	136:ef9c61f8c49f	606	* @brief Set Data transfer direction (read from peripheral or from memory).
Kojto	136:ef9c61f8c49f	607	* @rmtoll CCR DIR LL_DMA_SetDataTransferDirection\n
Kojto	136:ef9c61f8c49f	608	* CCR MEM2MEM LL_DMA_SetDataTransferDirection
Kojto	136:ef9c61f8c49f	609	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	610	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	611	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	612	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	613	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	614	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	615	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	616	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	617	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	618	* @param Direction This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	619	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
Kojto	136:ef9c61f8c49f	620	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
Kojto	136:ef9c61f8c49f	621	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	136:ef9c61f8c49f	622	* @retval None
Kojto	136:ef9c61f8c49f	623	*/
Kojto	136:ef9c61f8c49f	624	__STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction)
Kojto	136:ef9c61f8c49f	625	{
Kojto	136:ef9c61f8c49f	626	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	627	DMA_CCR_DIR \| DMA_CCR_MEM2MEM, Direction);
Kojto	136:ef9c61f8c49f	628	}
Kojto	136:ef9c61f8c49f	629
Kojto	136:ef9c61f8c49f	630	/**
Kojto	136:ef9c61f8c49f	631	* @brief Get Data transfer direction (read from peripheral or from memory).
Kojto	136:ef9c61f8c49f	632	* @rmtoll CCR DIR LL_DMA_GetDataTransferDirection\n
Kojto	136:ef9c61f8c49f	633	* CCR MEM2MEM LL_DMA_GetDataTransferDirection
Kojto	136:ef9c61f8c49f	634	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	635	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	636	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	637	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	638	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	639	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	640	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	641	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	642	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	643	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	644	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
Kojto	136:ef9c61f8c49f	645	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
Kojto	136:ef9c61f8c49f	646	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	136:ef9c61f8c49f	647	*/
Kojto	136:ef9c61f8c49f	648	__STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	649	{
Kojto	136:ef9c61f8c49f	650	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	651	DMA_CCR_DIR \| DMA_CCR_MEM2MEM));
Kojto	136:ef9c61f8c49f	652	}
Kojto	136:ef9c61f8c49f	653
Kojto	136:ef9c61f8c49f	654	/**
Kojto	136:ef9c61f8c49f	655	* @brief Set DMA mode circular or normal.
Kojto	136:ef9c61f8c49f	656	* @note The circular buffer mode cannot be used if the memory-to-memory
Kojto	136:ef9c61f8c49f	657	* data transfer is configured on the selected Channel.
Kojto	136:ef9c61f8c49f	658	* @rmtoll CCR CIRC LL_DMA_SetMode
Kojto	136:ef9c61f8c49f	659	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	660	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	661	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	662	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	663	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	664	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	665	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	666	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	667	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	668	* @param Mode This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	669	* @arg @ref LL_DMA_MODE_NORMAL
Kojto	136:ef9c61f8c49f	670	* @arg @ref LL_DMA_MODE_CIRCULAR
Kojto	136:ef9c61f8c49f	671	* @retval None
Kojto	136:ef9c61f8c49f	672	*/
Kojto	136:ef9c61f8c49f	673	__STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode)
Kojto	136:ef9c61f8c49f	674	{
Kojto	136:ef9c61f8c49f	675	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_CIRC,
Kojto	136:ef9c61f8c49f	676	Mode);
Kojto	136:ef9c61f8c49f	677	}
Kojto	136:ef9c61f8c49f	678
Kojto	136:ef9c61f8c49f	679	/**
Kojto	136:ef9c61f8c49f	680	* @brief Get DMA mode circular or normal.
Kojto	136:ef9c61f8c49f	681	* @rmtoll CCR CIRC LL_DMA_GetMode
Kojto	136:ef9c61f8c49f	682	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	683	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	684	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	685	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	686	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	687	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	688	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	689	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	690	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	691	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	692	* @arg @ref LL_DMA_MODE_NORMAL
Kojto	136:ef9c61f8c49f	693	* @arg @ref LL_DMA_MODE_CIRCULAR
Kojto	136:ef9c61f8c49f	694	*/
Kojto	136:ef9c61f8c49f	695	__STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	696	{
Kojto	136:ef9c61f8c49f	697	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	698	DMA_CCR_CIRC));
Kojto	136:ef9c61f8c49f	699	}
Kojto	136:ef9c61f8c49f	700
Kojto	136:ef9c61f8c49f	701	/**
Kojto	136:ef9c61f8c49f	702	* @brief Set Peripheral increment mode.
Kojto	136:ef9c61f8c49f	703	* @rmtoll CCR PINC LL_DMA_SetPeriphIncMode
Kojto	136:ef9c61f8c49f	704	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	705	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	706	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	707	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	708	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	709	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	710	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	711	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	712	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	713	* @param PeriphOrM2MSrcIncMode This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	714	* @arg @ref LL_DMA_PERIPH_INCREMENT
Kojto	136:ef9c61f8c49f	715	* @arg @ref LL_DMA_PERIPH_NOINCREMENT
Kojto	136:ef9c61f8c49f	716	* @retval None
Kojto	136:ef9c61f8c49f	717	*/
Kojto	136:ef9c61f8c49f	718	__STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode)
Kojto	136:ef9c61f8c49f	719	{
Kojto	136:ef9c61f8c49f	720	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PINC,
Kojto	136:ef9c61f8c49f	721	PeriphOrM2MSrcIncMode);
Kojto	136:ef9c61f8c49f	722	}
Kojto	136:ef9c61f8c49f	723
Kojto	136:ef9c61f8c49f	724	/**
Kojto	136:ef9c61f8c49f	725	* @brief Get Peripheral increment mode.
Kojto	136:ef9c61f8c49f	726	* @rmtoll CCR PINC LL_DMA_GetPeriphIncMode
Kojto	136:ef9c61f8c49f	727	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	728	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	729	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	730	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	731	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	732	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	733	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	734	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	735	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	736	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	737	* @arg @ref LL_DMA_PERIPH_INCREMENT
Kojto	136:ef9c61f8c49f	738	* @arg @ref LL_DMA_PERIPH_NOINCREMENT
Kojto	136:ef9c61f8c49f	739	*/
Kojto	136:ef9c61f8c49f	740	__STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	741	{
Kojto	136:ef9c61f8c49f	742	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	743	DMA_CCR_PINC));
Kojto	136:ef9c61f8c49f	744	}
Kojto	136:ef9c61f8c49f	745
Kojto	136:ef9c61f8c49f	746	/**
Kojto	136:ef9c61f8c49f	747	* @brief Set Memory increment mode.
Kojto	136:ef9c61f8c49f	748	* @rmtoll CCR MINC LL_DMA_SetMemoryIncMode
Kojto	136:ef9c61f8c49f	749	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	750	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	751	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	752	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	753	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	754	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	755	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	756	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	757	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	758	* @param MemoryOrM2MDstIncMode This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	759	* @arg @ref LL_DMA_MEMORY_INCREMENT
Kojto	136:ef9c61f8c49f	760	* @arg @ref LL_DMA_MEMORY_NOINCREMENT
Kojto	136:ef9c61f8c49f	761	* @retval None
Kojto	136:ef9c61f8c49f	762	*/
Kojto	136:ef9c61f8c49f	763	__STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode)
Kojto	136:ef9c61f8c49f	764	{
Kojto	136:ef9c61f8c49f	765	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MINC,
Kojto	136:ef9c61f8c49f	766	MemoryOrM2MDstIncMode);
Kojto	136:ef9c61f8c49f	767	}
Kojto	136:ef9c61f8c49f	768
Kojto	136:ef9c61f8c49f	769	/**
Kojto	136:ef9c61f8c49f	770	* @brief Get Memory increment mode.
Kojto	136:ef9c61f8c49f	771	* @rmtoll CCR MINC LL_DMA_GetMemoryIncMode
Kojto	136:ef9c61f8c49f	772	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	773	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	774	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	775	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	776	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	777	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	778	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	779	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	780	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	781	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	782	* @arg @ref LL_DMA_MEMORY_INCREMENT
Kojto	136:ef9c61f8c49f	783	* @arg @ref LL_DMA_MEMORY_NOINCREMENT
Kojto	136:ef9c61f8c49f	784	*/
Kojto	136:ef9c61f8c49f	785	__STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	786	{
Kojto	136:ef9c61f8c49f	787	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	788	DMA_CCR_MINC));
Kojto	136:ef9c61f8c49f	789	}
Kojto	136:ef9c61f8c49f	790
Kojto	136:ef9c61f8c49f	791	/**
Kojto	136:ef9c61f8c49f	792	* @brief Set Peripheral size.
Kojto	136:ef9c61f8c49f	793	* @rmtoll CCR PSIZE LL_DMA_SetPeriphSize
Kojto	136:ef9c61f8c49f	794	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	795	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	796	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	797	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	798	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	799	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	800	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	801	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	802	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	803	* @param PeriphOrM2MSrcDataSize This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	804	* @arg @ref LL_DMA_PDATAALIGN_BYTE
Kojto	136:ef9c61f8c49f	805	* @arg @ref LL_DMA_PDATAALIGN_HALFWORD
Kojto	136:ef9c61f8c49f	806	* @arg @ref LL_DMA_PDATAALIGN_WORD
Kojto	136:ef9c61f8c49f	807	* @retval None
Kojto	136:ef9c61f8c49f	808	*/
Kojto	136:ef9c61f8c49f	809	__STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize)
Kojto	136:ef9c61f8c49f	810	{
Kojto	136:ef9c61f8c49f	811	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PSIZE,
Kojto	136:ef9c61f8c49f	812	PeriphOrM2MSrcDataSize);
Kojto	136:ef9c61f8c49f	813	}
Kojto	136:ef9c61f8c49f	814
Kojto	136:ef9c61f8c49f	815	/**
Kojto	136:ef9c61f8c49f	816	* @brief Get Peripheral size.
Kojto	136:ef9c61f8c49f	817	* @rmtoll CCR PSIZE LL_DMA_GetPeriphSize
Kojto	136:ef9c61f8c49f	818	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	819	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	820	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	821	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	822	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	823	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	824	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	825	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	826	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	827	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	828	* @arg @ref LL_DMA_PDATAALIGN_BYTE
Kojto	136:ef9c61f8c49f	829	* @arg @ref LL_DMA_PDATAALIGN_HALFWORD
Kojto	136:ef9c61f8c49f	830	* @arg @ref LL_DMA_PDATAALIGN_WORD
Kojto	136:ef9c61f8c49f	831	*/
Kojto	136:ef9c61f8c49f	832	__STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	833	{
Kojto	136:ef9c61f8c49f	834	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	835	DMA_CCR_PSIZE));
Kojto	136:ef9c61f8c49f	836	}
Kojto	136:ef9c61f8c49f	837
Kojto	136:ef9c61f8c49f	838	/**
Kojto	136:ef9c61f8c49f	839	* @brief Set Memory size.
Kojto	136:ef9c61f8c49f	840	* @rmtoll CCR MSIZE LL_DMA_SetMemorySize
Kojto	136:ef9c61f8c49f	841	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	842	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	843	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	844	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	845	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	846	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	847	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	848	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	849	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	850	* @param MemoryOrM2MDstDataSize This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	851	* @arg @ref LL_DMA_MDATAALIGN_BYTE
Kojto	136:ef9c61f8c49f	852	* @arg @ref LL_DMA_MDATAALIGN_HALFWORD
Kojto	136:ef9c61f8c49f	853	* @arg @ref LL_DMA_MDATAALIGN_WORD
Kojto	136:ef9c61f8c49f	854	* @retval None
Kojto	136:ef9c61f8c49f	855	*/
Kojto	136:ef9c61f8c49f	856	__STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize)
Kojto	136:ef9c61f8c49f	857	{
Kojto	136:ef9c61f8c49f	858	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MSIZE,
Kojto	136:ef9c61f8c49f	859	MemoryOrM2MDstDataSize);
Kojto	136:ef9c61f8c49f	860	}
Kojto	136:ef9c61f8c49f	861
Kojto	136:ef9c61f8c49f	862	/**
Kojto	136:ef9c61f8c49f	863	* @brief Get Memory size.
Kojto	136:ef9c61f8c49f	864	* @rmtoll CCR MSIZE LL_DMA_GetMemorySize
Kojto	136:ef9c61f8c49f	865	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	866	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	867	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	868	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	869	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	870	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	871	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	872	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	873	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	874	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	875	* @arg @ref LL_DMA_MDATAALIGN_BYTE
Kojto	136:ef9c61f8c49f	876	* @arg @ref LL_DMA_MDATAALIGN_HALFWORD
Kojto	136:ef9c61f8c49f	877	* @arg @ref LL_DMA_MDATAALIGN_WORD
Kojto	136:ef9c61f8c49f	878	*/
Kojto	136:ef9c61f8c49f	879	__STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	880	{
Kojto	136:ef9c61f8c49f	881	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	882	DMA_CCR_MSIZE));
Kojto	136:ef9c61f8c49f	883	}
Kojto	136:ef9c61f8c49f	884
Kojto	136:ef9c61f8c49f	885	/**
Kojto	136:ef9c61f8c49f	886	* @brief Set Channel priority level.
Kojto	136:ef9c61f8c49f	887	* @rmtoll CCR PL LL_DMA_SetChannelPriorityLevel
Kojto	136:ef9c61f8c49f	888	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	889	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	890	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	891	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	892	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	893	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	894	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	895	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	896	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	897	* @param Priority This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	898	* @arg @ref LL_DMA_PRIORITY_LOW
Kojto	136:ef9c61f8c49f	899	* @arg @ref LL_DMA_PRIORITY_MEDIUM
Kojto	136:ef9c61f8c49f	900	* @arg @ref LL_DMA_PRIORITY_HIGH
Kojto	136:ef9c61f8c49f	901	* @arg @ref LL_DMA_PRIORITY_VERYHIGH
Kojto	136:ef9c61f8c49f	902	* @retval None
Kojto	136:ef9c61f8c49f	903	*/
Kojto	136:ef9c61f8c49f	904	__STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority)
Kojto	136:ef9c61f8c49f	905	{
Kojto	136:ef9c61f8c49f	906	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PL,
Kojto	136:ef9c61f8c49f	907	Priority);
Kojto	136:ef9c61f8c49f	908	}
Kojto	136:ef9c61f8c49f	909
Kojto	136:ef9c61f8c49f	910	/**
Kojto	136:ef9c61f8c49f	911	* @brief Get Channel priority level.
Kojto	136:ef9c61f8c49f	912	* @rmtoll CCR PL LL_DMA_GetChannelPriorityLevel
Kojto	136:ef9c61f8c49f	913	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	914	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	915	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	916	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	917	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	918	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	919	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	920	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	921	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	922	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	923	* @arg @ref LL_DMA_PRIORITY_LOW
Kojto	136:ef9c61f8c49f	924	* @arg @ref LL_DMA_PRIORITY_MEDIUM
Kojto	136:ef9c61f8c49f	925	* @arg @ref LL_DMA_PRIORITY_HIGH
Kojto	136:ef9c61f8c49f	926	* @arg @ref LL_DMA_PRIORITY_VERYHIGH
Kojto	136:ef9c61f8c49f	927	*/
Kojto	136:ef9c61f8c49f	928	__STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	929	{
Kojto	136:ef9c61f8c49f	930	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	931	DMA_CCR_PL));
Kojto	136:ef9c61f8c49f	932	}
Kojto	136:ef9c61f8c49f	933
Kojto	136:ef9c61f8c49f	934	/**
Kojto	136:ef9c61f8c49f	935	* @brief Set Number of data to transfer.
Kojto	136:ef9c61f8c49f	936	* @note This action has no effect if
Kojto	136:ef9c61f8c49f	937	* channel is enabled.
Kojto	136:ef9c61f8c49f	938	* @rmtoll CNDTR NDT LL_DMA_SetDataLength
Kojto	136:ef9c61f8c49f	939	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	940	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	941	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	942	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	943	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	944	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	945	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	946	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	947	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	948	* @param NbData Between Min_Data = 0 and Max_Data = 0x0000FFFF
Kojto	136:ef9c61f8c49f	949	* @retval None
Kojto	136:ef9c61f8c49f	950	*/
Kojto	136:ef9c61f8c49f	951	__STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData)
Kojto	136:ef9c61f8c49f	952	{
Kojto	136:ef9c61f8c49f	953	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CNDTR,
Kojto	136:ef9c61f8c49f	954	DMA_CNDTR_NDT, NbData);
Kojto	136:ef9c61f8c49f	955	}
Kojto	136:ef9c61f8c49f	956
Kojto	136:ef9c61f8c49f	957	/**
Kojto	136:ef9c61f8c49f	958	* @brief Get Number of data to transfer.
Kojto	136:ef9c61f8c49f	959	* @note Once the channel is enabled, the return value indicate the
Kojto	136:ef9c61f8c49f	960	* remaining bytes to be transmitted.
Kojto	136:ef9c61f8c49f	961	* @rmtoll CNDTR NDT LL_DMA_GetDataLength
Kojto	136:ef9c61f8c49f	962	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	963	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	964	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	965	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	966	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	967	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	968	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	969	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	970	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	971	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	136:ef9c61f8c49f	972	*/
Kojto	136:ef9c61f8c49f	973	__STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	974	{
Kojto	136:ef9c61f8c49f	975	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CNDTR,
Kojto	136:ef9c61f8c49f	976	DMA_CNDTR_NDT));
Kojto	136:ef9c61f8c49f	977	}
Kojto	136:ef9c61f8c49f	978
Kojto	136:ef9c61f8c49f	979	/**
Kojto	136:ef9c61f8c49f	980	* @brief Configure the Source and Destination addresses.
Kojto	136:ef9c61f8c49f	981	* @note Each IP using DMA provides an API to get directly the register adress (LL_PPP_DMA_GetRegAddr)
Kojto	136:ef9c61f8c49f	982	* @rmtoll CPAR PA LL_DMA_ConfigAddresses\n
Kojto	136:ef9c61f8c49f	983	* CMAR MA LL_DMA_ConfigAddresses
Kojto	136:ef9c61f8c49f	984	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	985	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	986	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	987	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	988	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	989	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	990	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	991	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	992	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	993	* @param SrcAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	136:ef9c61f8c49f	994	* @param DstAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	136:ef9c61f8c49f	995	* @param Direction This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	996	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
Kojto	136:ef9c61f8c49f	997	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
Kojto	136:ef9c61f8c49f	998	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	136:ef9c61f8c49f	999	* @retval None
Kojto	136:ef9c61f8c49f	1000	*/
Kojto	136:ef9c61f8c49f	1001	__STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddress,
Kojto	136:ef9c61f8c49f	1002	uint32_t DstAddress, uint32_t Direction)
Kojto	136:ef9c61f8c49f	1003	{
Kojto	136:ef9c61f8c49f	1004	/* Direction Memory to Periph */
Kojto	136:ef9c61f8c49f	1005	if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH)
Kojto	136:ef9c61f8c49f	1006	{
Kojto	136:ef9c61f8c49f	1007	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	136:ef9c61f8c49f	1008	SrcAddress);
Kojto	136:ef9c61f8c49f	1009	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	136:ef9c61f8c49f	1010	DstAddress);
Kojto	136:ef9c61f8c49f	1011	}
Kojto	136:ef9c61f8c49f	1012	/* Direction Periph to Memory and Memory to Memory */
Kojto	136:ef9c61f8c49f	1013	else
Kojto	136:ef9c61f8c49f	1014	{
Kojto	136:ef9c61f8c49f	1015	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	136:ef9c61f8c49f	1016	SrcAddress);
Kojto	136:ef9c61f8c49f	1017	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	136:ef9c61f8c49f	1018	DstAddress);
Kojto	136:ef9c61f8c49f	1019	}
Kojto	136:ef9c61f8c49f	1020	}
Kojto	136:ef9c61f8c49f	1021
Kojto	136:ef9c61f8c49f	1022	/**
Kojto	136:ef9c61f8c49f	1023	* @brief Set the Memory address.
Kojto	136:ef9c61f8c49f	1024	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	136:ef9c61f8c49f	1025	* @rmtoll CMAR MA LL_DMA_SetMemoryAddress
Kojto	136:ef9c61f8c49f	1026	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1027	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1028	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1029	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1030	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1031	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1032	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1033	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1034	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1035	* @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	136:ef9c61f8c49f	1036	* @retval None
Kojto	136:ef9c61f8c49f	1037	*/
Kojto	136:ef9c61f8c49f	1038	__STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
Kojto	136:ef9c61f8c49f	1039	{
Kojto	136:ef9c61f8c49f	1040	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	136:ef9c61f8c49f	1041	MemoryAddress);
Kojto	136:ef9c61f8c49f	1042	}
Kojto	136:ef9c61f8c49f	1043
Kojto	136:ef9c61f8c49f	1044	/**
Kojto	136:ef9c61f8c49f	1045	* @brief Set the Peripheral address.
Kojto	136:ef9c61f8c49f	1046	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	136:ef9c61f8c49f	1047	* @rmtoll CPAR PA LL_DMA_SetPeriphAddress
Kojto	136:ef9c61f8c49f	1048	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1049	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1050	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1051	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1052	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1053	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1054	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1055	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1056	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1057	* @param PeriphAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	136:ef9c61f8c49f	1058	* @retval None
Kojto	136:ef9c61f8c49f	1059	*/
Kojto	136:ef9c61f8c49f	1060	__STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress)
Kojto	136:ef9c61f8c49f	1061	{
Kojto	136:ef9c61f8c49f	1062	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	136:ef9c61f8c49f	1063	PeriphAddress);
Kojto	136:ef9c61f8c49f	1064	}
Kojto	136:ef9c61f8c49f	1065
Kojto	136:ef9c61f8c49f	1066	/**
Kojto	136:ef9c61f8c49f	1067	* @brief Get Memory address.
Kojto	136:ef9c61f8c49f	1068	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	136:ef9c61f8c49f	1069	* @rmtoll CMAR MA LL_DMA_GetMemoryAddress
Kojto	136:ef9c61f8c49f	1070	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1071	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1072	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1073	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1074	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1075	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1076	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1077	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1078	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1079	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	136:ef9c61f8c49f	1080	*/
Kojto	136:ef9c61f8c49f	1081	__STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1082	{
Kojto	136:ef9c61f8c49f	1083	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR,
Kojto	136:ef9c61f8c49f	1084	DMA_CMAR_MA));
Kojto	136:ef9c61f8c49f	1085	}
Kojto	136:ef9c61f8c49f	1086
Kojto	136:ef9c61f8c49f	1087	/**
Kojto	136:ef9c61f8c49f	1088	* @brief Get Peripheral address.
Kojto	136:ef9c61f8c49f	1089	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	136:ef9c61f8c49f	1090	* @rmtoll CPAR PA LL_DMA_GetPeriphAddress
Kojto	136:ef9c61f8c49f	1091	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1092	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1093	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1094	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1095	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1096	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1097	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1098	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1099	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1100	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	136:ef9c61f8c49f	1101	*/
Kojto	136:ef9c61f8c49f	1102	__STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1103	{
Kojto	136:ef9c61f8c49f	1104	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR,
Kojto	136:ef9c61f8c49f	1105	DMA_CPAR_PA));
Kojto	136:ef9c61f8c49f	1106	}
Kojto	136:ef9c61f8c49f	1107
Kojto	136:ef9c61f8c49f	1108	/**
Kojto	136:ef9c61f8c49f	1109	* @brief Set the Memory to Memory Source address.
Kojto	136:ef9c61f8c49f	1110	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	136:ef9c61f8c49f	1111	* @rmtoll CPAR PA LL_DMA_SetM2MSrcAddress
Kojto	136:ef9c61f8c49f	1112	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1113	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1114	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1115	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1116	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1117	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1118	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1119	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1120	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1121	* @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	136:ef9c61f8c49f	1122	* @retval None
Kojto	136:ef9c61f8c49f	1123	*/
Kojto	136:ef9c61f8c49f	1124	__STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
Kojto	136:ef9c61f8c49f	1125	{
Kojto	136:ef9c61f8c49f	1126	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	136:ef9c61f8c49f	1127	MemoryAddress);
Kojto	136:ef9c61f8c49f	1128	}
Kojto	136:ef9c61f8c49f	1129
Kojto	136:ef9c61f8c49f	1130	/**
Kojto	136:ef9c61f8c49f	1131	* @brief Set the Memory to Memory Destination address.
Kojto	136:ef9c61f8c49f	1132	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	136:ef9c61f8c49f	1133	* @rmtoll CMAR MA LL_DMA_SetM2MDstAddress
Kojto	136:ef9c61f8c49f	1134	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1135	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1136	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1137	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1138	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1139	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1140	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1141	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1142	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1143	* @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	136:ef9c61f8c49f	1144	* @retval None
Kojto	136:ef9c61f8c49f	1145	*/
Kojto	136:ef9c61f8c49f	1146	__STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
Kojto	136:ef9c61f8c49f	1147	{
Kojto	136:ef9c61f8c49f	1148	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	136:ef9c61f8c49f	1149	MemoryAddress);
Kojto	136:ef9c61f8c49f	1150	}
Kojto	136:ef9c61f8c49f	1151
Kojto	136:ef9c61f8c49f	1152	/**
Kojto	136:ef9c61f8c49f	1153	* @brief Get the Memory to Memory Source address.
Kojto	136:ef9c61f8c49f	1154	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	136:ef9c61f8c49f	1155	* @rmtoll CPAR PA LL_DMA_GetM2MSrcAddress
Kojto	136:ef9c61f8c49f	1156	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1157	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1158	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1159	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1160	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1161	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1162	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1163	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1164	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1165	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	136:ef9c61f8c49f	1166	*/
Kojto	136:ef9c61f8c49f	1167	__STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1168	{
Kojto	136:ef9c61f8c49f	1169	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR,
Kojto	136:ef9c61f8c49f	1170	DMA_CPAR_PA));
Kojto	136:ef9c61f8c49f	1171	}
Kojto	136:ef9c61f8c49f	1172
Kojto	136:ef9c61f8c49f	1173	/**
Kojto	136:ef9c61f8c49f	1174	* @brief Get the Memory to Memory Destination address.
Kojto	136:ef9c61f8c49f	1175	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	136:ef9c61f8c49f	1176	* @rmtoll CMAR MA LL_DMA_GetM2MDstAddress
Kojto	136:ef9c61f8c49f	1177	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1178	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1179	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1180	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1181	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1182	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1183	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1184	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1185	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1186	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	136:ef9c61f8c49f	1187	*/
Kojto	136:ef9c61f8c49f	1188	__STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1189	{
Kojto	136:ef9c61f8c49f	1190	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR,
Kojto	136:ef9c61f8c49f	1191	DMA_CMAR_MA));
Kojto	136:ef9c61f8c49f	1192	}
Kojto	136:ef9c61f8c49f	1193
Kojto	136:ef9c61f8c49f	1194	/**
Kojto	136:ef9c61f8c49f	1195	* @brief Set DMA request for DMA instance on Channel x.
Kojto	136:ef9c61f8c49f	1196	* @note Please refer to Reference Manual to get the available mapping of Request value link to Channel Selection.
Kojto	136:ef9c61f8c49f	1197	* @rmtoll CSELR C1S LL_DMA_SetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1198	* CSELR C2S LL_DMA_SetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1199	* CSELR C3S LL_DMA_SetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1200	* CSELR C4S LL_DMA_SetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1201	* CSELR C5S LL_DMA_SetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1202	* CSELR C6S LL_DMA_SetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1203	* CSELR C7S LL_DMA_SetPeriphRequest
Kojto	136:ef9c61f8c49f	1204	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1205	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1206	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1207	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1208	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1209	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1210	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1211	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1212	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1213	* @param PeriphRequest This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1214	* @arg @ref LL_DMA_REQUEST_0
Kojto	136:ef9c61f8c49f	1215	* @arg @ref LL_DMA_REQUEST_1
Kojto	136:ef9c61f8c49f	1216	* @arg @ref LL_DMA_REQUEST_2
Kojto	136:ef9c61f8c49f	1217	* @arg @ref LL_DMA_REQUEST_3
Kojto	136:ef9c61f8c49f	1218	* @arg @ref LL_DMA_REQUEST_4
Kojto	136:ef9c61f8c49f	1219	* @arg @ref LL_DMA_REQUEST_5
Kojto	136:ef9c61f8c49f	1220	* @arg @ref LL_DMA_REQUEST_6
Kojto	136:ef9c61f8c49f	1221	* @arg @ref LL_DMA_REQUEST_7
Kojto	136:ef9c61f8c49f	1222	* @arg @ref LL_DMA_REQUEST_8
Kojto	136:ef9c61f8c49f	1223	* @arg @ref LL_DMA_REQUEST_9
Kojto	136:ef9c61f8c49f	1224	* @arg @ref LL_DMA_REQUEST_10
Kojto	136:ef9c61f8c49f	1225	* @arg @ref LL_DMA_REQUEST_11
Kojto	136:ef9c61f8c49f	1226	* @arg @ref LL_DMA_REQUEST_12
Kojto	136:ef9c61f8c49f	1227	* @arg @ref LL_DMA_REQUEST_13
Kojto	136:ef9c61f8c49f	1228	* @arg @ref LL_DMA_REQUEST_14
Kojto	136:ef9c61f8c49f	1229	* @arg @ref LL_DMA_REQUEST_15
Kojto	136:ef9c61f8c49f	1230	* @retval None
Kojto	136:ef9c61f8c49f	1231	*/
Kojto	136:ef9c61f8c49f	1232	__STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphRequest)
Kojto	136:ef9c61f8c49f	1233	{
Kojto	136:ef9c61f8c49f	1234	MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
Kojto	136:ef9c61f8c49f	1235	DMA_CSELR_C1S << ((Channel - 1U) * 4U), PeriphRequest << DMA_POSITION_CSELR_CXS);
Kojto	136:ef9c61f8c49f	1236	}
Kojto	136:ef9c61f8c49f	1237
Kojto	136:ef9c61f8c49f	1238	/**
Kojto	136:ef9c61f8c49f	1239	* @brief Get DMA request for DMA instance on Channel x.
Kojto	136:ef9c61f8c49f	1240	* @rmtoll CSELR C1S LL_DMA_GetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1241	* CSELR C2S LL_DMA_GetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1242	* CSELR C3S LL_DMA_GetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1243	* CSELR C4S LL_DMA_GetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1244	* CSELR C5S LL_DMA_GetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1245	* CSELR C6S LL_DMA_GetPeriphRequest\n
Kojto	136:ef9c61f8c49f	1246	* CSELR C7S LL_DMA_GetPeriphRequest
Kojto	136:ef9c61f8c49f	1247	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1248	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1249	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1250	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1251	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1252	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1253	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1254	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1255	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1256	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	1257	* @arg @ref LL_DMA_REQUEST_0
Kojto	136:ef9c61f8c49f	1258	* @arg @ref LL_DMA_REQUEST_1
Kojto	136:ef9c61f8c49f	1259	* @arg @ref LL_DMA_REQUEST_2
Kojto	136:ef9c61f8c49f	1260	* @arg @ref LL_DMA_REQUEST_3
Kojto	136:ef9c61f8c49f	1261	* @arg @ref LL_DMA_REQUEST_4
Kojto	136:ef9c61f8c49f	1262	* @arg @ref LL_DMA_REQUEST_5
Kojto	136:ef9c61f8c49f	1263	* @arg @ref LL_DMA_REQUEST_6
Kojto	136:ef9c61f8c49f	1264	* @arg @ref LL_DMA_REQUEST_7
Kojto	136:ef9c61f8c49f	1265	* @arg @ref LL_DMA_REQUEST_8
Kojto	136:ef9c61f8c49f	1266	* @arg @ref LL_DMA_REQUEST_9
Kojto	136:ef9c61f8c49f	1267	* @arg @ref LL_DMA_REQUEST_10
Kojto	136:ef9c61f8c49f	1268	* @arg @ref LL_DMA_REQUEST_11
Kojto	136:ef9c61f8c49f	1269	* @arg @ref LL_DMA_REQUEST_12
Kojto	136:ef9c61f8c49f	1270	* @arg @ref LL_DMA_REQUEST_13
Kojto	136:ef9c61f8c49f	1271	* @arg @ref LL_DMA_REQUEST_14
Kojto	136:ef9c61f8c49f	1272	* @arg @ref LL_DMA_REQUEST_15
Kojto	136:ef9c61f8c49f	1273	*/
Kojto	136:ef9c61f8c49f	1274	__STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1275	{
Kojto	136:ef9c61f8c49f	1276	return (READ_BIT(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
Kojto	136:ef9c61f8c49f	1277	DMA_CSELR_C1S << ((Channel - 1U) * 4U)) >> DMA_POSITION_CSELR_CXS);
Kojto	136:ef9c61f8c49f	1278	}
Kojto	136:ef9c61f8c49f	1279
Kojto	136:ef9c61f8c49f	1280	/**
Kojto	136:ef9c61f8c49f	1281	* @}
Kojto	136:ef9c61f8c49f	1282	*/
Kojto	136:ef9c61f8c49f	1283
Kojto	136:ef9c61f8c49f	1284	/** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management
Kojto	136:ef9c61f8c49f	1285	* @{
Kojto	136:ef9c61f8c49f	1286	*/
Kojto	136:ef9c61f8c49f	1287
Kojto	136:ef9c61f8c49f	1288	/**
Kojto	136:ef9c61f8c49f	1289	* @brief Get Channel 1 global interrupt flag.
Kojto	136:ef9c61f8c49f	1290	* @rmtoll ISR GIF1 LL_DMA_IsActiveFlag_GI1
Kojto	136:ef9c61f8c49f	1291	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1292	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1293	*/
Kojto	136:ef9c61f8c49f	1294	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI1(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1295	{
Kojto	136:ef9c61f8c49f	1296	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF1) == (DMA_ISR_GIF1));
Kojto	136:ef9c61f8c49f	1297	}
Kojto	136:ef9c61f8c49f	1298
Kojto	136:ef9c61f8c49f	1299	/**
Kojto	136:ef9c61f8c49f	1300	* @brief Get Channel 2 global interrupt flag.
Kojto	136:ef9c61f8c49f	1301	* @rmtoll ISR GIF2 LL_DMA_IsActiveFlag_GI2
Kojto	136:ef9c61f8c49f	1302	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1303	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1304	*/
Kojto	136:ef9c61f8c49f	1305	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI2(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1306	{
Kojto	136:ef9c61f8c49f	1307	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF2) == (DMA_ISR_GIF2));
Kojto	136:ef9c61f8c49f	1308	}
Kojto	136:ef9c61f8c49f	1309
Kojto	136:ef9c61f8c49f	1310	/**
Kojto	136:ef9c61f8c49f	1311	* @brief Get Channel 3 global interrupt flag.
Kojto	136:ef9c61f8c49f	1312	* @rmtoll ISR GIF3 LL_DMA_IsActiveFlag_GI3
Kojto	136:ef9c61f8c49f	1313	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1314	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1315	*/
Kojto	136:ef9c61f8c49f	1316	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI3(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1317	{
Kojto	136:ef9c61f8c49f	1318	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF3) == (DMA_ISR_GIF3));
Kojto	136:ef9c61f8c49f	1319	}
Kojto	136:ef9c61f8c49f	1320
Kojto	136:ef9c61f8c49f	1321	/**
Kojto	136:ef9c61f8c49f	1322	* @brief Get Channel 4 global interrupt flag.
Kojto	136:ef9c61f8c49f	1323	* @rmtoll ISR GIF4 LL_DMA_IsActiveFlag_GI4
Kojto	136:ef9c61f8c49f	1324	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1325	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1326	*/
Kojto	136:ef9c61f8c49f	1327	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI4(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1328	{
Kojto	136:ef9c61f8c49f	1329	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF4) == (DMA_ISR_GIF4));
Kojto	136:ef9c61f8c49f	1330	}
Kojto	136:ef9c61f8c49f	1331
Kojto	136:ef9c61f8c49f	1332	/**
Kojto	136:ef9c61f8c49f	1333	* @brief Get Channel 5 global interrupt flag.
Kojto	136:ef9c61f8c49f	1334	* @rmtoll ISR GIF5 LL_DMA_IsActiveFlag_GI5
Kojto	136:ef9c61f8c49f	1335	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1336	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1337	*/
Kojto	136:ef9c61f8c49f	1338	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI5(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1339	{
Kojto	136:ef9c61f8c49f	1340	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF5) == (DMA_ISR_GIF5));
Kojto	136:ef9c61f8c49f	1341	}
Kojto	136:ef9c61f8c49f	1342
Kojto	136:ef9c61f8c49f	1343	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	1344	/**
Kojto	136:ef9c61f8c49f	1345	* @brief Get Channel 6 global interrupt flag.
Kojto	136:ef9c61f8c49f	1346	* @rmtoll ISR GIF6 LL_DMA_IsActiveFlag_GI6
Kojto	136:ef9c61f8c49f	1347	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1348	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1349	*/
Kojto	136:ef9c61f8c49f	1350	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI6(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1351	{
Kojto	136:ef9c61f8c49f	1352	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF6) == (DMA_ISR_GIF6));
Kojto	136:ef9c61f8c49f	1353	}
Kojto	136:ef9c61f8c49f	1354	#endif
Kojto	136:ef9c61f8c49f	1355
Kojto	136:ef9c61f8c49f	1356	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	1357	/**
Kojto	136:ef9c61f8c49f	1358	* @brief Get Channel 7 global interrupt flag.
Kojto	136:ef9c61f8c49f	1359	* @rmtoll ISR GIF7 LL_DMA_IsActiveFlag_GI7
Kojto	136:ef9c61f8c49f	1360	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1361	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1362	*/
Kojto	136:ef9c61f8c49f	1363	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI7(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1364	{
Kojto	136:ef9c61f8c49f	1365	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF7) == (DMA_ISR_GIF7));
Kojto	136:ef9c61f8c49f	1366	}
Kojto	136:ef9c61f8c49f	1367	#endif
Kojto	136:ef9c61f8c49f	1368
Kojto	136:ef9c61f8c49f	1369	/**
Kojto	136:ef9c61f8c49f	1370	* @brief Get Channel 1 transfer complete flag.
Kojto	136:ef9c61f8c49f	1371	* @rmtoll ISR TCIF1 LL_DMA_IsActiveFlag_TC1
Kojto	136:ef9c61f8c49f	1372	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1373	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1374	*/
Kojto	136:ef9c61f8c49f	1375	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1376	{
Kojto	136:ef9c61f8c49f	1377	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF1) == (DMA_ISR_TCIF1));
Kojto	136:ef9c61f8c49f	1378	}
Kojto	136:ef9c61f8c49f	1379
Kojto	136:ef9c61f8c49f	1380	/**
Kojto	136:ef9c61f8c49f	1381	* @brief Get Channel 2 transfer complete flag.
Kojto	136:ef9c61f8c49f	1382	* @rmtoll ISR TCIF2 LL_DMA_IsActiveFlag_TC2
Kojto	136:ef9c61f8c49f	1383	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1384	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1385	*/
Kojto	136:ef9c61f8c49f	1386	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1387	{
Kojto	136:ef9c61f8c49f	1388	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF2) == (DMA_ISR_TCIF2));
Kojto	136:ef9c61f8c49f	1389	}
Kojto	136:ef9c61f8c49f	1390
Kojto	136:ef9c61f8c49f	1391	/**
Kojto	136:ef9c61f8c49f	1392	* @brief Get Channel 3 transfer complete flag.
Kojto	136:ef9c61f8c49f	1393	* @rmtoll ISR TCIF3 LL_DMA_IsActiveFlag_TC3
Kojto	136:ef9c61f8c49f	1394	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1395	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1396	*/
Kojto	136:ef9c61f8c49f	1397	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1398	{
Kojto	136:ef9c61f8c49f	1399	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF3) == (DMA_ISR_TCIF3));
Kojto	136:ef9c61f8c49f	1400	}
Kojto	136:ef9c61f8c49f	1401
Kojto	136:ef9c61f8c49f	1402	/**
Kojto	136:ef9c61f8c49f	1403	* @brief Get Channel 4 transfer complete flag.
Kojto	136:ef9c61f8c49f	1404	* @rmtoll ISR TCIF4 LL_DMA_IsActiveFlag_TC4
Kojto	136:ef9c61f8c49f	1405	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1406	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1407	*/
Kojto	136:ef9c61f8c49f	1408	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1409	{
Kojto	136:ef9c61f8c49f	1410	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF4) == (DMA_ISR_TCIF4));
Kojto	136:ef9c61f8c49f	1411	}
Kojto	136:ef9c61f8c49f	1412
Kojto	136:ef9c61f8c49f	1413	/**
Kojto	136:ef9c61f8c49f	1414	* @brief Get Channel 5 transfer complete flag.
Kojto	136:ef9c61f8c49f	1415	* @rmtoll ISR TCIF5 LL_DMA_IsActiveFlag_TC5
Kojto	136:ef9c61f8c49f	1416	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1417	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1418	*/
Kojto	136:ef9c61f8c49f	1419	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1420	{
Kojto	136:ef9c61f8c49f	1421	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF5) == (DMA_ISR_TCIF5));
Kojto	136:ef9c61f8c49f	1422	}
Kojto	136:ef9c61f8c49f	1423
Kojto	136:ef9c61f8c49f	1424	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	1425	/**
Kojto	136:ef9c61f8c49f	1426	* @brief Get Channel 6 transfer complete flag.
Kojto	136:ef9c61f8c49f	1427	* @rmtoll ISR TCIF6 LL_DMA_IsActiveFlag_TC6
Kojto	136:ef9c61f8c49f	1428	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1429	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1430	*/
Kojto	136:ef9c61f8c49f	1431	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1432	{
Kojto	136:ef9c61f8c49f	1433	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF6) == (DMA_ISR_TCIF6));
Kojto	136:ef9c61f8c49f	1434	}
Kojto	136:ef9c61f8c49f	1435	#endif
Kojto	136:ef9c61f8c49f	1436
Kojto	136:ef9c61f8c49f	1437	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	1438	/**
Kojto	136:ef9c61f8c49f	1439	* @brief Get Channel 7 transfer complete flag.
Kojto	136:ef9c61f8c49f	1440	* @rmtoll ISR TCIF7 LL_DMA_IsActiveFlag_TC7
Kojto	136:ef9c61f8c49f	1441	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1442	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1443	*/
Kojto	136:ef9c61f8c49f	1444	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1445	{
Kojto	136:ef9c61f8c49f	1446	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF7) == (DMA_ISR_TCIF7));
Kojto	136:ef9c61f8c49f	1447	}
Kojto	136:ef9c61f8c49f	1448	#endif
Kojto	136:ef9c61f8c49f	1449
Kojto	136:ef9c61f8c49f	1450	/**
Kojto	136:ef9c61f8c49f	1451	* @brief Get Channel 1 half transfer flag.
Kojto	136:ef9c61f8c49f	1452	* @rmtoll ISR HTIF1 LL_DMA_IsActiveFlag_HT1
Kojto	136:ef9c61f8c49f	1453	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1454	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1455	*/
Kojto	136:ef9c61f8c49f	1456	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1457	{
Kojto	136:ef9c61f8c49f	1458	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF1) == (DMA_ISR_HTIF1));
Kojto	136:ef9c61f8c49f	1459	}
Kojto	136:ef9c61f8c49f	1460
Kojto	136:ef9c61f8c49f	1461	/**
Kojto	136:ef9c61f8c49f	1462	* @brief Get Channel 2 half transfer flag.
Kojto	136:ef9c61f8c49f	1463	* @rmtoll ISR HTIF2 LL_DMA_IsActiveFlag_HT2
Kojto	136:ef9c61f8c49f	1464	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1465	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1466	*/
Kojto	136:ef9c61f8c49f	1467	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1468	{
Kojto	136:ef9c61f8c49f	1469	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF2) == (DMA_ISR_HTIF2));
Kojto	136:ef9c61f8c49f	1470	}
Kojto	136:ef9c61f8c49f	1471
Kojto	136:ef9c61f8c49f	1472	/**
Kojto	136:ef9c61f8c49f	1473	* @brief Get Channel 3 half transfer flag.
Kojto	136:ef9c61f8c49f	1474	* @rmtoll ISR HTIF3 LL_DMA_IsActiveFlag_HT3
Kojto	136:ef9c61f8c49f	1475	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1476	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1477	*/
Kojto	136:ef9c61f8c49f	1478	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1479	{
Kojto	136:ef9c61f8c49f	1480	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF3) == (DMA_ISR_HTIF3));
Kojto	136:ef9c61f8c49f	1481	}
Kojto	136:ef9c61f8c49f	1482
Kojto	136:ef9c61f8c49f	1483	/**
Kojto	136:ef9c61f8c49f	1484	* @brief Get Channel 4 half transfer flag.
Kojto	136:ef9c61f8c49f	1485	* @rmtoll ISR HTIF4 LL_DMA_IsActiveFlag_HT4
Kojto	136:ef9c61f8c49f	1486	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1487	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1488	*/
Kojto	136:ef9c61f8c49f	1489	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1490	{
Kojto	136:ef9c61f8c49f	1491	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF4) == (DMA_ISR_HTIF4));
Kojto	136:ef9c61f8c49f	1492	}
Kojto	136:ef9c61f8c49f	1493
Kojto	136:ef9c61f8c49f	1494	/**
Kojto	136:ef9c61f8c49f	1495	* @brief Get Channel 5 half transfer flag.
Kojto	136:ef9c61f8c49f	1496	* @rmtoll ISR HTIF5 LL_DMA_IsActiveFlag_HT5
Kojto	136:ef9c61f8c49f	1497	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1498	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1499	*/
Kojto	136:ef9c61f8c49f	1500	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1501	{
Kojto	136:ef9c61f8c49f	1502	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF5) == (DMA_ISR_HTIF5));
Kojto	136:ef9c61f8c49f	1503	}
Kojto	136:ef9c61f8c49f	1504
Kojto	136:ef9c61f8c49f	1505	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	1506	/**
Kojto	136:ef9c61f8c49f	1507	* @brief Get Channel 6 half transfer flag.
Kojto	136:ef9c61f8c49f	1508	* @rmtoll ISR HTIF6 LL_DMA_IsActiveFlag_HT6
Kojto	136:ef9c61f8c49f	1509	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1510	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1511	*/
Kojto	136:ef9c61f8c49f	1512	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1513	{
Kojto	136:ef9c61f8c49f	1514	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF6) == (DMA_ISR_HTIF6));
Kojto	136:ef9c61f8c49f	1515	}
Kojto	136:ef9c61f8c49f	1516	#endif
Kojto	136:ef9c61f8c49f	1517
Kojto	136:ef9c61f8c49f	1518	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	1519	/**
Kojto	136:ef9c61f8c49f	1520	* @brief Get Channel 7 half transfer flag.
Kojto	136:ef9c61f8c49f	1521	* @rmtoll ISR HTIF7 LL_DMA_IsActiveFlag_HT7
Kojto	136:ef9c61f8c49f	1522	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1523	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1524	*/
Kojto	136:ef9c61f8c49f	1525	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1526	{
Kojto	136:ef9c61f8c49f	1527	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF7) == (DMA_ISR_HTIF7));
Kojto	136:ef9c61f8c49f	1528	}
Kojto	136:ef9c61f8c49f	1529	#endif
Kojto	136:ef9c61f8c49f	1530
Kojto	136:ef9c61f8c49f	1531	/**
Kojto	136:ef9c61f8c49f	1532	* @brief Get Channel 1 transfer error flag.
Kojto	136:ef9c61f8c49f	1533	* @rmtoll ISR TEIF1 LL_DMA_IsActiveFlag_TE1
Kojto	136:ef9c61f8c49f	1534	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1535	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1536	*/
Kojto	136:ef9c61f8c49f	1537	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1538	{
Kojto	136:ef9c61f8c49f	1539	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF1) == (DMA_ISR_TEIF1));
Kojto	136:ef9c61f8c49f	1540	}
Kojto	136:ef9c61f8c49f	1541
Kojto	136:ef9c61f8c49f	1542	/**
Kojto	136:ef9c61f8c49f	1543	* @brief Get Channel 2 transfer error flag.
Kojto	136:ef9c61f8c49f	1544	* @rmtoll ISR TEIF2 LL_DMA_IsActiveFlag_TE2
Kojto	136:ef9c61f8c49f	1545	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1546	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1547	*/
Kojto	136:ef9c61f8c49f	1548	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1549	{
Kojto	136:ef9c61f8c49f	1550	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF2) == (DMA_ISR_TEIF2));
Kojto	136:ef9c61f8c49f	1551	}
Kojto	136:ef9c61f8c49f	1552
Kojto	136:ef9c61f8c49f	1553	/**
Kojto	136:ef9c61f8c49f	1554	* @brief Get Channel 3 transfer error flag.
Kojto	136:ef9c61f8c49f	1555	* @rmtoll ISR TEIF3 LL_DMA_IsActiveFlag_TE3
Kojto	136:ef9c61f8c49f	1556	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1557	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1558	*/
Kojto	136:ef9c61f8c49f	1559	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1560	{
Kojto	136:ef9c61f8c49f	1561	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF3) == (DMA_ISR_TEIF3));
Kojto	136:ef9c61f8c49f	1562	}
Kojto	136:ef9c61f8c49f	1563
Kojto	136:ef9c61f8c49f	1564	/**
Kojto	136:ef9c61f8c49f	1565	* @brief Get Channel 4 transfer error flag.
Kojto	136:ef9c61f8c49f	1566	* @rmtoll ISR TEIF4 LL_DMA_IsActiveFlag_TE4
Kojto	136:ef9c61f8c49f	1567	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1568	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1569	*/
Kojto	136:ef9c61f8c49f	1570	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1571	{
Kojto	136:ef9c61f8c49f	1572	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF4) == (DMA_ISR_TEIF4));
Kojto	136:ef9c61f8c49f	1573	}
Kojto	136:ef9c61f8c49f	1574
Kojto	136:ef9c61f8c49f	1575	/**
Kojto	136:ef9c61f8c49f	1576	* @brief Get Channel 5 transfer error flag.
Kojto	136:ef9c61f8c49f	1577	* @rmtoll ISR TEIF5 LL_DMA_IsActiveFlag_TE5
Kojto	136:ef9c61f8c49f	1578	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1579	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1580	*/
Kojto	136:ef9c61f8c49f	1581	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1582	{
Kojto	136:ef9c61f8c49f	1583	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF5) == (DMA_ISR_TEIF5));
Kojto	136:ef9c61f8c49f	1584	}
Kojto	136:ef9c61f8c49f	1585
Kojto	136:ef9c61f8c49f	1586	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	1587	/**
Kojto	136:ef9c61f8c49f	1588	* @brief Get Channel 6 transfer error flag.
Kojto	136:ef9c61f8c49f	1589	* @rmtoll ISR TEIF6 LL_DMA_IsActiveFlag_TE6
Kojto	136:ef9c61f8c49f	1590	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1591	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1592	*/
Kojto	136:ef9c61f8c49f	1593	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1594	{
Kojto	136:ef9c61f8c49f	1595	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF6) == (DMA_ISR_TEIF6));
Kojto	136:ef9c61f8c49f	1596	}
Kojto	136:ef9c61f8c49f	1597	#endif
Kojto	136:ef9c61f8c49f	1598
Kojto	136:ef9c61f8c49f	1599	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	1600	/**
Kojto	136:ef9c61f8c49f	1601	* @brief Get Channel 7 transfer error flag.
Kojto	136:ef9c61f8c49f	1602	* @rmtoll ISR TEIF7 LL_DMA_IsActiveFlag_TE7
Kojto	136:ef9c61f8c49f	1603	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1604	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1605	*/
Kojto	136:ef9c61f8c49f	1606	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1607	{
Kojto	136:ef9c61f8c49f	1608	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF7) == (DMA_ISR_TEIF7));
Kojto	136:ef9c61f8c49f	1609	}
Kojto	136:ef9c61f8c49f	1610	#endif
Kojto	136:ef9c61f8c49f	1611
Kojto	136:ef9c61f8c49f	1612	/**
Kojto	136:ef9c61f8c49f	1613	* @brief Clear Channel 1 global interrupt flag.
Kojto	136:ef9c61f8c49f	1614	* @rmtoll IFCR CGIF1 LL_DMA_ClearFlag_GI1
Kojto	136:ef9c61f8c49f	1615	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1616	* @retval None
Kojto	136:ef9c61f8c49f	1617	*/
Kojto	136:ef9c61f8c49f	1618	__STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1619	{
Kojto	136:ef9c61f8c49f	1620	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF1);
Kojto	136:ef9c61f8c49f	1621	}
Kojto	136:ef9c61f8c49f	1622
Kojto	136:ef9c61f8c49f	1623	/**
Kojto	136:ef9c61f8c49f	1624	* @brief Clear Channel 2 global interrupt flag.
Kojto	136:ef9c61f8c49f	1625	* @rmtoll IFCR CGIF2 LL_DMA_ClearFlag_GI2
Kojto	136:ef9c61f8c49f	1626	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1627	* @retval None
Kojto	136:ef9c61f8c49f	1628	*/
Kojto	136:ef9c61f8c49f	1629	__STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1630	{
Kojto	136:ef9c61f8c49f	1631	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF2);
Kojto	136:ef9c61f8c49f	1632	}
Kojto	136:ef9c61f8c49f	1633
Kojto	136:ef9c61f8c49f	1634	/**
Kojto	136:ef9c61f8c49f	1635	* @brief Clear Channel 3 global interrupt flag.
Kojto	136:ef9c61f8c49f	1636	* @rmtoll IFCR CGIF3 LL_DMA_ClearFlag_GI3
Kojto	136:ef9c61f8c49f	1637	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1638	* @retval None
Kojto	136:ef9c61f8c49f	1639	*/
Kojto	136:ef9c61f8c49f	1640	__STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1641	{
Kojto	136:ef9c61f8c49f	1642	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF3);
Kojto	136:ef9c61f8c49f	1643	}
Kojto	136:ef9c61f8c49f	1644
Kojto	136:ef9c61f8c49f	1645	/**
Kojto	136:ef9c61f8c49f	1646	* @brief Clear Channel 4 global interrupt flag.
Kojto	136:ef9c61f8c49f	1647	* @rmtoll IFCR CGIF4 LL_DMA_ClearFlag_GI4
Kojto	136:ef9c61f8c49f	1648	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1649	* @retval None
Kojto	136:ef9c61f8c49f	1650	*/
Kojto	136:ef9c61f8c49f	1651	__STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1652	{
Kojto	136:ef9c61f8c49f	1653	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF4);
Kojto	136:ef9c61f8c49f	1654	}
Kojto	136:ef9c61f8c49f	1655
Kojto	136:ef9c61f8c49f	1656	/**
Kojto	136:ef9c61f8c49f	1657	* @brief Clear Channel 5 global interrupt flag.
Kojto	136:ef9c61f8c49f	1658	* @rmtoll IFCR CGIF5 LL_DMA_ClearFlag_GI5
Kojto	136:ef9c61f8c49f	1659	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1660	* @retval None
Kojto	136:ef9c61f8c49f	1661	*/
Kojto	136:ef9c61f8c49f	1662	__STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1663	{
Kojto	136:ef9c61f8c49f	1664	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF5);
Kojto	136:ef9c61f8c49f	1665	}
Kojto	136:ef9c61f8c49f	1666
Kojto	136:ef9c61f8c49f	1667	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	1668	/**
Kojto	136:ef9c61f8c49f	1669	* @brief Clear Channel 6 global interrupt flag.
Kojto	136:ef9c61f8c49f	1670	* @rmtoll IFCR CGIF6 LL_DMA_ClearFlag_GI6
Kojto	136:ef9c61f8c49f	1671	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1672	* @retval None
Kojto	136:ef9c61f8c49f	1673	*/
Kojto	136:ef9c61f8c49f	1674	__STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1675	{
Kojto	136:ef9c61f8c49f	1676	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF6);
Kojto	136:ef9c61f8c49f	1677	}
Kojto	136:ef9c61f8c49f	1678	#endif
Kojto	136:ef9c61f8c49f	1679
Kojto	136:ef9c61f8c49f	1680	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	1681	/**
Kojto	136:ef9c61f8c49f	1682	* @brief Clear Channel 7 global interrupt flag.
Kojto	136:ef9c61f8c49f	1683	* @rmtoll IFCR CGIF7 LL_DMA_ClearFlag_GI7
Kojto	136:ef9c61f8c49f	1684	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1685	* @retval None
Kojto	136:ef9c61f8c49f	1686	*/
Kojto	136:ef9c61f8c49f	1687	__STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1688	{
Kojto	136:ef9c61f8c49f	1689	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF7);
Kojto	136:ef9c61f8c49f	1690	}
Kojto	136:ef9c61f8c49f	1691	#endif
Kojto	136:ef9c61f8c49f	1692
Kojto	136:ef9c61f8c49f	1693	/**
Kojto	136:ef9c61f8c49f	1694	* @brief Clear Channel 1 transfer complete flag.
Kojto	136:ef9c61f8c49f	1695	* @rmtoll IFCR CTCIF1 LL_DMA_ClearFlag_TC1
Kojto	136:ef9c61f8c49f	1696	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1697	* @retval None
Kojto	136:ef9c61f8c49f	1698	*/
Kojto	136:ef9c61f8c49f	1699	__STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1700	{
Kojto	136:ef9c61f8c49f	1701	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF1);
Kojto	136:ef9c61f8c49f	1702	}
Kojto	136:ef9c61f8c49f	1703
Kojto	136:ef9c61f8c49f	1704	/**
Kojto	136:ef9c61f8c49f	1705	* @brief Clear Channel 2 transfer complete flag.
Kojto	136:ef9c61f8c49f	1706	* @rmtoll IFCR CTCIF2 LL_DMA_ClearFlag_TC2
Kojto	136:ef9c61f8c49f	1707	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1708	* @retval None
Kojto	136:ef9c61f8c49f	1709	*/
Kojto	136:ef9c61f8c49f	1710	__STATIC_INLINE void LL_DMA_ClearFlag_TC2(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1711	{
Kojto	136:ef9c61f8c49f	1712	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF2);
Kojto	136:ef9c61f8c49f	1713	}
Kojto	136:ef9c61f8c49f	1714
Kojto	136:ef9c61f8c49f	1715	/**
Kojto	136:ef9c61f8c49f	1716	* @brief Clear Channel 3 transfer complete flag.
Kojto	136:ef9c61f8c49f	1717	* @rmtoll IFCR CTCIF3 LL_DMA_ClearFlag_TC3
Kojto	136:ef9c61f8c49f	1718	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1719	* @retval None
Kojto	136:ef9c61f8c49f	1720	*/
Kojto	136:ef9c61f8c49f	1721	__STATIC_INLINE void LL_DMA_ClearFlag_TC3(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1722	{
Kojto	136:ef9c61f8c49f	1723	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF3);
Kojto	136:ef9c61f8c49f	1724	}
Kojto	136:ef9c61f8c49f	1725
Kojto	136:ef9c61f8c49f	1726	/**
Kojto	136:ef9c61f8c49f	1727	* @brief Clear Channel 4 transfer complete flag.
Kojto	136:ef9c61f8c49f	1728	* @rmtoll IFCR CTCIF4 LL_DMA_ClearFlag_TC4
Kojto	136:ef9c61f8c49f	1729	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1730	* @retval None
Kojto	136:ef9c61f8c49f	1731	*/
Kojto	136:ef9c61f8c49f	1732	__STATIC_INLINE void LL_DMA_ClearFlag_TC4(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1733	{
Kojto	136:ef9c61f8c49f	1734	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF4);
Kojto	136:ef9c61f8c49f	1735	}
Kojto	136:ef9c61f8c49f	1736
Kojto	136:ef9c61f8c49f	1737	/**
Kojto	136:ef9c61f8c49f	1738	* @brief Clear Channel 5 transfer complete flag.
Kojto	136:ef9c61f8c49f	1739	* @rmtoll IFCR CTCIF5 LL_DMA_ClearFlag_TC5
Kojto	136:ef9c61f8c49f	1740	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1741	* @retval None
Kojto	136:ef9c61f8c49f	1742	*/
Kojto	136:ef9c61f8c49f	1743	__STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1744	{
Kojto	136:ef9c61f8c49f	1745	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF5);
Kojto	136:ef9c61f8c49f	1746	}
Kojto	136:ef9c61f8c49f	1747
Kojto	136:ef9c61f8c49f	1748	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	1749	/**
Kojto	136:ef9c61f8c49f	1750	* @brief Clear Channel 6 transfer complete flag.
Kojto	136:ef9c61f8c49f	1751	* @rmtoll IFCR CTCIF6 LL_DMA_ClearFlag_TC6
Kojto	136:ef9c61f8c49f	1752	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1753	* @retval None
Kojto	136:ef9c61f8c49f	1754	*/
Kojto	136:ef9c61f8c49f	1755	__STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1756	{
Kojto	136:ef9c61f8c49f	1757	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF6);
Kojto	136:ef9c61f8c49f	1758	}
Kojto	136:ef9c61f8c49f	1759	#endif
Kojto	136:ef9c61f8c49f	1760
Kojto	136:ef9c61f8c49f	1761	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	1762	/**
Kojto	136:ef9c61f8c49f	1763	* @brief Clear Channel 7 transfer complete flag.
Kojto	136:ef9c61f8c49f	1764	* @rmtoll IFCR CTCIF7 LL_DMA_ClearFlag_TC7
Kojto	136:ef9c61f8c49f	1765	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1766	* @retval None
Kojto	136:ef9c61f8c49f	1767	*/
Kojto	136:ef9c61f8c49f	1768	__STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1769	{
Kojto	136:ef9c61f8c49f	1770	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF7);
Kojto	136:ef9c61f8c49f	1771	}
Kojto	136:ef9c61f8c49f	1772	#endif
Kojto	136:ef9c61f8c49f	1773
Kojto	136:ef9c61f8c49f	1774	/**
Kojto	136:ef9c61f8c49f	1775	* @brief Clear Channel 1 half transfer flag.
Kojto	136:ef9c61f8c49f	1776	* @rmtoll IFCR CHTIF1 LL_DMA_ClearFlag_HT1
Kojto	136:ef9c61f8c49f	1777	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1778	* @retval None
Kojto	136:ef9c61f8c49f	1779	*/
Kojto	136:ef9c61f8c49f	1780	__STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1781	{
Kojto	136:ef9c61f8c49f	1782	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF1);
Kojto	136:ef9c61f8c49f	1783	}
Kojto	136:ef9c61f8c49f	1784
Kojto	136:ef9c61f8c49f	1785	/**
Kojto	136:ef9c61f8c49f	1786	* @brief Clear Channel 2 half transfer flag.
Kojto	136:ef9c61f8c49f	1787	* @rmtoll IFCR CHTIF2 LL_DMA_ClearFlag_HT2
Kojto	136:ef9c61f8c49f	1788	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1789	* @retval None
Kojto	136:ef9c61f8c49f	1790	*/
Kojto	136:ef9c61f8c49f	1791	__STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1792	{
Kojto	136:ef9c61f8c49f	1793	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF2);
Kojto	136:ef9c61f8c49f	1794	}
Kojto	136:ef9c61f8c49f	1795
Kojto	136:ef9c61f8c49f	1796	/**
Kojto	136:ef9c61f8c49f	1797	* @brief Clear Channel 3 half transfer flag.
Kojto	136:ef9c61f8c49f	1798	* @rmtoll IFCR CHTIF3 LL_DMA_ClearFlag_HT3
Kojto	136:ef9c61f8c49f	1799	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1800	* @retval None
Kojto	136:ef9c61f8c49f	1801	*/
Kojto	136:ef9c61f8c49f	1802	__STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1803	{
Kojto	136:ef9c61f8c49f	1804	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF3);
Kojto	136:ef9c61f8c49f	1805	}
Kojto	136:ef9c61f8c49f	1806
Kojto	136:ef9c61f8c49f	1807	/**
Kojto	136:ef9c61f8c49f	1808	* @brief Clear Channel 4 half transfer flag.
Kojto	136:ef9c61f8c49f	1809	* @rmtoll IFCR CHTIF4 LL_DMA_ClearFlag_HT4
Kojto	136:ef9c61f8c49f	1810	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1811	* @retval None
Kojto	136:ef9c61f8c49f	1812	*/
Kojto	136:ef9c61f8c49f	1813	__STATIC_INLINE void LL_DMA_ClearFlag_HT4(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1814	{
Kojto	136:ef9c61f8c49f	1815	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF4);
Kojto	136:ef9c61f8c49f	1816	}
Kojto	136:ef9c61f8c49f	1817
Kojto	136:ef9c61f8c49f	1818	/**
Kojto	136:ef9c61f8c49f	1819	* @brief Clear Channel 5 half transfer flag.
Kojto	136:ef9c61f8c49f	1820	* @rmtoll IFCR CHTIF5 LL_DMA_ClearFlag_HT5
Kojto	136:ef9c61f8c49f	1821	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1822	* @retval None
Kojto	136:ef9c61f8c49f	1823	*/
Kojto	136:ef9c61f8c49f	1824	__STATIC_INLINE void LL_DMA_ClearFlag_HT5(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1825	{
Kojto	136:ef9c61f8c49f	1826	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF5);
Kojto	136:ef9c61f8c49f	1827	}
Kojto	136:ef9c61f8c49f	1828
Kojto	136:ef9c61f8c49f	1829	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	1830	/**
Kojto	136:ef9c61f8c49f	1831	* @brief Clear Channel 6 half transfer flag.
Kojto	136:ef9c61f8c49f	1832	* @rmtoll IFCR CHTIF6 LL_DMA_ClearFlag_HT6
Kojto	136:ef9c61f8c49f	1833	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1834	* @retval None
Kojto	136:ef9c61f8c49f	1835	*/
Kojto	136:ef9c61f8c49f	1836	__STATIC_INLINE void LL_DMA_ClearFlag_HT6(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1837	{
Kojto	136:ef9c61f8c49f	1838	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF6);
Kojto	136:ef9c61f8c49f	1839	}
Kojto	136:ef9c61f8c49f	1840	#endif
Kojto	136:ef9c61f8c49f	1841
Kojto	136:ef9c61f8c49f	1842	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	1843	/**
Kojto	136:ef9c61f8c49f	1844	* @brief Clear Channel 7 half transfer flag.
Kojto	136:ef9c61f8c49f	1845	* @rmtoll IFCR CHTIF7 LL_DMA_ClearFlag_HT7
Kojto	136:ef9c61f8c49f	1846	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1847	* @retval None
Kojto	136:ef9c61f8c49f	1848	*/
Kojto	136:ef9c61f8c49f	1849	__STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1850	{
Kojto	136:ef9c61f8c49f	1851	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF7);
Kojto	136:ef9c61f8c49f	1852	}
Kojto	136:ef9c61f8c49f	1853	#endif
Kojto	136:ef9c61f8c49f	1854
Kojto	136:ef9c61f8c49f	1855	/**
Kojto	136:ef9c61f8c49f	1856	* @brief Clear Channel 1 transfer error flag.
Kojto	136:ef9c61f8c49f	1857	* @rmtoll IFCR CTEIF1 LL_DMA_ClearFlag_TE1
Kojto	136:ef9c61f8c49f	1858	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1859	* @retval None
Kojto	136:ef9c61f8c49f	1860	*/
Kojto	136:ef9c61f8c49f	1861	__STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1862	{
Kojto	136:ef9c61f8c49f	1863	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF1);
Kojto	136:ef9c61f8c49f	1864	}
Kojto	136:ef9c61f8c49f	1865
Kojto	136:ef9c61f8c49f	1866	/**
Kojto	136:ef9c61f8c49f	1867	* @brief Clear Channel 2 transfer error flag.
Kojto	136:ef9c61f8c49f	1868	* @rmtoll IFCR CTEIF2 LL_DMA_ClearFlag_TE2
Kojto	136:ef9c61f8c49f	1869	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1870	* @retval None
Kojto	136:ef9c61f8c49f	1871	*/
Kojto	136:ef9c61f8c49f	1872	__STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1873	{
Kojto	136:ef9c61f8c49f	1874	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF2);
Kojto	136:ef9c61f8c49f	1875	}
Kojto	136:ef9c61f8c49f	1876
Kojto	136:ef9c61f8c49f	1877	/**
Kojto	136:ef9c61f8c49f	1878	* @brief Clear Channel 3 transfer error flag.
Kojto	136:ef9c61f8c49f	1879	* @rmtoll IFCR CTEIF3 LL_DMA_ClearFlag_TE3
Kojto	136:ef9c61f8c49f	1880	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1881	* @retval None
Kojto	136:ef9c61f8c49f	1882	*/
Kojto	136:ef9c61f8c49f	1883	__STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1884	{
Kojto	136:ef9c61f8c49f	1885	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF3);
Kojto	136:ef9c61f8c49f	1886	}
Kojto	136:ef9c61f8c49f	1887
Kojto	136:ef9c61f8c49f	1888	/**
Kojto	136:ef9c61f8c49f	1889	* @brief Clear Channel 4 transfer error flag.
Kojto	136:ef9c61f8c49f	1890	* @rmtoll IFCR CTEIF4 LL_DMA_ClearFlag_TE4
Kojto	136:ef9c61f8c49f	1891	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1892	* @retval None
Kojto	136:ef9c61f8c49f	1893	*/
Kojto	136:ef9c61f8c49f	1894	__STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1895	{
Kojto	136:ef9c61f8c49f	1896	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF4);
Kojto	136:ef9c61f8c49f	1897	}
Kojto	136:ef9c61f8c49f	1898
Kojto	136:ef9c61f8c49f	1899	/**
Kojto	136:ef9c61f8c49f	1900	* @brief Clear Channel 5 transfer error flag.
Kojto	136:ef9c61f8c49f	1901	* @rmtoll IFCR CTEIF5 LL_DMA_ClearFlag_TE5
Kojto	136:ef9c61f8c49f	1902	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1903	* @retval None
Kojto	136:ef9c61f8c49f	1904	*/
Kojto	136:ef9c61f8c49f	1905	__STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1906	{
Kojto	136:ef9c61f8c49f	1907	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF5);
Kojto	136:ef9c61f8c49f	1908	}
Kojto	136:ef9c61f8c49f	1909
Kojto	136:ef9c61f8c49f	1910	#if defined(DMA1_Channel6)
Kojto	136:ef9c61f8c49f	1911	/**
Kojto	136:ef9c61f8c49f	1912	* @brief Clear Channel 6 transfer error flag.
Kojto	136:ef9c61f8c49f	1913	* @rmtoll IFCR CTEIF6 LL_DMA_ClearFlag_TE6
Kojto	136:ef9c61f8c49f	1914	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1915	* @retval None
Kojto	136:ef9c61f8c49f	1916	*/
Kojto	136:ef9c61f8c49f	1917	__STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1918	{
Kojto	136:ef9c61f8c49f	1919	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF6);
Kojto	136:ef9c61f8c49f	1920	}
Kojto	136:ef9c61f8c49f	1921	#endif
Kojto	136:ef9c61f8c49f	1922
Kojto	136:ef9c61f8c49f	1923	#if defined(DMA1_Channel7)
Kojto	136:ef9c61f8c49f	1924	/**
Kojto	136:ef9c61f8c49f	1925	* @brief Clear Channel 7 transfer error flag.
Kojto	136:ef9c61f8c49f	1926	* @rmtoll IFCR CTEIF7 LL_DMA_ClearFlag_TE7
Kojto	136:ef9c61f8c49f	1927	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1928	* @retval None
Kojto	136:ef9c61f8c49f	1929	*/
Kojto	136:ef9c61f8c49f	1930	__STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
Kojto	136:ef9c61f8c49f	1931	{
Kojto	136:ef9c61f8c49f	1932	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF7);
Kojto	136:ef9c61f8c49f	1933	}
Kojto	136:ef9c61f8c49f	1934	#endif
Kojto	136:ef9c61f8c49f	1935
Kojto	136:ef9c61f8c49f	1936	/**
Kojto	136:ef9c61f8c49f	1937	* @}
Kojto	136:ef9c61f8c49f	1938	*/
Kojto	136:ef9c61f8c49f	1939
Kojto	136:ef9c61f8c49f	1940	/** @defgroup DMA_LL_EF_IT_Management IT_Management
Kojto	136:ef9c61f8c49f	1941	* @{
Kojto	136:ef9c61f8c49f	1942	*/
Kojto	136:ef9c61f8c49f	1943	/**
Kojto	136:ef9c61f8c49f	1944	* @brief Enable Transfer complete interrupt.
Kojto	136:ef9c61f8c49f	1945	* @rmtoll CCR TCIE LL_DMA_EnableIT_TC
Kojto	136:ef9c61f8c49f	1946	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1947	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1948	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1949	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1950	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1951	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1952	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1953	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1954	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1955	* @retval None
Kojto	136:ef9c61f8c49f	1956	*/
Kojto	136:ef9c61f8c49f	1957	__STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1958	{
Kojto	136:ef9c61f8c49f	1959	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE);
Kojto	136:ef9c61f8c49f	1960	}
Kojto	136:ef9c61f8c49f	1961
Kojto	136:ef9c61f8c49f	1962	/**
Kojto	136:ef9c61f8c49f	1963	* @brief Enable Half transfer interrupt.
Kojto	136:ef9c61f8c49f	1964	* @rmtoll CCR HTIE LL_DMA_EnableIT_HT
Kojto	136:ef9c61f8c49f	1965	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1966	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1967	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1968	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1969	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1970	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1971	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1972	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1973	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1974	* @retval None
Kojto	136:ef9c61f8c49f	1975	*/
Kojto	136:ef9c61f8c49f	1976	__STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1977	{
Kojto	136:ef9c61f8c49f	1978	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE);
Kojto	136:ef9c61f8c49f	1979	}
Kojto	136:ef9c61f8c49f	1980
Kojto	136:ef9c61f8c49f	1981	/**
Kojto	136:ef9c61f8c49f	1982	* @brief Enable Transfer error interrupt.
Kojto	136:ef9c61f8c49f	1983	* @rmtoll CCR TEIE LL_DMA_EnableIT_TE
Kojto	136:ef9c61f8c49f	1984	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	1985	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1986	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	1987	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	1988	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	1989	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	1990	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	1991	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	1992	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	1993	* @retval None
Kojto	136:ef9c61f8c49f	1994	*/
Kojto	136:ef9c61f8c49f	1995	__STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1996	{
Kojto	136:ef9c61f8c49f	1997	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TEIE);
Kojto	136:ef9c61f8c49f	1998	}
Kojto	136:ef9c61f8c49f	1999
Kojto	136:ef9c61f8c49f	2000	/**
Kojto	136:ef9c61f8c49f	2001	* @brief Disable Transfer complete interrupt.
Kojto	136:ef9c61f8c49f	2002	* @rmtoll CCR TCIE LL_DMA_DisableIT_TC
Kojto	136:ef9c61f8c49f	2003	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	2004	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2005	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	2006	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	2007	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	2008	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	2009	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	2010	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	2011	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	2012	* @retval None
Kojto	136:ef9c61f8c49f	2013	*/
Kojto	136:ef9c61f8c49f	2014	__STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	2015	{
Kojto	136:ef9c61f8c49f	2016	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE);
Kojto	136:ef9c61f8c49f	2017	}
Kojto	136:ef9c61f8c49f	2018
Kojto	136:ef9c61f8c49f	2019	/**
Kojto	136:ef9c61f8c49f	2020	* @brief Disable Half transfer interrupt.
Kojto	136:ef9c61f8c49f	2021	* @rmtoll CCR HTIE LL_DMA_DisableIT_HT
Kojto	136:ef9c61f8c49f	2022	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	2023	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2024	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	2025	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	2026	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	2027	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	2028	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	2029	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	2030	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	2031	* @retval None
Kojto	136:ef9c61f8c49f	2032	*/
Kojto	136:ef9c61f8c49f	2033	__STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	2034	{
Kojto	136:ef9c61f8c49f	2035	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE);
Kojto	136:ef9c61f8c49f	2036	}
Kojto	136:ef9c61f8c49f	2037
Kojto	136:ef9c61f8c49f	2038	/**
Kojto	136:ef9c61f8c49f	2039	* @brief Disable Transfer error interrupt.
Kojto	136:ef9c61f8c49f	2040	* @rmtoll CCR TEIE LL_DMA_DisableIT_TE
Kojto	136:ef9c61f8c49f	2041	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	2042	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2043	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	2044	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	2045	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	2046	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	2047	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	2048	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	2049	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	2050	* @retval None
Kojto	136:ef9c61f8c49f	2051	*/
Kojto	136:ef9c61f8c49f	2052	__STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	2053	{
Kojto	136:ef9c61f8c49f	2054	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TEIE);
Kojto	136:ef9c61f8c49f	2055	}
Kojto	136:ef9c61f8c49f	2056
Kojto	136:ef9c61f8c49f	2057	/**
Kojto	136:ef9c61f8c49f	2058	* @brief Check if Transfer complete Interrupt is enabled.
Kojto	136:ef9c61f8c49f	2059	* @rmtoll CCR TCIE LL_DMA_IsEnabledIT_TC
Kojto	136:ef9c61f8c49f	2060	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	2061	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2062	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	2063	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	2064	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	2065	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	2066	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	2067	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	2068	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	2069	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2070	*/
Kojto	136:ef9c61f8c49f	2071	__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	2072	{
Kojto	136:ef9c61f8c49f	2073	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	2074	DMA_CCR_TCIE) == (DMA_CCR_TCIE));
Kojto	136:ef9c61f8c49f	2075	}
Kojto	136:ef9c61f8c49f	2076
Kojto	136:ef9c61f8c49f	2077	/**
Kojto	136:ef9c61f8c49f	2078	* @brief Check if Half transfer Interrupt is enabled.
Kojto	136:ef9c61f8c49f	2079	* @rmtoll CCR HTIE LL_DMA_IsEnabledIT_HT
Kojto	136:ef9c61f8c49f	2080	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	2081	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2082	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	2083	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	2084	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	2085	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	2086	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	2087	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	2088	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	2089	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2090	*/
Kojto	136:ef9c61f8c49f	2091	__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	2092	{
Kojto	136:ef9c61f8c49f	2093	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	2094	DMA_CCR_HTIE) == (DMA_CCR_HTIE));
Kojto	136:ef9c61f8c49f	2095	}
Kojto	136:ef9c61f8c49f	2096
Kojto	136:ef9c61f8c49f	2097	/**
Kojto	136:ef9c61f8c49f	2098	* @brief Check if Transfer error Interrupt is enabled.
Kojto	136:ef9c61f8c49f	2099	* @rmtoll CCR TEIE LL_DMA_IsEnabledIT_TE
Kojto	136:ef9c61f8c49f	2100	* @param DMAx DMAx Instance
Kojto	136:ef9c61f8c49f	2101	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2102	* @arg @ref LL_DMA_CHANNEL_1
Kojto	136:ef9c61f8c49f	2103	* @arg @ref LL_DMA_CHANNEL_2
Kojto	136:ef9c61f8c49f	2104	* @arg @ref LL_DMA_CHANNEL_3
Kojto	136:ef9c61f8c49f	2105	* @arg @ref LL_DMA_CHANNEL_4
Kojto	136:ef9c61f8c49f	2106	* @arg @ref LL_DMA_CHANNEL_5
Kojto	136:ef9c61f8c49f	2107	* @arg @ref LL_DMA_CHANNEL_6
Kojto	136:ef9c61f8c49f	2108	* @arg @ref LL_DMA_CHANNEL_7
Kojto	136:ef9c61f8c49f	2109	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2110	*/
Kojto	136:ef9c61f8c49f	2111	__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	2112	{
Kojto	136:ef9c61f8c49f	2113	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	136:ef9c61f8c49f	2114	DMA_CCR_TEIE) == (DMA_CCR_TEIE));
Kojto	136:ef9c61f8c49f	2115	}
Kojto	136:ef9c61f8c49f	2116
Kojto	136:ef9c61f8c49f	2117	/**
Kojto	136:ef9c61f8c49f	2118	* @}
Kojto	136:ef9c61f8c49f	2119	*/
Kojto	136:ef9c61f8c49f	2120
Kojto	136:ef9c61f8c49f	2121	#if defined(USE_FULL_LL_DRIVER)
Kojto	136:ef9c61f8c49f	2122	/** @defgroup DMA_LL_EF_Init Initialization and de-initialization functions
Kojto	136:ef9c61f8c49f	2123	* @{
Kojto	136:ef9c61f8c49f	2124	*/
Kojto	136:ef9c61f8c49f	2125
Kojto	136:ef9c61f8c49f	2126	uint32_t LL_DMA_Init(DMA_TypeDef DMAx, uint32_t Channel, LL_DMA_InitTypeDef DMA_InitStruct);
Kojto	136:ef9c61f8c49f	2127	uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel);
Kojto	136:ef9c61f8c49f	2128	void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct);
Kojto	136:ef9c61f8c49f	2129
Kojto	136:ef9c61f8c49f	2130	/**
Kojto	136:ef9c61f8c49f	2131	* @}
Kojto	136:ef9c61f8c49f	2132	*/
Kojto	136:ef9c61f8c49f	2133	#endif /* USE_FULL_LL_DRIVER */
Kojto	136:ef9c61f8c49f	2134
Kojto	136:ef9c61f8c49f	2135	/**
Kojto	136:ef9c61f8c49f	2136	* @}
Kojto	136:ef9c61f8c49f	2137	*/
Kojto	136:ef9c61f8c49f	2138
Kojto	136:ef9c61f8c49f	2139	/**
Kojto	136:ef9c61f8c49f	2140	* @}
Kojto	136:ef9c61f8c49f	2141	*/
Kojto	136:ef9c61f8c49f	2142
Kojto	136:ef9c61f8c49f	2143	#endif /* DMA1 */
Kojto	136:ef9c61f8c49f	2144
Kojto	136:ef9c61f8c49f	2145	/**
Kojto	136:ef9c61f8c49f	2146	* @}
Kojto	136:ef9c61f8c49f	2147	*/
Kojto	136:ef9c61f8c49f	2148
Kojto	136:ef9c61f8c49f	2149	#ifdef __cplusplus
Kojto	136:ef9c61f8c49f	2150	}
Kojto	136:ef9c61f8c49f	2151	#endif
Kojto	136:ef9c61f8c49f	2152
Kojto	136:ef9c61f8c49f	2153	#endif /* __STM32L0xx_LL_DMA_H */
Kojto	136:ef9c61f8c49f	2154
Kojto	136:ef9c61f8c49f	2155	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/