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TARGET_NUCLEO_F767ZI/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.h@136:ef9c61f8c49f, 2017-02-14 (annotated)
- Committer:
- Kojto
- Date:
- Tue Feb 14 11:24:20 2017 +0000
- Revision:
- 136:ef9c61f8c49f
- Parent:
- 135:176b8275d35d
- Child:
- 139:856d2700e60b
Release 136 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432
3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181
3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626
3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628
3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629
3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632
3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642
3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664
3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655
3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657
3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658
3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685
3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692
3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621
3649: [STM32F7] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3649
3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695
3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 126:abea610beb85 | 1 | /** |
| AnnaBridge | 126:abea610beb85 | 2 | ****************************************************************************** |
| AnnaBridge | 126:abea610beb85 | 3 | * @file stm32f7xx_hal_tim_ex.h |
| AnnaBridge | 126:abea610beb85 | 4 | * @author MCD Application Team |
| <> | 135:176b8275d35d | 5 | * @version V1.1.2 |
| <> | 135:176b8275d35d | 6 | * @date 23-September-2016 |
| AnnaBridge | 126:abea610beb85 | 7 | * @brief Header file of TIM HAL Extension module. |
| AnnaBridge | 126:abea610beb85 | 8 | ****************************************************************************** |
| AnnaBridge | 126:abea610beb85 | 9 | * @attention |
| AnnaBridge | 126:abea610beb85 | 10 | * |
| AnnaBridge | 126:abea610beb85 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 126:abea610beb85 | 12 | * |
| AnnaBridge | 126:abea610beb85 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 126:abea610beb85 | 14 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 126:abea610beb85 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 126:abea610beb85 | 16 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 126:abea610beb85 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 126:abea610beb85 | 18 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 126:abea610beb85 | 19 | * and/or other materials provided with the distribution. |
| AnnaBridge | 126:abea610beb85 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 126:abea610beb85 | 21 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 126:abea610beb85 | 22 | * without specific prior written permission. |
| AnnaBridge | 126:abea610beb85 | 23 | * |
| AnnaBridge | 126:abea610beb85 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 126:abea610beb85 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 126:abea610beb85 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 126:abea610beb85 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 126:abea610beb85 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 126:abea610beb85 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 126:abea610beb85 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 126:abea610beb85 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 126:abea610beb85 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 126:abea610beb85 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 126:abea610beb85 | 34 | * |
| AnnaBridge | 126:abea610beb85 | 35 | ****************************************************************************** |
| AnnaBridge | 126:abea610beb85 | 36 | */ |
| AnnaBridge | 126:abea610beb85 | 37 | |
| AnnaBridge | 126:abea610beb85 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 39 | #ifndef __STM32F7xx_HAL_TIM_EX_H |
| AnnaBridge | 126:abea610beb85 | 40 | #define __STM32F7xx_HAL_TIM_EX_H |
| AnnaBridge | 126:abea610beb85 | 41 | |
| AnnaBridge | 126:abea610beb85 | 42 | #ifdef __cplusplus |
| AnnaBridge | 126:abea610beb85 | 43 | extern "C" { |
| AnnaBridge | 126:abea610beb85 | 44 | #endif |
| AnnaBridge | 126:abea610beb85 | 45 | |
| AnnaBridge | 126:abea610beb85 | 46 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 47 | #include "stm32f7xx_hal_def.h" |
| AnnaBridge | 126:abea610beb85 | 48 | |
| AnnaBridge | 126:abea610beb85 | 49 | /** @addtogroup STM32F7xx_HAL_Driver |
| AnnaBridge | 126:abea610beb85 | 50 | * @{ |
| AnnaBridge | 126:abea610beb85 | 51 | */ |
| AnnaBridge | 126:abea610beb85 | 52 | |
| AnnaBridge | 126:abea610beb85 | 53 | /** @addtogroup TIMEx |
| AnnaBridge | 126:abea610beb85 | 54 | * @{ |
| AnnaBridge | 126:abea610beb85 | 55 | */ |
| AnnaBridge | 126:abea610beb85 | 56 | |
| AnnaBridge | 126:abea610beb85 | 57 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 58 | /** @defgroup TIMEx_Exported_Types TIM Exported Types |
| AnnaBridge | 126:abea610beb85 | 59 | * @{ |
| AnnaBridge | 126:abea610beb85 | 60 | */ |
| AnnaBridge | 126:abea610beb85 | 61 | |
| AnnaBridge | 126:abea610beb85 | 62 | /** |
| AnnaBridge | 126:abea610beb85 | 63 | * @brief TIM Hall sensor Configuration Structure definition |
| AnnaBridge | 126:abea610beb85 | 64 | */ |
| AnnaBridge | 126:abea610beb85 | 65 | |
| AnnaBridge | 126:abea610beb85 | 66 | typedef struct |
| AnnaBridge | 126:abea610beb85 | 67 | { |
| AnnaBridge | 126:abea610beb85 | 68 | |
| AnnaBridge | 126:abea610beb85 | 69 | uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. |
| AnnaBridge | 126:abea610beb85 | 70 | This parameter can be a value of @ref TIM_Input_Capture_Polarity */ |
| AnnaBridge | 126:abea610beb85 | 71 | |
| AnnaBridge | 126:abea610beb85 | 72 | uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. |
| AnnaBridge | 126:abea610beb85 | 73 | This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ |
| AnnaBridge | 126:abea610beb85 | 74 | |
| AnnaBridge | 126:abea610beb85 | 75 | uint32_t IC1Filter; /*!< Specifies the input capture filter. |
| AnnaBridge | 126:abea610beb85 | 76 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ |
| AnnaBridge | 126:abea610beb85 | 77 | uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. |
| AnnaBridge | 126:abea610beb85 | 78 | This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ |
| AnnaBridge | 126:abea610beb85 | 79 | } TIM_HallSensor_InitTypeDef; |
| AnnaBridge | 126:abea610beb85 | 80 | |
| AnnaBridge | 126:abea610beb85 | 81 | /** |
| AnnaBridge | 126:abea610beb85 | 82 | * @brief TIM Master configuration Structure definition |
| AnnaBridge | 126:abea610beb85 | 83 | */ |
| AnnaBridge | 126:abea610beb85 | 84 | typedef struct { |
| AnnaBridge | 126:abea610beb85 | 85 | uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection. |
| AnnaBridge | 126:abea610beb85 | 86 | This parameter can be a value of @ref TIM_Master_Mode_Selection */ |
| AnnaBridge | 126:abea610beb85 | 87 | uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection |
| AnnaBridge | 126:abea610beb85 | 88 | This parameter can be a value of @ref TIMEx_Master_Mode_Selection_2 */ |
| AnnaBridge | 126:abea610beb85 | 89 | uint32_t MasterSlaveMode; /*!< Master/slave mode selection. |
| AnnaBridge | 126:abea610beb85 | 90 | This parameter can be a value of @ref TIM_Master_Slave_Mode */ |
| AnnaBridge | 126:abea610beb85 | 91 | }TIM_MasterConfigTypeDef; |
| AnnaBridge | 126:abea610beb85 | 92 | |
| AnnaBridge | 126:abea610beb85 | 93 | /** |
| AnnaBridge | 126:abea610beb85 | 94 | * @brief TIM Break input(s) and Dead time configuration Structure definition |
| AnnaBridge | 126:abea610beb85 | 95 | * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable |
| AnnaBridge | 126:abea610beb85 | 96 | * filter and polarity. |
| AnnaBridge | 126:abea610beb85 | 97 | */ |
| AnnaBridge | 126:abea610beb85 | 98 | typedef struct |
| AnnaBridge | 126:abea610beb85 | 99 | { |
| AnnaBridge | 126:abea610beb85 | 100 | uint32_t OffStateRunMode; /*!< TIM off state in run mode. |
| AnnaBridge | 126:abea610beb85 | 101 | This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ |
| AnnaBridge | 126:abea610beb85 | 102 | uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode. |
| AnnaBridge | 126:abea610beb85 | 103 | This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ |
| AnnaBridge | 126:abea610beb85 | 104 | uint32_t LockLevel; /*!< TIM Lock level. |
| AnnaBridge | 126:abea610beb85 | 105 | This parameter can be a value of @ref TIM_Lock_level */ |
| AnnaBridge | 126:abea610beb85 | 106 | uint32_t DeadTime; /*!< TIM dead Time. |
| AnnaBridge | 126:abea610beb85 | 107 | This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
| AnnaBridge | 126:abea610beb85 | 108 | uint32_t BreakState; /*!< TIM Break State. |
| AnnaBridge | 126:abea610beb85 | 109 | This parameter can be a value of @ref TIM_Break_Input_enable_disable */ |
| AnnaBridge | 126:abea610beb85 | 110 | uint32_t BreakPolarity; /*!< TIM Break input polarity. |
| AnnaBridge | 126:abea610beb85 | 111 | This parameter can be a value of @ref TIM_Break_Polarity */ |
| AnnaBridge | 126:abea610beb85 | 112 | uint32_t BreakFilter; /*!< Specifies the break input filter. |
| AnnaBridge | 126:abea610beb85 | 113 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ |
| AnnaBridge | 126:abea610beb85 | 114 | uint32_t Break2State; /*!< TIM Break2 State |
| AnnaBridge | 126:abea610beb85 | 115 | This parameter can be a value of @ref TIMEx_Break2_Input_enable_disable */ |
| AnnaBridge | 126:abea610beb85 | 116 | uint32_t Break2Polarity; /*!< TIM Break2 input polarity |
| AnnaBridge | 126:abea610beb85 | 117 | This parameter can be a value of @ref TIMEx_Break2_Polarity */ |
| AnnaBridge | 126:abea610beb85 | 118 | uint32_t Break2Filter; /*!< TIM break2 input filter. |
| AnnaBridge | 126:abea610beb85 | 119 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ |
| AnnaBridge | 126:abea610beb85 | 120 | uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state |
| AnnaBridge | 126:abea610beb85 | 121 | This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ |
| AnnaBridge | 126:abea610beb85 | 122 | } TIM_BreakDeadTimeConfigTypeDef; |
| AnnaBridge | 126:abea610beb85 | 123 | |
| AnnaBridge | 126:abea610beb85 | 124 | #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx) |
| AnnaBridge | 126:abea610beb85 | 125 | /** |
| AnnaBridge | 126:abea610beb85 | 126 | * @brief TIM Break/Break2 input configuration |
| AnnaBridge | 126:abea610beb85 | 127 | */ |
| AnnaBridge | 126:abea610beb85 | 128 | typedef struct { |
| AnnaBridge | 126:abea610beb85 | 129 | uint32_t Source; /*!< Specifies the source of the timer break input. |
| AnnaBridge | 126:abea610beb85 | 130 | This parameter can be a value of @ref TIMEx_Break_Input_Source */ |
| AnnaBridge | 126:abea610beb85 | 131 | uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. |
| AnnaBridge | 126:abea610beb85 | 132 | This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ |
| AnnaBridge | 126:abea610beb85 | 133 | } TIMEx_BreakInputConfigTypeDef; |
| AnnaBridge | 126:abea610beb85 | 134 | #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */ |
| AnnaBridge | 126:abea610beb85 | 135 | /** |
| AnnaBridge | 126:abea610beb85 | 136 | * @} |
| AnnaBridge | 126:abea610beb85 | 137 | */ |
| AnnaBridge | 126:abea610beb85 | 138 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 139 | /** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants |
| AnnaBridge | 126:abea610beb85 | 140 | * @{ |
| AnnaBridge | 126:abea610beb85 | 141 | */ |
| AnnaBridge | 126:abea610beb85 | 142 | |
| AnnaBridge | 126:abea610beb85 | 143 | /** @defgroup TIMEx_Channel TIMEx Channel |
| AnnaBridge | 126:abea610beb85 | 144 | * @{ |
| AnnaBridge | 126:abea610beb85 | 145 | */ |
| AnnaBridge | 126:abea610beb85 | 146 | |
| AnnaBridge | 126:abea610beb85 | 147 | #define TIM_CHANNEL_1 ((uint32_t)0x0000U) |
| AnnaBridge | 126:abea610beb85 | 148 | #define TIM_CHANNEL_2 ((uint32_t)0x0004U) |
| AnnaBridge | 126:abea610beb85 | 149 | #define TIM_CHANNEL_3 ((uint32_t)0x0008U) |
| AnnaBridge | 126:abea610beb85 | 150 | #define TIM_CHANNEL_4 ((uint32_t)0x000CU) |
| AnnaBridge | 126:abea610beb85 | 151 | #define TIM_CHANNEL_5 ((uint32_t)0x0010U) |
| AnnaBridge | 126:abea610beb85 | 152 | #define TIM_CHANNEL_6 ((uint32_t)0x0014U) |
| AnnaBridge | 126:abea610beb85 | 153 | #define TIM_CHANNEL_ALL ((uint32_t)0x003CU) |
| AnnaBridge | 126:abea610beb85 | 154 | |
| AnnaBridge | 126:abea610beb85 | 155 | /** |
| AnnaBridge | 126:abea610beb85 | 156 | * @} |
| AnnaBridge | 126:abea610beb85 | 157 | */ |
| AnnaBridge | 126:abea610beb85 | 158 | |
| AnnaBridge | 126:abea610beb85 | 159 | /** @defgroup TIMEx_Output_Compare_and_PWM_modes TIMEx Output Compare and PWM Modes |
| AnnaBridge | 126:abea610beb85 | 160 | * @{ |
| AnnaBridge | 126:abea610beb85 | 161 | */ |
| AnnaBridge | 126:abea610beb85 | 162 | #define TIM_OCMODE_TIMING ((uint32_t)0x0000U) |
| AnnaBridge | 126:abea610beb85 | 163 | #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0) |
| AnnaBridge | 126:abea610beb85 | 164 | #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1) |
| AnnaBridge | 126:abea610beb85 | 165 | #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
| AnnaBridge | 126:abea610beb85 | 166 | #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) |
| AnnaBridge | 126:abea610beb85 | 167 | #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
| AnnaBridge | 126:abea610beb85 | 168 | #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) |
| AnnaBridge | 126:abea610beb85 | 169 | #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2) |
| AnnaBridge | 126:abea610beb85 | 170 | |
| AnnaBridge | 126:abea610beb85 | 171 | #define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3) |
| AnnaBridge | 126:abea610beb85 | 172 | #define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0) |
| AnnaBridge | 126:abea610beb85 | 173 | #define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2) |
| AnnaBridge | 126:abea610beb85 | 174 | #define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2) |
| AnnaBridge | 126:abea610beb85 | 175 | #define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) |
| AnnaBridge | 126:abea610beb85 | 176 | #define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M) |
| AnnaBridge | 126:abea610beb85 | 177 | /** |
| AnnaBridge | 126:abea610beb85 | 178 | * @} |
| AnnaBridge | 126:abea610beb85 | 179 | */ |
| AnnaBridge | 126:abea610beb85 | 180 | |
| AnnaBridge | 126:abea610beb85 | 181 | /** @defgroup TIMEx_Remap TIMEx Remap |
| AnnaBridge | 126:abea610beb85 | 182 | * @{ |
| AnnaBridge | 126:abea610beb85 | 183 | */ |
| AnnaBridge | 126:abea610beb85 | 184 | #define TIM_TIM2_TIM8_TRGO (0x00000000U) |
| AnnaBridge | 126:abea610beb85 | 185 | #define TIM_TIM2_ETH_PTP (0x00000400U) |
| AnnaBridge | 126:abea610beb85 | 186 | #define TIM_TIM2_USBFS_SOF (0x00000800U) |
| AnnaBridge | 126:abea610beb85 | 187 | #define TIM_TIM2_USBHS_SOF (0x00000C00U) |
| AnnaBridge | 126:abea610beb85 | 188 | #define TIM_TIM5_GPIO (0x00000000U) |
| AnnaBridge | 126:abea610beb85 | 189 | #define TIM_TIM5_LSI (0x00000040U) |
| AnnaBridge | 126:abea610beb85 | 190 | #define TIM_TIM5_LSE (0x00000080U) |
| AnnaBridge | 126:abea610beb85 | 191 | #define TIM_TIM5_RTC (0x000000C0U) |
| AnnaBridge | 126:abea610beb85 | 192 | #define TIM_TIM11_GPIO (0x00000000U) |
| AnnaBridge | 126:abea610beb85 | 193 | #define TIM_TIM11_SPDIFRX (0x00000001U) |
| AnnaBridge | 126:abea610beb85 | 194 | #define TIM_TIM11_HSE (0x00000002U) |
| AnnaBridge | 126:abea610beb85 | 195 | #define TIM_TIM11_MCO1 (0x00000003U) |
| AnnaBridge | 126:abea610beb85 | 196 | /** |
| AnnaBridge | 126:abea610beb85 | 197 | * @} |
| AnnaBridge | 126:abea610beb85 | 198 | */ |
| AnnaBridge | 126:abea610beb85 | 199 | |
| AnnaBridge | 126:abea610beb85 | 200 | /** @defgroup TIMEx_ClearInput_Source TIMEx Clear Input Source |
| AnnaBridge | 126:abea610beb85 | 201 | * @{ |
| AnnaBridge | 126:abea610beb85 | 202 | */ |
| AnnaBridge | 126:abea610beb85 | 203 | #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001U) |
| AnnaBridge | 126:abea610beb85 | 204 | #define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002U) |
| AnnaBridge | 126:abea610beb85 | 205 | #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000U) |
| AnnaBridge | 126:abea610beb85 | 206 | /** |
| AnnaBridge | 126:abea610beb85 | 207 | * @} |
| AnnaBridge | 126:abea610beb85 | 208 | */ |
| AnnaBridge | 126:abea610beb85 | 209 | |
| AnnaBridge | 126:abea610beb85 | 210 | /** @defgroup TIMEx_Break2_Input_enable_disable TIMEx Break input 2 Enable |
| AnnaBridge | 126:abea610beb85 | 211 | * @{ |
| AnnaBridge | 126:abea610beb85 | 212 | */ |
| AnnaBridge | 126:abea610beb85 | 213 | #define TIM_BREAK2_DISABLE ((uint32_t)0x00000000U) |
| AnnaBridge | 126:abea610beb85 | 214 | #define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E) |
| AnnaBridge | 126:abea610beb85 | 215 | /** |
| AnnaBridge | 126:abea610beb85 | 216 | * @} |
| AnnaBridge | 126:abea610beb85 | 217 | */ |
| AnnaBridge | 126:abea610beb85 | 218 | |
| AnnaBridge | 126:abea610beb85 | 219 | /** @defgroup TIMEx_Break2_Polarity TIMEx Break2 Polarity |
| AnnaBridge | 126:abea610beb85 | 220 | * @{ |
| AnnaBridge | 126:abea610beb85 | 221 | */ |
| AnnaBridge | 126:abea610beb85 | 222 | #define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000U) |
| AnnaBridge | 126:abea610beb85 | 223 | #define TIM_BREAK2POLARITY_HIGH (TIM_BDTR_BK2P) |
| AnnaBridge | 126:abea610beb85 | 224 | /** |
| AnnaBridge | 126:abea610beb85 | 225 | * @} |
| AnnaBridge | 126:abea610beb85 | 226 | */ |
| AnnaBridge | 126:abea610beb85 | 227 | |
| AnnaBridge | 126:abea610beb85 | 228 | /** @defgroup TIMEx_Group_Channel5 TIMEx Group Channel 5 and Channel 1, 2 or 3 |
| AnnaBridge | 126:abea610beb85 | 229 | * @{ |
| AnnaBridge | 126:abea610beb85 | 230 | */ |
| AnnaBridge | 126:abea610beb85 | 231 | #define TIM_GROUPCH5_NONE ((uint32_t)0x00000000U) /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */ |
| AnnaBridge | 126:abea610beb85 | 232 | #define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */ |
| AnnaBridge | 126:abea610beb85 | 233 | #define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */ |
| AnnaBridge | 126:abea610beb85 | 234 | #define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */ |
| AnnaBridge | 126:abea610beb85 | 235 | /** |
| AnnaBridge | 126:abea610beb85 | 236 | * @} |
| AnnaBridge | 126:abea610beb85 | 237 | */ |
| AnnaBridge | 126:abea610beb85 | 238 | |
| AnnaBridge | 126:abea610beb85 | 239 | /** @defgroup TIMEx_Master_Mode_Selection_2 TIMEx Master Mode Selection 2 (TRGO2) |
| AnnaBridge | 126:abea610beb85 | 240 | * @{ |
| AnnaBridge | 126:abea610beb85 | 241 | */ |
| AnnaBridge | 126:abea610beb85 | 242 | #define TIM_TRGO2_RESET ((uint32_t)0x00000000U) |
| AnnaBridge | 126:abea610beb85 | 243 | #define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0)) |
| AnnaBridge | 126:abea610beb85 | 244 | #define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1)) |
| AnnaBridge | 126:abea610beb85 | 245 | #define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
| AnnaBridge | 126:abea610beb85 | 246 | #define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2)) |
| AnnaBridge | 126:abea610beb85 | 247 | #define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) |
| AnnaBridge | 126:abea610beb85 | 248 | #define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1)) |
| AnnaBridge | 126:abea610beb85 | 249 | #define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
| AnnaBridge | 126:abea610beb85 | 250 | #define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3)) |
| AnnaBridge | 126:abea610beb85 | 251 | #define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0)) |
| AnnaBridge | 126:abea610beb85 | 252 | #define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1)) |
| AnnaBridge | 126:abea610beb85 | 253 | #define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
| AnnaBridge | 126:abea610beb85 | 254 | #define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2)) |
| AnnaBridge | 126:abea610beb85 | 255 | #define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) |
| AnnaBridge | 126:abea610beb85 | 256 | #define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1)) |
| AnnaBridge | 126:abea610beb85 | 257 | #define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
| AnnaBridge | 126:abea610beb85 | 258 | /** |
| AnnaBridge | 126:abea610beb85 | 259 | * @} |
| AnnaBridge | 126:abea610beb85 | 260 | */ |
| AnnaBridge | 126:abea610beb85 | 261 | |
| AnnaBridge | 126:abea610beb85 | 262 | /** @defgroup TIMEx_Slave_Mode TIMEx Slave mode |
| AnnaBridge | 126:abea610beb85 | 263 | * @{ |
| AnnaBridge | 126:abea610beb85 | 264 | */ |
| AnnaBridge | 126:abea610beb85 | 265 | #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000U) |
| AnnaBridge | 126:abea610beb85 | 266 | #define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2)) |
| AnnaBridge | 126:abea610beb85 | 267 | #define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0)) |
| AnnaBridge | 126:abea610beb85 | 268 | #define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1)) |
| AnnaBridge | 126:abea610beb85 | 269 | #define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)) |
| AnnaBridge | 126:abea610beb85 | 270 | #define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3)) |
| AnnaBridge | 126:abea610beb85 | 271 | /** |
| AnnaBridge | 126:abea610beb85 | 272 | * @} |
| AnnaBridge | 126:abea610beb85 | 273 | */ |
| AnnaBridge | 126:abea610beb85 | 274 | #if defined(STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx) |
| AnnaBridge | 126:abea610beb85 | 275 | /** @defgroup TIMEx_Break_Input TIM Extended Break input |
| AnnaBridge | 126:abea610beb85 | 276 | * @{ |
| AnnaBridge | 126:abea610beb85 | 277 | */ |
| AnnaBridge | 126:abea610beb85 | 278 | #define TIM_BREAKINPUT_BRK ((uint32_t)0x00000001U) /* !< Timer break input */ |
| AnnaBridge | 126:abea610beb85 | 279 | #define TIM_BREAKINPUT_BRK2 ((uint32_t)0x00000002U) /* !< Timer break2 input */ |
| AnnaBridge | 126:abea610beb85 | 280 | /** |
| AnnaBridge | 126:abea610beb85 | 281 | * @} |
| AnnaBridge | 126:abea610beb85 | 282 | */ |
| AnnaBridge | 126:abea610beb85 | 283 | |
| AnnaBridge | 126:abea610beb85 | 284 | /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source |
| AnnaBridge | 126:abea610beb85 | 285 | * @{ |
| AnnaBridge | 126:abea610beb85 | 286 | */ |
| AnnaBridge | 126:abea610beb85 | 287 | #define TIM_BREAKINPUTSOURCE_BKIN ((uint32_t)0x00000001U) /* !< An external source (GPIO) is connected to the BKIN pin */ |
| AnnaBridge | 126:abea610beb85 | 288 | #define TIM_BREAKINPUTSOURCE_DFSDM1 ((uint32_t)0x00000008U) /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */ |
| AnnaBridge | 126:abea610beb85 | 289 | /** |
| AnnaBridge | 126:abea610beb85 | 290 | * @} |
| AnnaBridge | 126:abea610beb85 | 291 | */ |
| AnnaBridge | 126:abea610beb85 | 292 | |
| AnnaBridge | 126:abea610beb85 | 293 | /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling |
| AnnaBridge | 126:abea610beb85 | 294 | * @{ |
| AnnaBridge | 126:abea610beb85 | 295 | */ |
| AnnaBridge | 126:abea610beb85 | 296 | #define TIM_BREAKINPUTSOURCE_DISABLE ((uint32_t)0x00000000U) /* !< Break input source is disabled */ |
| AnnaBridge | 126:abea610beb85 | 297 | #define TIM_BREAKINPUTSOURCE_ENABLE ((uint32_t)0x00000001U) /* !< Break input source is enabled */ |
| AnnaBridge | 126:abea610beb85 | 298 | /** |
| AnnaBridge | 126:abea610beb85 | 299 | * @} |
| AnnaBridge | 126:abea610beb85 | 300 | */ |
| AnnaBridge | 126:abea610beb85 | 301 | |
| AnnaBridge | 126:abea610beb85 | 302 | /** |
| AnnaBridge | 126:abea610beb85 | 303 | * @} |
| AnnaBridge | 126:abea610beb85 | 304 | */ |
| AnnaBridge | 126:abea610beb85 | 305 | #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */ |
| AnnaBridge | 126:abea610beb85 | 306 | /** |
| AnnaBridge | 126:abea610beb85 | 307 | * @} |
| AnnaBridge | 126:abea610beb85 | 308 | */ |
| AnnaBridge | 126:abea610beb85 | 309 | |
| AnnaBridge | 126:abea610beb85 | 310 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 311 | /** @defgroup TIMEx_Exported_Macros TIMEx Exported Macros |
| AnnaBridge | 126:abea610beb85 | 312 | * @{ |
| AnnaBridge | 126:abea610beb85 | 313 | */ |
| AnnaBridge | 126:abea610beb85 | 314 | |
| AnnaBridge | 126:abea610beb85 | 315 | /** |
| AnnaBridge | 126:abea610beb85 | 316 | * @brief Sets the TIM Capture Compare Register value on runtime without |
| AnnaBridge | 126:abea610beb85 | 317 | * calling another time ConfigChannel function. |
| AnnaBridge | 126:abea610beb85 | 318 | * @param __HANDLE__: TIM handle. |
| AnnaBridge | 126:abea610beb85 | 319 | * @param __CHANNEL__ : TIM Channels to be configured. |
| AnnaBridge | 126:abea610beb85 | 320 | * This parameter can be one of the following values: |
| AnnaBridge | 126:abea610beb85 | 321 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| AnnaBridge | 126:abea610beb85 | 322 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| AnnaBridge | 126:abea610beb85 | 323 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| AnnaBridge | 126:abea610beb85 | 324 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| AnnaBridge | 126:abea610beb85 | 325 | * @arg TIM_CHANNEL_5: TIM Channel 5 selected |
| AnnaBridge | 126:abea610beb85 | 326 | * @arg TIM_CHANNEL_6: TIM Channel 6 selected |
| AnnaBridge | 126:abea610beb85 | 327 | * @param __COMPARE__: specifies the Capture Compare register new value. |
| AnnaBridge | 126:abea610beb85 | 328 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 329 | */ |
| AnnaBridge | 126:abea610beb85 | 330 | #define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ |
| AnnaBridge | 126:abea610beb85 | 331 | (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\ |
| AnnaBridge | 126:abea610beb85 | 332 | ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\ |
| AnnaBridge | 126:abea610beb85 | 333 | ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\ |
| AnnaBridge | 126:abea610beb85 | 334 | ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\ |
| AnnaBridge | 126:abea610beb85 | 335 | ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\ |
| AnnaBridge | 126:abea610beb85 | 336 | ((__HANDLE__)->Instance->CCR6 = (__COMPARE__))) |
| AnnaBridge | 126:abea610beb85 | 337 | |
| AnnaBridge | 126:abea610beb85 | 338 | /** |
| AnnaBridge | 126:abea610beb85 | 339 | * @brief Gets the TIM Capture Compare Register value on runtime |
| AnnaBridge | 126:abea610beb85 | 340 | * @param __HANDLE__: TIM handle. |
| AnnaBridge | 126:abea610beb85 | 341 | * @param __CHANNEL__ : TIM Channel associated with the capture compare register |
| AnnaBridge | 126:abea610beb85 | 342 | * This parameter can be one of the following values: |
| AnnaBridge | 126:abea610beb85 | 343 | * @arg TIM_CHANNEL_1: get capture/compare 1 register value |
| AnnaBridge | 126:abea610beb85 | 344 | * @arg TIM_CHANNEL_2: get capture/compare 2 register value |
| AnnaBridge | 126:abea610beb85 | 345 | * @arg TIM_CHANNEL_3: get capture/compare 3 register value |
| AnnaBridge | 126:abea610beb85 | 346 | * @arg TIM_CHANNEL_4: get capture/compare 4 register value |
| AnnaBridge | 126:abea610beb85 | 347 | * @arg TIM_CHANNEL_5: get capture/compare 5 register value |
| AnnaBridge | 126:abea610beb85 | 348 | * @arg TIM_CHANNEL_6: get capture/compare 6 register value |
| AnnaBridge | 126:abea610beb85 | 349 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 350 | */ |
| AnnaBridge | 126:abea610beb85 | 351 | #define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ |
| AnnaBridge | 126:abea610beb85 | 352 | (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\ |
| AnnaBridge | 126:abea610beb85 | 353 | ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\ |
| AnnaBridge | 126:abea610beb85 | 354 | ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\ |
| AnnaBridge | 126:abea610beb85 | 355 | ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\ |
| AnnaBridge | 126:abea610beb85 | 356 | ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\ |
| AnnaBridge | 126:abea610beb85 | 357 | ((__HANDLE__)->Instance->CCR6)) |
| AnnaBridge | 126:abea610beb85 | 358 | |
| AnnaBridge | 126:abea610beb85 | 359 | /** |
| AnnaBridge | 126:abea610beb85 | 360 | * @} |
| AnnaBridge | 126:abea610beb85 | 361 | */ |
| AnnaBridge | 126:abea610beb85 | 362 | |
| AnnaBridge | 126:abea610beb85 | 363 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 364 | /** @addtogroup TIMEx_Exported_Functions |
| AnnaBridge | 126:abea610beb85 | 365 | * @{ |
| AnnaBridge | 126:abea610beb85 | 366 | */ |
| AnnaBridge | 126:abea610beb85 | 367 | |
| AnnaBridge | 126:abea610beb85 | 368 | /** @addtogroup TIMEx_Exported_Functions_Group1 |
| AnnaBridge | 126:abea610beb85 | 369 | * @{ |
| AnnaBridge | 126:abea610beb85 | 370 | */ |
| AnnaBridge | 126:abea610beb85 | 371 | /* Timer Hall Sensor functions **********************************************/ |
| AnnaBridge | 126:abea610beb85 | 372 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig); |
| AnnaBridge | 126:abea610beb85 | 373 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim); |
| AnnaBridge | 126:abea610beb85 | 374 | |
| AnnaBridge | 126:abea610beb85 | 375 | void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim); |
| AnnaBridge | 126:abea610beb85 | 376 | void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim); |
| AnnaBridge | 126:abea610beb85 | 377 | |
| AnnaBridge | 126:abea610beb85 | 378 | /* Blocking mode: Polling */ |
| AnnaBridge | 126:abea610beb85 | 379 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim); |
| AnnaBridge | 126:abea610beb85 | 380 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim); |
| AnnaBridge | 126:abea610beb85 | 381 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 126:abea610beb85 | 382 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim); |
| AnnaBridge | 126:abea610beb85 | 383 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim); |
| AnnaBridge | 126:abea610beb85 | 384 | /* Non-Blocking mode: DMA */ |
| AnnaBridge | 126:abea610beb85 | 385 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length); |
| AnnaBridge | 126:abea610beb85 | 386 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim); |
| AnnaBridge | 126:abea610beb85 | 387 | /** |
| AnnaBridge | 126:abea610beb85 | 388 | * @} |
| AnnaBridge | 126:abea610beb85 | 389 | */ |
| AnnaBridge | 126:abea610beb85 | 390 | |
| AnnaBridge | 126:abea610beb85 | 391 | /** @addtogroup TIMEx_Exported_Functions_Group2 |
| AnnaBridge | 126:abea610beb85 | 392 | * @{ |
| AnnaBridge | 126:abea610beb85 | 393 | */ |
| AnnaBridge | 126:abea610beb85 | 394 | /* Timer Complementary Output Compare functions *****************************/ |
| AnnaBridge | 126:abea610beb85 | 395 | /* Blocking mode: Polling */ |
| AnnaBridge | 126:abea610beb85 | 396 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 397 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 398 | |
| AnnaBridge | 126:abea610beb85 | 399 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 126:abea610beb85 | 400 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 401 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 402 | |
| AnnaBridge | 126:abea610beb85 | 403 | /* Non-Blocking mode: DMA */ |
| AnnaBridge | 126:abea610beb85 | 404 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length); |
| AnnaBridge | 126:abea610beb85 | 405 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 406 | /** |
| AnnaBridge | 126:abea610beb85 | 407 | * @} |
| AnnaBridge | 126:abea610beb85 | 408 | */ |
| AnnaBridge | 126:abea610beb85 | 409 | |
| AnnaBridge | 126:abea610beb85 | 410 | /** @addtogroup TIMEx_Exported_Functions_Group3 |
| AnnaBridge | 126:abea610beb85 | 411 | * @{ |
| AnnaBridge | 126:abea610beb85 | 412 | */ |
| AnnaBridge | 126:abea610beb85 | 413 | /* Timer Complementary PWM functions ****************************************/ |
| AnnaBridge | 126:abea610beb85 | 414 | /* Blocking mode: Polling */ |
| AnnaBridge | 126:abea610beb85 | 415 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 416 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 417 | |
| AnnaBridge | 126:abea610beb85 | 418 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 126:abea610beb85 | 419 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 420 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 421 | /* Non-Blocking mode: DMA */ |
| AnnaBridge | 126:abea610beb85 | 422 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length); |
| AnnaBridge | 126:abea610beb85 | 423 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel); |
| AnnaBridge | 126:abea610beb85 | 424 | /** |
| AnnaBridge | 126:abea610beb85 | 425 | * @} |
| AnnaBridge | 126:abea610beb85 | 426 | */ |
| AnnaBridge | 126:abea610beb85 | 427 | |
| AnnaBridge | 126:abea610beb85 | 428 | /** @addtogroup TIMEx_Exported_Functions_Group4 |
| AnnaBridge | 126:abea610beb85 | 429 | * @{ |
| AnnaBridge | 126:abea610beb85 | 430 | */ |
| AnnaBridge | 126:abea610beb85 | 431 | /* Timer Complementary One Pulse functions **********************************/ |
| AnnaBridge | 126:abea610beb85 | 432 | /* Blocking mode: Polling */ |
| AnnaBridge | 126:abea610beb85 | 433 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| AnnaBridge | 126:abea610beb85 | 434 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| AnnaBridge | 126:abea610beb85 | 435 | |
| AnnaBridge | 126:abea610beb85 | 436 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 126:abea610beb85 | 437 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| AnnaBridge | 126:abea610beb85 | 438 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| AnnaBridge | 126:abea610beb85 | 439 | /** |
| AnnaBridge | 126:abea610beb85 | 440 | * @} |
| AnnaBridge | 126:abea610beb85 | 441 | */ |
| AnnaBridge | 126:abea610beb85 | 442 | |
| AnnaBridge | 126:abea610beb85 | 443 | /** @addtogroup TIMEx_Exported_Functions_Group5 |
| AnnaBridge | 126:abea610beb85 | 444 | * @{ |
| AnnaBridge | 126:abea610beb85 | 445 | */ |
| AnnaBridge | 126:abea610beb85 | 446 | /* Extension Control functions ************************************************/ |
| AnnaBridge | 126:abea610beb85 | 447 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource); |
| AnnaBridge | 126:abea610beb85 | 448 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource); |
| AnnaBridge | 126:abea610beb85 | 449 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource); |
| AnnaBridge | 126:abea610beb85 | 450 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig); |
| AnnaBridge | 126:abea610beb85 | 451 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); |
| AnnaBridge | 126:abea610beb85 | 452 | #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx) |
| AnnaBridge | 126:abea610beb85 | 453 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); |
| AnnaBridge | 126:abea610beb85 | 454 | #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */ |
| AnnaBridge | 126:abea610beb85 | 455 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap); |
| AnnaBridge | 126:abea610beb85 | 456 | HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t OCRef); |
| AnnaBridge | 126:abea610beb85 | 457 | /** |
| AnnaBridge | 126:abea610beb85 | 458 | * @} |
| AnnaBridge | 126:abea610beb85 | 459 | */ |
| AnnaBridge | 126:abea610beb85 | 460 | |
| AnnaBridge | 126:abea610beb85 | 461 | /** @addtogroup TIMEx_Exported_Functions_Group6 |
| AnnaBridge | 126:abea610beb85 | 462 | * @{ |
| AnnaBridge | 126:abea610beb85 | 463 | */ |
| AnnaBridge | 126:abea610beb85 | 464 | /* Extension Callback *********************************************************/ |
| AnnaBridge | 126:abea610beb85 | 465 | void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim); |
| AnnaBridge | 126:abea610beb85 | 466 | void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim); |
| AnnaBridge | 126:abea610beb85 | 467 | void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); |
| AnnaBridge | 126:abea610beb85 | 468 | /** |
| AnnaBridge | 126:abea610beb85 | 469 | * @} |
| AnnaBridge | 126:abea610beb85 | 470 | */ |
| AnnaBridge | 126:abea610beb85 | 471 | |
| AnnaBridge | 126:abea610beb85 | 472 | /** @addtogroup TIMEx_Exported_Functions_Group7 |
| AnnaBridge | 126:abea610beb85 | 473 | * @{ |
| AnnaBridge | 126:abea610beb85 | 474 | */ |
| AnnaBridge | 126:abea610beb85 | 475 | /* Extension Peripheral State functions **************************************/ |
| AnnaBridge | 126:abea610beb85 | 476 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim); |
| AnnaBridge | 126:abea610beb85 | 477 | /** |
| AnnaBridge | 126:abea610beb85 | 478 | * @} |
| AnnaBridge | 126:abea610beb85 | 479 | */ |
| AnnaBridge | 126:abea610beb85 | 480 | |
| AnnaBridge | 126:abea610beb85 | 481 | /** |
| AnnaBridge | 126:abea610beb85 | 482 | * @} |
| AnnaBridge | 126:abea610beb85 | 483 | */ |
| AnnaBridge | 126:abea610beb85 | 484 | |
| AnnaBridge | 126:abea610beb85 | 485 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 486 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 487 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 488 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 489 | /** @defgroup TIMEx_Private_Macros TIMEx Private Macros |
| AnnaBridge | 126:abea610beb85 | 490 | * @{ |
| AnnaBridge | 126:abea610beb85 | 491 | */ |
| AnnaBridge | 126:abea610beb85 | 492 | #define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
| AnnaBridge | 126:abea610beb85 | 493 | ((CHANNEL) == TIM_CHANNEL_2) || \ |
| AnnaBridge | 126:abea610beb85 | 494 | ((CHANNEL) == TIM_CHANNEL_3) || \ |
| AnnaBridge | 126:abea610beb85 | 495 | ((CHANNEL) == TIM_CHANNEL_4) || \ |
| AnnaBridge | 126:abea610beb85 | 496 | ((CHANNEL) == TIM_CHANNEL_5) || \ |
| AnnaBridge | 126:abea610beb85 | 497 | ((CHANNEL) == TIM_CHANNEL_6) || \ |
| AnnaBridge | 126:abea610beb85 | 498 | ((CHANNEL) == TIM_CHANNEL_ALL)) |
| AnnaBridge | 126:abea610beb85 | 499 | |
| AnnaBridge | 126:abea610beb85 | 500 | #define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
| AnnaBridge | 126:abea610beb85 | 501 | ((CHANNEL) == TIM_CHANNEL_2)) |
| AnnaBridge | 126:abea610beb85 | 502 | |
| AnnaBridge | 126:abea610beb85 | 503 | #define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
| AnnaBridge | 126:abea610beb85 | 504 | ((CHANNEL) == TIM_CHANNEL_2)) |
| AnnaBridge | 126:abea610beb85 | 505 | |
| AnnaBridge | 126:abea610beb85 | 506 | #define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
| AnnaBridge | 126:abea610beb85 | 507 | ((CHANNEL) == TIM_CHANNEL_2) || \ |
| AnnaBridge | 126:abea610beb85 | 508 | ((CHANNEL) == TIM_CHANNEL_3)) |
| AnnaBridge | 126:abea610beb85 | 509 | #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) || \ |
| AnnaBridge | 126:abea610beb85 | 510 | ((MODE) == TIM_OCMODE_PWM2) || \ |
| AnnaBridge | 126:abea610beb85 | 511 | ((MODE) == TIM_OCMODE_COMBINED_PWM1) || \ |
| AnnaBridge | 126:abea610beb85 | 512 | ((MODE) == TIM_OCMODE_COMBINED_PWM2) || \ |
| AnnaBridge | 126:abea610beb85 | 513 | ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM1) || \ |
| AnnaBridge | 126:abea610beb85 | 514 | ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM2)) |
| AnnaBridge | 126:abea610beb85 | 515 | |
| AnnaBridge | 126:abea610beb85 | 516 | #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) || \ |
| AnnaBridge | 126:abea610beb85 | 517 | ((MODE) == TIM_OCMODE_ACTIVE) || \ |
| AnnaBridge | 126:abea610beb85 | 518 | ((MODE) == TIM_OCMODE_INACTIVE) || \ |
| AnnaBridge | 126:abea610beb85 | 519 | ((MODE) == TIM_OCMODE_TOGGLE) || \ |
| AnnaBridge | 126:abea610beb85 | 520 | ((MODE) == TIM_OCMODE_FORCED_ACTIVE) || \ |
| AnnaBridge | 126:abea610beb85 | 521 | ((MODE) == TIM_OCMODE_FORCED_INACTIVE) || \ |
| AnnaBridge | 126:abea610beb85 | 522 | ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \ |
| AnnaBridge | 126:abea610beb85 | 523 | ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM2)) |
| AnnaBridge | 126:abea610beb85 | 524 | #define IS_TIM_REMAP(__TIM_REMAP__) (((__TIM_REMAP__) == TIM_TIM2_TIM8_TRGO)||\ |
| AnnaBridge | 126:abea610beb85 | 525 | ((__TIM_REMAP__) == TIM_TIM2_ETH_PTP)||\ |
| AnnaBridge | 126:abea610beb85 | 526 | ((__TIM_REMAP__) == TIM_TIM2_USBFS_SOF)||\ |
| AnnaBridge | 126:abea610beb85 | 527 | ((__TIM_REMAP__) == TIM_TIM2_USBHS_SOF)||\ |
| AnnaBridge | 126:abea610beb85 | 528 | ((__TIM_REMAP__) == TIM_TIM5_GPIO)||\ |
| AnnaBridge | 126:abea610beb85 | 529 | ((__TIM_REMAP__) == TIM_TIM5_LSI)||\ |
| AnnaBridge | 126:abea610beb85 | 530 | ((__TIM_REMAP__) == TIM_TIM5_LSE)||\ |
| AnnaBridge | 126:abea610beb85 | 531 | ((__TIM_REMAP__) == TIM_TIM5_RTC)||\ |
| AnnaBridge | 126:abea610beb85 | 532 | ((__TIM_REMAP__) == TIM_TIM11_GPIO)||\ |
| AnnaBridge | 126:abea610beb85 | 533 | ((__TIM_REMAP__) == TIM_TIM11_SPDIFRX)||\ |
| AnnaBridge | 126:abea610beb85 | 534 | ((__TIM_REMAP__) == TIM_TIM11_HSE)||\ |
| AnnaBridge | 126:abea610beb85 | 535 | ((__TIM_REMAP__) == TIM_TIM11_MCO1)) |
| AnnaBridge | 126:abea610beb85 | 536 | #define IS_TIM_DEADTIME(__DEADTIME__) ((__DEADTIME__) <= 0xFF) |
| AnnaBridge | 126:abea610beb85 | 537 | #define IS_TIM_BREAK_FILTER(__FILTER__) ((__FILTER__) <= 0xF) |
| AnnaBridge | 126:abea610beb85 | 538 | #define IS_TIM_CLEARINPUT_SOURCE(MODE) (((MODE) == TIM_CLEARINPUTSOURCE_ETR) || \ |
| AnnaBridge | 126:abea610beb85 | 539 | ((MODE) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \ |
| AnnaBridge | 126:abea610beb85 | 540 | ((MODE) == TIM_CLEARINPUTSOURCE_NONE)) |
| AnnaBridge | 126:abea610beb85 | 541 | #define IS_TIM_BREAK2_STATE(STATE) (((STATE) == TIM_BREAK2_ENABLE) || \ |
| AnnaBridge | 126:abea610beb85 | 542 | ((STATE) == TIM_BREAK2_DISABLE)) |
| AnnaBridge | 126:abea610beb85 | 543 | #define IS_TIM_BREAK2_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAK2POLARITY_LOW) || \ |
| AnnaBridge | 126:abea610beb85 | 544 | ((__POLARITY__) == TIM_BREAK2POLARITY_HIGH)) |
| AnnaBridge | 126:abea610beb85 | 545 | #define IS_TIM_GROUPCH5(OCREF) ((((OCREF) & 0x1FFFFFFF) == 0x00000000)) |
| AnnaBridge | 126:abea610beb85 | 546 | #define IS_TIM_TRGO2_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO2_RESET) || \ |
| AnnaBridge | 126:abea610beb85 | 547 | ((SOURCE) == TIM_TRGO2_ENABLE) || \ |
| AnnaBridge | 126:abea610beb85 | 548 | ((SOURCE) == TIM_TRGO2_UPDATE) || \ |
| AnnaBridge | 126:abea610beb85 | 549 | ((SOURCE) == TIM_TRGO2_OC1) || \ |
| AnnaBridge | 126:abea610beb85 | 550 | ((SOURCE) == TIM_TRGO2_OC1REF) || \ |
| AnnaBridge | 126:abea610beb85 | 551 | ((SOURCE) == TIM_TRGO2_OC2REF) || \ |
| AnnaBridge | 126:abea610beb85 | 552 | ((SOURCE) == TIM_TRGO2_OC3REF) || \ |
| AnnaBridge | 126:abea610beb85 | 553 | ((SOURCE) == TIM_TRGO2_OC3REF) || \ |
| AnnaBridge | 126:abea610beb85 | 554 | ((SOURCE) == TIM_TRGO2_OC4REF) || \ |
| AnnaBridge | 126:abea610beb85 | 555 | ((SOURCE) == TIM_TRGO2_OC5REF) || \ |
| AnnaBridge | 126:abea610beb85 | 556 | ((SOURCE) == TIM_TRGO2_OC6REF) || \ |
| AnnaBridge | 126:abea610beb85 | 557 | ((SOURCE) == TIM_TRGO2_OC4REF_RISINGFALLING) || \ |
| AnnaBridge | 126:abea610beb85 | 558 | ((SOURCE) == TIM_TRGO2_OC6REF_RISINGFALLING) || \ |
| AnnaBridge | 126:abea610beb85 | 559 | ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \ |
| AnnaBridge | 126:abea610beb85 | 560 | ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \ |
| AnnaBridge | 126:abea610beb85 | 561 | ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \ |
| AnnaBridge | 126:abea610beb85 | 562 | ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING)) |
| AnnaBridge | 126:abea610beb85 | 563 | #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) || \ |
| AnnaBridge | 126:abea610beb85 | 564 | ((MODE) == TIM_SLAVEMODE_RESET) || \ |
| AnnaBridge | 126:abea610beb85 | 565 | ((MODE) == TIM_SLAVEMODE_GATED) || \ |
| AnnaBridge | 126:abea610beb85 | 566 | ((MODE) == TIM_SLAVEMODE_TRIGGER) || \ |
| AnnaBridge | 126:abea610beb85 | 567 | ((MODE) == TIM_SLAVEMODE_EXTERNAL1) || \ |
| AnnaBridge | 126:abea610beb85 | 568 | ((MODE) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER)) |
| AnnaBridge | 126:abea610beb85 | 569 | |
| AnnaBridge | 126:abea610beb85 | 570 | #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx) |
| AnnaBridge | 126:abea610beb85 | 571 | #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ |
| AnnaBridge | 126:abea610beb85 | 572 | ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) |
| AnnaBridge | 126:abea610beb85 | 573 | |
| AnnaBridge | 126:abea610beb85 | 574 | #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ |
| AnnaBridge | 126:abea610beb85 | 575 | ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM)) |
| AnnaBridge | 126:abea610beb85 | 576 | |
| AnnaBridge | 126:abea610beb85 | 577 | #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ |
| AnnaBridge | 126:abea610beb85 | 578 | ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) |
| AnnaBridge | 126:abea610beb85 | 579 | |
| AnnaBridge | 126:abea610beb85 | 580 | #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */ |
| AnnaBridge | 126:abea610beb85 | 581 | /** |
| AnnaBridge | 126:abea610beb85 | 582 | * @} |
| AnnaBridge | 126:abea610beb85 | 583 | */ |
| AnnaBridge | 126:abea610beb85 | 584 | |
| AnnaBridge | 126:abea610beb85 | 585 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 586 | /** @defgroup TIMEx_Private_Functions TIMEx Private Functions |
| AnnaBridge | 126:abea610beb85 | 587 | * @{ |
| AnnaBridge | 126:abea610beb85 | 588 | */ |
| AnnaBridge | 126:abea610beb85 | 589 | |
| AnnaBridge | 126:abea610beb85 | 590 | /** |
| AnnaBridge | 126:abea610beb85 | 591 | * @} |
| AnnaBridge | 126:abea610beb85 | 592 | */ |
| AnnaBridge | 126:abea610beb85 | 593 | |
| AnnaBridge | 126:abea610beb85 | 594 | /** |
| AnnaBridge | 126:abea610beb85 | 595 | * @} |
| AnnaBridge | 126:abea610beb85 | 596 | */ |
| AnnaBridge | 126:abea610beb85 | 597 | |
| AnnaBridge | 126:abea610beb85 | 598 | /** |
| AnnaBridge | 126:abea610beb85 | 599 | * @} |
| AnnaBridge | 126:abea610beb85 | 600 | */ |
| AnnaBridge | 126:abea610beb85 | 601 | |
| AnnaBridge | 126:abea610beb85 | 602 | #ifdef __cplusplus |
| AnnaBridge | 126:abea610beb85 | 603 | } |
| AnnaBridge | 126:abea610beb85 | 604 | #endif |
| AnnaBridge | 126:abea610beb85 | 605 | |
| AnnaBridge | 126:abea610beb85 | 606 | #endif /* __STM32F7xx_HAL_TIM_EX_H */ |
| AnnaBridge | 126:abea610beb85 | 607 | |
| AnnaBridge | 126:abea610beb85 | 608 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
