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TARGET_NUCLEO_F767ZI/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dsi.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:: Kojto
Date:: Tue Feb 14 11:24:20 2017 +0000
Revision:: 136:ef9c61f8c49f
Parent:: 135:176b8275d35d
Child:: 139:856d2700e60b

Release 136 of the mbed library

Ports for Upcoming Targets

Fixes and Changes

3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	126:abea610beb85	1	/**
AnnaBridge	126:abea610beb85	2	******************************************************************************
AnnaBridge	126:abea610beb85	3	* @file stm32f7xx_hal_dsi.h
AnnaBridge	126:abea610beb85	4	* @author MCD Application Team
<>	135:176b8275d35d	5	* @version V1.1.2
<>	135:176b8275d35d	6	* @date 23-September-2016
AnnaBridge	126:abea610beb85	7	* @brief Header file of DSI HAL module.
AnnaBridge	126:abea610beb85	8	******************************************************************************
AnnaBridge	126:abea610beb85	9	* @attention
AnnaBridge	126:abea610beb85	10	*
AnnaBridge	126:abea610beb85	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge	126:abea610beb85	12	*
AnnaBridge	126:abea610beb85	13	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	126:abea610beb85	14	* are permitted provided that the following conditions are met:
AnnaBridge	126:abea610beb85	15	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	126:abea610beb85	16	* this list of conditions and the following disclaimer.
AnnaBridge	126:abea610beb85	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	126:abea610beb85	18	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	126:abea610beb85	19	* and/or other materials provided with the distribution.
AnnaBridge	126:abea610beb85	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	126:abea610beb85	21	* may be used to endorse or promote products derived from this software
AnnaBridge	126:abea610beb85	22	* without specific prior written permission.
AnnaBridge	126:abea610beb85	23	*
AnnaBridge	126:abea610beb85	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	126:abea610beb85	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	126:abea610beb85	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	126:abea610beb85	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	126:abea610beb85	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	126:abea610beb85	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	126:abea610beb85	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	126:abea610beb85	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	126:abea610beb85	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	126:abea610beb85	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	126:abea610beb85	34	*
AnnaBridge	126:abea610beb85	35	******************************************************************************
AnnaBridge	126:abea610beb85	36	*/
AnnaBridge	126:abea610beb85	37
AnnaBridge	126:abea610beb85	38	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	126:abea610beb85	39	#ifndef __STM32F7xx_HAL_DSI_H
AnnaBridge	126:abea610beb85	40	#define __STM32F7xx_HAL_DSI_H
AnnaBridge	126:abea610beb85	41
AnnaBridge	126:abea610beb85	42	#ifdef __cplusplus
AnnaBridge	126:abea610beb85	43	extern "C" {
AnnaBridge	126:abea610beb85	44	#endif
AnnaBridge	126:abea610beb85	45
AnnaBridge	126:abea610beb85	46	#if defined (STM32F769xx) \|\| defined (STM32F779xx)
AnnaBridge	126:abea610beb85	47	/* Includes ------------------------------------------------------------------*/
AnnaBridge	126:abea610beb85	48	#include "stm32f7xx_hal_def.h"
AnnaBridge	126:abea610beb85	49
AnnaBridge	126:abea610beb85	50	/** @addtogroup STM32F7xx_HAL_Driver
AnnaBridge	126:abea610beb85	51	* @{
AnnaBridge	126:abea610beb85	52	*/
AnnaBridge	126:abea610beb85	53
AnnaBridge	126:abea610beb85	54	/** @defgroup DSI DSI
AnnaBridge	126:abea610beb85	55	* @brief DSI HAL module driver
AnnaBridge	126:abea610beb85	56	* @{
AnnaBridge	126:abea610beb85	57	*/
AnnaBridge	126:abea610beb85	58
AnnaBridge	126:abea610beb85	59	/* Exported types ------------------------------------------------------------*/
AnnaBridge	126:abea610beb85	60	/**
AnnaBridge	126:abea610beb85	61	* @brief DSI Init Structure definition
AnnaBridge	126:abea610beb85	62	*/
AnnaBridge	126:abea610beb85	63	typedef struct
AnnaBridge	126:abea610beb85	64	{
AnnaBridge	126:abea610beb85	65	uint32_t AutomaticClockLaneControl; /*!< Automatic clock lane control
AnnaBridge	126:abea610beb85	66	This parameter can be any value of @ref DSI_Automatic_Clk_Lane_Control */
AnnaBridge	126:abea610beb85	67
AnnaBridge	126:abea610beb85	68	uint32_t TXEscapeCkdiv; /*!< TX Escape clock division
AnnaBridge	126:abea610beb85	69	The values 0 and 1 stop the TX_ESC clock generation */
AnnaBridge	126:abea610beb85	70
AnnaBridge	126:abea610beb85	71	uint32_t NumberOfLanes; /*!< Number of lanes
AnnaBridge	126:abea610beb85	72	This parameter can be any value of @ref DSI_Number_Of_Lanes */
AnnaBridge	126:abea610beb85	73
AnnaBridge	126:abea610beb85	74	}DSI_InitTypeDef;
AnnaBridge	126:abea610beb85	75
AnnaBridge	126:abea610beb85	76	/**
AnnaBridge	126:abea610beb85	77	* @brief DSI PLL Clock structure definition
AnnaBridge	126:abea610beb85	78	*/
AnnaBridge	126:abea610beb85	79	typedef struct
AnnaBridge	126:abea610beb85	80	{
AnnaBridge	126:abea610beb85	81	uint32_t PLLNDIV; /*!< PLL Loop Division Factor
AnnaBridge	126:abea610beb85	82	This parameter must be a value between 10 and 125 */
AnnaBridge	126:abea610beb85	83
AnnaBridge	126:abea610beb85	84	uint32_t PLLIDF; /*!< PLL Input Division Factor
AnnaBridge	126:abea610beb85	85	This parameter can be any value of @ref DSI_PLL_IDF */
AnnaBridge	126:abea610beb85	86
AnnaBridge	126:abea610beb85	87	uint32_t PLLODF; /*!< PLL Output Division Factor
AnnaBridge	126:abea610beb85	88	This parameter can be any value of @ref DSI_PLL_ODF */
AnnaBridge	126:abea610beb85	89
AnnaBridge	126:abea610beb85	90	}DSI_PLLInitTypeDef;
AnnaBridge	126:abea610beb85	91
AnnaBridge	126:abea610beb85	92	/**
AnnaBridge	126:abea610beb85	93	* @brief DSI Video mode configuration
AnnaBridge	126:abea610beb85	94	*/
AnnaBridge	126:abea610beb85	95	typedef struct
AnnaBridge	126:abea610beb85	96	{
AnnaBridge	126:abea610beb85	97	uint32_t VirtualChannelID; /!< Virtual channel ID /
AnnaBridge	126:abea610beb85	98
AnnaBridge	126:abea610beb85	99	uint32_t ColorCoding; /*!< Color coding for LTDC interface
AnnaBridge	126:abea610beb85	100	This parameter can be any value of @ref DSI_Color_Coding */
AnnaBridge	126:abea610beb85	101
AnnaBridge	126:abea610beb85	102	uint32_t LooselyPacked; /*!< Enable or disable loosely packed stream (needed only when using
AnnaBridge	126:abea610beb85	103	18-bit configuration).
AnnaBridge	126:abea610beb85	104	This parameter can be any value of @ref DSI_LooselyPacked */
AnnaBridge	126:abea610beb85	105
AnnaBridge	126:abea610beb85	106	uint32_t Mode; /*!< Video mode type
AnnaBridge	126:abea610beb85	107	This parameter can be any value of @ref DSI_Video_Mode_Type */
AnnaBridge	126:abea610beb85	108
AnnaBridge	126:abea610beb85	109	uint32_t PacketSize; /!< Video packet size /
AnnaBridge	126:abea610beb85	110
AnnaBridge	126:abea610beb85	111	uint32_t NumberOfChunks; /!< Number of chunks /
AnnaBridge	126:abea610beb85	112
AnnaBridge	126:abea610beb85	113	uint32_t NullPacketSize; /!< Null packet size /
AnnaBridge	126:abea610beb85	114
AnnaBridge	126:abea610beb85	115	uint32_t HSPolarity; /*!< HSYNC pin polarity
AnnaBridge	126:abea610beb85	116	This parameter can be any value of @ref DSI_HSYNC_Polarity */
AnnaBridge	126:abea610beb85	117
AnnaBridge	126:abea610beb85	118	uint32_t VSPolarity; /*!< VSYNC pin polarity
AnnaBridge	126:abea610beb85	119	This parameter can be any value of @ref DSI_VSYNC_Polarity */
AnnaBridge	126:abea610beb85	120
AnnaBridge	126:abea610beb85	121	uint32_t DEPolarity; /*!< Data Enable pin polarity
AnnaBridge	126:abea610beb85	122	This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */
AnnaBridge	126:abea610beb85	123
AnnaBridge	126:abea610beb85	124	uint32_t HorizontalSyncActive; /!< Horizontal synchronism active duration (in lane byte clock cycles) /
AnnaBridge	126:abea610beb85	125
AnnaBridge	126:abea610beb85	126	uint32_t HorizontalBackPorch; /!< Horizontal back-porch duration (in lane byte clock cycles) /
AnnaBridge	126:abea610beb85	127
AnnaBridge	126:abea610beb85	128	uint32_t HorizontalLine; /!< Horizontal line duration (in lane byte clock cycles) /
AnnaBridge	126:abea610beb85	129
AnnaBridge	126:abea610beb85	130	uint32_t VerticalSyncActive; /!< Vertical synchronism active duration /
AnnaBridge	126:abea610beb85	131
AnnaBridge	126:abea610beb85	132	uint32_t VerticalBackPorch; /!< Vertical back-porch duration /
AnnaBridge	126:abea610beb85	133
AnnaBridge	126:abea610beb85	134	uint32_t VerticalFrontPorch; /!< Vertical front-porch duration /
AnnaBridge	126:abea610beb85	135
AnnaBridge	126:abea610beb85	136	uint32_t VerticalActive; /!< Vertical active duration /
AnnaBridge	126:abea610beb85	137
AnnaBridge	126:abea610beb85	138	uint32_t LPCommandEnable; /*!< Low-power command enable
AnnaBridge	126:abea610beb85	139	This parameter can be any value of @ref DSI_LP_Command */
AnnaBridge	126:abea610beb85	140
AnnaBridge	126:abea610beb85	141	uint32_t LPLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that
AnnaBridge	126:abea610beb85	142	can fit in a line during VSA, VBP and VFP regions */
AnnaBridge	126:abea610beb85	143
AnnaBridge	126:abea610beb85	144	uint32_t LPVACTLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that
AnnaBridge	126:abea610beb85	145	can fit in a line during VACT region */
AnnaBridge	126:abea610beb85	146
AnnaBridge	126:abea610beb85	147	uint32_t LPHorizontalFrontPorchEnable; /*!< Low-power horizontal front-porch enable
AnnaBridge	126:abea610beb85	148	This parameter can be any value of @ref DSI_LP_HFP */
AnnaBridge	126:abea610beb85	149
AnnaBridge	126:abea610beb85	150	uint32_t LPHorizontalBackPorchEnable; /*!< Low-power horizontal back-porch enable
AnnaBridge	126:abea610beb85	151	This parameter can be any value of @ref DSI_LP_HBP */
AnnaBridge	126:abea610beb85	152
AnnaBridge	126:abea610beb85	153	uint32_t LPVerticalActiveEnable; /*!< Low-power vertical active enable
AnnaBridge	126:abea610beb85	154	This parameter can be any value of @ref DSI_LP_VACT */
AnnaBridge	126:abea610beb85	155
AnnaBridge	126:abea610beb85	156	uint32_t LPVerticalFrontPorchEnable; /*!< Low-power vertical front-porch enable
AnnaBridge	126:abea610beb85	157	This parameter can be any value of @ref DSI_LP_VFP */
AnnaBridge	126:abea610beb85	158
AnnaBridge	126:abea610beb85	159	uint32_t LPVerticalBackPorchEnable; /*!< Low-power vertical back-porch enable
AnnaBridge	126:abea610beb85	160	This parameter can be any value of @ref DSI_LP_VBP */
AnnaBridge	126:abea610beb85	161
AnnaBridge	126:abea610beb85	162	uint32_t LPVerticalSyncActiveEnable; /*!< Low-power vertical sync active enable
AnnaBridge	126:abea610beb85	163	This parameter can be any value of @ref DSI_LP_VSYNC */
AnnaBridge	126:abea610beb85	164
AnnaBridge	126:abea610beb85	165	uint32_t FrameBTAAcknowledgeEnable; /*!< Frame bus-turn-around acknowledge enable
AnnaBridge	126:abea610beb85	166	This parameter can be any value of @ref DSI_FBTA_acknowledge */
AnnaBridge	126:abea610beb85	167
AnnaBridge	126:abea610beb85	168	}DSI_VidCfgTypeDef;
AnnaBridge	126:abea610beb85	169
AnnaBridge	126:abea610beb85	170	/**
AnnaBridge	126:abea610beb85	171	* @brief DSI Adapted command mode configuration
AnnaBridge	126:abea610beb85	172	*/
AnnaBridge	126:abea610beb85	173	typedef struct
AnnaBridge	126:abea610beb85	174	{
AnnaBridge	126:abea610beb85	175	uint32_t VirtualChannelID; /!< Virtual channel ID /
AnnaBridge	126:abea610beb85	176
AnnaBridge	126:abea610beb85	177	uint32_t ColorCoding; /*!< Color coding for LTDC interface
AnnaBridge	126:abea610beb85	178	This parameter can be any value of @ref DSI_Color_Coding */
AnnaBridge	126:abea610beb85	179
AnnaBridge	126:abea610beb85	180	uint32_t CommandSize; /*!< Maximum allowed size for an LTDC write memory command, measured in
AnnaBridge	126:abea610beb85	181	pixels. This parameter can be any value between 0x00 and 0xFFFF */
AnnaBridge	126:abea610beb85	182
AnnaBridge	126:abea610beb85	183	uint32_t TearingEffectSource; /*!< Tearing effect source
AnnaBridge	126:abea610beb85	184	This parameter can be any value of @ref DSI_TearingEffectSource */
AnnaBridge	126:abea610beb85	185
AnnaBridge	126:abea610beb85	186	uint32_t TearingEffectPolarity; /*!< Tearing effect pin polarity
AnnaBridge	126:abea610beb85	187	This parameter can be any value of @ref DSI_TearingEffectPolarity */
AnnaBridge	126:abea610beb85	188
AnnaBridge	126:abea610beb85	189	uint32_t HSPolarity; /*!< HSYNC pin polarity
AnnaBridge	126:abea610beb85	190	This parameter can be any value of @ref DSI_HSYNC_Polarity */
AnnaBridge	126:abea610beb85	191
AnnaBridge	126:abea610beb85	192	uint32_t VSPolarity; /*!< VSYNC pin polarity
AnnaBridge	126:abea610beb85	193	This parameter can be any value of @ref DSI_VSYNC_Polarity */
AnnaBridge	126:abea610beb85	194
AnnaBridge	126:abea610beb85	195	uint32_t DEPolarity; /*!< Data Enable pin polarity
AnnaBridge	126:abea610beb85	196	This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */
AnnaBridge	126:abea610beb85	197
AnnaBridge	126:abea610beb85	198	uint32_t VSyncPol; /*!< VSync edge on which the LTDC is halted
AnnaBridge	126:abea610beb85	199	This parameter can be any value of @ref DSI_Vsync_Polarity */
AnnaBridge	126:abea610beb85	200
AnnaBridge	126:abea610beb85	201	uint32_t AutomaticRefresh; /*!< Automatic refresh mode
AnnaBridge	126:abea610beb85	202	This parameter can be any value of @ref DSI_AutomaticRefresh */
AnnaBridge	126:abea610beb85	203
AnnaBridge	126:abea610beb85	204	uint32_t TEAcknowledgeRequest; /*!< Tearing Effect Acknowledge Request Enable
AnnaBridge	126:abea610beb85	205	This parameter can be any value of @ref DSI_TE_AcknowledgeRequest */
AnnaBridge	126:abea610beb85	206
AnnaBridge	126:abea610beb85	207	}DSI_CmdCfgTypeDef;
AnnaBridge	126:abea610beb85	208
AnnaBridge	126:abea610beb85	209	/**
AnnaBridge	126:abea610beb85	210	* @brief DSI command transmission mode configuration
AnnaBridge	126:abea610beb85	211	*/
AnnaBridge	126:abea610beb85	212	typedef struct
AnnaBridge	126:abea610beb85	213	{
AnnaBridge	126:abea610beb85	214	uint32_t LPGenShortWriteNoP; /*!< Generic Short Write Zero parameters Transmission
AnnaBridge	126:abea610beb85	215	This parameter can be any value of @ref DSI_LP_LPGenShortWriteNoP */
AnnaBridge	126:abea610beb85	216
AnnaBridge	126:abea610beb85	217	uint32_t LPGenShortWriteOneP; /*!< Generic Short Write One parameter Transmission
AnnaBridge	126:abea610beb85	218	This parameter can be any value of @ref DSI_LP_LPGenShortWriteOneP */
AnnaBridge	126:abea610beb85	219
AnnaBridge	126:abea610beb85	220	uint32_t LPGenShortWriteTwoP; /*!< Generic Short Write Two parameters Transmission
AnnaBridge	126:abea610beb85	221	This parameter can be any value of @ref DSI_LP_LPGenShortWriteTwoP */
AnnaBridge	126:abea610beb85	222
AnnaBridge	126:abea610beb85	223	uint32_t LPGenShortReadNoP; /*!< Generic Short Read Zero parameters Transmission
AnnaBridge	126:abea610beb85	224	This parameter can be any value of @ref DSI_LP_LPGenShortReadNoP */
AnnaBridge	126:abea610beb85	225
AnnaBridge	126:abea610beb85	226	uint32_t LPGenShortReadOneP; /*!< Generic Short Read One parameter Transmission
AnnaBridge	126:abea610beb85	227	This parameter can be any value of @ref DSI_LP_LPGenShortReadOneP */
AnnaBridge	126:abea610beb85	228
AnnaBridge	126:abea610beb85	229	uint32_t LPGenShortReadTwoP; /*!< Generic Short Read Two parameters Transmission
AnnaBridge	126:abea610beb85	230	This parameter can be any value of @ref DSI_LP_LPGenShortReadTwoP */
AnnaBridge	126:abea610beb85	231
AnnaBridge	126:abea610beb85	232	uint32_t LPGenLongWrite; /*!< Generic Long Write Transmission
AnnaBridge	126:abea610beb85	233	This parameter can be any value of @ref DSI_LP_LPGenLongWrite */
AnnaBridge	126:abea610beb85	234
AnnaBridge	126:abea610beb85	235	uint32_t LPDcsShortWriteNoP; /*!< DCS Short Write Zero parameters Transmission
AnnaBridge	126:abea610beb85	236	This parameter can be any value of @ref DSI_LP_LPDcsShortWriteNoP */
AnnaBridge	126:abea610beb85	237
AnnaBridge	126:abea610beb85	238	uint32_t LPDcsShortWriteOneP; /*!< DCS Short Write One parameter Transmission
AnnaBridge	126:abea610beb85	239	This parameter can be any value of @ref DSI_LP_LPDcsShortWriteOneP */
AnnaBridge	126:abea610beb85	240
AnnaBridge	126:abea610beb85	241	uint32_t LPDcsShortReadNoP; /*!< DCS Short Read Zero parameters Transmission
AnnaBridge	126:abea610beb85	242	This parameter can be any value of @ref DSI_LP_LPDcsShortReadNoP */
AnnaBridge	126:abea610beb85	243
AnnaBridge	126:abea610beb85	244	uint32_t LPDcsLongWrite; /*!< DCS Long Write Transmission
AnnaBridge	126:abea610beb85	245	This parameter can be any value of @ref DSI_LP_LPDcsLongWrite */
AnnaBridge	126:abea610beb85	246
AnnaBridge	126:abea610beb85	247	uint32_t LPMaxReadPacket; /*!< Maximum Read Packet Size Transmission
AnnaBridge	126:abea610beb85	248	This parameter can be any value of @ref DSI_LP_LPMaxReadPacket */
AnnaBridge	126:abea610beb85	249
AnnaBridge	126:abea610beb85	250	uint32_t AcknowledgeRequest; /*!< Acknowledge Request Enable
AnnaBridge	126:abea610beb85	251	This parameter can be any value of @ref DSI_AcknowledgeRequest */
AnnaBridge	126:abea610beb85	252
AnnaBridge	126:abea610beb85	253	}DSI_LPCmdTypeDef;
AnnaBridge	126:abea610beb85	254
AnnaBridge	126:abea610beb85	255	/**
AnnaBridge	126:abea610beb85	256	* @brief DSI PHY Timings definition
AnnaBridge	126:abea610beb85	257	*/
AnnaBridge	126:abea610beb85	258	typedef struct
AnnaBridge	126:abea610beb85	259	{
AnnaBridge	126:abea610beb85	260	uint32_t ClockLaneHS2LPTime; /*!< The maximum time that the D-PHY clock lane takes to go from high-speed
AnnaBridge	126:abea610beb85	261	to low-power transmission */
AnnaBridge	126:abea610beb85	262
AnnaBridge	126:abea610beb85	263	uint32_t ClockLaneLP2HSTime; /*!< The maximum time that the D-PHY clock lane takes to go from low-power
AnnaBridge	126:abea610beb85	264	to high-speed transmission */
AnnaBridge	126:abea610beb85	265
AnnaBridge	126:abea610beb85	266	uint32_t DataLaneHS2LPTime; /*!< The maximum time that the D-PHY data lanes takes to go from high-speed
AnnaBridge	126:abea610beb85	267	to low-power transmission */
AnnaBridge	126:abea610beb85	268
AnnaBridge	126:abea610beb85	269	uint32_t DataLaneLP2HSTime; /*!< The maximum time that the D-PHY data lanes takes to go from low-power
AnnaBridge	126:abea610beb85	270	to high-speed transmission */
AnnaBridge	126:abea610beb85	271
AnnaBridge	126:abea610beb85	272	uint32_t DataLaneMaxReadTime; /!< The maximum time required to perform a read command /
AnnaBridge	126:abea610beb85	273
AnnaBridge	126:abea610beb85	274	uint32_t StopWaitTime; /*!< The minimum wait period to request a High-Speed transmission after the
AnnaBridge	126:abea610beb85	275	Stop state */
AnnaBridge	126:abea610beb85	276
AnnaBridge	126:abea610beb85	277	}DSI_PHY_TimerTypeDef;
AnnaBridge	126:abea610beb85	278
AnnaBridge	126:abea610beb85	279	/**
AnnaBridge	126:abea610beb85	280	* @brief DSI HOST Timeouts definition
AnnaBridge	126:abea610beb85	281	*/
AnnaBridge	126:abea610beb85	282	typedef struct
AnnaBridge	126:abea610beb85	283	{
AnnaBridge	126:abea610beb85	284	uint32_t TimeoutCkdiv; /!< Time-out clock division /
AnnaBridge	126:abea610beb85	285
AnnaBridge	126:abea610beb85	286	uint32_t HighSpeedTransmissionTimeout; /!< High-speed transmission time-out /
AnnaBridge	126:abea610beb85	287
AnnaBridge	126:abea610beb85	288	uint32_t LowPowerReceptionTimeout; /!< Low-power reception time-out /
AnnaBridge	126:abea610beb85	289
AnnaBridge	126:abea610beb85	290	uint32_t HighSpeedReadTimeout; /!< High-speed read time-out /
AnnaBridge	126:abea610beb85	291
AnnaBridge	126:abea610beb85	292	uint32_t LowPowerReadTimeout; /!< Low-power read time-out /
AnnaBridge	126:abea610beb85	293
AnnaBridge	126:abea610beb85	294	uint32_t HighSpeedWriteTimeout; /!< High-speed write time-out /
AnnaBridge	126:abea610beb85	295
AnnaBridge	126:abea610beb85	296	uint32_t HighSpeedWritePrespMode; /*!< High-speed write presp mode
AnnaBridge	126:abea610beb85	297	This parameter can be any value of @ref DSI_HS_PrespMode */
AnnaBridge	126:abea610beb85	298
AnnaBridge	126:abea610beb85	299	uint32_t LowPowerWriteTimeout; /!< Low-speed write time-out /
AnnaBridge	126:abea610beb85	300
AnnaBridge	126:abea610beb85	301	uint32_t BTATimeout; /!< BTA time-out /
AnnaBridge	126:abea610beb85	302
AnnaBridge	126:abea610beb85	303	}DSI_HOST_TimeoutTypeDef;
AnnaBridge	126:abea610beb85	304
AnnaBridge	126:abea610beb85	305	/**
AnnaBridge	126:abea610beb85	306	* @brief DSI States Structure definition
AnnaBridge	126:abea610beb85	307	*/
AnnaBridge	126:abea610beb85	308	typedef enum
AnnaBridge	126:abea610beb85	309	{
AnnaBridge	126:abea610beb85	310	HAL_DSI_STATE_RESET = 0x00U,
AnnaBridge	126:abea610beb85	311	HAL_DSI_STATE_READY = 0x01U,
AnnaBridge	126:abea610beb85	312	HAL_DSI_STATE_ERROR = 0x02U,
AnnaBridge	126:abea610beb85	313	HAL_DSI_STATE_BUSY = 0x03U,
AnnaBridge	126:abea610beb85	314	HAL_DSI_STATE_TIMEOUT = 0x04U
AnnaBridge	126:abea610beb85	315	}HAL_DSI_StateTypeDef;
AnnaBridge	126:abea610beb85	316
AnnaBridge	126:abea610beb85	317	/**
AnnaBridge	126:abea610beb85	318	* @brief DSI Handle Structure definition
AnnaBridge	126:abea610beb85	319	*/
AnnaBridge	126:abea610beb85	320	typedef struct
AnnaBridge	126:abea610beb85	321	{
AnnaBridge	126:abea610beb85	322	DSI_TypeDef Instance; /!< Register base address */
AnnaBridge	126:abea610beb85	323	DSI_InitTypeDef Init; /!< DSI required parameters /
AnnaBridge	126:abea610beb85	324	HAL_LockTypeDef Lock; /!< DSI peripheral status /
AnnaBridge	126:abea610beb85	325	__IO HAL_DSI_StateTypeDef State; /!< DSI communication state /
AnnaBridge	126:abea610beb85	326	__IO uint32_t ErrorCode; /!< DSI Error code /
AnnaBridge	126:abea610beb85	327	uint32_t ErrorMsk; /!< DSI Error monitoring mask /
AnnaBridge	126:abea610beb85	328	}DSI_HandleTypeDef;
AnnaBridge	126:abea610beb85	329
AnnaBridge	126:abea610beb85	330	/* Exported constants --------------------------------------------------------*/
AnnaBridge	126:abea610beb85	331	/** @defgroup DSI_DCS_Command DSI DCS Command
AnnaBridge	126:abea610beb85	332	* @{
AnnaBridge	126:abea610beb85	333	*/
AnnaBridge	126:abea610beb85	334	#define DSI_ENTER_IDLE_MODE 0x39U
AnnaBridge	126:abea610beb85	335	#define DSI_ENTER_INVERT_MODE 0x21U
AnnaBridge	126:abea610beb85	336	#define DSI_ENTER_NORMAL_MODE 0x13U
AnnaBridge	126:abea610beb85	337	#define DSI_ENTER_PARTIAL_MODE 0x12U
AnnaBridge	126:abea610beb85	338	#define DSI_ENTER_SLEEP_MODE 0x10U
AnnaBridge	126:abea610beb85	339	#define DSI_EXIT_IDLE_MODE 0x38U
AnnaBridge	126:abea610beb85	340	#define DSI_EXIT_INVERT_MODE 0x20U
AnnaBridge	126:abea610beb85	341	#define DSI_EXIT_SLEEP_MODE 0x11U
AnnaBridge	126:abea610beb85	342	#define DSI_GET_3D_CONTROL 0x3FU
AnnaBridge	126:abea610beb85	343	#define DSI_GET_ADDRESS_MODE 0x0BU
AnnaBridge	126:abea610beb85	344	#define DSI_GET_BLUE_CHANNEL 0x08U
AnnaBridge	126:abea610beb85	345	#define DSI_GET_DIAGNOSTIC_RESULT 0x0FU
AnnaBridge	126:abea610beb85	346	#define DSI_GET_DISPLAY_MODE 0x0DU
AnnaBridge	126:abea610beb85	347	#define DSI_GET_GREEN_CHANNEL 0x07U
AnnaBridge	126:abea610beb85	348	#define DSI_GET_PIXEL_FORMAT 0x0CU
AnnaBridge	126:abea610beb85	349	#define DSI_GET_POWER_MODE 0x0AU
AnnaBridge	126:abea610beb85	350	#define DSI_GET_RED_CHANNEL 0x06U
AnnaBridge	126:abea610beb85	351	#define DSI_GET_SCANLINE 0x45U
AnnaBridge	126:abea610beb85	352	#define DSI_GET_SIGNAL_MODE 0x0EU
AnnaBridge	126:abea610beb85	353	#define DSI_NOP 0x00U
AnnaBridge	126:abea610beb85	354	#define DSI_READ_DDB_CONTINUE 0xA8U
AnnaBridge	126:abea610beb85	355	#define DSI_READ_DDB_START 0xA1U
AnnaBridge	126:abea610beb85	356	#define DSI_READ_MEMORY_CONTINUE 0x3EU
AnnaBridge	126:abea610beb85	357	#define DSI_READ_MEMORY_START 0x2EU
AnnaBridge	126:abea610beb85	358	#define DSI_SET_3D_CONTROL 0x3DU
AnnaBridge	126:abea610beb85	359	#define DSI_SET_ADDRESS_MODE 0x36U
AnnaBridge	126:abea610beb85	360	#define DSI_SET_COLUMN_ADDRESS 0x2AU
AnnaBridge	126:abea610beb85	361	#define DSI_SET_DISPLAY_OFF 0x28U
AnnaBridge	126:abea610beb85	362	#define DSI_SET_DISPLAY_ON 0x29U
AnnaBridge	126:abea610beb85	363	#define DSI_SET_GAMMA_CURVE 0x26U
AnnaBridge	126:abea610beb85	364	#define DSI_SET_PAGE_ADDRESS 0x2BU
AnnaBridge	126:abea610beb85	365	#define DSI_SET_PARTIAL_COLUMNS 0x31U
AnnaBridge	126:abea610beb85	366	#define DSI_SET_PARTIAL_ROWS 0x30U
AnnaBridge	126:abea610beb85	367	#define DSI_SET_PIXEL_FORMAT 0x3AU
AnnaBridge	126:abea610beb85	368	#define DSI_SET_SCROLL_AREA 0x33U
AnnaBridge	126:abea610beb85	369	#define DSI_SET_SCROLL_START 0x37U
AnnaBridge	126:abea610beb85	370	#define DSI_SET_TEAR_OFF 0x34U
AnnaBridge	126:abea610beb85	371	#define DSI_SET_TEAR_ON 0x35U
AnnaBridge	126:abea610beb85	372	#define DSI_SET_TEAR_SCANLINE 0x44U
AnnaBridge	126:abea610beb85	373	#define DSI_SET_VSYNC_TIMING 0x40U
AnnaBridge	126:abea610beb85	374	#define DSI_SOFT_RESET 0x01U
AnnaBridge	126:abea610beb85	375	#define DSI_WRITE_LUT 0x2DU
AnnaBridge	126:abea610beb85	376	#define DSI_WRITE_MEMORY_CONTINUE 0x3CU
AnnaBridge	126:abea610beb85	377	#define DSI_WRITE_MEMORY_START 0x2CU
AnnaBridge	126:abea610beb85	378	/**
AnnaBridge	126:abea610beb85	379	* @}
AnnaBridge	126:abea610beb85	380	*/
AnnaBridge	126:abea610beb85	381
AnnaBridge	126:abea610beb85	382	/** @defgroup DSI_Video_Mode_Type DSI Video Mode Type
AnnaBridge	126:abea610beb85	383	* @{
AnnaBridge	126:abea610beb85	384	*/
AnnaBridge	126:abea610beb85	385	#define DSI_VID_MODE_NB_PULSES 0U
AnnaBridge	126:abea610beb85	386	#define DSI_VID_MODE_NB_EVENTS 1U
AnnaBridge	126:abea610beb85	387	#define DSI_VID_MODE_BURST 2U
AnnaBridge	126:abea610beb85	388	/**
AnnaBridge	126:abea610beb85	389	* @}
AnnaBridge	126:abea610beb85	390	*/
AnnaBridge	126:abea610beb85	391
AnnaBridge	126:abea610beb85	392	/** @defgroup DSI_Color_Mode DSI Color Mode
AnnaBridge	126:abea610beb85	393	* @{
AnnaBridge	126:abea610beb85	394	*/
AnnaBridge	126:abea610beb85	395	#define DSI_COLOR_MODE_FULL 0U
AnnaBridge	126:abea610beb85	396	#define DSI_COLOR_MODE_EIGHT DSI_WCR_COLM
AnnaBridge	126:abea610beb85	397	/**
AnnaBridge	126:abea610beb85	398	* @}
AnnaBridge	126:abea610beb85	399	*/
AnnaBridge	126:abea610beb85	400
AnnaBridge	126:abea610beb85	401	/** @defgroup DSI_ShutDown DSI ShutDown
AnnaBridge	126:abea610beb85	402	* @{
AnnaBridge	126:abea610beb85	403	*/
AnnaBridge	126:abea610beb85	404	#define DSI_DISPLAY_ON 0U
AnnaBridge	126:abea610beb85	405	#define DSI_DISPLAY_OFF DSI_WCR_SHTDN
AnnaBridge	126:abea610beb85	406	/**
AnnaBridge	126:abea610beb85	407	* @}
AnnaBridge	126:abea610beb85	408	*/
AnnaBridge	126:abea610beb85	409
AnnaBridge	126:abea610beb85	410	/** @defgroup DSI_LP_Command DSI LP Command
AnnaBridge	126:abea610beb85	411	* @{
AnnaBridge	126:abea610beb85	412	*/
AnnaBridge	126:abea610beb85	413	#define DSI_LP_COMMAND_DISABLE 0U
AnnaBridge	126:abea610beb85	414	#define DSI_LP_COMMAND_ENABLE DSI_VMCR_LPCE
AnnaBridge	126:abea610beb85	415	/**
AnnaBridge	126:abea610beb85	416	* @}
AnnaBridge	126:abea610beb85	417	*/
AnnaBridge	126:abea610beb85	418
AnnaBridge	126:abea610beb85	419	/** @defgroup DSI_LP_HFP DSI LP HFP
AnnaBridge	126:abea610beb85	420	* @{
AnnaBridge	126:abea610beb85	421	*/
AnnaBridge	126:abea610beb85	422	#define DSI_LP_HFP_DISABLE 0U
AnnaBridge	126:abea610beb85	423	#define DSI_LP_HFP_ENABLE DSI_VMCR_LPHFPE
AnnaBridge	126:abea610beb85	424	/**
AnnaBridge	126:abea610beb85	425	* @}
AnnaBridge	126:abea610beb85	426	*/
AnnaBridge	126:abea610beb85	427
AnnaBridge	126:abea610beb85	428	/** @defgroup DSI_LP_HBP DSI LP HBP
AnnaBridge	126:abea610beb85	429	* @{
AnnaBridge	126:abea610beb85	430	*/
AnnaBridge	126:abea610beb85	431	#define DSI_LP_HBP_DISABLE 0U
AnnaBridge	126:abea610beb85	432	#define DSI_LP_HBP_ENABLE DSI_VMCR_LPHBPE
AnnaBridge	126:abea610beb85	433	/**
AnnaBridge	126:abea610beb85	434	* @}
AnnaBridge	126:abea610beb85	435	*/
AnnaBridge	126:abea610beb85	436
AnnaBridge	126:abea610beb85	437	/** @defgroup DSI_LP_VACT DSI LP VACT
AnnaBridge	126:abea610beb85	438	* @{
AnnaBridge	126:abea610beb85	439	*/
AnnaBridge	126:abea610beb85	440	#define DSI_LP_VACT_DISABLE 0U
AnnaBridge	126:abea610beb85	441	#define DSI_LP_VACT_ENABLE DSI_VMCR_LPVAE
AnnaBridge	126:abea610beb85	442	/**
AnnaBridge	126:abea610beb85	443	* @}
AnnaBridge	126:abea610beb85	444	*/
AnnaBridge	126:abea610beb85	445
AnnaBridge	126:abea610beb85	446	/** @defgroup DSI_LP_VFP DSI LP VFP
AnnaBridge	126:abea610beb85	447	* @{
AnnaBridge	126:abea610beb85	448	*/
AnnaBridge	126:abea610beb85	449	#define DSI_LP_VFP_DISABLE 0
AnnaBridge	126:abea610beb85	450	#define DSI_LP_VFP_ENABLE DSI_VMCR_LPVFPE
AnnaBridge	126:abea610beb85	451	/**
AnnaBridge	126:abea610beb85	452	* @}
AnnaBridge	126:abea610beb85	453	*/
AnnaBridge	126:abea610beb85	454
AnnaBridge	126:abea610beb85	455	/** @defgroup DSI_LP_VBP DSI LP VBP
AnnaBridge	126:abea610beb85	456	* @{
AnnaBridge	126:abea610beb85	457	*/
AnnaBridge	126:abea610beb85	458	#define DSI_LP_VBP_DISABLE 0U
AnnaBridge	126:abea610beb85	459	#define DSI_LP_VBP_ENABLE DSI_VMCR_LPVBPE
AnnaBridge	126:abea610beb85	460	/**
AnnaBridge	126:abea610beb85	461	* @}
AnnaBridge	126:abea610beb85	462	*/
AnnaBridge	126:abea610beb85	463
AnnaBridge	126:abea610beb85	464	/** @defgroup DSI_LP_VSYNC DSI LP VSYNC
AnnaBridge	126:abea610beb85	465	* @{
AnnaBridge	126:abea610beb85	466	*/
AnnaBridge	126:abea610beb85	467	#define DSI_LP_VSYNC_DISABLE 0U
AnnaBridge	126:abea610beb85	468	#define DSI_LP_VSYNC_ENABLE DSI_VMCR_LPVSAE
AnnaBridge	126:abea610beb85	469	/**
AnnaBridge	126:abea610beb85	470	* @}
AnnaBridge	126:abea610beb85	471	*/
AnnaBridge	126:abea610beb85	472
AnnaBridge	126:abea610beb85	473	/** @defgroup DSI_FBTA_acknowledge DSI FBTA Acknowledge
AnnaBridge	126:abea610beb85	474	* @{
AnnaBridge	126:abea610beb85	475	*/
AnnaBridge	126:abea610beb85	476	#define DSI_FBTAA_DISABLE 0U
AnnaBridge	126:abea610beb85	477	#define DSI_FBTAA_ENABLE DSI_VMCR_FBTAAE
AnnaBridge	126:abea610beb85	478	/**
AnnaBridge	126:abea610beb85	479	* @}
AnnaBridge	126:abea610beb85	480	*/
AnnaBridge	126:abea610beb85	481
AnnaBridge	126:abea610beb85	482	/** @defgroup DSI_TearingEffectSource DSI Tearing Effect Source
AnnaBridge	126:abea610beb85	483	* @{
AnnaBridge	126:abea610beb85	484	*/
AnnaBridge	126:abea610beb85	485	#define DSI_TE_DSILINK 0U
AnnaBridge	126:abea610beb85	486	#define DSI_TE_EXTERNAL DSI_WCFGR_TESRC
AnnaBridge	126:abea610beb85	487	/**
AnnaBridge	126:abea610beb85	488	* @}
AnnaBridge	126:abea610beb85	489	*/
AnnaBridge	126:abea610beb85	490
AnnaBridge	126:abea610beb85	491	/** @defgroup DSI_TearingEffectPolarity DSI Tearing Effect Polarity
AnnaBridge	126:abea610beb85	492	* @{
AnnaBridge	126:abea610beb85	493	*/
AnnaBridge	126:abea610beb85	494	#define DSI_TE_RISING_EDGE 0U
AnnaBridge	126:abea610beb85	495	#define DSI_TE_FALLING_EDGE DSI_WCFGR_TEPOL
AnnaBridge	126:abea610beb85	496	/**
AnnaBridge	126:abea610beb85	497	* @}
AnnaBridge	126:abea610beb85	498	*/
AnnaBridge	126:abea610beb85	499
AnnaBridge	126:abea610beb85	500	/** @defgroup DSI_Vsync_Polarity DSI Vsync Polarity
AnnaBridge	126:abea610beb85	501	* @{
AnnaBridge	126:abea610beb85	502	*/
AnnaBridge	126:abea610beb85	503	#define DSI_VSYNC_FALLING 0U
AnnaBridge	126:abea610beb85	504	#define DSI_VSYNC_RISING DSI_WCFGR_VSPOL
AnnaBridge	126:abea610beb85	505	/**
AnnaBridge	126:abea610beb85	506	* @}
AnnaBridge	126:abea610beb85	507	*/
AnnaBridge	126:abea610beb85	508
AnnaBridge	126:abea610beb85	509	/** @defgroup DSI_AutomaticRefresh DSI Automatic Refresh
AnnaBridge	126:abea610beb85	510	* @{
AnnaBridge	126:abea610beb85	511	*/
AnnaBridge	126:abea610beb85	512	#define DSI_AR_DISABLE 0U
AnnaBridge	126:abea610beb85	513	#define DSI_AR_ENABLE DSI_WCFGR_AR
AnnaBridge	126:abea610beb85	514	/**
AnnaBridge	126:abea610beb85	515	* @}
AnnaBridge	126:abea610beb85	516	*/
AnnaBridge	126:abea610beb85	517
AnnaBridge	126:abea610beb85	518	/** @defgroup DSI_TE_AcknowledgeRequest DSI TE Acknowledge Request
AnnaBridge	126:abea610beb85	519	* @{
AnnaBridge	126:abea610beb85	520	*/
AnnaBridge	126:abea610beb85	521	#define DSI_TE_ACKNOWLEDGE_DISABLE 0U
AnnaBridge	126:abea610beb85	522	#define DSI_TE_ACKNOWLEDGE_ENABLE DSI_CMCR_TEARE
AnnaBridge	126:abea610beb85	523	/**
AnnaBridge	126:abea610beb85	524	* @}
AnnaBridge	126:abea610beb85	525	*/
AnnaBridge	126:abea610beb85	526
AnnaBridge	126:abea610beb85	527	/** @defgroup DSI_AcknowledgeRequest DSI Acknowledge Request
AnnaBridge	126:abea610beb85	528	* @{
AnnaBridge	126:abea610beb85	529	*/
AnnaBridge	126:abea610beb85	530	#define DSI_ACKNOWLEDGE_DISABLE 0U
AnnaBridge	126:abea610beb85	531	#define DSI_ACKNOWLEDGE_ENABLE DSI_CMCR_ARE
AnnaBridge	126:abea610beb85	532	/**
AnnaBridge	126:abea610beb85	533	* @}
AnnaBridge	126:abea610beb85	534	*/
AnnaBridge	126:abea610beb85	535
AnnaBridge	126:abea610beb85	536	/** @defgroup DSI_LP_LPGenShortWriteNoP DSI LP LPGen Short Write NoP
AnnaBridge	126:abea610beb85	537	* @{
AnnaBridge	126:abea610beb85	538	*/
AnnaBridge	126:abea610beb85	539	#define DSI_LP_GSW0P_DISABLE 0U
AnnaBridge	126:abea610beb85	540	#define DSI_LP_GSW0P_ENABLE DSI_CMCR_GSW0TX
AnnaBridge	126:abea610beb85	541	/**
AnnaBridge	126:abea610beb85	542	* @}
AnnaBridge	126:abea610beb85	543	*/
AnnaBridge	126:abea610beb85	544
AnnaBridge	126:abea610beb85	545	/** @defgroup DSI_LP_LPGenShortWriteOneP DSI LP LPGen Short Write OneP
AnnaBridge	126:abea610beb85	546	* @{
AnnaBridge	126:abea610beb85	547	*/
AnnaBridge	126:abea610beb85	548	#define DSI_LP_GSW1P_DISABLE 0U
AnnaBridge	126:abea610beb85	549	#define DSI_LP_GSW1P_ENABLE DSI_CMCR_GSW1TX
AnnaBridge	126:abea610beb85	550	/**
AnnaBridge	126:abea610beb85	551	* @}
AnnaBridge	126:abea610beb85	552	*/
AnnaBridge	126:abea610beb85	553
AnnaBridge	126:abea610beb85	554	/** @defgroup DSI_LP_LPGenShortWriteTwoP DSI LP LPGen Short Write TwoP
AnnaBridge	126:abea610beb85	555	* @{
AnnaBridge	126:abea610beb85	556	*/
AnnaBridge	126:abea610beb85	557	#define DSI_LP_GSW2P_DISABLE 0U
AnnaBridge	126:abea610beb85	558	#define DSI_LP_GSW2P_ENABLE DSI_CMCR_GSW2TX
AnnaBridge	126:abea610beb85	559	/**
AnnaBridge	126:abea610beb85	560	* @}
AnnaBridge	126:abea610beb85	561	*/
AnnaBridge	126:abea610beb85	562
AnnaBridge	126:abea610beb85	563	/** @defgroup DSI_LP_LPGenShortReadNoP DSI LP LPGen Short Read NoP
AnnaBridge	126:abea610beb85	564	* @{
AnnaBridge	126:abea610beb85	565	*/
AnnaBridge	126:abea610beb85	566	#define DSI_LP_GSR0P_DISABLE 0U
AnnaBridge	126:abea610beb85	567	#define DSI_LP_GSR0P_ENABLE DSI_CMCR_GSR0TX
AnnaBridge	126:abea610beb85	568	/**
AnnaBridge	126:abea610beb85	569	* @}
AnnaBridge	126:abea610beb85	570	*/
AnnaBridge	126:abea610beb85	571
AnnaBridge	126:abea610beb85	572	/** @defgroup DSI_LP_LPGenShortReadOneP DSI LP LPGen Short Read OneP
AnnaBridge	126:abea610beb85	573	* @{
AnnaBridge	126:abea610beb85	574	*/
AnnaBridge	126:abea610beb85	575	#define DSI_LP_GSR1P_DISABLE 0U
AnnaBridge	126:abea610beb85	576	#define DSI_LP_GSR1P_ENABLE DSI_CMCR_GSR1TX
AnnaBridge	126:abea610beb85	577	/**
AnnaBridge	126:abea610beb85	578	* @}
AnnaBridge	126:abea610beb85	579	*/
AnnaBridge	126:abea610beb85	580
AnnaBridge	126:abea610beb85	581	/** @defgroup DSI_LP_LPGenShortReadTwoP DSI LP LPGen Short Read TwoP
AnnaBridge	126:abea610beb85	582	* @{
AnnaBridge	126:abea610beb85	583	*/
AnnaBridge	126:abea610beb85	584	#define DSI_LP_GSR2P_DISABLE 0U
AnnaBridge	126:abea610beb85	585	#define DSI_LP_GSR2P_ENABLE DSI_CMCR_GSR2TX
AnnaBridge	126:abea610beb85	586	/**
AnnaBridge	126:abea610beb85	587	* @}
AnnaBridge	126:abea610beb85	588	*/
AnnaBridge	126:abea610beb85	589
AnnaBridge	126:abea610beb85	590	/** @defgroup DSI_LP_LPGenLongWrite DSI LP LPGen LongWrite
AnnaBridge	126:abea610beb85	591	* @{
AnnaBridge	126:abea610beb85	592	*/
AnnaBridge	126:abea610beb85	593	#define DSI_LP_GLW_DISABLE 0U
AnnaBridge	126:abea610beb85	594	#define DSI_LP_GLW_ENABLE DSI_CMCR_GLWTX
AnnaBridge	126:abea610beb85	595	/**
AnnaBridge	126:abea610beb85	596	* @}
AnnaBridge	126:abea610beb85	597	*/
AnnaBridge	126:abea610beb85	598
AnnaBridge	126:abea610beb85	599	/** @defgroup DSI_LP_LPDcsShortWriteNoP DSI LP LPDcs Short Write NoP
AnnaBridge	126:abea610beb85	600	* @{
AnnaBridge	126:abea610beb85	601	*/
AnnaBridge	126:abea610beb85	602	#define DSI_LP_DSW0P_DISABLE 0U
AnnaBridge	126:abea610beb85	603	#define DSI_LP_DSW0P_ENABLE DSI_CMCR_DSW0TX
AnnaBridge	126:abea610beb85	604	/**
AnnaBridge	126:abea610beb85	605	* @}
AnnaBridge	126:abea610beb85	606	*/
AnnaBridge	126:abea610beb85	607
AnnaBridge	126:abea610beb85	608	/** @defgroup DSI_LP_LPDcsShortWriteOneP DSI LP LPDcs Short Write OneP
AnnaBridge	126:abea610beb85	609	* @{
AnnaBridge	126:abea610beb85	610	*/
AnnaBridge	126:abea610beb85	611	#define DSI_LP_DSW1P_DISABLE 0U
AnnaBridge	126:abea610beb85	612	#define DSI_LP_DSW1P_ENABLE DSI_CMCR_DSW1TX
AnnaBridge	126:abea610beb85	613	/**
AnnaBridge	126:abea610beb85	614	* @}
AnnaBridge	126:abea610beb85	615	*/
AnnaBridge	126:abea610beb85	616
AnnaBridge	126:abea610beb85	617	/** @defgroup DSI_LP_LPDcsShortReadNoP DSI LP LPDcs Short Read NoP
AnnaBridge	126:abea610beb85	618	* @{
AnnaBridge	126:abea610beb85	619	*/
AnnaBridge	126:abea610beb85	620	#define DSI_LP_DSR0P_DISABLE 0U
AnnaBridge	126:abea610beb85	621	#define DSI_LP_DSR0P_ENABLE DSI_CMCR_DSR0TX
AnnaBridge	126:abea610beb85	622	/**
AnnaBridge	126:abea610beb85	623	* @}
AnnaBridge	126:abea610beb85	624	*/
AnnaBridge	126:abea610beb85	625
AnnaBridge	126:abea610beb85	626	/** @defgroup DSI_LP_LPDcsLongWrite DSI LP LPDcs Long Write
AnnaBridge	126:abea610beb85	627	* @{
AnnaBridge	126:abea610beb85	628	*/
AnnaBridge	126:abea610beb85	629	#define DSI_LP_DLW_DISABLE 0U
AnnaBridge	126:abea610beb85	630	#define DSI_LP_DLW_ENABLE DSI_CMCR_DLWTX
AnnaBridge	126:abea610beb85	631	/**
AnnaBridge	126:abea610beb85	632	* @}
AnnaBridge	126:abea610beb85	633	*/
AnnaBridge	126:abea610beb85	634
AnnaBridge	126:abea610beb85	635	/** @defgroup DSI_LP_LPMaxReadPacket DSI LP LPMax Read Packet
AnnaBridge	126:abea610beb85	636	* @{
AnnaBridge	126:abea610beb85	637	*/
AnnaBridge	126:abea610beb85	638	#define DSI_LP_MRDP_DISABLE 0U
AnnaBridge	126:abea610beb85	639	#define DSI_LP_MRDP_ENABLE DSI_CMCR_MRDPS
AnnaBridge	126:abea610beb85	640	/**
AnnaBridge	126:abea610beb85	641	* @}
AnnaBridge	126:abea610beb85	642	*/
AnnaBridge	126:abea610beb85	643
AnnaBridge	126:abea610beb85	644	/** @defgroup DSI_HS_PrespMode DSI HS Presp Mode
AnnaBridge	126:abea610beb85	645	* @{
AnnaBridge	126:abea610beb85	646	*/
AnnaBridge	126:abea610beb85	647	#define DSI_HS_PM_DISABLE 0U
AnnaBridge	126:abea610beb85	648	#define DSI_HS_PM_ENABLE DSI_TCCR3_PM
AnnaBridge	126:abea610beb85	649	/**
AnnaBridge	126:abea610beb85	650	* @}
AnnaBridge	126:abea610beb85	651	*/
AnnaBridge	126:abea610beb85	652
AnnaBridge	126:abea610beb85	653
AnnaBridge	126:abea610beb85	654	/** @defgroup DSI_Automatic_Clk_Lane_Control DSI Automatic Clk Lane Control
AnnaBridge	126:abea610beb85	655	* @{
AnnaBridge	126:abea610beb85	656	*/
AnnaBridge	126:abea610beb85	657	#define DSI_AUTO_CLK_LANE_CTRL_DISABLE 0U
AnnaBridge	126:abea610beb85	658	#define DSI_AUTO_CLK_LANE_CTRL_ENABLE DSI_CLCR_ACR
AnnaBridge	126:abea610beb85	659	/**
AnnaBridge	126:abea610beb85	660	* @}
AnnaBridge	126:abea610beb85	661	*/
AnnaBridge	126:abea610beb85	662
AnnaBridge	126:abea610beb85	663	/** @defgroup DSI_Number_Of_Lanes DSI Number Of Lanes
AnnaBridge	126:abea610beb85	664	* @{
AnnaBridge	126:abea610beb85	665	*/
AnnaBridge	126:abea610beb85	666	#define DSI_ONE_DATA_LANE 0U
AnnaBridge	126:abea610beb85	667	#define DSI_TWO_DATA_LANES 1U
AnnaBridge	126:abea610beb85	668	/**
AnnaBridge	126:abea610beb85	669	* @}
AnnaBridge	126:abea610beb85	670	*/
AnnaBridge	126:abea610beb85	671
AnnaBridge	126:abea610beb85	672	/** @defgroup DSI_FlowControl DSI Flow Control
AnnaBridge	126:abea610beb85	673	* @{
AnnaBridge	126:abea610beb85	674	*/
AnnaBridge	126:abea610beb85	675	#define DSI_FLOW_CONTROL_CRC_RX DSI_PCR_CRCRXE
AnnaBridge	126:abea610beb85	676	#define DSI_FLOW_CONTROL_ECC_RX DSI_PCR_ECCRXE
AnnaBridge	126:abea610beb85	677	#define DSI_FLOW_CONTROL_BTA DSI_PCR_BTAE
AnnaBridge	126:abea610beb85	678	#define DSI_FLOW_CONTROL_EOTP_RX DSI_PCR_ETRXE
AnnaBridge	126:abea610beb85	679	#define DSI_FLOW_CONTROL_EOTP_TX DSI_PCR_ETTXE
AnnaBridge	126:abea610beb85	680	#define DSI_FLOW_CONTROL_ALL (DSI_FLOW_CONTROL_CRC_RX \| DSI_FLOW_CONTROL_ECC_RX \| \
AnnaBridge	126:abea610beb85	681	DSI_FLOW_CONTROL_BTA \| DSI_FLOW_CONTROL_EOTP_RX \| \
AnnaBridge	126:abea610beb85	682	DSI_FLOW_CONTROL_EOTP_TX)
AnnaBridge	126:abea610beb85	683	/**
AnnaBridge	126:abea610beb85	684	* @}
AnnaBridge	126:abea610beb85	685	*/
AnnaBridge	126:abea610beb85	686
AnnaBridge	126:abea610beb85	687	/** @defgroup DSI_Color_Coding DSI Color Coding
AnnaBridge	126:abea610beb85	688	* @{
AnnaBridge	126:abea610beb85	689	*/
AnnaBridge	126:abea610beb85	690	#define DSI_RGB565 ((uint32_t)0x00000000U) /!< The values 0x00000001 and 0x00000002 can also be used for the RGB565 color mode configuration /
AnnaBridge	126:abea610beb85	691	#define DSI_RGB666 ((uint32_t)0x00000003U) /!< The value 0x00000004 can also be used for the RGB666 color mode configuration /
AnnaBridge	126:abea610beb85	692	#define DSI_RGB888 ((uint32_t)0x00000005U)
AnnaBridge	126:abea610beb85	693	/**
AnnaBridge	126:abea610beb85	694	* @}
AnnaBridge	126:abea610beb85	695	*/
AnnaBridge	126:abea610beb85	696
AnnaBridge	126:abea610beb85	697	/** @defgroup DSI_LooselyPacked DSI Loosely Packed
AnnaBridge	126:abea610beb85	698	* @{
AnnaBridge	126:abea610beb85	699	*/
AnnaBridge	126:abea610beb85	700	#define DSI_LOOSELY_PACKED_ENABLE DSI_LCOLCR_LPE
AnnaBridge	126:abea610beb85	701	#define DSI_LOOSELY_PACKED_DISABLE 0U
AnnaBridge	126:abea610beb85	702	/**
AnnaBridge	126:abea610beb85	703	* @}
AnnaBridge	126:abea610beb85	704	*/
AnnaBridge	126:abea610beb85	705
AnnaBridge	126:abea610beb85	706	/** @defgroup DSI_HSYNC_Polarity DSI HSYNC Polarity
AnnaBridge	126:abea610beb85	707	* @{
AnnaBridge	126:abea610beb85	708	*/
AnnaBridge	126:abea610beb85	709	#define DSI_HSYNC_ACTIVE_HIGH 0U
AnnaBridge	126:abea610beb85	710	#define DSI_HSYNC_ACTIVE_LOW DSI_LPCR_HSP
AnnaBridge	126:abea610beb85	711	/**
AnnaBridge	126:abea610beb85	712	* @}
AnnaBridge	126:abea610beb85	713	*/
AnnaBridge	126:abea610beb85	714
AnnaBridge	126:abea610beb85	715	/** @defgroup DSI_VSYNC_Polarity DSI VSYNC Polarity
AnnaBridge	126:abea610beb85	716	* @{
AnnaBridge	126:abea610beb85	717	*/
AnnaBridge	126:abea610beb85	718	#define DSI_VSYNC_ACTIVE_HIGH 0U
AnnaBridge	126:abea610beb85	719	#define DSI_VSYNC_ACTIVE_LOW DSI_LPCR_VSP
AnnaBridge	126:abea610beb85	720	/**
AnnaBridge	126:abea610beb85	721	* @}
AnnaBridge	126:abea610beb85	722	*/
AnnaBridge	126:abea610beb85	723
AnnaBridge	126:abea610beb85	724	/** @defgroup DSI_DATA_ENABLE_Polarity DSI DATA ENABLE Polarity
AnnaBridge	126:abea610beb85	725	* @{
AnnaBridge	126:abea610beb85	726	*/
AnnaBridge	126:abea610beb85	727	#define DSI_DATA_ENABLE_ACTIVE_HIGH 0U
AnnaBridge	126:abea610beb85	728	#define DSI_DATA_ENABLE_ACTIVE_LOW DSI_LPCR_DEP
AnnaBridge	126:abea610beb85	729	/**
AnnaBridge	126:abea610beb85	730	* @}
AnnaBridge	126:abea610beb85	731	*/
AnnaBridge	126:abea610beb85	732
AnnaBridge	126:abea610beb85	733	/** @defgroup DSI_PLL_IDF DSI PLL IDF
AnnaBridge	126:abea610beb85	734	* @{
AnnaBridge	126:abea610beb85	735	*/
AnnaBridge	126:abea610beb85	736	#define DSI_PLL_IN_DIV1 ((uint32_t)0x00000001U)
AnnaBridge	126:abea610beb85	737	#define DSI_PLL_IN_DIV2 ((uint32_t)0x00000002U)
AnnaBridge	126:abea610beb85	738	#define DSI_PLL_IN_DIV3 ((uint32_t)0x00000003U)
AnnaBridge	126:abea610beb85	739	#define DSI_PLL_IN_DIV4 ((uint32_t)0x00000004U)
AnnaBridge	126:abea610beb85	740	#define DSI_PLL_IN_DIV5 ((uint32_t)0x00000005U)
AnnaBridge	126:abea610beb85	741	#define DSI_PLL_IN_DIV6 ((uint32_t)0x00000006U)
AnnaBridge	126:abea610beb85	742	#define DSI_PLL_IN_DIV7 ((uint32_t)0x00000007U)
AnnaBridge	126:abea610beb85	743	/**
AnnaBridge	126:abea610beb85	744	* @}
AnnaBridge	126:abea610beb85	745	*/
AnnaBridge	126:abea610beb85	746
AnnaBridge	126:abea610beb85	747	/** @defgroup DSI_PLL_ODF DSI PLL ODF
AnnaBridge	126:abea610beb85	748	* @{
AnnaBridge	126:abea610beb85	749	*/
AnnaBridge	126:abea610beb85	750	#define DSI_PLL_OUT_DIV1 ((uint32_t)0x00000000U)
AnnaBridge	126:abea610beb85	751	#define DSI_PLL_OUT_DIV2 ((uint32_t)0x00000001U)
AnnaBridge	126:abea610beb85	752	#define DSI_PLL_OUT_DIV4 ((uint32_t)0x00000002U)
AnnaBridge	126:abea610beb85	753	#define DSI_PLL_OUT_DIV8 ((uint32_t)0x00000003U)
AnnaBridge	126:abea610beb85	754	/**
AnnaBridge	126:abea610beb85	755	* @}
AnnaBridge	126:abea610beb85	756	*/
AnnaBridge	126:abea610beb85	757
AnnaBridge	126:abea610beb85	758	/** @defgroup DSI_Flags DSI Flags
AnnaBridge	126:abea610beb85	759	* @{
AnnaBridge	126:abea610beb85	760	*/
AnnaBridge	126:abea610beb85	761	#define DSI_FLAG_TE DSI_WISR_TEIF
AnnaBridge	126:abea610beb85	762	#define DSI_FLAG_ER DSI_WISR_ERIF
AnnaBridge	126:abea610beb85	763	#define DSI_FLAG_BUSY DSI_WISR_BUSY
AnnaBridge	126:abea610beb85	764	#define DSI_FLAG_PLLLS DSI_WISR_PLLLS
AnnaBridge	126:abea610beb85	765	#define DSI_FLAG_PLLL DSI_WISR_PLLLIF
AnnaBridge	126:abea610beb85	766	#define DSI_FLAG_PLLU DSI_WISR_PLLUIF
AnnaBridge	126:abea610beb85	767	#define DSI_FLAG_RRS DSI_WISR_RRS
AnnaBridge	126:abea610beb85	768	#define DSI_FLAG_RR DSI_WISR_RRIF
AnnaBridge	126:abea610beb85	769	/**
AnnaBridge	126:abea610beb85	770	* @}
AnnaBridge	126:abea610beb85	771	*/
AnnaBridge	126:abea610beb85	772
AnnaBridge	126:abea610beb85	773	/** @defgroup DSI_Interrupts DSI Interrupts
AnnaBridge	126:abea610beb85	774	* @{
AnnaBridge	126:abea610beb85	775	*/
AnnaBridge	126:abea610beb85	776	#define DSI_IT_TE DSI_WIER_TEIE
AnnaBridge	126:abea610beb85	777	#define DSI_IT_ER DSI_WIER_ERIE
AnnaBridge	126:abea610beb85	778	#define DSI_IT_PLLL DSI_WIER_PLLLIE
AnnaBridge	126:abea610beb85	779	#define DSI_IT_PLLU DSI_WIER_PLLUIE
AnnaBridge	126:abea610beb85	780	#define DSI_IT_RR DSI_WIER_RRIE
AnnaBridge	126:abea610beb85	781	/**
AnnaBridge	126:abea610beb85	782	* @}
AnnaBridge	126:abea610beb85	783	*/
AnnaBridge	126:abea610beb85	784
AnnaBridge	126:abea610beb85	785	/** @defgroup DSI_SHORT_WRITE_PKT_Data_Type DSI SHORT WRITE PKT Data Type
AnnaBridge	126:abea610beb85	786	* @{
AnnaBridge	126:abea610beb85	787	*/
AnnaBridge	126:abea610beb85	788	#define DSI_DCS_SHORT_PKT_WRITE_P0 ((uint32_t)0x00000005U) /!< DCS short write, no parameters /
AnnaBridge	126:abea610beb85	789	#define DSI_DCS_SHORT_PKT_WRITE_P1 ((uint32_t)0x00000015U) /!< DCS short write, one parameter /
AnnaBridge	126:abea610beb85	790	#define DSI_GEN_SHORT_PKT_WRITE_P0 ((uint32_t)0x00000003U) /!< Generic short write, no parameters /
AnnaBridge	126:abea610beb85	791	#define DSI_GEN_SHORT_PKT_WRITE_P1 ((uint32_t)0x00000013U) /!< Generic short write, one parameter /
AnnaBridge	126:abea610beb85	792	#define DSI_GEN_SHORT_PKT_WRITE_P2 ((uint32_t)0x00000023U) /!< Generic short write, two parameters /
AnnaBridge	126:abea610beb85	793	/**
AnnaBridge	126:abea610beb85	794	* @}
AnnaBridge	126:abea610beb85	795	*/
AnnaBridge	126:abea610beb85	796
AnnaBridge	126:abea610beb85	797	/** @defgroup DSI_LONG_WRITE_PKT_Data_Type DSI LONG WRITE PKT Data Type
AnnaBridge	126:abea610beb85	798	* @{
AnnaBridge	126:abea610beb85	799	*/
AnnaBridge	126:abea610beb85	800	#define DSI_DCS_LONG_PKT_WRITE ((uint32_t)0x00000039U) /!< DCS long write /
AnnaBridge	126:abea610beb85	801	#define DSI_GEN_LONG_PKT_WRITE ((uint32_t)0x00000029U) /!< Generic long write /
AnnaBridge	126:abea610beb85	802	/**
AnnaBridge	126:abea610beb85	803	* @}
AnnaBridge	126:abea610beb85	804	*/
AnnaBridge	126:abea610beb85	805
AnnaBridge	126:abea610beb85	806	/** @defgroup DSI_SHORT_READ_PKT_Data_Type DSI SHORT READ PKT Data Type
AnnaBridge	126:abea610beb85	807	* @{
AnnaBridge	126:abea610beb85	808	*/
AnnaBridge	126:abea610beb85	809	#define DSI_DCS_SHORT_PKT_READ ((uint32_t)0x00000006U) /!< DCS short read /
AnnaBridge	126:abea610beb85	810	#define DSI_GEN_SHORT_PKT_READ_P0 ((uint32_t)0x00000004U) /!< Generic short read, no parameters /
AnnaBridge	126:abea610beb85	811	#define DSI_GEN_SHORT_PKT_READ_P1 ((uint32_t)0x00000014U) /!< Generic short read, one parameter /
AnnaBridge	126:abea610beb85	812	#define DSI_GEN_SHORT_PKT_READ_P2 ((uint32_t)0x00000024U) /!< Generic short read, two parameters /
AnnaBridge	126:abea610beb85	813	/**
AnnaBridge	126:abea610beb85	814	* @}
AnnaBridge	126:abea610beb85	815	*/
AnnaBridge	126:abea610beb85	816
AnnaBridge	126:abea610beb85	817	/** @defgroup DSI_Error_Data_Type DSI Error Data Type
AnnaBridge	126:abea610beb85	818	* @{
AnnaBridge	126:abea610beb85	819	*/
AnnaBridge	126:abea610beb85	820	#define HAL_DSI_ERROR_NONE 0
AnnaBridge	126:abea610beb85	821	#define HAL_DSI_ERROR_ACK ((uint32_t)0x00000001U) /!< acknowledge errors /
AnnaBridge	126:abea610beb85	822	#define HAL_DSI_ERROR_PHY ((uint32_t)0x00000002U) /!< PHY related errors /
AnnaBridge	126:abea610beb85	823	#define HAL_DSI_ERROR_TX ((uint32_t)0x00000004U) /!< transmission error /
AnnaBridge	126:abea610beb85	824	#define HAL_DSI_ERROR_RX ((uint32_t)0x00000008U) /!< reception error /
AnnaBridge	126:abea610beb85	825	#define HAL_DSI_ERROR_ECC ((uint32_t)0x00000010U) /!< ECC errors /
AnnaBridge	126:abea610beb85	826	#define HAL_DSI_ERROR_CRC ((uint32_t)0x00000020U) /!< CRC error /
AnnaBridge	126:abea610beb85	827	#define HAL_DSI_ERROR_PSE ((uint32_t)0x00000040U) /!< Packet Size error /
AnnaBridge	126:abea610beb85	828	#define HAL_DSI_ERROR_EOT ((uint32_t)0x00000080U) /!< End Of Transmission error /
AnnaBridge	126:abea610beb85	829	#define HAL_DSI_ERROR_OVF ((uint32_t)0x00000100U) /!< FIFO overflow error /
AnnaBridge	126:abea610beb85	830	#define HAL_DSI_ERROR_GEN ((uint32_t)0x00000200U) /!< Generic FIFO related errors /
AnnaBridge	126:abea610beb85	831	/**
AnnaBridge	126:abea610beb85	832	* @}
AnnaBridge	126:abea610beb85	833	*/
AnnaBridge	126:abea610beb85	834
AnnaBridge	126:abea610beb85	835	/** @defgroup DSI_Lane_Group DSI Lane Group
AnnaBridge	126:abea610beb85	836	* @{
AnnaBridge	126:abea610beb85	837	*/
AnnaBridge	126:abea610beb85	838	#define DSI_CLOCK_LANE ((uint32_t)0x00000000U)
AnnaBridge	126:abea610beb85	839	#define DSI_DATA_LANES ((uint32_t)0x00000001U)
AnnaBridge	126:abea610beb85	840	/**
AnnaBridge	126:abea610beb85	841	* @}
AnnaBridge	126:abea610beb85	842	*/
AnnaBridge	126:abea610beb85	843
AnnaBridge	126:abea610beb85	844	/** @defgroup DSI_Communication_Delay DSI Communication Delay
AnnaBridge	126:abea610beb85	845	* @{
AnnaBridge	126:abea610beb85	846	*/
AnnaBridge	126:abea610beb85	847	#define DSI_SLEW_RATE_HSTX ((uint32_t)0x00000000U)
AnnaBridge	126:abea610beb85	848	#define DSI_SLEW_RATE_LPTX ((uint32_t)0x00000001U)
AnnaBridge	126:abea610beb85	849	#define DSI_HS_DELAY ((uint32_t)0x00000002U)
AnnaBridge	126:abea610beb85	850	/**
AnnaBridge	126:abea610beb85	851	* @}
AnnaBridge	126:abea610beb85	852	*/
AnnaBridge	126:abea610beb85	853
AnnaBridge	126:abea610beb85	854	/** @defgroup DSI_CustomLane DSI CustomLane
AnnaBridge	126:abea610beb85	855	* @{
AnnaBridge	126:abea610beb85	856	*/
AnnaBridge	126:abea610beb85	857	#define DSI_SWAP_LANE_PINS ((uint32_t)0x00000000U)
AnnaBridge	126:abea610beb85	858	#define DSI_INVERT_HS_SIGNAL ((uint32_t)0x00000001U)
AnnaBridge	126:abea610beb85	859	/**
AnnaBridge	126:abea610beb85	860	* @}
AnnaBridge	126:abea610beb85	861	*/
AnnaBridge	126:abea610beb85	862
AnnaBridge	126:abea610beb85	863	/** @defgroup DSI_Lane_Select DSI Lane Select
AnnaBridge	126:abea610beb85	864	* @{
AnnaBridge	126:abea610beb85	865	*/
AnnaBridge	126:abea610beb85	866	#define DSI_CLOCK_LANE ((uint32_t)0x00000000U)
AnnaBridge	126:abea610beb85	867	#define DSI_DATA_LANE0 ((uint32_t)0x00000001U)
AnnaBridge	126:abea610beb85	868	#define DSI_DATA_LANE1 ((uint32_t)0x00000002U)
AnnaBridge	126:abea610beb85	869	/**
AnnaBridge	126:abea610beb85	870	* @}
AnnaBridge	126:abea610beb85	871	*/
AnnaBridge	126:abea610beb85	872
AnnaBridge	126:abea610beb85	873	/** @defgroup DSI_PHY_Timing DSI PHY Timing
AnnaBridge	126:abea610beb85	874	* @{
AnnaBridge	126:abea610beb85	875	*/
AnnaBridge	126:abea610beb85	876	#define DSI_TCLK_POST ((uint32_t)0x00000000U)
AnnaBridge	126:abea610beb85	877	#define DSI_TLPX_CLK ((uint32_t)0x00000001U)
AnnaBridge	126:abea610beb85	878	#define DSI_THS_EXIT ((uint32_t)0x00000002U)
AnnaBridge	126:abea610beb85	879	#define DSI_TLPX_DATA ((uint32_t)0x00000003U)
AnnaBridge	126:abea610beb85	880	#define DSI_THS_ZERO ((uint32_t)0x00000004U)
AnnaBridge	126:abea610beb85	881	#define DSI_THS_TRAIL ((uint32_t)0x00000005U)
AnnaBridge	126:abea610beb85	882	#define DSI_THS_PREPARE ((uint32_t)0x00000006U)
AnnaBridge	126:abea610beb85	883	#define DSI_TCLK_ZERO ((uint32_t)0x00000007U)
AnnaBridge	126:abea610beb85	884	#define DSI_TCLK_PREPARE ((uint32_t)0x00000008U)
AnnaBridge	126:abea610beb85	885	/**
AnnaBridge	126:abea610beb85	886	* @}
AnnaBridge	126:abea610beb85	887	*/
AnnaBridge	126:abea610beb85	888
AnnaBridge	126:abea610beb85	889	/* Exported macros -----------------------------------------------------------*/
AnnaBridge	126:abea610beb85	890	/**
AnnaBridge	126:abea610beb85	891	* @brief Enables the DSI host.
AnnaBridge	126:abea610beb85	892	* @param __HANDLE__: DSI handle
AnnaBridge	126:abea610beb85	893	* @retval None.
AnnaBridge	126:abea610beb85	894	*/
AnnaBridge	126:abea610beb85	895	#define __HAL_DSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= DSI_CR_EN)
AnnaBridge	126:abea610beb85	896
AnnaBridge	126:abea610beb85	897	/**
AnnaBridge	126:abea610beb85	898	* @brief Disables the DSI host.
AnnaBridge	126:abea610beb85	899	* @param __HANDLE__: DSI handle
AnnaBridge	126:abea610beb85	900	* @retval None.
AnnaBridge	126:abea610beb85	901	*/
AnnaBridge	126:abea610beb85	902	#define __HAL_DSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DSI_CR_EN)
AnnaBridge	126:abea610beb85	903
AnnaBridge	126:abea610beb85	904	/**
AnnaBridge	126:abea610beb85	905	* @brief Enables the DSI wrapper.
AnnaBridge	126:abea610beb85	906	* @param __HANDLE__: DSI handle
AnnaBridge	126:abea610beb85	907	* @retval None.
AnnaBridge	126:abea610beb85	908	*/
AnnaBridge	126:abea610beb85	909	#define __HAL_DSI_WRAPPER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->WCR \|= DSI_WCR_DSIEN)
AnnaBridge	126:abea610beb85	910
AnnaBridge	126:abea610beb85	911	/**
AnnaBridge	126:abea610beb85	912	* @brief Disable the DSI wrapper.
AnnaBridge	126:abea610beb85	913	* @param __HANDLE__: DSI handle
AnnaBridge	126:abea610beb85	914	* @retval None.
AnnaBridge	126:abea610beb85	915	*/
AnnaBridge	126:abea610beb85	916	#define __HAL_DSI_WRAPPER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->WCR &= ~DSI_WCR_DSIEN)
AnnaBridge	126:abea610beb85	917
AnnaBridge	126:abea610beb85	918	/**
AnnaBridge	126:abea610beb85	919	* @brief Enables the DSI PLL.
AnnaBridge	126:abea610beb85	920	* @param __HANDLE__: DSI handle
AnnaBridge	126:abea610beb85	921	* @retval None.
AnnaBridge	126:abea610beb85	922	*/
AnnaBridge	126:abea610beb85	923	#define __HAL_DSI_PLL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR \|= DSI_WRPCR_PLLEN)
AnnaBridge	126:abea610beb85	924
AnnaBridge	126:abea610beb85	925	/**
AnnaBridge	126:abea610beb85	926	* @brief Disables the DSI PLL.
AnnaBridge	126:abea610beb85	927	* @param __HANDLE__: DSI handle
AnnaBridge	126:abea610beb85	928	* @retval None.
AnnaBridge	126:abea610beb85	929	*/
AnnaBridge	126:abea610beb85	930	#define __HAL_DSI_PLL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR &= ~DSI_WRPCR_PLLEN)
AnnaBridge	126:abea610beb85	931
AnnaBridge	126:abea610beb85	932	/**
AnnaBridge	126:abea610beb85	933	* @brief Enables the DSI regulator.
AnnaBridge	126:abea610beb85	934	* @param __HANDLE__: DSI handle
AnnaBridge	126:abea610beb85	935	* @retval None.
AnnaBridge	126:abea610beb85	936	*/
AnnaBridge	126:abea610beb85	937	#define __HAL_DSI_REG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR \|= DSI_WRPCR_REGEN)
AnnaBridge	126:abea610beb85	938
AnnaBridge	126:abea610beb85	939	/**
AnnaBridge	126:abea610beb85	940	* @brief Disables the DSI regulator.
AnnaBridge	126:abea610beb85	941	* @param __HANDLE__: DSI handle
AnnaBridge	126:abea610beb85	942	* @retval None.
AnnaBridge	126:abea610beb85	943	*/
AnnaBridge	126:abea610beb85	944	#define __HAL_DSI_REG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR &= ~DSI_WRPCR_REGEN)
AnnaBridge	126:abea610beb85	945
AnnaBridge	126:abea610beb85	946	/**
AnnaBridge	126:abea610beb85	947	* @brief Get the DSI pending flags.
AnnaBridge	126:abea610beb85	948	* @param __HANDLE__: DSI handle.
AnnaBridge	126:abea610beb85	949	* @param __FLAG__: Get the specified flag.
AnnaBridge	126:abea610beb85	950	* This parameter can be any combination of the following values:
AnnaBridge	126:abea610beb85	951	* @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag
AnnaBridge	126:abea610beb85	952	* @arg DSI_FLAG_ER : End of Refresh Interrupt Flag
AnnaBridge	126:abea610beb85	953	* @arg DSI_FLAG_BUSY : Busy Flag
AnnaBridge	126:abea610beb85	954	* @arg DSI_FLAG_PLLLS: PLL Lock Status
AnnaBridge	126:abea610beb85	955	* @arg DSI_FLAG_PLLL : PLL Lock Interrupt Flag
AnnaBridge	126:abea610beb85	956	* @arg DSI_FLAG_PLLU : PLL Unlock Interrupt Flag
AnnaBridge	126:abea610beb85	957	* @arg DSI_FLAG_RRS : Regulator Ready Flag
AnnaBridge	126:abea610beb85	958	* @arg DSI_FLAG_RR : Regulator Ready Interrupt Flag
AnnaBridge	126:abea610beb85	959	* @retval The state of FLAG (SET or RESET).
AnnaBridge	126:abea610beb85	960	*/
AnnaBridge	126:abea610beb85	961	#define __HAL_DSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->WISR & (__FLAG__))
AnnaBridge	126:abea610beb85	962
AnnaBridge	126:abea610beb85	963	/**
AnnaBridge	126:abea610beb85	964	* @brief Clears the DSI pending flags.
AnnaBridge	126:abea610beb85	965	* @param __HANDLE__: DSI handle.
AnnaBridge	126:abea610beb85	966	* @param __FLAG__: specifies the flag to clear.
AnnaBridge	126:abea610beb85	967	* This parameter can be any combination of the following values:
AnnaBridge	126:abea610beb85	968	* @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag
AnnaBridge	126:abea610beb85	969	* @arg DSI_FLAG_ER : End of Refresh Interrupt Flag
AnnaBridge	126:abea610beb85	970	* @arg DSI_FLAG_PLLL : PLL Lock Interrupt Flag
AnnaBridge	126:abea610beb85	971	* @arg DSI_FLAG_PLLU : PLL Unlock Interrupt Flag
AnnaBridge	126:abea610beb85	972	* @arg DSI_FLAG_RR : Regulator Ready Interrupt Flag
AnnaBridge	126:abea610beb85	973	* @retval None
AnnaBridge	126:abea610beb85	974	*/
AnnaBridge	126:abea610beb85	975	#define __HAL_DSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->WIFCR = (__FLAG__))
AnnaBridge	126:abea610beb85	976
AnnaBridge	126:abea610beb85	977	/**
AnnaBridge	126:abea610beb85	978	* @brief Enables the specified DSI interrupts.
AnnaBridge	126:abea610beb85	979	* @param __HANDLE__: DSI handle.
AnnaBridge	126:abea610beb85	980	* @param __INTERRUPT__: specifies the DSI interrupt sources to be enabled.
AnnaBridge	126:abea610beb85	981	* This parameter can be any combination of the following values:
AnnaBridge	126:abea610beb85	982	* @arg DSI_IT_TE : Tearing Effect Interrupt
AnnaBridge	126:abea610beb85	983	* @arg DSI_IT_ER : End of Refresh Interrupt
AnnaBridge	126:abea610beb85	984	* @arg DSI_IT_PLLL: PLL Lock Interrupt
AnnaBridge	126:abea610beb85	985	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
AnnaBridge	126:abea610beb85	986	* @arg DSI_IT_RR : Regulator Ready Interrupt
AnnaBridge	126:abea610beb85	987	* @retval None
AnnaBridge	126:abea610beb85	988	*/
AnnaBridge	126:abea610beb85	989	#define __HAL_DSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER \|= (__INTERRUPT__))
AnnaBridge	126:abea610beb85	990
AnnaBridge	126:abea610beb85	991	/**
AnnaBridge	126:abea610beb85	992	* @brief Disables the specified DSI interrupts.
AnnaBridge	126:abea610beb85	993	* @param __HANDLE__: DSI handle
AnnaBridge	126:abea610beb85	994	* @param __INTERRUPT__: specifies the DSI interrupt sources to be disabled.
AnnaBridge	126:abea610beb85	995	* This parameter can be any combination of the following values:
AnnaBridge	126:abea610beb85	996	* @arg DSI_IT_TE : Tearing Effect Interrupt
AnnaBridge	126:abea610beb85	997	* @arg DSI_IT_ER : End of Refresh Interrupt
AnnaBridge	126:abea610beb85	998	* @arg DSI_IT_PLLL: PLL Lock Interrupt
AnnaBridge	126:abea610beb85	999	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
AnnaBridge	126:abea610beb85	1000	* @arg DSI_IT_RR : Regulator Ready Interrupt
AnnaBridge	126:abea610beb85	1001	* @retval None
AnnaBridge	126:abea610beb85	1002	*/
AnnaBridge	126:abea610beb85	1003	#define __HAL_DSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER &= ~(__INTERRUPT__))
AnnaBridge	126:abea610beb85	1004
AnnaBridge	126:abea610beb85	1005	/**
AnnaBridge	126:abea610beb85	1006	* @brief Checks whether the specified DSI interrupt has occurred or not.
AnnaBridge	126:abea610beb85	1007	* @param __HANDLE__: DSI handle
AnnaBridge	126:abea610beb85	1008	* @param __INTERRUPT__: specifies the DSI interrupt source to check.
AnnaBridge	126:abea610beb85	1009	* This parameter can be one of the following values:
AnnaBridge	126:abea610beb85	1010	* @arg DSI_IT_TE : Tearing Effect Interrupt
AnnaBridge	126:abea610beb85	1011	* @arg DSI_IT_ER : End of Refresh Interrupt
AnnaBridge	126:abea610beb85	1012	* @arg DSI_IT_PLLL: PLL Lock Interrupt
AnnaBridge	126:abea610beb85	1013	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
AnnaBridge	126:abea610beb85	1014	* @arg DSI_IT_RR : Regulator Ready Interrupt
AnnaBridge	126:abea610beb85	1015	* @retval The state of INTERRUPT (SET or RESET).
AnnaBridge	126:abea610beb85	1016	*/
AnnaBridge	126:abea610beb85	1017	#define __HAL_DSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WISR & (__INTERRUPT__))
AnnaBridge	126:abea610beb85	1018
AnnaBridge	126:abea610beb85	1019	/* Exported functions --------------------------------------------------------*/
AnnaBridge	126:abea610beb85	1020	/** @defgroup DSI_Exported_Functions DSI Exported Functions
AnnaBridge	126:abea610beb85	1021	* @{
AnnaBridge	126:abea610beb85	1022	*/
AnnaBridge	126:abea610beb85	1023	HAL_StatusTypeDef HAL_DSI_Init(DSI_HandleTypeDef hdsi, DSI_PLLInitTypeDef PLLInit);
AnnaBridge	126:abea610beb85	1024	HAL_StatusTypeDef HAL_DSI_DeInit(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1025	void HAL_DSI_MspInit(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1026	void HAL_DSI_MspDeInit(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1027
AnnaBridge	126:abea610beb85	1028	void HAL_DSI_IRQHandler(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1029	void HAL_DSI_TearingEffectCallback(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1030	void HAL_DSI_EndOfRefreshCallback(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1031	void HAL_DSI_ErrorCallback(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1032
AnnaBridge	126:abea610beb85	1033	HAL_StatusTypeDef HAL_DSI_SetGenericVCID(DSI_HandleTypeDef *hdsi, uint32_t VirtualChannelID);
AnnaBridge	126:abea610beb85	1034	HAL_StatusTypeDef HAL_DSI_ConfigVideoMode(DSI_HandleTypeDef hdsi, DSI_VidCfgTypeDef VidCfg);
AnnaBridge	126:abea610beb85	1035	HAL_StatusTypeDef HAL_DSI_ConfigAdaptedCommandMode(DSI_HandleTypeDef hdsi, DSI_CmdCfgTypeDef CmdCfg);
AnnaBridge	126:abea610beb85	1036	HAL_StatusTypeDef HAL_DSI_ConfigCommand(DSI_HandleTypeDef hdsi, DSI_LPCmdTypeDef LPCmd);
AnnaBridge	126:abea610beb85	1037	HAL_StatusTypeDef HAL_DSI_ConfigFlowControl(DSI_HandleTypeDef *hdsi, uint32_t FlowControl);
AnnaBridge	126:abea610beb85	1038	HAL_StatusTypeDef HAL_DSI_ConfigPhyTimer(DSI_HandleTypeDef hdsi, DSI_PHY_TimerTypeDef PhyTimers);
AnnaBridge	126:abea610beb85	1039	HAL_StatusTypeDef HAL_DSI_ConfigHostTimeouts(DSI_HandleTypeDef hdsi, DSI_HOST_TimeoutTypeDef HostTimeouts);
AnnaBridge	126:abea610beb85	1040	HAL_StatusTypeDef HAL_DSI_Start(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1041	HAL_StatusTypeDef HAL_DSI_Stop(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1042	HAL_StatusTypeDef HAL_DSI_Refresh(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1043	HAL_StatusTypeDef HAL_DSI_ColorMode(DSI_HandleTypeDef *hdsi, uint32_t ColorMode);
AnnaBridge	126:abea610beb85	1044	HAL_StatusTypeDef HAL_DSI_Shutdown(DSI_HandleTypeDef *hdsi, uint32_t Shutdown);
AnnaBridge	126:abea610beb85	1045	HAL_StatusTypeDef HAL_DSI_ShortWrite(DSI_HandleTypeDef *hdsi,
AnnaBridge	126:abea610beb85	1046	uint32_t ChannelID,
AnnaBridge	126:abea610beb85	1047	uint32_t Mode,
AnnaBridge	126:abea610beb85	1048	uint32_t Param1,
AnnaBridge	126:abea610beb85	1049	uint32_t Param2);
AnnaBridge	126:abea610beb85	1050	HAL_StatusTypeDef HAL_DSI_LongWrite(DSI_HandleTypeDef *hdsi,
AnnaBridge	126:abea610beb85	1051	uint32_t ChannelID,
AnnaBridge	126:abea610beb85	1052	uint32_t Mode,
AnnaBridge	126:abea610beb85	1053	uint32_t NbParams,
AnnaBridge	126:abea610beb85	1054	uint32_t Param1,
AnnaBridge	126:abea610beb85	1055	uint8_t* ParametersTable);
AnnaBridge	126:abea610beb85	1056	HAL_StatusTypeDef HAL_DSI_Read(DSI_HandleTypeDef *hdsi,
AnnaBridge	126:abea610beb85	1057	uint32_t ChannelNbr,
AnnaBridge	126:abea610beb85	1058	uint8_t* Array,
AnnaBridge	126:abea610beb85	1059	uint32_t Size,
AnnaBridge	126:abea610beb85	1060	uint32_t Mode,
AnnaBridge	126:abea610beb85	1061	uint32_t DCSCmd,
AnnaBridge	126:abea610beb85	1062	uint8_t* ParametersTable);
AnnaBridge	126:abea610beb85	1063	HAL_StatusTypeDef HAL_DSI_EnterULPMData(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1064	HAL_StatusTypeDef HAL_DSI_ExitULPMData(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1065	HAL_StatusTypeDef HAL_DSI_EnterULPM(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1066	HAL_StatusTypeDef HAL_DSI_ExitULPM(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1067
AnnaBridge	126:abea610beb85	1068	HAL_StatusTypeDef HAL_DSI_PatternGeneratorStart(DSI_HandleTypeDef *hdsi, uint32_t Mode, uint32_t Orientation);
AnnaBridge	126:abea610beb85	1069	HAL_StatusTypeDef HAL_DSI_PatternGeneratorStop(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1070
AnnaBridge	126:abea610beb85	1071	HAL_StatusTypeDef HAL_DSI_SetSlewRateAndDelayTuning(DSI_HandleTypeDef *hdsi, uint32_t CommDelay, uint32_t Lane, uint32_t Value);
AnnaBridge	126:abea610beb85	1072	HAL_StatusTypeDef HAL_DSI_SetLowPowerRXFilter(DSI_HandleTypeDef *hdsi, uint32_t Frequency);
AnnaBridge	126:abea610beb85	1073	HAL_StatusTypeDef HAL_DSI_SetSDD(DSI_HandleTypeDef *hdsi, FunctionalState State);
AnnaBridge	126:abea610beb85	1074	HAL_StatusTypeDef HAL_DSI_SetLanePinsConfiguration(DSI_HandleTypeDef *hdsi, uint32_t CustomLane, uint32_t Lane, FunctionalState State);
AnnaBridge	126:abea610beb85	1075	HAL_StatusTypeDef HAL_DSI_SetPHYTimings(DSI_HandleTypeDef *hdsi, uint32_t Timing, FunctionalState State, uint32_t Value);
AnnaBridge	126:abea610beb85	1076	HAL_StatusTypeDef HAL_DSI_ForceTXStopMode(DSI_HandleTypeDef *hdsi, uint32_t Lane, FunctionalState State);
AnnaBridge	126:abea610beb85	1077	HAL_StatusTypeDef HAL_DSI_ForceRXLowPower(DSI_HandleTypeDef *hdsi, FunctionalState State);
AnnaBridge	126:abea610beb85	1078	HAL_StatusTypeDef HAL_DSI_ForceDataLanesInRX(DSI_HandleTypeDef *hdsi, FunctionalState State);
AnnaBridge	126:abea610beb85	1079	HAL_StatusTypeDef HAL_DSI_SetPullDown(DSI_HandleTypeDef *hdsi, FunctionalState State);
AnnaBridge	126:abea610beb85	1080	HAL_StatusTypeDef HAL_DSI_SetContentionDetectionOff(DSI_HandleTypeDef *hdsi, FunctionalState State);
AnnaBridge	126:abea610beb85	1081
AnnaBridge	126:abea610beb85	1082	uint32_t HAL_DSI_GetError(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1083	HAL_StatusTypeDef HAL_DSI_ConfigErrorMonitor(DSI_HandleTypeDef *hdsi, uint32_t ActiveErrors);
AnnaBridge	126:abea610beb85	1084	HAL_DSI_StateTypeDef HAL_DSI_GetState(DSI_HandleTypeDef *hdsi);
AnnaBridge	126:abea610beb85	1085	/**
AnnaBridge	126:abea610beb85	1086	* @}
AnnaBridge	126:abea610beb85	1087	*/
AnnaBridge	126:abea610beb85	1088
AnnaBridge	126:abea610beb85	1089	/* Private types -------------------------------------------------------------*/
AnnaBridge	126:abea610beb85	1090	/** @defgroup DSI_Private_Types DSI Private Types
AnnaBridge	126:abea610beb85	1091	* @{
AnnaBridge	126:abea610beb85	1092	*/
AnnaBridge	126:abea610beb85	1093
AnnaBridge	126:abea610beb85	1094	/**
AnnaBridge	126:abea610beb85	1095	* @}
AnnaBridge	126:abea610beb85	1096	*/
AnnaBridge	126:abea610beb85	1097
AnnaBridge	126:abea610beb85	1098	/* Private defines -----------------------------------------------------------*/
AnnaBridge	126:abea610beb85	1099	/** @defgroup DSI_Private_Defines DSI Private Defines
AnnaBridge	126:abea610beb85	1100	* @{
AnnaBridge	126:abea610beb85	1101	*/
AnnaBridge	126:abea610beb85	1102
AnnaBridge	126:abea610beb85	1103	/**
AnnaBridge	126:abea610beb85	1104	* @}
AnnaBridge	126:abea610beb85	1105	*/
AnnaBridge	126:abea610beb85	1106
AnnaBridge	126:abea610beb85	1107	/* Private variables ---------------------------------------------------------*/
AnnaBridge	126:abea610beb85	1108	/** @defgroup DSI_Private_Variables DSI Private Variables
AnnaBridge	126:abea610beb85	1109	* @{
AnnaBridge	126:abea610beb85	1110	*/
AnnaBridge	126:abea610beb85	1111
AnnaBridge	126:abea610beb85	1112	/**
AnnaBridge	126:abea610beb85	1113	* @}
AnnaBridge	126:abea610beb85	1114	*/
AnnaBridge	126:abea610beb85	1115
AnnaBridge	126:abea610beb85	1116	/* Private constants ---------------------------------------------------------*/
AnnaBridge	126:abea610beb85	1117	/** @defgroup DSI_Private_Constants DSI Private Constants
AnnaBridge	126:abea610beb85	1118	* @{
AnnaBridge	126:abea610beb85	1119	*/
AnnaBridge	126:abea610beb85	1120	#define DSI_MAX_RETURN_PKT_SIZE ((uint32_t)0x00000037) /!< Maximum return packet configuration /
AnnaBridge	126:abea610beb85	1121	/**
AnnaBridge	126:abea610beb85	1122	* @}
AnnaBridge	126:abea610beb85	1123	*/
AnnaBridge	126:abea610beb85	1124
AnnaBridge	126:abea610beb85	1125	/* Private macros ------------------------------------------------------------*/
AnnaBridge	126:abea610beb85	1126	/** @defgroup DSI_Private_Macros DSI Private Macros
AnnaBridge	126:abea610beb85	1127	* @{
AnnaBridge	126:abea610beb85	1128	*/
AnnaBridge	126:abea610beb85	1129	#define IS_DSI_PLL_NDIV(NDIV) ((10U <= (NDIV)) && ((NDIV) <= 125U))
AnnaBridge	126:abea610beb85	1130	#define IS_DSI_PLL_IDF(IDF) (((IDF) == DSI_PLL_IN_DIV1) \|\| \
AnnaBridge	126:abea610beb85	1131	((IDF) == DSI_PLL_IN_DIV2) \|\| \
AnnaBridge	126:abea610beb85	1132	((IDF) == DSI_PLL_IN_DIV3) \|\| \
AnnaBridge	126:abea610beb85	1133	((IDF) == DSI_PLL_IN_DIV4) \|\| \
AnnaBridge	126:abea610beb85	1134	((IDF) == DSI_PLL_IN_DIV5) \|\| \
AnnaBridge	126:abea610beb85	1135	((IDF) == DSI_PLL_IN_DIV6) \|\| \
AnnaBridge	126:abea610beb85	1136	((IDF) == DSI_PLL_IN_DIV7))
AnnaBridge	126:abea610beb85	1137	#define IS_DSI_PLL_ODF(ODF) (((ODF) == DSI_PLL_OUT_DIV1) \|\| \
AnnaBridge	126:abea610beb85	1138	((ODF) == DSI_PLL_OUT_DIV2) \|\| \
AnnaBridge	126:abea610beb85	1139	((ODF) == DSI_PLL_OUT_DIV4) \|\| \
AnnaBridge	126:abea610beb85	1140	((ODF) == DSI_PLL_OUT_DIV8))
AnnaBridge	126:abea610beb85	1141	#define IS_DSI_AUTO_CLKLANE_CONTROL(AutoClkLane) (((AutoClkLane) == DSI_AUTO_CLK_LANE_CTRL_DISABLE) \|\| ((AutoClkLane) == DSI_AUTO_CLK_LANE_CTRL_ENABLE))
AnnaBridge	126:abea610beb85	1142	#define IS_DSI_NUMBER_OF_LANES(NumberOfLanes) (((NumberOfLanes) == DSI_ONE_DATA_LANE) \|\| ((NumberOfLanes) == DSI_TWO_DATA_LANES))
AnnaBridge	126:abea610beb85	1143	#define IS_DSI_FLOW_CONTROL(FlowControl) (((FlowControl) \| DSI_FLOW_CONTROL_ALL) == DSI_FLOW_CONTROL_ALL)
AnnaBridge	126:abea610beb85	1144	#define IS_DSI_COLOR_CODING(ColorCoding) ((ColorCoding) <= 5)
AnnaBridge	126:abea610beb85	1145	#define IS_DSI_LOOSELY_PACKED(LooselyPacked) (((LooselyPacked) == DSI_LOOSELY_PACKED_ENABLE) \|\| ((LooselyPacked) == DSI_LOOSELY_PACKED_DISABLE))
AnnaBridge	126:abea610beb85	1146	#define IS_DSI_DE_POLARITY(DataEnable) (((DataEnable) == DSI_DATA_ENABLE_ACTIVE_HIGH) \|\| ((DataEnable) == DSI_DATA_ENABLE_ACTIVE_LOW))
AnnaBridge	126:abea610beb85	1147	#define IS_DSI_VSYNC_POLARITY(VSYNC) (((VSYNC) == DSI_VSYNC_ACTIVE_HIGH) \|\| ((VSYNC) == DSI_VSYNC_ACTIVE_LOW))
AnnaBridge	126:abea610beb85	1148	#define IS_DSI_HSYNC_POLARITY(HSYNC) (((HSYNC) == DSI_HSYNC_ACTIVE_HIGH) \|\| ((HSYNC) == DSI_HSYNC_ACTIVE_LOW))
AnnaBridge	126:abea610beb85	1149	#define IS_DSI_VIDEO_MODE_TYPE(VideoModeType) (((VideoModeType) == DSI_VID_MODE_NB_PULSES) \|\| \
AnnaBridge	126:abea610beb85	1150	((VideoModeType) == DSI_VID_MODE_NB_EVENTS) \|\| \
AnnaBridge	126:abea610beb85	1151	((VideoModeType) == DSI_VID_MODE_BURST))
AnnaBridge	126:abea610beb85	1152	#define IS_DSI_COLOR_MODE(ColorMode) (((ColorMode) == DSI_COLOR_MODE_FULL) \|\| ((ColorMode) == DSI_COLOR_MODE_EIGHT))
AnnaBridge	126:abea610beb85	1153	#define IS_DSI_SHUT_DOWN(ShutDown) (((ShutDown) == DSI_DISPLAY_ON) \|\| ((ShutDown) == DSI_DISPLAY_OFF))
AnnaBridge	126:abea610beb85	1154	#define IS_DSI_LP_COMMAND(LPCommand) (((LPCommand) == DSI_LP_COMMAND_DISABLE) \|\| ((LPCommand) == DSI_LP_COMMAND_ENABLE))
AnnaBridge	126:abea610beb85	1155	#define IS_DSI_LP_HFP(LPHFP) (((LPHFP) == DSI_LP_HFP_DISABLE) \|\| ((LPHFP) == DSI_LP_HFP_ENABLE))
AnnaBridge	126:abea610beb85	1156	#define IS_DSI_LP_HBP(LPHBP) (((LPHBP) == DSI_LP_HBP_DISABLE) \|\| ((LPHBP) == DSI_LP_HBP_ENABLE))
AnnaBridge	126:abea610beb85	1157	#define IS_DSI_LP_VACTIVE(LPVActive) (((LPVActive) == DSI_LP_VACT_DISABLE) \|\| ((LPVActive) == DSI_LP_VACT_ENABLE))
AnnaBridge	126:abea610beb85	1158	#define IS_DSI_LP_VFP(LPVFP) (((LPVFP) == DSI_LP_VFP_DISABLE) \|\| ((LPVFP) == DSI_LP_VFP_ENABLE))
AnnaBridge	126:abea610beb85	1159	#define IS_DSI_LP_VBP(LPVBP) (((LPVBP) == DSI_LP_VBP_DISABLE) \|\| ((LPVBP) == DSI_LP_VBP_ENABLE))
AnnaBridge	126:abea610beb85	1160	#define IS_DSI_LP_VSYNC(LPVSYNC) (((LPVSYNC) == DSI_LP_VSYNC_DISABLE) \|\| ((LPVSYNC) == DSI_LP_VSYNC_ENABLE))
AnnaBridge	126:abea610beb85	1161	#define IS_DSI_FBTAA(FrameBTAAcknowledge) (((FrameBTAAcknowledge) == DSI_FBTAA_DISABLE) \|\| ((FrameBTAAcknowledge) == DSI_FBTAA_ENABLE))
AnnaBridge	126:abea610beb85	1162	#define IS_DSI_TE_SOURCE(TESource) (((TESource) == DSI_TE_DSILINK) \|\| ((TESource) == DSI_TE_EXTERNAL))
AnnaBridge	126:abea610beb85	1163	#define IS_DSI_TE_POLARITY(TEPolarity) (((TEPolarity) == DSI_TE_RISING_EDGE) \|\| ((TEPolarity) == DSI_TE_FALLING_EDGE))
AnnaBridge	126:abea610beb85	1164	#define IS_DSI_AUTOMATIC_REFRESH(AutomaticRefresh) (((AutomaticRefresh) == DSI_AR_DISABLE) \|\| ((AutomaticRefresh) == DSI_AR_ENABLE))
AnnaBridge	126:abea610beb85	1165	#define IS_DSI_VS_POLARITY(VSPolarity) (((VSPolarity) == DSI_VSYNC_FALLING) \|\| ((VSPolarity) == DSI_VSYNC_RISING))
AnnaBridge	126:abea610beb85	1166	#define IS_DSI_TE_ACK_REQUEST(TEAcknowledgeRequest) (((TEAcknowledgeRequest) == DSI_TE_ACKNOWLEDGE_DISABLE) \|\| ((TEAcknowledgeRequest) == DSI_TE_ACKNOWLEDGE_ENABLE))
AnnaBridge	126:abea610beb85	1167	#define IS_DSI_ACK_REQUEST(AcknowledgeRequest) (((AcknowledgeRequest) == DSI_ACKNOWLEDGE_DISABLE) \|\| ((AcknowledgeRequest) == DSI_ACKNOWLEDGE_ENABLE))
AnnaBridge	126:abea610beb85	1168	#define IS_DSI_LP_GSW0P(LP_GSW0P) (((LP_GSW0P) == DSI_LP_GSW0P_DISABLE) \|\| ((LP_GSW0P) == DSI_LP_GSW0P_ENABLE))
AnnaBridge	126:abea610beb85	1169	#define IS_DSI_LP_GSW1P(LP_GSW1P) (((LP_GSW1P) == DSI_LP_GSW1P_DISABLE) \|\| ((LP_GSW1P) == DSI_LP_GSW1P_ENABLE))
AnnaBridge	126:abea610beb85	1170	#define IS_DSI_LP_GSW2P(LP_GSW2P) (((LP_GSW2P) == DSI_LP_GSW2P_DISABLE) \|\| ((LP_GSW2P) == DSI_LP_GSW2P_ENABLE))
AnnaBridge	126:abea610beb85	1171	#define IS_DSI_LP_GSR0P(LP_GSR0P) (((LP_GSR0P) == DSI_LP_GSR0P_DISABLE) \|\| ((LP_GSR0P) == DSI_LP_GSR0P_ENABLE))
AnnaBridge	126:abea610beb85	1172	#define IS_DSI_LP_GSR1P(LP_GSR1P) (((LP_GSR1P) == DSI_LP_GSR1P_DISABLE) \|\| ((LP_GSR1P) == DSI_LP_GSR1P_ENABLE))
AnnaBridge	126:abea610beb85	1173	#define IS_DSI_LP_GSR2P(LP_GSR2P) (((LP_GSR2P) == DSI_LP_GSR2P_DISABLE) \|\| ((LP_GSR2P) == DSI_LP_GSR2P_ENABLE))
AnnaBridge	126:abea610beb85	1174	#define IS_DSI_LP_GLW(LP_GLW) (((LP_GLW) == DSI_LP_GLW_DISABLE) \|\| ((LP_GLW) == DSI_LP_GLW_ENABLE))
AnnaBridge	126:abea610beb85	1175	#define IS_DSI_LP_DSW0P(LP_DSW0P) (((LP_DSW0P) == DSI_LP_DSW0P_DISABLE) \|\| ((LP_DSW0P) == DSI_LP_DSW0P_ENABLE))
AnnaBridge	126:abea610beb85	1176	#define IS_DSI_LP_DSW1P(LP_DSW1P) (((LP_DSW1P) == DSI_LP_DSW1P_DISABLE) \|\| ((LP_DSW1P) == DSI_LP_DSW1P_ENABLE))
AnnaBridge	126:abea610beb85	1177	#define IS_DSI_LP_DSR0P(LP_DSR0P) (((LP_DSR0P) == DSI_LP_DSR0P_DISABLE) \|\| ((LP_DSR0P) == DSI_LP_DSR0P_ENABLE))
AnnaBridge	126:abea610beb85	1178	#define IS_DSI_LP_DLW(LP_DLW) (((LP_DLW) == DSI_LP_DLW_DISABLE) \|\| ((LP_DLW) == DSI_LP_DLW_ENABLE))
AnnaBridge	126:abea610beb85	1179	#define IS_DSI_LP_MRDP(LP_MRDP) (((LP_MRDP) == DSI_LP_MRDP_DISABLE) \|\| ((LP_MRDP) == DSI_LP_MRDP_ENABLE))
AnnaBridge	126:abea610beb85	1180	#define IS_DSI_SHORT_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_WRITE_P0) \|\| \
AnnaBridge	126:abea610beb85	1181	((MODE) == DSI_DCS_SHORT_PKT_WRITE_P1) \|\| \
AnnaBridge	126:abea610beb85	1182	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P0) \|\| \
AnnaBridge	126:abea610beb85	1183	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P1) \|\| \
AnnaBridge	126:abea610beb85	1184	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P2))
AnnaBridge	126:abea610beb85	1185	#define IS_DSI_LONG_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_LONG_PKT_WRITE) \|\| \
AnnaBridge	126:abea610beb85	1186	((MODE) == DSI_GEN_LONG_PKT_WRITE))
AnnaBridge	126:abea610beb85	1187	#define IS_DSI_READ_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_READ) \|\| \
AnnaBridge	126:abea610beb85	1188	((MODE) == DSI_GEN_SHORT_PKT_READ_P0) \|\| \
AnnaBridge	126:abea610beb85	1189	((MODE) == DSI_GEN_SHORT_PKT_READ_P1) \|\| \
AnnaBridge	126:abea610beb85	1190	((MODE) == DSI_GEN_SHORT_PKT_READ_P2))
AnnaBridge	126:abea610beb85	1191	#define IS_DSI_COMMUNICATION_DELAY(CommDelay) (((CommDelay) == DSI_SLEW_RATE_HSTX) \|\| ((CommDelay) == DSI_SLEW_RATE_LPTX) \|\| ((CommDelay) == DSI_HS_DELAY))
AnnaBridge	126:abea610beb85	1192	#define IS_DSI_LANE_GROUP(Lane) (((Lane) == DSI_CLOCK_LANE) \|\| ((Lane) == DSI_DATA_LANES))
AnnaBridge	126:abea610beb85	1193	#define IS_DSI_CUSTOM_LANE(CustomLane) (((CustomLane) == DSI_SWAP_LANE_PINS) \|\| ((CustomLane) == DSI_INVERT_HS_SIGNAL))
AnnaBridge	126:abea610beb85	1194	#define IS_DSI_LANE(Lane) (((Lane) == DSI_CLOCK_LANE) \|\| ((Lane) == DSI_DATA_LANE0) \|\| ((Lane) == DSI_DATA_LANE1))
AnnaBridge	126:abea610beb85	1195	#define IS_DSI_PHY_TIMING(Timing) (((Timing) == DSI_TCLK_POST ) \|\| \
AnnaBridge	126:abea610beb85	1196	((Timing) == DSI_TLPX_CLK ) \|\| \
AnnaBridge	126:abea610beb85	1197	((Timing) == DSI_THS_EXIT ) \|\| \
AnnaBridge	126:abea610beb85	1198	((Timing) == DSI_TLPX_DATA ) \|\| \
AnnaBridge	126:abea610beb85	1199	((Timing) == DSI_THS_ZERO ) \|\| \
AnnaBridge	126:abea610beb85	1200	((Timing) == DSI_THS_TRAIL ) \|\| \
AnnaBridge	126:abea610beb85	1201	((Timing) == DSI_THS_PREPARE ) \|\| \
AnnaBridge	126:abea610beb85	1202	((Timing) == DSI_TCLK_ZERO ) \|\| \
AnnaBridge	126:abea610beb85	1203	((Timing) == DSI_TCLK_PREPARE))
AnnaBridge	126:abea610beb85	1204
AnnaBridge	126:abea610beb85	1205	/**
AnnaBridge	126:abea610beb85	1206	* @}
AnnaBridge	126:abea610beb85	1207	*/
AnnaBridge	126:abea610beb85	1208
AnnaBridge	126:abea610beb85	1209	/* Private functions prototypes ----------------------------------------------*/
AnnaBridge	126:abea610beb85	1210	/** @defgroup DSI_Private_Functions_Prototypes DSI Private Functions Prototypes
AnnaBridge	126:abea610beb85	1211	* @{
AnnaBridge	126:abea610beb85	1212	*/
AnnaBridge	126:abea610beb85	1213
AnnaBridge	126:abea610beb85	1214	/**
AnnaBridge	126:abea610beb85	1215	* @}
AnnaBridge	126:abea610beb85	1216	*/
AnnaBridge	126:abea610beb85	1217
AnnaBridge	126:abea610beb85	1218	/* Private functions ---------------------------------------------------------*/
AnnaBridge	126:abea610beb85	1219	/** @defgroup DSI_Private_Functions DSI Private Functions
AnnaBridge	126:abea610beb85	1220	* @{
AnnaBridge	126:abea610beb85	1221	*/
AnnaBridge	126:abea610beb85	1222
AnnaBridge	126:abea610beb85	1223	/**
AnnaBridge	126:abea610beb85	1224	* @}
AnnaBridge	126:abea610beb85	1225	*/
AnnaBridge	126:abea610beb85	1226
AnnaBridge	126:abea610beb85	1227	/**
AnnaBridge	126:abea610beb85	1228	* @}
AnnaBridge	126:abea610beb85	1229	*/
AnnaBridge	126:abea610beb85	1230
AnnaBridge	126:abea610beb85	1231	/**
AnnaBridge	126:abea610beb85	1232	* @}
AnnaBridge	126:abea610beb85	1233	*/
AnnaBridge	126:abea610beb85	1234	#endif /STM32F769xx \| STM32F779xx /
AnnaBridge	126:abea610beb85	1235
AnnaBridge	126:abea610beb85	1236	#ifdef __cplusplus
AnnaBridge	126:abea610beb85	1237	}
AnnaBridge	126:abea610beb85	1238	#endif
AnnaBridge	126:abea610beb85	1239
AnnaBridge	126:abea610beb85	1240	#endif /* __STM32F7xx_HAL_DSI_H */
AnnaBridge	126:abea610beb85	1241
AnnaBridge	126:abea610beb85	1242	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/