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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MOTE_L152RC/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_exti.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
128:9bcdf88f62b0
Child:
165:d1b4690b3f8b
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /**
<> 128:9bcdf88f62b0 2 ******************************************************************************
<> 128:9bcdf88f62b0 3 * @file stm32l1xx_ll_exti.h
<> 128:9bcdf88f62b0 4 * @author MCD Application Team
<> 128:9bcdf88f62b0 5 * @version V1.2.0
<> 128:9bcdf88f62b0 6 * @date 01-July-2016
<> 128:9bcdf88f62b0 7 * @brief Header file of EXTI LL module.
<> 128:9bcdf88f62b0 8 ******************************************************************************
<> 128:9bcdf88f62b0 9 * @attention
<> 128:9bcdf88f62b0 10 *
<> 128:9bcdf88f62b0 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 128:9bcdf88f62b0 12 *
<> 128:9bcdf88f62b0 13 * Redistribution and use in source and binary forms, with or without modification,
<> 128:9bcdf88f62b0 14 * are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 128:9bcdf88f62b0 16 * this list of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 128:9bcdf88f62b0 18 * this list of conditions and the following disclaimer in the documentation
<> 128:9bcdf88f62b0 19 * and/or other materials provided with the distribution.
<> 128:9bcdf88f62b0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 128:9bcdf88f62b0 21 * may be used to endorse or promote products derived from this software
<> 128:9bcdf88f62b0 22 * without specific prior written permission.
<> 128:9bcdf88f62b0 23 *
<> 128:9bcdf88f62b0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 128:9bcdf88f62b0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 128:9bcdf88f62b0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 128:9bcdf88f62b0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 128:9bcdf88f62b0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 128:9bcdf88f62b0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 128:9bcdf88f62b0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 128:9bcdf88f62b0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 128:9bcdf88f62b0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 34 *
<> 128:9bcdf88f62b0 35 ******************************************************************************
<> 128:9bcdf88f62b0 36 */
<> 128:9bcdf88f62b0 37
<> 128:9bcdf88f62b0 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 128:9bcdf88f62b0 39 #ifndef __STM32L1xx_LL_EXTI_H
<> 128:9bcdf88f62b0 40 #define __STM32L1xx_LL_EXTI_H
<> 128:9bcdf88f62b0 41
<> 128:9bcdf88f62b0 42 #ifdef __cplusplus
<> 128:9bcdf88f62b0 43 extern "C" {
<> 128:9bcdf88f62b0 44 #endif
<> 128:9bcdf88f62b0 45
<> 128:9bcdf88f62b0 46 /* Includes ------------------------------------------------------------------*/
<> 128:9bcdf88f62b0 47 #include "stm32l1xx.h"
<> 128:9bcdf88f62b0 48
<> 128:9bcdf88f62b0 49 /** @addtogroup STM32L1xx_LL_Driver
<> 128:9bcdf88f62b0 50 * @{
<> 128:9bcdf88f62b0 51 */
<> 128:9bcdf88f62b0 52
<> 128:9bcdf88f62b0 53 #if defined (EXTI)
<> 128:9bcdf88f62b0 54
<> 128:9bcdf88f62b0 55 /** @defgroup EXTI_LL EXTI
<> 128:9bcdf88f62b0 56 * @{
<> 128:9bcdf88f62b0 57 */
<> 128:9bcdf88f62b0 58
<> 128:9bcdf88f62b0 59 /* Private types -------------------------------------------------------------*/
<> 128:9bcdf88f62b0 60 /* Private variables ---------------------------------------------------------*/
<> 128:9bcdf88f62b0 61 /* Private constants ---------------------------------------------------------*/
<> 128:9bcdf88f62b0 62 /* Private Macros ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 63 #if defined(USE_FULL_LL_DRIVER)
<> 128:9bcdf88f62b0 64 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
<> 128:9bcdf88f62b0 65 * @{
<> 128:9bcdf88f62b0 66 */
<> 128:9bcdf88f62b0 67 /**
<> 128:9bcdf88f62b0 68 * @}
<> 128:9bcdf88f62b0 69 */
<> 128:9bcdf88f62b0 70 #endif /*USE_FULL_LL_DRIVER*/
<> 128:9bcdf88f62b0 71 /* Exported types ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 72 #if defined(USE_FULL_LL_DRIVER)
<> 128:9bcdf88f62b0 73 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
<> 128:9bcdf88f62b0 74 * @{
<> 128:9bcdf88f62b0 75 */
<> 128:9bcdf88f62b0 76 typedef struct
<> 128:9bcdf88f62b0 77 {
<> 128:9bcdf88f62b0 78
<> 128:9bcdf88f62b0 79 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
<> 128:9bcdf88f62b0 80 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
<> 128:9bcdf88f62b0 81
<> 128:9bcdf88f62b0 82 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
<> 128:9bcdf88f62b0 83 This parameter can be set either to ENABLE or DISABLE */
<> 128:9bcdf88f62b0 84
<> 128:9bcdf88f62b0 85 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
<> 128:9bcdf88f62b0 86 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
<> 128:9bcdf88f62b0 87
<> 128:9bcdf88f62b0 88 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
<> 128:9bcdf88f62b0 89 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
<> 128:9bcdf88f62b0 90 } LL_EXTI_InitTypeDef;
<> 128:9bcdf88f62b0 91
<> 128:9bcdf88f62b0 92 /**
<> 128:9bcdf88f62b0 93 * @}
<> 128:9bcdf88f62b0 94 */
<> 128:9bcdf88f62b0 95 #endif /*USE_FULL_LL_DRIVER*/
<> 128:9bcdf88f62b0 96
<> 128:9bcdf88f62b0 97 /* Exported constants --------------------------------------------------------*/
<> 128:9bcdf88f62b0 98 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
<> 128:9bcdf88f62b0 99 * @{
<> 128:9bcdf88f62b0 100 */
<> 128:9bcdf88f62b0 101
<> 128:9bcdf88f62b0 102 /** @defgroup EXTI_LL_EC_LINE LINE
<> 128:9bcdf88f62b0 103 * @{
<> 128:9bcdf88f62b0 104 */
<> 128:9bcdf88f62b0 105 #define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */
<> 128:9bcdf88f62b0 106 #define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */
<> 128:9bcdf88f62b0 107 #define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */
<> 128:9bcdf88f62b0 108 #define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */
<> 128:9bcdf88f62b0 109 #define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */
<> 128:9bcdf88f62b0 110 #define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */
<> 128:9bcdf88f62b0 111 #define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */
<> 128:9bcdf88f62b0 112 #define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */
<> 128:9bcdf88f62b0 113 #define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */
<> 128:9bcdf88f62b0 114 #define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */
<> 128:9bcdf88f62b0 115 #define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */
<> 128:9bcdf88f62b0 116 #define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */
<> 128:9bcdf88f62b0 117 #define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */
<> 128:9bcdf88f62b0 118 #define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */
<> 128:9bcdf88f62b0 119 #define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */
<> 128:9bcdf88f62b0 120 #define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */
<> 128:9bcdf88f62b0 121 #if defined(EXTI_IMR_IM16)
<> 128:9bcdf88f62b0 122 #define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */
<> 128:9bcdf88f62b0 123 #endif
<> 128:9bcdf88f62b0 124 #define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */
<> 128:9bcdf88f62b0 125 #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */
<> 128:9bcdf88f62b0 126 #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */
<> 128:9bcdf88f62b0 127 #if defined(EXTI_IMR_IM20)
<> 128:9bcdf88f62b0 128 #define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */
<> 128:9bcdf88f62b0 129 #endif
<> 128:9bcdf88f62b0 130 #if defined(EXTI_IMR_IM21)
<> 128:9bcdf88f62b0 131 #define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */
<> 128:9bcdf88f62b0 132 #endif
<> 128:9bcdf88f62b0 133 #if defined(EXTI_IMR_IM22)
<> 128:9bcdf88f62b0 134 #define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */
<> 128:9bcdf88f62b0 135 #endif
<> 128:9bcdf88f62b0 136 #define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */
<> 128:9bcdf88f62b0 137 #if defined(EXTI_IMR_IM24)
<> 128:9bcdf88f62b0 138 #define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */
<> 128:9bcdf88f62b0 139 #endif
<> 128:9bcdf88f62b0 140 #if defined(EXTI_IMR_IM25)
<> 128:9bcdf88f62b0 141 #define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */
<> 128:9bcdf88f62b0 142 #endif
<> 128:9bcdf88f62b0 143 #if defined(EXTI_IMR_IM26)
<> 128:9bcdf88f62b0 144 #define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */
<> 128:9bcdf88f62b0 145 #endif
<> 128:9bcdf88f62b0 146 #if defined(EXTI_IMR_IM27)
<> 128:9bcdf88f62b0 147 #define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */
<> 128:9bcdf88f62b0 148 #endif
<> 128:9bcdf88f62b0 149 #if defined(EXTI_IMR_IM28)
<> 128:9bcdf88f62b0 150 #define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */
<> 128:9bcdf88f62b0 151 #endif
<> 128:9bcdf88f62b0 152 #if defined(EXTI_IMR_IM29)
<> 128:9bcdf88f62b0 153 #define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */
<> 128:9bcdf88f62b0 154 #endif
<> 128:9bcdf88f62b0 155 #if defined(EXTI_IMR_IM30)
<> 128:9bcdf88f62b0 156 #define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */
<> 128:9bcdf88f62b0 157 #endif
<> 128:9bcdf88f62b0 158 #if defined(EXTI_IMR_IM31)
<> 128:9bcdf88f62b0 159 #define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */
<> 128:9bcdf88f62b0 160 #endif
<> 128:9bcdf88f62b0 161 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/
<> 128:9bcdf88f62b0 162
<> 128:9bcdf88f62b0 163
<> 128:9bcdf88f62b0 164 #define LL_EXTI_LINE_ALL ((uint32_t)0xFFFFFFFFU) /*!< All Extended line */
<> 128:9bcdf88f62b0 165
<> 128:9bcdf88f62b0 166 #if defined(USE_FULL_LL_DRIVER)
<> 128:9bcdf88f62b0 167 #define LL_EXTI_LINE_NONE ((uint32_t)0x00000000U) /*!< None Extended line */
<> 128:9bcdf88f62b0 168 #endif /*USE_FULL_LL_DRIVER*/
<> 128:9bcdf88f62b0 169
<> 128:9bcdf88f62b0 170 /**
<> 128:9bcdf88f62b0 171 * @}
<> 128:9bcdf88f62b0 172 */
<> 128:9bcdf88f62b0 173 #if defined(USE_FULL_LL_DRIVER)
<> 128:9bcdf88f62b0 174
<> 128:9bcdf88f62b0 175 /** @defgroup EXTI_LL_EC_MODE Mode
<> 128:9bcdf88f62b0 176 * @{
<> 128:9bcdf88f62b0 177 */
<> 128:9bcdf88f62b0 178 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
<> 128:9bcdf88f62b0 179 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
<> 128:9bcdf88f62b0 180 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
<> 128:9bcdf88f62b0 181 /**
<> 128:9bcdf88f62b0 182 * @}
<> 128:9bcdf88f62b0 183 */
<> 128:9bcdf88f62b0 184
<> 128:9bcdf88f62b0 185 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
<> 128:9bcdf88f62b0 186 * @{
<> 128:9bcdf88f62b0 187 */
<> 128:9bcdf88f62b0 188 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
<> 128:9bcdf88f62b0 189 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
<> 128:9bcdf88f62b0 190 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
<> 128:9bcdf88f62b0 191 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
<> 128:9bcdf88f62b0 192
<> 128:9bcdf88f62b0 193 /**
<> 128:9bcdf88f62b0 194 * @}
<> 128:9bcdf88f62b0 195 */
<> 128:9bcdf88f62b0 196
<> 128:9bcdf88f62b0 197
<> 128:9bcdf88f62b0 198 #endif /*USE_FULL_LL_DRIVER*/
<> 128:9bcdf88f62b0 199
<> 128:9bcdf88f62b0 200
<> 128:9bcdf88f62b0 201 /**
<> 128:9bcdf88f62b0 202 * @}
<> 128:9bcdf88f62b0 203 */
<> 128:9bcdf88f62b0 204
<> 128:9bcdf88f62b0 205 /* Exported macro ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 206 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
<> 128:9bcdf88f62b0 207 * @{
<> 128:9bcdf88f62b0 208 */
<> 128:9bcdf88f62b0 209
<> 128:9bcdf88f62b0 210 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
<> 128:9bcdf88f62b0 211 * @{
<> 128:9bcdf88f62b0 212 */
<> 128:9bcdf88f62b0 213
<> 128:9bcdf88f62b0 214 /**
<> 128:9bcdf88f62b0 215 * @brief Write a value in EXTI register
<> 128:9bcdf88f62b0 216 * @param __REG__ Register to be written
<> 128:9bcdf88f62b0 217 * @param __VALUE__ Value to be written in the register
<> 128:9bcdf88f62b0 218 * @retval None
<> 128:9bcdf88f62b0 219 */
<> 128:9bcdf88f62b0 220 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
<> 128:9bcdf88f62b0 221
<> 128:9bcdf88f62b0 222 /**
<> 128:9bcdf88f62b0 223 * @brief Read a value in EXTI register
<> 128:9bcdf88f62b0 224 * @param __REG__ Register to be read
<> 128:9bcdf88f62b0 225 * @retval Register value
<> 128:9bcdf88f62b0 226 */
<> 128:9bcdf88f62b0 227 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
<> 128:9bcdf88f62b0 228 /**
<> 128:9bcdf88f62b0 229 * @}
<> 128:9bcdf88f62b0 230 */
<> 128:9bcdf88f62b0 231
<> 128:9bcdf88f62b0 232
<> 128:9bcdf88f62b0 233 /**
<> 128:9bcdf88f62b0 234 * @}
<> 128:9bcdf88f62b0 235 */
<> 128:9bcdf88f62b0 236
<> 128:9bcdf88f62b0 237
<> 128:9bcdf88f62b0 238
<> 128:9bcdf88f62b0 239 /* Exported functions --------------------------------------------------------*/
<> 128:9bcdf88f62b0 240 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
<> 128:9bcdf88f62b0 241 * @{
<> 128:9bcdf88f62b0 242 */
<> 128:9bcdf88f62b0 243 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
<> 128:9bcdf88f62b0 244 * @{
<> 128:9bcdf88f62b0 245 */
<> 128:9bcdf88f62b0 246
<> 128:9bcdf88f62b0 247 /**
<> 128:9bcdf88f62b0 248 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
<> 128:9bcdf88f62b0 249 * @note The reset value for the direct or internal lines (see RM)
<> 128:9bcdf88f62b0 250 * is set to 1 in order to enable the interrupt by default.
<> 128:9bcdf88f62b0 251 * Bits are set automatically at Power on.
<> 128:9bcdf88f62b0 252 * @rmtoll IMR IMx LL_EXTI_EnableIT_0_31
<> 128:9bcdf88f62b0 253 * @param ExtiLine This parameter can be one of the following values:
<> 128:9bcdf88f62b0 254 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 255 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 256 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 257 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 258 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 259 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 260 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 261 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 262 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 263 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 264 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 265 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 266 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 267 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 268 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 269 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 270 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 271 * @arg @ref LL_EXTI_LINE_17
<> 128:9bcdf88f62b0 272 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 273 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 274 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 275 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 276 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 277 * @arg @ref LL_EXTI_LINE_23
<> 128:9bcdf88f62b0 278 * @arg @ref LL_EXTI_LINE_24
<> 128:9bcdf88f62b0 279 * @arg @ref LL_EXTI_LINE_25
<> 128:9bcdf88f62b0 280 * @arg @ref LL_EXTI_LINE_26
<> 128:9bcdf88f62b0 281 * @arg @ref LL_EXTI_LINE_27
<> 128:9bcdf88f62b0 282 * @arg @ref LL_EXTI_LINE_28
<> 128:9bcdf88f62b0 283 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 284 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 285 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 286 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 128:9bcdf88f62b0 287 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 288 * @retval None
<> 128:9bcdf88f62b0 289 */
<> 128:9bcdf88f62b0 290 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 291 {
<> 128:9bcdf88f62b0 292 SET_BIT(EXTI->IMR, ExtiLine);
<> 128:9bcdf88f62b0 293 }
<> 128:9bcdf88f62b0 294
<> 128:9bcdf88f62b0 295 /**
<> 128:9bcdf88f62b0 296 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
<> 128:9bcdf88f62b0 297 * @note The reset value for the direct or internal lines (see RM)
<> 128:9bcdf88f62b0 298 * is set to 1 in order to enable the interrupt by default.
<> 128:9bcdf88f62b0 299 * Bits are set automatically at Power on.
<> 128:9bcdf88f62b0 300 * @rmtoll IMR IMx LL_EXTI_DisableIT_0_31
<> 128:9bcdf88f62b0 301 * @param ExtiLine This parameter can be one of the following values:
<> 128:9bcdf88f62b0 302 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 303 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 304 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 305 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 306 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 307 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 308 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 309 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 310 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 311 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 312 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 313 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 314 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 315 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 316 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 317 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 318 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 319 * @arg @ref LL_EXTI_LINE_17
<> 128:9bcdf88f62b0 320 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 321 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 322 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 323 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 324 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 325 * @arg @ref LL_EXTI_LINE_23
<> 128:9bcdf88f62b0 326 * @arg @ref LL_EXTI_LINE_24
<> 128:9bcdf88f62b0 327 * @arg @ref LL_EXTI_LINE_25
<> 128:9bcdf88f62b0 328 * @arg @ref LL_EXTI_LINE_26
<> 128:9bcdf88f62b0 329 * @arg @ref LL_EXTI_LINE_27
<> 128:9bcdf88f62b0 330 * @arg @ref LL_EXTI_LINE_28
<> 128:9bcdf88f62b0 331 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 332 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 333 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 334 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 128:9bcdf88f62b0 335 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 336 * @retval None
<> 128:9bcdf88f62b0 337 */
<> 128:9bcdf88f62b0 338 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 339 {
<> 128:9bcdf88f62b0 340 CLEAR_BIT(EXTI->IMR, ExtiLine);
<> 128:9bcdf88f62b0 341 }
<> 128:9bcdf88f62b0 342
<> 128:9bcdf88f62b0 343
<> 128:9bcdf88f62b0 344 /**
<> 128:9bcdf88f62b0 345 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
<> 128:9bcdf88f62b0 346 * @note The reset value for the direct or internal lines (see RM)
<> 128:9bcdf88f62b0 347 * is set to 1 in order to enable the interrupt by default.
<> 128:9bcdf88f62b0 348 * Bits are set automatically at Power on.
<> 128:9bcdf88f62b0 349 * @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31
<> 128:9bcdf88f62b0 350 * @param ExtiLine This parameter can be one of the following values:
<> 128:9bcdf88f62b0 351 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 352 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 353 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 354 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 355 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 356 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 357 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 358 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 359 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 360 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 361 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 362 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 363 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 364 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 365 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 366 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 367 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 368 * @arg @ref LL_EXTI_LINE_17
<> 128:9bcdf88f62b0 369 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 370 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 371 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 372 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 373 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 374 * @arg @ref LL_EXTI_LINE_23
<> 128:9bcdf88f62b0 375 * @arg @ref LL_EXTI_LINE_24
<> 128:9bcdf88f62b0 376 * @arg @ref LL_EXTI_LINE_25
<> 128:9bcdf88f62b0 377 * @arg @ref LL_EXTI_LINE_26
<> 128:9bcdf88f62b0 378 * @arg @ref LL_EXTI_LINE_27
<> 128:9bcdf88f62b0 379 * @arg @ref LL_EXTI_LINE_28
<> 128:9bcdf88f62b0 380 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 381 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 382 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 383 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 128:9bcdf88f62b0 384 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 385 * @retval State of bit (1 or 0).
<> 128:9bcdf88f62b0 386 */
<> 128:9bcdf88f62b0 387 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 388 {
<> 128:9bcdf88f62b0 389 return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine));
<> 128:9bcdf88f62b0 390 }
<> 128:9bcdf88f62b0 391
<> 128:9bcdf88f62b0 392
<> 128:9bcdf88f62b0 393 /**
<> 128:9bcdf88f62b0 394 * @}
<> 128:9bcdf88f62b0 395 */
<> 128:9bcdf88f62b0 396
<> 128:9bcdf88f62b0 397 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
<> 128:9bcdf88f62b0 398 * @{
<> 128:9bcdf88f62b0 399 */
<> 128:9bcdf88f62b0 400
<> 128:9bcdf88f62b0 401 /**
<> 128:9bcdf88f62b0 402 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
<> 128:9bcdf88f62b0 403 * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31
<> 128:9bcdf88f62b0 404 * @param ExtiLine This parameter can be one of the following values:
<> 128:9bcdf88f62b0 405 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 406 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 407 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 408 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 409 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 410 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 411 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 412 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 413 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 414 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 415 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 416 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 417 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 418 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 419 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 420 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 421 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 422 * @arg @ref LL_EXTI_LINE_17
<> 128:9bcdf88f62b0 423 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 424 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 425 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 426 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 427 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 428 * @arg @ref LL_EXTI_LINE_23
<> 128:9bcdf88f62b0 429 * @arg @ref LL_EXTI_LINE_24
<> 128:9bcdf88f62b0 430 * @arg @ref LL_EXTI_LINE_25
<> 128:9bcdf88f62b0 431 * @arg @ref LL_EXTI_LINE_26
<> 128:9bcdf88f62b0 432 * @arg @ref LL_EXTI_LINE_27
<> 128:9bcdf88f62b0 433 * @arg @ref LL_EXTI_LINE_28
<> 128:9bcdf88f62b0 434 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 435 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 436 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 437 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 128:9bcdf88f62b0 438 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 439 * @retval None
<> 128:9bcdf88f62b0 440 */
<> 128:9bcdf88f62b0 441 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 442 {
<> 128:9bcdf88f62b0 443 SET_BIT(EXTI->EMR, ExtiLine);
<> 128:9bcdf88f62b0 444
<> 128:9bcdf88f62b0 445 }
<> 128:9bcdf88f62b0 446
<> 128:9bcdf88f62b0 447
<> 128:9bcdf88f62b0 448 /**
<> 128:9bcdf88f62b0 449 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
<> 128:9bcdf88f62b0 450 * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31
<> 128:9bcdf88f62b0 451 * @param ExtiLine This parameter can be one of the following values:
<> 128:9bcdf88f62b0 452 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 453 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 454 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 455 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 456 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 457 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 458 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 459 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 460 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 461 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 462 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 463 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 464 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 465 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 466 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 467 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 468 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 469 * @arg @ref LL_EXTI_LINE_17
<> 128:9bcdf88f62b0 470 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 471 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 472 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 473 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 474 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 475 * @arg @ref LL_EXTI_LINE_23
<> 128:9bcdf88f62b0 476 * @arg @ref LL_EXTI_LINE_24
<> 128:9bcdf88f62b0 477 * @arg @ref LL_EXTI_LINE_25
<> 128:9bcdf88f62b0 478 * @arg @ref LL_EXTI_LINE_26
<> 128:9bcdf88f62b0 479 * @arg @ref LL_EXTI_LINE_27
<> 128:9bcdf88f62b0 480 * @arg @ref LL_EXTI_LINE_28
<> 128:9bcdf88f62b0 481 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 482 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 483 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 484 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 128:9bcdf88f62b0 485 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 486 * @retval None
<> 128:9bcdf88f62b0 487 */
<> 128:9bcdf88f62b0 488 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 489 {
<> 128:9bcdf88f62b0 490 CLEAR_BIT(EXTI->EMR, ExtiLine);
<> 128:9bcdf88f62b0 491 }
<> 128:9bcdf88f62b0 492
<> 128:9bcdf88f62b0 493
<> 128:9bcdf88f62b0 494 /**
<> 128:9bcdf88f62b0 495 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
<> 128:9bcdf88f62b0 496 * @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31
<> 128:9bcdf88f62b0 497 * @param ExtiLine This parameter can be one of the following values:
<> 128:9bcdf88f62b0 498 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 499 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 500 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 501 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 502 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 503 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 504 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 505 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 506 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 507 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 508 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 509 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 510 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 511 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 512 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 513 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 514 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 515 * @arg @ref LL_EXTI_LINE_17
<> 128:9bcdf88f62b0 516 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 517 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 518 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 519 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 520 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 521 * @arg @ref LL_EXTI_LINE_23
<> 128:9bcdf88f62b0 522 * @arg @ref LL_EXTI_LINE_24
<> 128:9bcdf88f62b0 523 * @arg @ref LL_EXTI_LINE_25
<> 128:9bcdf88f62b0 524 * @arg @ref LL_EXTI_LINE_26
<> 128:9bcdf88f62b0 525 * @arg @ref LL_EXTI_LINE_27
<> 128:9bcdf88f62b0 526 * @arg @ref LL_EXTI_LINE_28
<> 128:9bcdf88f62b0 527 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 528 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 529 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 530 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 128:9bcdf88f62b0 531 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 532 * @retval State of bit (1 or 0).
<> 128:9bcdf88f62b0 533 */
<> 128:9bcdf88f62b0 534 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 535 {
<> 128:9bcdf88f62b0 536 return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine));
<> 128:9bcdf88f62b0 537
<> 128:9bcdf88f62b0 538 }
<> 128:9bcdf88f62b0 539
<> 128:9bcdf88f62b0 540
<> 128:9bcdf88f62b0 541 /**
<> 128:9bcdf88f62b0 542 * @}
<> 128:9bcdf88f62b0 543 */
<> 128:9bcdf88f62b0 544
<> 128:9bcdf88f62b0 545 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
<> 128:9bcdf88f62b0 546 * @{
<> 128:9bcdf88f62b0 547 */
<> 128:9bcdf88f62b0 548
<> 128:9bcdf88f62b0 549 /**
<> 128:9bcdf88f62b0 550 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 128:9bcdf88f62b0 551 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 128:9bcdf88f62b0 552 * generated on these lines. If a rising edge on a configurable interrupt
<> 128:9bcdf88f62b0 553 * line occurs during a write operation in the EXTI_RTSR register, the
<> 128:9bcdf88f62b0 554 * pending bit is not set.
<> 128:9bcdf88f62b0 555 * Rising and falling edge triggers can be set for
<> 128:9bcdf88f62b0 556 * the same interrupt line. In this case, both generate a trigger
<> 128:9bcdf88f62b0 557 * condition.
<> 128:9bcdf88f62b0 558 * @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31
<> 128:9bcdf88f62b0 559 * @param ExtiLine This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 560 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 561 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 562 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 563 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 564 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 565 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 566 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 567 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 568 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 569 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 570 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 571 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 572 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 573 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 574 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 575 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 576 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 577 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 578 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 579 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 580 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 581 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 582 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 583 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 584 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 585 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 586 * @retval None
<> 128:9bcdf88f62b0 587 */
<> 128:9bcdf88f62b0 588 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 589 {
<> 128:9bcdf88f62b0 590 SET_BIT(EXTI->RTSR, ExtiLine);
<> 128:9bcdf88f62b0 591
<> 128:9bcdf88f62b0 592 }
<> 128:9bcdf88f62b0 593
<> 128:9bcdf88f62b0 594
<> 128:9bcdf88f62b0 595 /**
<> 128:9bcdf88f62b0 596 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 128:9bcdf88f62b0 597 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 128:9bcdf88f62b0 598 * generated on these lines. If a rising edge on a configurable interrupt
<> 128:9bcdf88f62b0 599 * line occurs during a write operation in the EXTI_RTSR register, the
<> 128:9bcdf88f62b0 600 * pending bit is not set.
<> 128:9bcdf88f62b0 601 * Rising and falling edge triggers can be set for
<> 128:9bcdf88f62b0 602 * the same interrupt line. In this case, both generate a trigger
<> 128:9bcdf88f62b0 603 * condition.
<> 128:9bcdf88f62b0 604 * @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31
<> 128:9bcdf88f62b0 605 * @param ExtiLine This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 606 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 607 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 608 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 609 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 610 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 611 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 612 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 613 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 614 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 615 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 616 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 617 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 618 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 619 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 620 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 621 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 622 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 623 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 624 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 625 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 626 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 627 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 628 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 629 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 630 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 631 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 632 * @retval None
<> 128:9bcdf88f62b0 633 */
<> 128:9bcdf88f62b0 634 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 635 {
<> 128:9bcdf88f62b0 636 CLEAR_BIT(EXTI->RTSR, ExtiLine);
<> 128:9bcdf88f62b0 637
<> 128:9bcdf88f62b0 638 }
<> 128:9bcdf88f62b0 639
<> 128:9bcdf88f62b0 640
<> 128:9bcdf88f62b0 641 /**
<> 128:9bcdf88f62b0 642 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
<> 128:9bcdf88f62b0 643 * @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31
<> 128:9bcdf88f62b0 644 * @param ExtiLine This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 645 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 646 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 647 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 648 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 649 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 650 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 651 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 652 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 653 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 654 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 655 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 656 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 657 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 658 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 659 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 660 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 661 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 662 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 663 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 664 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 665 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 666 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 667 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 668 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 669 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 670 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 671 * @retval State of bit (1 or 0).
<> 128:9bcdf88f62b0 672 */
<> 128:9bcdf88f62b0 673 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 674 {
<> 128:9bcdf88f62b0 675 return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine));
<> 128:9bcdf88f62b0 676 }
<> 128:9bcdf88f62b0 677
<> 128:9bcdf88f62b0 678
<> 128:9bcdf88f62b0 679 /**
<> 128:9bcdf88f62b0 680 * @}
<> 128:9bcdf88f62b0 681 */
<> 128:9bcdf88f62b0 682
<> 128:9bcdf88f62b0 683 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
<> 128:9bcdf88f62b0 684 * @{
<> 128:9bcdf88f62b0 685 */
<> 128:9bcdf88f62b0 686
<> 128:9bcdf88f62b0 687 /**
<> 128:9bcdf88f62b0 688 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 128:9bcdf88f62b0 689 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 128:9bcdf88f62b0 690 * generated on these lines. If a falling edge on a configurable interrupt
<> 128:9bcdf88f62b0 691 * line occurs during a write operation in the EXTI_FTSR register, the
<> 128:9bcdf88f62b0 692 * pending bit is not set.
<> 128:9bcdf88f62b0 693 * Rising and falling edge triggers can be set for
<> 128:9bcdf88f62b0 694 * the same interrupt line. In this case, both generate a trigger
<> 128:9bcdf88f62b0 695 * condition.
<> 128:9bcdf88f62b0 696 * @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31
<> 128:9bcdf88f62b0 697 * @param ExtiLine This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 698 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 699 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 700 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 701 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 702 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 703 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 704 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 705 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 706 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 707 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 708 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 709 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 710 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 711 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 712 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 713 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 714 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 715 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 716 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 717 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 718 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 719 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 720 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 721 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 722 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 723 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 724 * @retval None
<> 128:9bcdf88f62b0 725 */
<> 128:9bcdf88f62b0 726 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 727 {
<> 128:9bcdf88f62b0 728 SET_BIT(EXTI->FTSR, ExtiLine);
<> 128:9bcdf88f62b0 729 }
<> 128:9bcdf88f62b0 730
<> 128:9bcdf88f62b0 731
<> 128:9bcdf88f62b0 732 /**
<> 128:9bcdf88f62b0 733 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 128:9bcdf88f62b0 734 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 128:9bcdf88f62b0 735 * generated on these lines. If a Falling edge on a configurable interrupt
<> 128:9bcdf88f62b0 736 * line occurs during a write operation in the EXTI_FTSR register, the
<> 128:9bcdf88f62b0 737 * pending bit is not set.
<> 128:9bcdf88f62b0 738 * Rising and falling edge triggers can be set for the same interrupt line.
<> 128:9bcdf88f62b0 739 * In this case, both generate a trigger condition.
<> 128:9bcdf88f62b0 740 * @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31
<> 128:9bcdf88f62b0 741 * @param ExtiLine This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 742 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 743 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 744 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 745 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 746 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 747 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 748 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 749 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 750 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 751 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 752 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 753 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 754 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 755 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 756 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 757 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 758 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 759 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 760 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 761 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 762 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 763 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 764 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 765 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 766 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 767 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 768 * @retval None
<> 128:9bcdf88f62b0 769 */
<> 128:9bcdf88f62b0 770 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 771 {
<> 128:9bcdf88f62b0 772 CLEAR_BIT(EXTI->FTSR, ExtiLine);
<> 128:9bcdf88f62b0 773 }
<> 128:9bcdf88f62b0 774
<> 128:9bcdf88f62b0 775
<> 128:9bcdf88f62b0 776 /**
<> 128:9bcdf88f62b0 777 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
<> 128:9bcdf88f62b0 778 * @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31
<> 128:9bcdf88f62b0 779 * @param ExtiLine This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 780 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 781 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 782 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 783 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 784 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 785 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 786 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 787 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 788 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 789 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 790 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 791 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 792 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 793 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 794 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 795 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 796 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 797 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 798 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 799 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 800 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 801 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 802 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 803 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 804 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 805 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 806 * @retval State of bit (1 or 0).
<> 128:9bcdf88f62b0 807 */
<> 128:9bcdf88f62b0 808 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 809 {
<> 128:9bcdf88f62b0 810 return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine));
<> 128:9bcdf88f62b0 811 }
<> 128:9bcdf88f62b0 812
<> 128:9bcdf88f62b0 813
<> 128:9bcdf88f62b0 814 /**
<> 128:9bcdf88f62b0 815 * @}
<> 128:9bcdf88f62b0 816 */
<> 128:9bcdf88f62b0 817
<> 128:9bcdf88f62b0 818 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
<> 128:9bcdf88f62b0 819 * @{
<> 128:9bcdf88f62b0 820 */
<> 128:9bcdf88f62b0 821
<> 128:9bcdf88f62b0 822 /**
<> 128:9bcdf88f62b0 823 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
<> 128:9bcdf88f62b0 824 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
<> 128:9bcdf88f62b0 825 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
<> 128:9bcdf88f62b0 826 * resulting in an interrupt request generation.
<> 128:9bcdf88f62b0 827 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
<> 128:9bcdf88f62b0 828 * register (by writing a 1 into the bit)
<> 128:9bcdf88f62b0 829 * @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31
<> 128:9bcdf88f62b0 830 * @param ExtiLine This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 831 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 832 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 833 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 834 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 835 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 836 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 837 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 838 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 839 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 840 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 841 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 842 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 843 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 844 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 845 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 846 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 847 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 848 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 849 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 850 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 851 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 852 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 853 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 854 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 855 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 856 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 857 * @retval None
<> 128:9bcdf88f62b0 858 */
<> 128:9bcdf88f62b0 859 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 860 {
<> 128:9bcdf88f62b0 861 SET_BIT(EXTI->SWIER, ExtiLine);
<> 128:9bcdf88f62b0 862 }
<> 128:9bcdf88f62b0 863
<> 128:9bcdf88f62b0 864
<> 128:9bcdf88f62b0 865 /**
<> 128:9bcdf88f62b0 866 * @}
<> 128:9bcdf88f62b0 867 */
<> 128:9bcdf88f62b0 868
<> 128:9bcdf88f62b0 869 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
<> 128:9bcdf88f62b0 870 * @{
<> 128:9bcdf88f62b0 871 */
<> 128:9bcdf88f62b0 872
<> 128:9bcdf88f62b0 873 /**
<> 128:9bcdf88f62b0 874 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
<> 128:9bcdf88f62b0 875 * @note This bit is set when the selected edge event arrives on the interrupt
<> 128:9bcdf88f62b0 876 * line. This bit is cleared by writing a 1 to the bit.
<> 128:9bcdf88f62b0 877 * @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31
<> 128:9bcdf88f62b0 878 * @param ExtiLine This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 879 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 880 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 881 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 882 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 883 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 884 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 885 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 886 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 887 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 888 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 889 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 890 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 891 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 892 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 893 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 894 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 895 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 896 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 897 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 898 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 899 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 900 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 901 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 902 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 903 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 904 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 905 * @retval State of bit (1 or 0).
<> 128:9bcdf88f62b0 906 */
<> 128:9bcdf88f62b0 907 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 908 {
<> 128:9bcdf88f62b0 909 return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine));
<> 128:9bcdf88f62b0 910 }
<> 128:9bcdf88f62b0 911
<> 128:9bcdf88f62b0 912
<> 128:9bcdf88f62b0 913 /**
<> 128:9bcdf88f62b0 914 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
<> 128:9bcdf88f62b0 915 * @note This bit is set when the selected edge event arrives on the interrupt
<> 128:9bcdf88f62b0 916 * line. This bit is cleared by writing a 1 to the bit.
<> 128:9bcdf88f62b0 917 * @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31
<> 128:9bcdf88f62b0 918 * @param ExtiLine This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 919 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 920 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 921 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 922 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 923 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 924 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 925 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 926 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 927 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 928 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 929 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 930 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 931 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 932 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 933 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 934 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 935 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 936 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 937 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 938 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 939 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 940 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 941 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 942 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 943 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 944 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 945 * @retval @note This bit is set when the selected edge event arrives on the interrupt
<> 128:9bcdf88f62b0 946 */
<> 128:9bcdf88f62b0 947 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 948 {
<> 128:9bcdf88f62b0 949 return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine));
<> 128:9bcdf88f62b0 950 }
<> 128:9bcdf88f62b0 951
<> 128:9bcdf88f62b0 952
<> 128:9bcdf88f62b0 953 /**
<> 128:9bcdf88f62b0 954 * @brief Clear ExtLine Flags for Lines in range 0 to 31
<> 128:9bcdf88f62b0 955 * @note This bit is set when the selected edge event arrives on the interrupt
<> 128:9bcdf88f62b0 956 * line. This bit is cleared by writing a 1 to the bit.
<> 128:9bcdf88f62b0 957 * @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31
<> 128:9bcdf88f62b0 958 * @param ExtiLine This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 959 * @arg @ref LL_EXTI_LINE_0
<> 128:9bcdf88f62b0 960 * @arg @ref LL_EXTI_LINE_1
<> 128:9bcdf88f62b0 961 * @arg @ref LL_EXTI_LINE_2
<> 128:9bcdf88f62b0 962 * @arg @ref LL_EXTI_LINE_3
<> 128:9bcdf88f62b0 963 * @arg @ref LL_EXTI_LINE_4
<> 128:9bcdf88f62b0 964 * @arg @ref LL_EXTI_LINE_5
<> 128:9bcdf88f62b0 965 * @arg @ref LL_EXTI_LINE_6
<> 128:9bcdf88f62b0 966 * @arg @ref LL_EXTI_LINE_7
<> 128:9bcdf88f62b0 967 * @arg @ref LL_EXTI_LINE_8
<> 128:9bcdf88f62b0 968 * @arg @ref LL_EXTI_LINE_9
<> 128:9bcdf88f62b0 969 * @arg @ref LL_EXTI_LINE_10
<> 128:9bcdf88f62b0 970 * @arg @ref LL_EXTI_LINE_11
<> 128:9bcdf88f62b0 971 * @arg @ref LL_EXTI_LINE_12
<> 128:9bcdf88f62b0 972 * @arg @ref LL_EXTI_LINE_13
<> 128:9bcdf88f62b0 973 * @arg @ref LL_EXTI_LINE_14
<> 128:9bcdf88f62b0 974 * @arg @ref LL_EXTI_LINE_15
<> 128:9bcdf88f62b0 975 * @arg @ref LL_EXTI_LINE_16
<> 128:9bcdf88f62b0 976 * @arg @ref LL_EXTI_LINE_18
<> 128:9bcdf88f62b0 977 * @arg @ref LL_EXTI_LINE_19
<> 128:9bcdf88f62b0 978 * @arg @ref LL_EXTI_LINE_20
<> 128:9bcdf88f62b0 979 * @arg @ref LL_EXTI_LINE_21
<> 128:9bcdf88f62b0 980 * @arg @ref LL_EXTI_LINE_22
<> 128:9bcdf88f62b0 981 * @arg @ref LL_EXTI_LINE_29
<> 128:9bcdf88f62b0 982 * @arg @ref LL_EXTI_LINE_30
<> 128:9bcdf88f62b0 983 * @arg @ref LL_EXTI_LINE_31
<> 128:9bcdf88f62b0 984 * @note Please check each device line mapping for EXTI Line availability
<> 128:9bcdf88f62b0 985 * @retval None
<> 128:9bcdf88f62b0 986 */
<> 128:9bcdf88f62b0 987 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
<> 128:9bcdf88f62b0 988 {
<> 128:9bcdf88f62b0 989 WRITE_REG(EXTI->PR, ExtiLine);
<> 128:9bcdf88f62b0 990 }
<> 128:9bcdf88f62b0 991
<> 128:9bcdf88f62b0 992
<> 128:9bcdf88f62b0 993 /**
<> 128:9bcdf88f62b0 994 * @}
<> 128:9bcdf88f62b0 995 */
<> 128:9bcdf88f62b0 996
<> 128:9bcdf88f62b0 997 #if defined(USE_FULL_LL_DRIVER)
<> 128:9bcdf88f62b0 998 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
<> 128:9bcdf88f62b0 999 * @{
<> 128:9bcdf88f62b0 1000 */
<> 128:9bcdf88f62b0 1001
<> 128:9bcdf88f62b0 1002 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 128:9bcdf88f62b0 1003 uint32_t LL_EXTI_DeInit(void);
<> 128:9bcdf88f62b0 1004 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 128:9bcdf88f62b0 1005
<> 128:9bcdf88f62b0 1006
<> 128:9bcdf88f62b0 1007 /**
<> 128:9bcdf88f62b0 1008 * @}
<> 128:9bcdf88f62b0 1009 */
<> 128:9bcdf88f62b0 1010 #endif /* USE_FULL_LL_DRIVER */
<> 128:9bcdf88f62b0 1011
<> 128:9bcdf88f62b0 1012 /**
<> 128:9bcdf88f62b0 1013 * @}
<> 128:9bcdf88f62b0 1014 */
<> 128:9bcdf88f62b0 1015
<> 128:9bcdf88f62b0 1016 /**
<> 128:9bcdf88f62b0 1017 * @}
<> 128:9bcdf88f62b0 1018 */
<> 128:9bcdf88f62b0 1019
<> 128:9bcdf88f62b0 1020 #endif /* EXTI */
<> 128:9bcdf88f62b0 1021
<> 128:9bcdf88f62b0 1022 /**
<> 128:9bcdf88f62b0 1023 * @}
<> 128:9bcdf88f62b0 1024 */
<> 128:9bcdf88f62b0 1025
<> 128:9bcdf88f62b0 1026 #ifdef __cplusplus
<> 128:9bcdf88f62b0 1027 }
<> 128:9bcdf88f62b0 1028 #endif
<> 128:9bcdf88f62b0 1029
<> 128:9bcdf88f62b0 1030 #endif /* __STM32L1xx_LL_EXTI_H */
<> 128:9bcdf88f62b0 1031
<> 128:9bcdf88f62b0 1032 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/