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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MOTE_L152RC/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_irda.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
128:9bcdf88f62b0
Child:
165:d1b4690b3f8b
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /**
<> 128:9bcdf88f62b0 2 ******************************************************************************
<> 128:9bcdf88f62b0 3 * @file stm32l1xx_hal_irda.h
<> 128:9bcdf88f62b0 4 * @author MCD Application Team
<> 128:9bcdf88f62b0 5 * @version V1.2.0
<> 128:9bcdf88f62b0 6 * @date 01-July-2016
<> 128:9bcdf88f62b0 7 * @brief This file contains all the functions prototypes for the IRDA
<> 128:9bcdf88f62b0 8 * firmware library.
<> 128:9bcdf88f62b0 9 ******************************************************************************
<> 128:9bcdf88f62b0 10 * @attention
<> 128:9bcdf88f62b0 11 *
<> 128:9bcdf88f62b0 12 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 128:9bcdf88f62b0 13 *
<> 128:9bcdf88f62b0 14 * Redistribution and use in source and binary forms, with or without modification,
<> 128:9bcdf88f62b0 15 * are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 16 * 1. Redistributions of source code must retain the above copyright notice,
<> 128:9bcdf88f62b0 17 * this list of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 128:9bcdf88f62b0 19 * this list of conditions and the following disclaimer in the documentation
<> 128:9bcdf88f62b0 20 * and/or other materials provided with the distribution.
<> 128:9bcdf88f62b0 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 128:9bcdf88f62b0 22 * may be used to endorse or promote products derived from this software
<> 128:9bcdf88f62b0 23 * without specific prior written permission.
<> 128:9bcdf88f62b0 24 *
<> 128:9bcdf88f62b0 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 128:9bcdf88f62b0 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 128:9bcdf88f62b0 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 128:9bcdf88f62b0 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 128:9bcdf88f62b0 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 128:9bcdf88f62b0 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 128:9bcdf88f62b0 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 128:9bcdf88f62b0 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 128:9bcdf88f62b0 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 35 *
<> 128:9bcdf88f62b0 36 ******************************************************************************
<> 128:9bcdf88f62b0 37 */
<> 128:9bcdf88f62b0 38
<> 128:9bcdf88f62b0 39 /* Define to prevent recursive inclusion -------------------------------------*/
<> 128:9bcdf88f62b0 40 #ifndef __STM32L1xx_HAL_IRDA_H
<> 128:9bcdf88f62b0 41 #define __STM32L1xx_HAL_IRDA_H
<> 128:9bcdf88f62b0 42
<> 128:9bcdf88f62b0 43 #ifdef __cplusplus
<> 128:9bcdf88f62b0 44 extern "C" {
<> 128:9bcdf88f62b0 45 #endif
<> 128:9bcdf88f62b0 46
<> 128:9bcdf88f62b0 47 /* Includes ------------------------------------------------------------------*/
<> 128:9bcdf88f62b0 48 #include "stm32l1xx_hal_def.h"
<> 128:9bcdf88f62b0 49
<> 128:9bcdf88f62b0 50 /** @addtogroup STM32L1xx_HAL_Driver
<> 128:9bcdf88f62b0 51 * @{
<> 128:9bcdf88f62b0 52 */
<> 128:9bcdf88f62b0 53
<> 128:9bcdf88f62b0 54 /** @addtogroup IRDA
<> 128:9bcdf88f62b0 55 * @{
<> 128:9bcdf88f62b0 56 */
<> 128:9bcdf88f62b0 57
<> 128:9bcdf88f62b0 58 /* Exported types ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 59 /** @defgroup IRDA_Exported_Types IRDA Exported Types
<> 128:9bcdf88f62b0 60 * @{
<> 128:9bcdf88f62b0 61 */
<> 128:9bcdf88f62b0 62
<> 128:9bcdf88f62b0 63 /**
<> 128:9bcdf88f62b0 64 * @brief IRDA Init Structure definition
<> 128:9bcdf88f62b0 65 */
<> 128:9bcdf88f62b0 66 typedef struct
<> 128:9bcdf88f62b0 67 {
<> 128:9bcdf88f62b0 68 uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
<> 128:9bcdf88f62b0 69 The baud rate is computed using the following formula:
<> 128:9bcdf88f62b0 70 - IntegerDivider = ((PCLKx) / (16 * (hirda->Init.BaudRate)))
<> 128:9bcdf88f62b0 71 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */
<> 128:9bcdf88f62b0 72
<> 128:9bcdf88f62b0 73 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 128:9bcdf88f62b0 74 This parameter can be a value of @ref IRDA_Word_Length */
<> 128:9bcdf88f62b0 75
<> 128:9bcdf88f62b0 76
<> 128:9bcdf88f62b0 77 uint32_t Parity; /*!< Specifies the parity mode.
<> 128:9bcdf88f62b0 78 This parameter can be a value of @ref IRDA_Parity
<> 128:9bcdf88f62b0 79 @note When parity is enabled, the computed parity is inserted
<> 128:9bcdf88f62b0 80 at the MSB position of the transmitted data (9th bit when
<> 128:9bcdf88f62b0 81 the word length is set to 9 data bits; 8th bit when the
<> 128:9bcdf88f62b0 82 word length is set to 8 data bits). */
<> 128:9bcdf88f62b0 83
<> 128:9bcdf88f62b0 84 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
<> 128:9bcdf88f62b0 85 This parameter can be a value of @ref IRDA_Transfer_Mode */
<> 128:9bcdf88f62b0 86
<> 128:9bcdf88f62b0 87 uint8_t Prescaler; /*!< Specifies the Prescaler value prescaler value to be programmed
<> 128:9bcdf88f62b0 88 in the IrDA low-power Baud Register, for defining pulse width on which
<> 128:9bcdf88f62b0 89 burst acceptance/rejection will be decided. This value is used as divisor
<> 128:9bcdf88f62b0 90 of system clock to achieve required pulse width. */
<> 128:9bcdf88f62b0 91
<> 128:9bcdf88f62b0 92 uint32_t IrDAMode; /*!< Specifies the IrDA mode
<> 128:9bcdf88f62b0 93 This parameter can be a value of @ref IRDA_Low_Power */
<> 128:9bcdf88f62b0 94 }IRDA_InitTypeDef;
<> 128:9bcdf88f62b0 95
<> 128:9bcdf88f62b0 96 /**
<> 128:9bcdf88f62b0 97 * @brief HAL IRDA State structures definition
<> 128:9bcdf88f62b0 98 */
<> 128:9bcdf88f62b0 99 typedef enum
<> 128:9bcdf88f62b0 100 {
<> 128:9bcdf88f62b0 101 HAL_IRDA_STATE_RESET = 0x00, /*!< Peripheral is not initialized */
<> 128:9bcdf88f62b0 102 HAL_IRDA_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
<> 128:9bcdf88f62b0 103 HAL_IRDA_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
<> 128:9bcdf88f62b0 104 HAL_IRDA_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
<> 128:9bcdf88f62b0 105 HAL_IRDA_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
<> 128:9bcdf88f62b0 106 HAL_IRDA_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
<> 128:9bcdf88f62b0 107 HAL_IRDA_STATE_TIMEOUT = 0x03, /*!< Timeout state */
<> 128:9bcdf88f62b0 108 HAL_IRDA_STATE_ERROR = 0x04 /*!< Error */
<> 128:9bcdf88f62b0 109 }HAL_IRDA_StateTypeDef;
<> 128:9bcdf88f62b0 110
<> 128:9bcdf88f62b0 111
<> 128:9bcdf88f62b0 112 /**
<> 128:9bcdf88f62b0 113 * @brief IRDA handle Structure definition
<> 128:9bcdf88f62b0 114 */
<> 128:9bcdf88f62b0 115 typedef struct
<> 128:9bcdf88f62b0 116 {
<> 128:9bcdf88f62b0 117 USART_TypeDef *Instance; /*!< USART registers base address */
<> 128:9bcdf88f62b0 118
<> 128:9bcdf88f62b0 119 IRDA_InitTypeDef Init; /*!< IRDA communication parameters */
<> 128:9bcdf88f62b0 120
<> 128:9bcdf88f62b0 121 uint8_t *pTxBuffPtr; /*!< Pointer to IRDA Tx transfer Buffer */
<> 128:9bcdf88f62b0 122
<> 128:9bcdf88f62b0 123 uint16_t TxXferSize; /*!< IRDA Tx Transfer size */
<> 128:9bcdf88f62b0 124
<> 128:9bcdf88f62b0 125 uint16_t TxXferCount; /*!< IRDA Tx Transfer Counter */
<> 128:9bcdf88f62b0 126
<> 128:9bcdf88f62b0 127 uint8_t *pRxBuffPtr; /*!< Pointer to IRDA Rx transfer Buffer */
<> 128:9bcdf88f62b0 128
<> 128:9bcdf88f62b0 129 uint16_t RxXferSize; /*!< IRDA Rx Transfer size */
<> 128:9bcdf88f62b0 130
<> 128:9bcdf88f62b0 131 uint16_t RxXferCount; /*!< IRDA Rx Transfer Counter */
<> 128:9bcdf88f62b0 132
<> 128:9bcdf88f62b0 133 DMA_HandleTypeDef *hdmatx; /*!< IRDA Tx DMA Handle parameters */
<> 128:9bcdf88f62b0 134
<> 128:9bcdf88f62b0 135 DMA_HandleTypeDef *hdmarx; /*!< IRDA Rx DMA Handle parameters */
<> 128:9bcdf88f62b0 136
<> 128:9bcdf88f62b0 137 HAL_LockTypeDef Lock; /*!< Locking object */
<> 128:9bcdf88f62b0 138
<> 128:9bcdf88f62b0 139 __IO HAL_IRDA_StateTypeDef State; /*!< IRDA communication state */
<> 128:9bcdf88f62b0 140
<> 128:9bcdf88f62b0 141 __IO uint32_t ErrorCode; /*!< IRDA Error code */
<> 128:9bcdf88f62b0 142
<> 128:9bcdf88f62b0 143 }IRDA_HandleTypeDef;
<> 128:9bcdf88f62b0 144
<> 128:9bcdf88f62b0 145 /**
<> 128:9bcdf88f62b0 146 * @}
<> 128:9bcdf88f62b0 147 */
<> 128:9bcdf88f62b0 148
<> 128:9bcdf88f62b0 149 /* Exported constants --------------------------------------------------------*/
<> 128:9bcdf88f62b0 150 /** @defgroup IRDA_Exported_Constants IRDA Exported constants
<> 128:9bcdf88f62b0 151 * @{
<> 128:9bcdf88f62b0 152 */
<> 128:9bcdf88f62b0 153
<> 128:9bcdf88f62b0 154 /** @defgroup IRDA_Error_Codes IRDA Error Codes
<> 128:9bcdf88f62b0 155 * @{
<> 128:9bcdf88f62b0 156 */
<> 128:9bcdf88f62b0 157 #define HAL_IRDA_ERROR_NONE ((uint32_t)0x00) /*!< No error */
<> 128:9bcdf88f62b0 158 #define HAL_IRDA_ERROR_PE ((uint32_t)0x01) /*!< Parity error */
<> 128:9bcdf88f62b0 159 #define HAL_IRDA_ERROR_NE ((uint32_t)0x02) /*!< Noise error */
<> 128:9bcdf88f62b0 160 #define HAL_IRDA_ERROR_FE ((uint32_t)0x04) /*!< frame error */
<> 128:9bcdf88f62b0 161 #define HAL_IRDA_ERROR_ORE ((uint32_t)0x08) /*!< Overrun error */
<> 128:9bcdf88f62b0 162 #define HAL_IRDA_ERROR_DMA ((uint32_t)0x10) /*!< DMA transfer error */
<> 128:9bcdf88f62b0 163
<> 128:9bcdf88f62b0 164 /**
<> 128:9bcdf88f62b0 165 * @}
<> 128:9bcdf88f62b0 166 */
<> 128:9bcdf88f62b0 167
<> 128:9bcdf88f62b0 168
<> 128:9bcdf88f62b0 169 /** @defgroup IRDA_Word_Length IRDA Word Length
<> 128:9bcdf88f62b0 170 * @{
<> 128:9bcdf88f62b0 171 */
<> 128:9bcdf88f62b0 172 #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 173 #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 128:9bcdf88f62b0 174 /**
<> 128:9bcdf88f62b0 175 * @}
<> 128:9bcdf88f62b0 176 */
<> 128:9bcdf88f62b0 177
<> 128:9bcdf88f62b0 178 /** @defgroup IRDA_Parity IRDA Parity
<> 128:9bcdf88f62b0 179 * @{
<> 128:9bcdf88f62b0 180 */
<> 128:9bcdf88f62b0 181 #define IRDA_PARITY_NONE ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 182 #define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 128:9bcdf88f62b0 183 #define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 128:9bcdf88f62b0 184 /**
<> 128:9bcdf88f62b0 185 * @}
<> 128:9bcdf88f62b0 186 */
<> 128:9bcdf88f62b0 187
<> 128:9bcdf88f62b0 188 /** @defgroup IRDA_Transfer_Mode IRDA Transfer Mode
<> 128:9bcdf88f62b0 189 * @{
<> 128:9bcdf88f62b0 190 */
<> 128:9bcdf88f62b0 191 #define IRDA_MODE_RX ((uint32_t)USART_CR1_RE)
<> 128:9bcdf88f62b0 192 #define IRDA_MODE_TX ((uint32_t)USART_CR1_TE)
<> 128:9bcdf88f62b0 193 #define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 128:9bcdf88f62b0 194 /**
<> 128:9bcdf88f62b0 195 * @}
<> 128:9bcdf88f62b0 196 */
<> 128:9bcdf88f62b0 197
<> 128:9bcdf88f62b0 198 /** @defgroup IRDA_Low_Power IRDA Low Power
<> 128:9bcdf88f62b0 199 * @{
<> 128:9bcdf88f62b0 200 */
<> 128:9bcdf88f62b0 201 #define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP)
<> 128:9bcdf88f62b0 202 #define IRDA_POWERMODE_NORMAL ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 203 /**
<> 128:9bcdf88f62b0 204 * @}
<> 128:9bcdf88f62b0 205 */
<> 128:9bcdf88f62b0 206
<> 128:9bcdf88f62b0 207 /** @defgroup IRDA_One_Bit IRDA One Bit Sampling
<> 128:9bcdf88f62b0 208 * @{
<> 128:9bcdf88f62b0 209 */
<> 128:9bcdf88f62b0 210 #define IRDA_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000)
<> 128:9bcdf88f62b0 211 #define IRDA_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT)
<> 128:9bcdf88f62b0 212 /**
<> 128:9bcdf88f62b0 213 * @}
<> 128:9bcdf88f62b0 214 */
<> 128:9bcdf88f62b0 215
<> 128:9bcdf88f62b0 216 /** @defgroup IRDA_Flags IRDA Flags
<> 128:9bcdf88f62b0 217 * Elements values convention: 0xXXXX
<> 128:9bcdf88f62b0 218 * - 0xXXXX : Flag mask in the SR register
<> 128:9bcdf88f62b0 219 * @{
<> 128:9bcdf88f62b0 220 */
<> 128:9bcdf88f62b0 221 #define IRDA_FLAG_TXE ((uint32_t)USART_SR_TXE)
<> 128:9bcdf88f62b0 222 #define IRDA_FLAG_TC ((uint32_t)USART_SR_TC)
<> 128:9bcdf88f62b0 223 #define IRDA_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
<> 128:9bcdf88f62b0 224 #define IRDA_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
<> 128:9bcdf88f62b0 225 #define IRDA_FLAG_ORE ((uint32_t)USART_SR_ORE)
<> 128:9bcdf88f62b0 226 #define IRDA_FLAG_NE ((uint32_t)USART_SR_NE)
<> 128:9bcdf88f62b0 227 #define IRDA_FLAG_FE ((uint32_t)USART_SR_FE)
<> 128:9bcdf88f62b0 228 #define IRDA_FLAG_PE ((uint32_t)USART_SR_PE)
<> 128:9bcdf88f62b0 229 /**
<> 128:9bcdf88f62b0 230 * @}
<> 128:9bcdf88f62b0 231 */
<> 128:9bcdf88f62b0 232
<> 128:9bcdf88f62b0 233 /** @defgroup IRDA_Interrupt_definition IRDA Interrupt Definitions
<> 128:9bcdf88f62b0 234 * Elements values convention: 0xY000XXXX
<> 128:9bcdf88f62b0 235 * - XXXX : Interrupt mask (16 bits) in the Y register
<> 128:9bcdf88f62b0 236 * - Y : Interrupt source register (4 bits)
<> 128:9bcdf88f62b0 237 * - 0001: CR1 register
<> 128:9bcdf88f62b0 238 * - 0010: CR2 register
<> 128:9bcdf88f62b0 239 * - 0011: CR3 register
<> 128:9bcdf88f62b0 240 *
<> 128:9bcdf88f62b0 241 * @{
<> 128:9bcdf88f62b0 242 */
<> 128:9bcdf88f62b0 243
<> 128:9bcdf88f62b0 244 #define IRDA_IT_PE ((uint32_t)(IRDA_CR1_REG_INDEX << 28 | USART_CR1_PEIE))
<> 128:9bcdf88f62b0 245 #define IRDA_IT_TXE ((uint32_t)(IRDA_CR1_REG_INDEX << 28 | USART_CR1_TXEIE))
<> 128:9bcdf88f62b0 246 #define IRDA_IT_TC ((uint32_t)(IRDA_CR1_REG_INDEX << 28 | USART_CR1_TCIE))
<> 128:9bcdf88f62b0 247 #define IRDA_IT_RXNE ((uint32_t)(IRDA_CR1_REG_INDEX << 28 | USART_CR1_RXNEIE))
<> 128:9bcdf88f62b0 248 #define IRDA_IT_IDLE ((uint32_t)(IRDA_CR1_REG_INDEX << 28 | USART_CR1_IDLEIE))
<> 128:9bcdf88f62b0 249
<> 128:9bcdf88f62b0 250 #define IRDA_IT_LBD ((uint32_t)(IRDA_CR2_REG_INDEX << 28 | USART_CR2_LBDIE))
<> 128:9bcdf88f62b0 251
<> 128:9bcdf88f62b0 252 #define IRDA_IT_CTS ((uint32_t)(IRDA_CR3_REG_INDEX << 28 | USART_CR3_CTSIE))
<> 128:9bcdf88f62b0 253 #define IRDA_IT_ERR ((uint32_t)(IRDA_CR3_REG_INDEX << 28 | USART_CR3_EIE))
<> 128:9bcdf88f62b0 254
<> 128:9bcdf88f62b0 255 /**
<> 128:9bcdf88f62b0 256 * @}
<> 128:9bcdf88f62b0 257 */
<> 128:9bcdf88f62b0 258
<> 128:9bcdf88f62b0 259 /**
<> 128:9bcdf88f62b0 260 * @}
<> 128:9bcdf88f62b0 261 */
<> 128:9bcdf88f62b0 262
<> 128:9bcdf88f62b0 263
<> 128:9bcdf88f62b0 264 /* Exported macro ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 265 /** @defgroup IRDA_Exported_Macros IRDA Exported Macros
<> 128:9bcdf88f62b0 266 * @{
<> 128:9bcdf88f62b0 267 */
<> 128:9bcdf88f62b0 268
<> 128:9bcdf88f62b0 269 /** @brief Reset IRDA handle state
<> 128:9bcdf88f62b0 270 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 271 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 272 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 273 * @retval None
<> 128:9bcdf88f62b0 274 */
<> 128:9bcdf88f62b0 275 #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IRDA_STATE_RESET)
<> 128:9bcdf88f62b0 276
<> 128:9bcdf88f62b0 277 /** @brief Flush the IRDA DR register
<> 128:9bcdf88f62b0 278 * @param __HANDLE__: specifies the USART Handle.
<> 128:9bcdf88f62b0 279 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 280 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 281 */
<> 128:9bcdf88f62b0 282 #define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
<> 128:9bcdf88f62b0 283
<> 128:9bcdf88f62b0 284 /** @brief Check whether the specified IRDA flag is set or not.
<> 128:9bcdf88f62b0 285 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 286 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 287 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 288 * @param __FLAG__: specifies the flag to check.
<> 128:9bcdf88f62b0 289 * This parameter can be one of the following values:
<> 128:9bcdf88f62b0 290 * @arg IRDA_FLAG_TXE: Transmit data register empty flag
<> 128:9bcdf88f62b0 291 * @arg IRDA_FLAG_TC: Transmission Complete flag
<> 128:9bcdf88f62b0 292 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag
<> 128:9bcdf88f62b0 293 * @arg IRDA_FLAG_IDLE: Idle Line detection flag
<> 128:9bcdf88f62b0 294 * @arg IRDA_FLAG_ORE: OverRun Error flag
<> 128:9bcdf88f62b0 295 * @arg IRDA_FLAG_NE: Noise Error flag
<> 128:9bcdf88f62b0 296 * @arg IRDA_FLAG_FE: Framing Error flag
<> 128:9bcdf88f62b0 297 * @arg IRDA_FLAG_PE: Parity Error flag
<> 128:9bcdf88f62b0 298 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 128:9bcdf88f62b0 299 */
<> 128:9bcdf88f62b0 300 #define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 128:9bcdf88f62b0 301
<> 128:9bcdf88f62b0 302 /** @brief Clear the specified IRDA pending flag.
<> 128:9bcdf88f62b0 303 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 304 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 305 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 306 * @param __FLAG__: specifies the flag to check.
<> 128:9bcdf88f62b0 307 * This parameter can be any combination of the following values:
<> 128:9bcdf88f62b0 308 * @arg IRDA_FLAG_TC: Transmission Complete flag.
<> 128:9bcdf88f62b0 309 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag.
<> 128:9bcdf88f62b0 310 *
<> 128:9bcdf88f62b0 311 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
<> 128:9bcdf88f62b0 312 * error) and IDLE (Idle line detected) flags are cleared by software
<> 128:9bcdf88f62b0 313 * sequence: a read operation to USART_SR register followed by a read
<> 128:9bcdf88f62b0 314 * operation to USART_DR register.
<> 128:9bcdf88f62b0 315 * @note RXNE flag can be also cleared by a read to the USART_DR register.
<> 128:9bcdf88f62b0 316 * @note TC flag can be also cleared by software sequence: a read operation to
<> 128:9bcdf88f62b0 317 * USART_SR register followed by a write operation to USART_DR register.
<> 128:9bcdf88f62b0 318 * @note TXE flag is cleared only by a write to the USART_DR register.
<> 128:9bcdf88f62b0 319 *
<> 128:9bcdf88f62b0 320 * @retval None
<> 128:9bcdf88f62b0 321 */
<> 128:9bcdf88f62b0 322 #define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
<> 128:9bcdf88f62b0 323
<> 128:9bcdf88f62b0 324 /** @brief Clear the IRDA PE pending flag.
<> 128:9bcdf88f62b0 325 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 326 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 327 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 328 * @retval None
<> 128:9bcdf88f62b0 329 */
<> 128:9bcdf88f62b0 330 #define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) \
<> 128:9bcdf88f62b0 331 do{ \
<> 128:9bcdf88f62b0 332 __IO uint32_t tmpreg; \
<> 128:9bcdf88f62b0 333 tmpreg = (__HANDLE__)->Instance->SR; \
<> 128:9bcdf88f62b0 334 tmpreg = (__HANDLE__)->Instance->DR; \
<> 128:9bcdf88f62b0 335 UNUSED(tmpreg); \
<> 128:9bcdf88f62b0 336 }while(0) \
<> 128:9bcdf88f62b0 337
<> 128:9bcdf88f62b0 338 /** @brief Clear the IRDA FE pending flag.
<> 128:9bcdf88f62b0 339 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 340 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 341 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 342 * @retval None
<> 128:9bcdf88f62b0 343 */
<> 128:9bcdf88f62b0 344 #define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 128:9bcdf88f62b0 345
<> 128:9bcdf88f62b0 346 /** @brief Clear the IRDA NE pending flag.
<> 128:9bcdf88f62b0 347 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 348 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 349 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 350 * @retval None
<> 128:9bcdf88f62b0 351 */
<> 128:9bcdf88f62b0 352 #define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 128:9bcdf88f62b0 353
<> 128:9bcdf88f62b0 354 /** @brief Clear the IRDA ORE pending flag.
<> 128:9bcdf88f62b0 355 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 356 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 357 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 358 * @retval None
<> 128:9bcdf88f62b0 359 */
<> 128:9bcdf88f62b0 360 #define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 128:9bcdf88f62b0 361
<> 128:9bcdf88f62b0 362 /** @brief Clear the IRDA IDLE pending flag.
<> 128:9bcdf88f62b0 363 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 364 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 365 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 366 * @retval None
<> 128:9bcdf88f62b0 367 */
<> 128:9bcdf88f62b0 368 #define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 128:9bcdf88f62b0 369
<> 128:9bcdf88f62b0 370 /** @brief Enable the specified IRDA interrupt.
<> 128:9bcdf88f62b0 371 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 372 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 373 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 374 * @param __INTERRUPT__: specifies the IRDA interrupt source to enable.
<> 128:9bcdf88f62b0 375 * This parameter can be one of the following values:
<> 128:9bcdf88f62b0 376 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 128:9bcdf88f62b0 377 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 128:9bcdf88f62b0 378 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 128:9bcdf88f62b0 379 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 128:9bcdf88f62b0 380 * @arg IRDA_IT_PE: Parity Error interrupt
<> 128:9bcdf88f62b0 381 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 128:9bcdf88f62b0 382 * @retval None
<> 128:9bcdf88f62b0 383 */
<> 128:9bcdf88f62b0 384 #define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == IRDA_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
<> 128:9bcdf88f62b0 385 (((__INTERRUPT__) >> 28) == IRDA_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
<> 128:9bcdf88f62b0 386 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & IRDA_IT_MASK)))
<> 128:9bcdf88f62b0 387
<> 128:9bcdf88f62b0 388 /** @brief Disable the specified IRDA interrupt.
<> 128:9bcdf88f62b0 389 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 390 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 391 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 392 * @param __INTERRUPT__: specifies the IRDA interrupt source to disable.
<> 128:9bcdf88f62b0 393 * This parameter can be one of the following values:
<> 128:9bcdf88f62b0 394 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 128:9bcdf88f62b0 395 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 128:9bcdf88f62b0 396 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 128:9bcdf88f62b0 397 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 128:9bcdf88f62b0 398 * @arg IRDA_IT_PE: Parity Error interrupt
<> 128:9bcdf88f62b0 399 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 128:9bcdf88f62b0 400 * @retval None
<> 128:9bcdf88f62b0 401 */
<> 128:9bcdf88f62b0 402 #define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == IRDA_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
<> 128:9bcdf88f62b0 403 (((__INTERRUPT__) >> 28) == IRDA_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
<> 128:9bcdf88f62b0 404 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & IRDA_IT_MASK)))
<> 128:9bcdf88f62b0 405
<> 128:9bcdf88f62b0 406 /** @brief Check whether the specified IRDA interrupt has occurred or not.
<> 128:9bcdf88f62b0 407 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 408 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 409 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 410 * @param __IT__: specifies the IRDA interrupt source to check.
<> 128:9bcdf88f62b0 411 * This parameter can be one of the following values:
<> 128:9bcdf88f62b0 412 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 128:9bcdf88f62b0 413 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 128:9bcdf88f62b0 414 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 128:9bcdf88f62b0 415 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 128:9bcdf88f62b0 416 * @arg IRDA_IT_ERR: Error interrupt
<> 128:9bcdf88f62b0 417 * @arg IRDA_IT_PE: Parity Error interrupt
<> 128:9bcdf88f62b0 418 * @retval The new state of __IT__ (TRUE or FALSE).
<> 128:9bcdf88f62b0 419 */
<> 128:9bcdf88f62b0 420 #define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == IRDA_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:((((__IT__) >> 28) == IRDA_CR2_REG_INDEX)? \
<> 128:9bcdf88f62b0 421 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & IRDA_IT_MASK))
<> 128:9bcdf88f62b0 422
<> 128:9bcdf88f62b0 423 /** @brief Enables the IRDA one bit sample method
<> 128:9bcdf88f62b0 424 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 425 * @retval None
<> 128:9bcdf88f62b0 426 */
<> 128:9bcdf88f62b0 427 #define __HAL_IRDA_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR3, (USART_CR3_ONEBIT)))
<> 128:9bcdf88f62b0 428
<> 128:9bcdf88f62b0 429 /** @brief Disables the IRDA one bit sample method
<> 128:9bcdf88f62b0 430 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 431 * @retval None
<> 128:9bcdf88f62b0 432 */
<> 128:9bcdf88f62b0 433 #define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR3, (USART_CR3_ONEBIT)))
<> 128:9bcdf88f62b0 434
<> 128:9bcdf88f62b0 435 /** @brief Enable UART/USART associated to IRDA Handle
<> 128:9bcdf88f62b0 436 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 437 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 438 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 439 * @retval None
<> 128:9bcdf88f62b0 440 */
<> 128:9bcdf88f62b0 441 #define __HAL_IRDA_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, USART_CR1_UE))
<> 128:9bcdf88f62b0 442
<> 128:9bcdf88f62b0 443 /** @brief Disable UART/USART associated to IRDA Handle
<> 128:9bcdf88f62b0 444 * @param __HANDLE__: specifies the IRDA Handle.
<> 128:9bcdf88f62b0 445 * IRDA Handle selects the USARTx or UARTy peripheral
<> 128:9bcdf88f62b0 446 * (USART,UART availability and x,y values depending on device).
<> 128:9bcdf88f62b0 447 * @retval None
<> 128:9bcdf88f62b0 448 */
<> 128:9bcdf88f62b0 449 #define __HAL_IRDA_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, USART_CR1_UE))
<> 128:9bcdf88f62b0 450
<> 128:9bcdf88f62b0 451 /**
<> 128:9bcdf88f62b0 452 * @}
<> 128:9bcdf88f62b0 453 */
<> 128:9bcdf88f62b0 454
<> 128:9bcdf88f62b0 455 /* Private macros --------------------------------------------------------*/
<> 128:9bcdf88f62b0 456 /** @defgroup IRDA_Private_Macros IRDA Private Macros
<> 128:9bcdf88f62b0 457 * @{
<> 128:9bcdf88f62b0 458 */
<> 128:9bcdf88f62b0 459
<> 128:9bcdf88f62b0 460 #define IRDA_CR1_REG_INDEX 1
<> 128:9bcdf88f62b0 461 #define IRDA_CR2_REG_INDEX 2
<> 128:9bcdf88f62b0 462 #define IRDA_CR3_REG_INDEX 3
<> 128:9bcdf88f62b0 463
<> 128:9bcdf88f62b0 464 #define IRDA_DIV(__PCLK__, __BAUD__) (((__PCLK__)*25)/(4*(__BAUD__)))
<> 128:9bcdf88f62b0 465 #define IRDA_DIVMANT(__PCLK__, __BAUD__) (IRDA_DIV((__PCLK__), (__BAUD__))/100)
<> 128:9bcdf88f62b0 466 #define IRDA_DIVFRAQ(__PCLK__, __BAUD__) (((IRDA_DIV((__PCLK__), (__BAUD__)) - (IRDA_DIVMANT((__PCLK__), (__BAUD__)) * 100)) * 16 + 50) / 100)
<> 128:9bcdf88f62b0 467 /* UART BRR = mantissa + overflow + fraction
<> 128:9bcdf88f62b0 468 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0F) */
<> 128:9bcdf88f62b0 469 #define IRDA_BRR(_PCLK_, _BAUD_) (((IRDA_DIVMANT((_PCLK_), (_BAUD_)) << 4) + \
<> 128:9bcdf88f62b0 470 (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0xF0)) + \
<> 128:9bcdf88f62b0 471 (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))
<> 128:9bcdf88f62b0 472
<> 128:9bcdf88f62b0 473 /** Ensure that IRDA Baud rate is less or equal to maximum value
<> 128:9bcdf88f62b0 474 * __BAUDRATE__: specifies the IRDA Baudrate set by the user.
<> 128:9bcdf88f62b0 475 * The maximum Baud Rate is 115200bps
<> 128:9bcdf88f62b0 476 * Returns : True or False
<> 128:9bcdf88f62b0 477 */
<> 128:9bcdf88f62b0 478 #define IS_IRDA_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 115201)
<> 128:9bcdf88f62b0 479
<> 128:9bcdf88f62b0 480 #define IS_IRDA_WORD_LENGTH(LENGTH) (((LENGTH) == IRDA_WORDLENGTH_8B) || \
<> 128:9bcdf88f62b0 481 ((LENGTH) == IRDA_WORDLENGTH_9B))
<> 128:9bcdf88f62b0 482
<> 128:9bcdf88f62b0 483 #define IS_IRDA_PARITY(PARITY) (((PARITY) == IRDA_PARITY_NONE) || \
<> 128:9bcdf88f62b0 484 ((PARITY) == IRDA_PARITY_EVEN) || \
<> 128:9bcdf88f62b0 485 ((PARITY) == IRDA_PARITY_ODD))
<> 128:9bcdf88f62b0 486
<> 128:9bcdf88f62b0 487 #define IS_IRDA_MODE(MODE) ((((MODE) & (~((uint32_t)IRDA_MODE_TX_RX))) == 0x00) && \
<> 128:9bcdf88f62b0 488 ((MODE) != (uint32_t)0x00000000))
<> 128:9bcdf88f62b0 489
<> 128:9bcdf88f62b0 490 #define IS_IRDA_POWERMODE(MODE) (((MODE) == IRDA_POWERMODE_LOWPOWER) || \
<> 128:9bcdf88f62b0 491 ((MODE) == IRDA_POWERMODE_NORMAL))
<> 128:9bcdf88f62b0 492
<> 128:9bcdf88f62b0 493 /** IRDA interruptions flag mask
<> 128:9bcdf88f62b0 494 *
<> 128:9bcdf88f62b0 495 */
<> 128:9bcdf88f62b0 496 #define IRDA_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
<> 128:9bcdf88f62b0 497 USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
<> 128:9bcdf88f62b0 498
<> 128:9bcdf88f62b0 499 /**
<> 128:9bcdf88f62b0 500 * @}
<> 128:9bcdf88f62b0 501 */
<> 128:9bcdf88f62b0 502
<> 128:9bcdf88f62b0 503
<> 128:9bcdf88f62b0 504 /* Exported functions --------------------------------------------------------*/
<> 128:9bcdf88f62b0 505
<> 128:9bcdf88f62b0 506 /** @addtogroup IRDA_Exported_Functions IRDA Exported Functions
<> 128:9bcdf88f62b0 507 * @{
<> 128:9bcdf88f62b0 508 */
<> 128:9bcdf88f62b0 509
<> 128:9bcdf88f62b0 510 /** @addtogroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions
<> 128:9bcdf88f62b0 511 * @{
<> 128:9bcdf88f62b0 512 */
<> 128:9bcdf88f62b0 513
<> 128:9bcdf88f62b0 514 /* Initialization and de-initialization functions ****************************/
<> 128:9bcdf88f62b0 515 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 516 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 517 void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 518 void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 519
<> 128:9bcdf88f62b0 520 /**
<> 128:9bcdf88f62b0 521 * @}
<> 128:9bcdf88f62b0 522 */
<> 128:9bcdf88f62b0 523
<> 128:9bcdf88f62b0 524 /** @addtogroup IRDA_Exported_Functions_Group2 IO operation functions
<> 128:9bcdf88f62b0 525 * @{
<> 128:9bcdf88f62b0 526 */
<> 128:9bcdf88f62b0 527
<> 128:9bcdf88f62b0 528 /* IO operation functions *****************************************************/
<> 128:9bcdf88f62b0 529 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 128:9bcdf88f62b0 530 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 128:9bcdf88f62b0 531 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 128:9bcdf88f62b0 532 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 128:9bcdf88f62b0 533 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 128:9bcdf88f62b0 534 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 128:9bcdf88f62b0 535 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 536 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 537 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 538 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 539 void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 540 void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 541 void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 542 void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 543 void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 544
<> 128:9bcdf88f62b0 545 /**
<> 128:9bcdf88f62b0 546 * @}
<> 128:9bcdf88f62b0 547 */
<> 128:9bcdf88f62b0 548
<> 128:9bcdf88f62b0 549 /** @addtogroup IRDA_Exported_Functions_Group3 Peripheral State and Errors functions
<> 128:9bcdf88f62b0 550 * @{
<> 128:9bcdf88f62b0 551 */
<> 128:9bcdf88f62b0 552
<> 128:9bcdf88f62b0 553 /* Peripheral State and Error functions ***************************************/
<> 128:9bcdf88f62b0 554 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 555 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
<> 128:9bcdf88f62b0 556
<> 128:9bcdf88f62b0 557 /**
<> 128:9bcdf88f62b0 558 * @}
<> 128:9bcdf88f62b0 559 */
<> 128:9bcdf88f62b0 560
<> 128:9bcdf88f62b0 561 /**
<> 128:9bcdf88f62b0 562 * @}
<> 128:9bcdf88f62b0 563 */
<> 128:9bcdf88f62b0 564
<> 128:9bcdf88f62b0 565 /**
<> 128:9bcdf88f62b0 566 * @}
<> 128:9bcdf88f62b0 567 */
<> 128:9bcdf88f62b0 568
<> 128:9bcdf88f62b0 569 /**
<> 128:9bcdf88f62b0 570 * @}
<> 128:9bcdf88f62b0 571 */
<> 128:9bcdf88f62b0 572
<> 128:9bcdf88f62b0 573 #ifdef __cplusplus
<> 128:9bcdf88f62b0 574 }
<> 128:9bcdf88f62b0 575 #endif
<> 128:9bcdf88f62b0 576
<> 128:9bcdf88f62b0 577 #endif /* __STM32L1xx_HAL_IRDA_H */
<> 128:9bcdf88f62b0 578
<> 128:9bcdf88f62b0 579 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/