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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
AnnaBridge
Date:
Thu Sep 06 13:39:34 2018 +0100
Revision:
170:e95d10626187
Parent:
169:a7c7b631e539
mbed library. Release version 163

Who changed what in which revision?

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AnnaBridge 157:e7ca05fa8600 1 /**************************************************************************//**
AnnaBridge 157:e7ca05fa8600 2 * @file cmsis_gcc.h
AnnaBridge 157:e7ca05fa8600 3 * @brief CMSIS compiler GCC header file
Anna Bridge 169:a7c7b631e539 4 * @version V5.0.3
Anna Bridge 169:a7c7b631e539 5 * @date 16. January 2018
AnnaBridge 157:e7ca05fa8600 6 ******************************************************************************/
AnnaBridge 157:e7ca05fa8600 7 /*
AnnaBridge 157:e7ca05fa8600 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 157:e7ca05fa8600 9 *
AnnaBridge 157:e7ca05fa8600 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 157:e7ca05fa8600 11 *
AnnaBridge 157:e7ca05fa8600 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 157:e7ca05fa8600 13 * not use this file except in compliance with the License.
AnnaBridge 157:e7ca05fa8600 14 * You may obtain a copy of the License at
AnnaBridge 157:e7ca05fa8600 15 *
AnnaBridge 157:e7ca05fa8600 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 157:e7ca05fa8600 17 *
AnnaBridge 157:e7ca05fa8600 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 157:e7ca05fa8600 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 157:e7ca05fa8600 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 157:e7ca05fa8600 21 * See the License for the specific language governing permissions and
AnnaBridge 157:e7ca05fa8600 22 * limitations under the License.
AnnaBridge 157:e7ca05fa8600 23 */
AnnaBridge 157:e7ca05fa8600 24
AnnaBridge 157:e7ca05fa8600 25 #ifndef __CMSIS_GCC_H
AnnaBridge 157:e7ca05fa8600 26 #define __CMSIS_GCC_H
AnnaBridge 157:e7ca05fa8600 27
AnnaBridge 157:e7ca05fa8600 28 /* ignore some GCC warnings */
AnnaBridge 157:e7ca05fa8600 29 #pragma GCC diagnostic push
AnnaBridge 157:e7ca05fa8600 30 #pragma GCC diagnostic ignored "-Wsign-conversion"
AnnaBridge 157:e7ca05fa8600 31 #pragma GCC diagnostic ignored "-Wconversion"
AnnaBridge 157:e7ca05fa8600 32 #pragma GCC diagnostic ignored "-Wunused-parameter"
AnnaBridge 157:e7ca05fa8600 33
Anna Bridge 160:5571c4ff569f 34 /* Fallback for __has_builtin */
Anna Bridge 160:5571c4ff569f 35 #ifndef __has_builtin
Anna Bridge 160:5571c4ff569f 36 #define __has_builtin(x) (0)
Anna Bridge 160:5571c4ff569f 37 #endif
Anna Bridge 160:5571c4ff569f 38
AnnaBridge 157:e7ca05fa8600 39 /* CMSIS compiler specific defines */
AnnaBridge 157:e7ca05fa8600 40 #ifndef __ASM
AnnaBridge 157:e7ca05fa8600 41 #define __ASM __asm
AnnaBridge 157:e7ca05fa8600 42 #endif
AnnaBridge 157:e7ca05fa8600 43 #ifndef __INLINE
AnnaBridge 157:e7ca05fa8600 44 #define __INLINE inline
AnnaBridge 157:e7ca05fa8600 45 #endif
AnnaBridge 157:e7ca05fa8600 46 #ifndef __STATIC_INLINE
AnnaBridge 157:e7ca05fa8600 47 #define __STATIC_INLINE static inline
AnnaBridge 157:e7ca05fa8600 48 #endif
Anna Bridge 169:a7c7b631e539 49 #ifndef __STATIC_FORCEINLINE
Anna Bridge 169:a7c7b631e539 50 #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
Anna Bridge 169:a7c7b631e539 51 #endif
AnnaBridge 157:e7ca05fa8600 52 #ifndef __NO_RETURN
Anna Bridge 169:a7c7b631e539 53 #define __NO_RETURN __attribute__((__noreturn__))
AnnaBridge 157:e7ca05fa8600 54 #endif
AnnaBridge 157:e7ca05fa8600 55 #ifndef __USED
AnnaBridge 157:e7ca05fa8600 56 #define __USED __attribute__((used))
AnnaBridge 157:e7ca05fa8600 57 #endif
AnnaBridge 157:e7ca05fa8600 58 #ifndef __WEAK
AnnaBridge 157:e7ca05fa8600 59 #define __WEAK __attribute__((weak))
AnnaBridge 157:e7ca05fa8600 60 #endif
AnnaBridge 157:e7ca05fa8600 61 #ifndef __PACKED
AnnaBridge 157:e7ca05fa8600 62 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 157:e7ca05fa8600 63 #endif
AnnaBridge 157:e7ca05fa8600 64 #ifndef __PACKED_STRUCT
AnnaBridge 157:e7ca05fa8600 65 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 157:e7ca05fa8600 66 #endif
Anna Bridge 160:5571c4ff569f 67 #ifndef __PACKED_UNION
Anna Bridge 160:5571c4ff569f 68 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
Anna Bridge 160:5571c4ff569f 69 #endif
AnnaBridge 157:e7ca05fa8600 70 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 157:e7ca05fa8600 71 #pragma GCC diagnostic push
AnnaBridge 157:e7ca05fa8600 72 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 157:e7ca05fa8600 73 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 157:e7ca05fa8600 74 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge 157:e7ca05fa8600 75 #pragma GCC diagnostic pop
AnnaBridge 157:e7ca05fa8600 76 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge 157:e7ca05fa8600 77 #endif
AnnaBridge 157:e7ca05fa8600 78 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 157:e7ca05fa8600 79 #pragma GCC diagnostic push
AnnaBridge 157:e7ca05fa8600 80 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 157:e7ca05fa8600 81 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 157:e7ca05fa8600 82 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 157:e7ca05fa8600 83 #pragma GCC diagnostic pop
AnnaBridge 157:e7ca05fa8600 84 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 157:e7ca05fa8600 85 #endif
AnnaBridge 157:e7ca05fa8600 86 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 157:e7ca05fa8600 87 #pragma GCC diagnostic push
AnnaBridge 157:e7ca05fa8600 88 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 157:e7ca05fa8600 89 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 157:e7ca05fa8600 90 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 157:e7ca05fa8600 91 #pragma GCC diagnostic pop
AnnaBridge 157:e7ca05fa8600 92 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 157:e7ca05fa8600 93 #endif
AnnaBridge 157:e7ca05fa8600 94 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 157:e7ca05fa8600 95 #pragma GCC diagnostic push
AnnaBridge 157:e7ca05fa8600 96 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 157:e7ca05fa8600 97 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 157:e7ca05fa8600 98 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 157:e7ca05fa8600 99 #pragma GCC diagnostic pop
AnnaBridge 157:e7ca05fa8600 100 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 157:e7ca05fa8600 101 #endif
AnnaBridge 157:e7ca05fa8600 102 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 157:e7ca05fa8600 103 #pragma GCC diagnostic push
AnnaBridge 157:e7ca05fa8600 104 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 157:e7ca05fa8600 105 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 157:e7ca05fa8600 106 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 157:e7ca05fa8600 107 #pragma GCC diagnostic pop
AnnaBridge 157:e7ca05fa8600 108 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 157:e7ca05fa8600 109 #endif
AnnaBridge 157:e7ca05fa8600 110 #ifndef __ALIGNED
AnnaBridge 157:e7ca05fa8600 111 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 157:e7ca05fa8600 112 #endif
Anna Bridge 160:5571c4ff569f 113 #ifndef __RESTRICT
Anna Bridge 160:5571c4ff569f 114 #define __RESTRICT __restrict
Anna Bridge 160:5571c4ff569f 115 #endif
AnnaBridge 157:e7ca05fa8600 116
AnnaBridge 157:e7ca05fa8600 117
AnnaBridge 157:e7ca05fa8600 118 /* ########################### Core Function Access ########################### */
AnnaBridge 157:e7ca05fa8600 119 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 157:e7ca05fa8600 120 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 157:e7ca05fa8600 121 @{
AnnaBridge 157:e7ca05fa8600 122 */
AnnaBridge 157:e7ca05fa8600 123
AnnaBridge 157:e7ca05fa8600 124 /**
AnnaBridge 157:e7ca05fa8600 125 \brief Enable IRQ Interrupts
AnnaBridge 157:e7ca05fa8600 126 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 157:e7ca05fa8600 127 Can only be executed in Privileged modes.
AnnaBridge 157:e7ca05fa8600 128 */
Anna Bridge 169:a7c7b631e539 129 __STATIC_FORCEINLINE void __enable_irq(void)
AnnaBridge 157:e7ca05fa8600 130 {
AnnaBridge 157:e7ca05fa8600 131 __ASM volatile ("cpsie i" : : : "memory");
AnnaBridge 157:e7ca05fa8600 132 }
AnnaBridge 157:e7ca05fa8600 133
AnnaBridge 157:e7ca05fa8600 134
AnnaBridge 157:e7ca05fa8600 135 /**
AnnaBridge 157:e7ca05fa8600 136 \brief Disable IRQ Interrupts
AnnaBridge 157:e7ca05fa8600 137 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 157:e7ca05fa8600 138 Can only be executed in Privileged modes.
AnnaBridge 157:e7ca05fa8600 139 */
Anna Bridge 169:a7c7b631e539 140 __STATIC_FORCEINLINE void __disable_irq(void)
AnnaBridge 157:e7ca05fa8600 141 {
AnnaBridge 157:e7ca05fa8600 142 __ASM volatile ("cpsid i" : : : "memory");
AnnaBridge 157:e7ca05fa8600 143 }
AnnaBridge 157:e7ca05fa8600 144
AnnaBridge 157:e7ca05fa8600 145
AnnaBridge 157:e7ca05fa8600 146 /**
AnnaBridge 157:e7ca05fa8600 147 \brief Get Control Register
AnnaBridge 157:e7ca05fa8600 148 \details Returns the content of the Control Register.
AnnaBridge 157:e7ca05fa8600 149 \return Control Register value
AnnaBridge 157:e7ca05fa8600 150 */
Anna Bridge 169:a7c7b631e539 151 __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
AnnaBridge 157:e7ca05fa8600 152 {
AnnaBridge 157:e7ca05fa8600 153 uint32_t result;
AnnaBridge 157:e7ca05fa8600 154
AnnaBridge 157:e7ca05fa8600 155 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 156 return(result);
AnnaBridge 157:e7ca05fa8600 157 }
AnnaBridge 157:e7ca05fa8600 158
AnnaBridge 157:e7ca05fa8600 159
AnnaBridge 157:e7ca05fa8600 160 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 161 /**
AnnaBridge 157:e7ca05fa8600 162 \brief Get Control Register (non-secure)
AnnaBridge 157:e7ca05fa8600 163 \details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge 157:e7ca05fa8600 164 \return non-secure Control Register value
AnnaBridge 157:e7ca05fa8600 165 */
Anna Bridge 169:a7c7b631e539 166 __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 157:e7ca05fa8600 167 {
AnnaBridge 157:e7ca05fa8600 168 uint32_t result;
AnnaBridge 157:e7ca05fa8600 169
AnnaBridge 157:e7ca05fa8600 170 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 171 return(result);
AnnaBridge 157:e7ca05fa8600 172 }
AnnaBridge 157:e7ca05fa8600 173 #endif
AnnaBridge 157:e7ca05fa8600 174
AnnaBridge 157:e7ca05fa8600 175
AnnaBridge 157:e7ca05fa8600 176 /**
AnnaBridge 157:e7ca05fa8600 177 \brief Set Control Register
AnnaBridge 157:e7ca05fa8600 178 \details Writes the given value to the Control Register.
AnnaBridge 157:e7ca05fa8600 179 \param [in] control Control Register value to set
AnnaBridge 157:e7ca05fa8600 180 */
Anna Bridge 169:a7c7b631e539 181 __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
AnnaBridge 157:e7ca05fa8600 182 {
AnnaBridge 157:e7ca05fa8600 183 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 157:e7ca05fa8600 184 }
AnnaBridge 157:e7ca05fa8600 185
AnnaBridge 157:e7ca05fa8600 186
AnnaBridge 157:e7ca05fa8600 187 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 188 /**
AnnaBridge 157:e7ca05fa8600 189 \brief Set Control Register (non-secure)
AnnaBridge 157:e7ca05fa8600 190 \details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge 157:e7ca05fa8600 191 \param [in] control Control Register value to set
AnnaBridge 157:e7ca05fa8600 192 */
Anna Bridge 169:a7c7b631e539 193 __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge 157:e7ca05fa8600 194 {
AnnaBridge 157:e7ca05fa8600 195 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge 157:e7ca05fa8600 196 }
AnnaBridge 157:e7ca05fa8600 197 #endif
AnnaBridge 157:e7ca05fa8600 198
AnnaBridge 157:e7ca05fa8600 199
AnnaBridge 157:e7ca05fa8600 200 /**
AnnaBridge 157:e7ca05fa8600 201 \brief Get IPSR Register
AnnaBridge 157:e7ca05fa8600 202 \details Returns the content of the IPSR Register.
AnnaBridge 157:e7ca05fa8600 203 \return IPSR Register value
AnnaBridge 157:e7ca05fa8600 204 */
Anna Bridge 169:a7c7b631e539 205 __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
AnnaBridge 157:e7ca05fa8600 206 {
AnnaBridge 157:e7ca05fa8600 207 uint32_t result;
AnnaBridge 157:e7ca05fa8600 208
AnnaBridge 157:e7ca05fa8600 209 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 210 return(result);
AnnaBridge 157:e7ca05fa8600 211 }
AnnaBridge 157:e7ca05fa8600 212
AnnaBridge 157:e7ca05fa8600 213
AnnaBridge 157:e7ca05fa8600 214 /**
AnnaBridge 157:e7ca05fa8600 215 \brief Get APSR Register
AnnaBridge 157:e7ca05fa8600 216 \details Returns the content of the APSR Register.
AnnaBridge 157:e7ca05fa8600 217 \return APSR Register value
AnnaBridge 157:e7ca05fa8600 218 */
Anna Bridge 169:a7c7b631e539 219 __STATIC_FORCEINLINE uint32_t __get_APSR(void)
AnnaBridge 157:e7ca05fa8600 220 {
AnnaBridge 157:e7ca05fa8600 221 uint32_t result;
AnnaBridge 157:e7ca05fa8600 222
AnnaBridge 157:e7ca05fa8600 223 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 224 return(result);
AnnaBridge 157:e7ca05fa8600 225 }
AnnaBridge 157:e7ca05fa8600 226
AnnaBridge 157:e7ca05fa8600 227
AnnaBridge 157:e7ca05fa8600 228 /**
AnnaBridge 157:e7ca05fa8600 229 \brief Get xPSR Register
AnnaBridge 157:e7ca05fa8600 230 \details Returns the content of the xPSR Register.
AnnaBridge 157:e7ca05fa8600 231 \return xPSR Register value
AnnaBridge 157:e7ca05fa8600 232 */
Anna Bridge 169:a7c7b631e539 233 __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
AnnaBridge 157:e7ca05fa8600 234 {
AnnaBridge 157:e7ca05fa8600 235 uint32_t result;
AnnaBridge 157:e7ca05fa8600 236
AnnaBridge 157:e7ca05fa8600 237 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 238 return(result);
AnnaBridge 157:e7ca05fa8600 239 }
AnnaBridge 157:e7ca05fa8600 240
AnnaBridge 157:e7ca05fa8600 241
AnnaBridge 157:e7ca05fa8600 242 /**
AnnaBridge 157:e7ca05fa8600 243 \brief Get Process Stack Pointer
AnnaBridge 157:e7ca05fa8600 244 \details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 157:e7ca05fa8600 245 \return PSP Register value
AnnaBridge 157:e7ca05fa8600 246 */
Anna Bridge 169:a7c7b631e539 247 __STATIC_FORCEINLINE uint32_t __get_PSP(void)
AnnaBridge 157:e7ca05fa8600 248 {
AnnaBridge 157:e7ca05fa8600 249 register uint32_t result;
AnnaBridge 157:e7ca05fa8600 250
AnnaBridge 157:e7ca05fa8600 251 __ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 252 return(result);
AnnaBridge 157:e7ca05fa8600 253 }
AnnaBridge 157:e7ca05fa8600 254
AnnaBridge 157:e7ca05fa8600 255
AnnaBridge 157:e7ca05fa8600 256 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 257 /**
AnnaBridge 157:e7ca05fa8600 258 \brief Get Process Stack Pointer (non-secure)
AnnaBridge 157:e7ca05fa8600 259 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 157:e7ca05fa8600 260 \return PSP Register value
AnnaBridge 157:e7ca05fa8600 261 */
Anna Bridge 169:a7c7b631e539 262 __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 157:e7ca05fa8600 263 {
AnnaBridge 157:e7ca05fa8600 264 register uint32_t result;
AnnaBridge 157:e7ca05fa8600 265
AnnaBridge 157:e7ca05fa8600 266 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 267 return(result);
AnnaBridge 157:e7ca05fa8600 268 }
AnnaBridge 157:e7ca05fa8600 269 #endif
AnnaBridge 157:e7ca05fa8600 270
AnnaBridge 157:e7ca05fa8600 271
AnnaBridge 157:e7ca05fa8600 272 /**
AnnaBridge 157:e7ca05fa8600 273 \brief Set Process Stack Pointer
AnnaBridge 157:e7ca05fa8600 274 \details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 157:e7ca05fa8600 275 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 157:e7ca05fa8600 276 */
Anna Bridge 169:a7c7b631e539 277 __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 157:e7ca05fa8600 278 {
AnnaBridge 157:e7ca05fa8600 279 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge 157:e7ca05fa8600 280 }
AnnaBridge 157:e7ca05fa8600 281
AnnaBridge 157:e7ca05fa8600 282
AnnaBridge 157:e7ca05fa8600 283 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 284 /**
AnnaBridge 157:e7ca05fa8600 285 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 157:e7ca05fa8600 286 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 157:e7ca05fa8600 287 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 157:e7ca05fa8600 288 */
Anna Bridge 169:a7c7b631e539 289 __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge 157:e7ca05fa8600 290 {
AnnaBridge 157:e7ca05fa8600 291 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge 157:e7ca05fa8600 292 }
AnnaBridge 157:e7ca05fa8600 293 #endif
AnnaBridge 157:e7ca05fa8600 294
AnnaBridge 157:e7ca05fa8600 295
AnnaBridge 157:e7ca05fa8600 296 /**
AnnaBridge 157:e7ca05fa8600 297 \brief Get Main Stack Pointer
AnnaBridge 157:e7ca05fa8600 298 \details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 157:e7ca05fa8600 299 \return MSP Register value
AnnaBridge 157:e7ca05fa8600 300 */
Anna Bridge 169:a7c7b631e539 301 __STATIC_FORCEINLINE uint32_t __get_MSP(void)
AnnaBridge 157:e7ca05fa8600 302 {
AnnaBridge 157:e7ca05fa8600 303 register uint32_t result;
AnnaBridge 157:e7ca05fa8600 304
AnnaBridge 157:e7ca05fa8600 305 __ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 306 return(result);
AnnaBridge 157:e7ca05fa8600 307 }
AnnaBridge 157:e7ca05fa8600 308
AnnaBridge 157:e7ca05fa8600 309
AnnaBridge 157:e7ca05fa8600 310 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 311 /**
AnnaBridge 157:e7ca05fa8600 312 \brief Get Main Stack Pointer (non-secure)
AnnaBridge 157:e7ca05fa8600 313 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 157:e7ca05fa8600 314 \return MSP Register value
AnnaBridge 157:e7ca05fa8600 315 */
Anna Bridge 169:a7c7b631e539 316 __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 157:e7ca05fa8600 317 {
AnnaBridge 157:e7ca05fa8600 318 register uint32_t result;
AnnaBridge 157:e7ca05fa8600 319
AnnaBridge 157:e7ca05fa8600 320 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 321 return(result);
AnnaBridge 157:e7ca05fa8600 322 }
AnnaBridge 157:e7ca05fa8600 323 #endif
AnnaBridge 157:e7ca05fa8600 324
AnnaBridge 157:e7ca05fa8600 325
AnnaBridge 157:e7ca05fa8600 326 /**
AnnaBridge 157:e7ca05fa8600 327 \brief Set Main Stack Pointer
AnnaBridge 157:e7ca05fa8600 328 \details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 157:e7ca05fa8600 329 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 157:e7ca05fa8600 330 */
Anna Bridge 169:a7c7b631e539 331 __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 157:e7ca05fa8600 332 {
AnnaBridge 157:e7ca05fa8600 333 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge 157:e7ca05fa8600 334 }
AnnaBridge 157:e7ca05fa8600 335
AnnaBridge 157:e7ca05fa8600 336
AnnaBridge 157:e7ca05fa8600 337 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 338 /**
AnnaBridge 157:e7ca05fa8600 339 \brief Set Main Stack Pointer (non-secure)
AnnaBridge 157:e7ca05fa8600 340 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 157:e7ca05fa8600 341 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 157:e7ca05fa8600 342 */
Anna Bridge 169:a7c7b631e539 343 __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge 157:e7ca05fa8600 344 {
AnnaBridge 157:e7ca05fa8600 345 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge 157:e7ca05fa8600 346 }
AnnaBridge 157:e7ca05fa8600 347 #endif
AnnaBridge 157:e7ca05fa8600 348
AnnaBridge 157:e7ca05fa8600 349
AnnaBridge 157:e7ca05fa8600 350 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 351 /**
AnnaBridge 157:e7ca05fa8600 352 \brief Get Stack Pointer (non-secure)
AnnaBridge 157:e7ca05fa8600 353 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 157:e7ca05fa8600 354 \return SP Register value
AnnaBridge 157:e7ca05fa8600 355 */
Anna Bridge 169:a7c7b631e539 356 __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge 157:e7ca05fa8600 357 {
AnnaBridge 157:e7ca05fa8600 358 register uint32_t result;
AnnaBridge 157:e7ca05fa8600 359
AnnaBridge 157:e7ca05fa8600 360 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 361 return(result);
AnnaBridge 157:e7ca05fa8600 362 }
AnnaBridge 157:e7ca05fa8600 363
AnnaBridge 157:e7ca05fa8600 364
AnnaBridge 157:e7ca05fa8600 365 /**
AnnaBridge 157:e7ca05fa8600 366 \brief Set Stack Pointer (non-secure)
AnnaBridge 157:e7ca05fa8600 367 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 157:e7ca05fa8600 368 \param [in] topOfStack Stack Pointer value to set
AnnaBridge 157:e7ca05fa8600 369 */
Anna Bridge 169:a7c7b631e539 370 __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge 157:e7ca05fa8600 371 {
AnnaBridge 157:e7ca05fa8600 372 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge 157:e7ca05fa8600 373 }
AnnaBridge 157:e7ca05fa8600 374 #endif
AnnaBridge 157:e7ca05fa8600 375
AnnaBridge 157:e7ca05fa8600 376
AnnaBridge 157:e7ca05fa8600 377 /**
AnnaBridge 157:e7ca05fa8600 378 \brief Get Priority Mask
AnnaBridge 157:e7ca05fa8600 379 \details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 157:e7ca05fa8600 380 \return Priority Mask value
AnnaBridge 157:e7ca05fa8600 381 */
Anna Bridge 169:a7c7b631e539 382 __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
AnnaBridge 157:e7ca05fa8600 383 {
AnnaBridge 157:e7ca05fa8600 384 uint32_t result;
AnnaBridge 157:e7ca05fa8600 385
Anna Bridge 169:a7c7b631e539 386 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
AnnaBridge 157:e7ca05fa8600 387 return(result);
AnnaBridge 157:e7ca05fa8600 388 }
AnnaBridge 157:e7ca05fa8600 389
AnnaBridge 157:e7ca05fa8600 390
AnnaBridge 157:e7ca05fa8600 391 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 392 /**
AnnaBridge 157:e7ca05fa8600 393 \brief Get Priority Mask (non-secure)
AnnaBridge 157:e7ca05fa8600 394 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge 157:e7ca05fa8600 395 \return Priority Mask value
AnnaBridge 157:e7ca05fa8600 396 */
Anna Bridge 169:a7c7b631e539 397 __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 157:e7ca05fa8600 398 {
AnnaBridge 157:e7ca05fa8600 399 uint32_t result;
AnnaBridge 157:e7ca05fa8600 400
Anna Bridge 169:a7c7b631e539 401 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
AnnaBridge 157:e7ca05fa8600 402 return(result);
AnnaBridge 157:e7ca05fa8600 403 }
AnnaBridge 157:e7ca05fa8600 404 #endif
AnnaBridge 157:e7ca05fa8600 405
AnnaBridge 157:e7ca05fa8600 406
AnnaBridge 157:e7ca05fa8600 407 /**
AnnaBridge 157:e7ca05fa8600 408 \brief Set Priority Mask
AnnaBridge 157:e7ca05fa8600 409 \details Assigns the given value to the Priority Mask Register.
AnnaBridge 157:e7ca05fa8600 410 \param [in] priMask Priority Mask
AnnaBridge 157:e7ca05fa8600 411 */
Anna Bridge 169:a7c7b631e539 412 __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 157:e7ca05fa8600 413 {
AnnaBridge 157:e7ca05fa8600 414 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 157:e7ca05fa8600 415 }
AnnaBridge 157:e7ca05fa8600 416
AnnaBridge 157:e7ca05fa8600 417
AnnaBridge 157:e7ca05fa8600 418 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 419 /**
AnnaBridge 157:e7ca05fa8600 420 \brief Set Priority Mask (non-secure)
AnnaBridge 157:e7ca05fa8600 421 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge 157:e7ca05fa8600 422 \param [in] priMask Priority Mask
AnnaBridge 157:e7ca05fa8600 423 */
Anna Bridge 169:a7c7b631e539 424 __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge 157:e7ca05fa8600 425 {
AnnaBridge 157:e7ca05fa8600 426 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge 157:e7ca05fa8600 427 }
AnnaBridge 157:e7ca05fa8600 428 #endif
AnnaBridge 157:e7ca05fa8600 429
AnnaBridge 157:e7ca05fa8600 430
AnnaBridge 157:e7ca05fa8600 431 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 432 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 433 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 157:e7ca05fa8600 434 /**
AnnaBridge 157:e7ca05fa8600 435 \brief Enable FIQ
AnnaBridge 157:e7ca05fa8600 436 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 157:e7ca05fa8600 437 Can only be executed in Privileged modes.
AnnaBridge 157:e7ca05fa8600 438 */
Anna Bridge 169:a7c7b631e539 439 __STATIC_FORCEINLINE void __enable_fault_irq(void)
AnnaBridge 157:e7ca05fa8600 440 {
AnnaBridge 157:e7ca05fa8600 441 __ASM volatile ("cpsie f" : : : "memory");
AnnaBridge 157:e7ca05fa8600 442 }
AnnaBridge 157:e7ca05fa8600 443
AnnaBridge 157:e7ca05fa8600 444
AnnaBridge 157:e7ca05fa8600 445 /**
AnnaBridge 157:e7ca05fa8600 446 \brief Disable FIQ
AnnaBridge 157:e7ca05fa8600 447 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 157:e7ca05fa8600 448 Can only be executed in Privileged modes.
AnnaBridge 157:e7ca05fa8600 449 */
Anna Bridge 169:a7c7b631e539 450 __STATIC_FORCEINLINE void __disable_fault_irq(void)
AnnaBridge 157:e7ca05fa8600 451 {
AnnaBridge 157:e7ca05fa8600 452 __ASM volatile ("cpsid f" : : : "memory");
AnnaBridge 157:e7ca05fa8600 453 }
AnnaBridge 157:e7ca05fa8600 454
AnnaBridge 157:e7ca05fa8600 455
AnnaBridge 157:e7ca05fa8600 456 /**
AnnaBridge 157:e7ca05fa8600 457 \brief Get Base Priority
AnnaBridge 157:e7ca05fa8600 458 \details Returns the current value of the Base Priority register.
AnnaBridge 157:e7ca05fa8600 459 \return Base Priority register value
AnnaBridge 157:e7ca05fa8600 460 */
Anna Bridge 169:a7c7b631e539 461 __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
AnnaBridge 157:e7ca05fa8600 462 {
AnnaBridge 157:e7ca05fa8600 463 uint32_t result;
AnnaBridge 157:e7ca05fa8600 464
AnnaBridge 157:e7ca05fa8600 465 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 466 return(result);
AnnaBridge 157:e7ca05fa8600 467 }
AnnaBridge 157:e7ca05fa8600 468
AnnaBridge 157:e7ca05fa8600 469
AnnaBridge 157:e7ca05fa8600 470 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 471 /**
AnnaBridge 157:e7ca05fa8600 472 \brief Get Base Priority (non-secure)
AnnaBridge 157:e7ca05fa8600 473 \details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge 157:e7ca05fa8600 474 \return Base Priority register value
AnnaBridge 157:e7ca05fa8600 475 */
Anna Bridge 169:a7c7b631e539 476 __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 157:e7ca05fa8600 477 {
AnnaBridge 157:e7ca05fa8600 478 uint32_t result;
AnnaBridge 157:e7ca05fa8600 479
AnnaBridge 157:e7ca05fa8600 480 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 481 return(result);
AnnaBridge 157:e7ca05fa8600 482 }
AnnaBridge 157:e7ca05fa8600 483 #endif
AnnaBridge 157:e7ca05fa8600 484
AnnaBridge 157:e7ca05fa8600 485
AnnaBridge 157:e7ca05fa8600 486 /**
AnnaBridge 157:e7ca05fa8600 487 \brief Set Base Priority
AnnaBridge 157:e7ca05fa8600 488 \details Assigns the given value to the Base Priority register.
AnnaBridge 157:e7ca05fa8600 489 \param [in] basePri Base Priority value to set
AnnaBridge 157:e7ca05fa8600 490 */
Anna Bridge 169:a7c7b631e539 491 __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 157:e7ca05fa8600 492 {
AnnaBridge 157:e7ca05fa8600 493 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge 157:e7ca05fa8600 494 }
AnnaBridge 157:e7ca05fa8600 495
AnnaBridge 157:e7ca05fa8600 496
AnnaBridge 157:e7ca05fa8600 497 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 498 /**
AnnaBridge 157:e7ca05fa8600 499 \brief Set Base Priority (non-secure)
AnnaBridge 157:e7ca05fa8600 500 \details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge 157:e7ca05fa8600 501 \param [in] basePri Base Priority value to set
AnnaBridge 157:e7ca05fa8600 502 */
Anna Bridge 169:a7c7b631e539 503 __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge 157:e7ca05fa8600 504 {
AnnaBridge 157:e7ca05fa8600 505 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge 157:e7ca05fa8600 506 }
AnnaBridge 157:e7ca05fa8600 507 #endif
AnnaBridge 157:e7ca05fa8600 508
AnnaBridge 157:e7ca05fa8600 509
AnnaBridge 157:e7ca05fa8600 510 /**
AnnaBridge 157:e7ca05fa8600 511 \brief Set Base Priority with condition
AnnaBridge 157:e7ca05fa8600 512 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 157:e7ca05fa8600 513 or the new value increases the BASEPRI priority level.
AnnaBridge 157:e7ca05fa8600 514 \param [in] basePri Base Priority value to set
AnnaBridge 157:e7ca05fa8600 515 */
Anna Bridge 169:a7c7b631e539 516 __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 157:e7ca05fa8600 517 {
AnnaBridge 157:e7ca05fa8600 518 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge 157:e7ca05fa8600 519 }
AnnaBridge 157:e7ca05fa8600 520
AnnaBridge 157:e7ca05fa8600 521
AnnaBridge 157:e7ca05fa8600 522 /**
AnnaBridge 157:e7ca05fa8600 523 \brief Get Fault Mask
AnnaBridge 157:e7ca05fa8600 524 \details Returns the current value of the Fault Mask register.
AnnaBridge 157:e7ca05fa8600 525 \return Fault Mask register value
AnnaBridge 157:e7ca05fa8600 526 */
Anna Bridge 169:a7c7b631e539 527 __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 157:e7ca05fa8600 528 {
AnnaBridge 157:e7ca05fa8600 529 uint32_t result;
AnnaBridge 157:e7ca05fa8600 530
AnnaBridge 157:e7ca05fa8600 531 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 532 return(result);
AnnaBridge 157:e7ca05fa8600 533 }
AnnaBridge 157:e7ca05fa8600 534
AnnaBridge 157:e7ca05fa8600 535
AnnaBridge 157:e7ca05fa8600 536 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 537 /**
AnnaBridge 157:e7ca05fa8600 538 \brief Get Fault Mask (non-secure)
AnnaBridge 157:e7ca05fa8600 539 \details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge 157:e7ca05fa8600 540 \return Fault Mask register value
AnnaBridge 157:e7ca05fa8600 541 */
Anna Bridge 169:a7c7b631e539 542 __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 157:e7ca05fa8600 543 {
AnnaBridge 157:e7ca05fa8600 544 uint32_t result;
AnnaBridge 157:e7ca05fa8600 545
AnnaBridge 157:e7ca05fa8600 546 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 547 return(result);
AnnaBridge 157:e7ca05fa8600 548 }
AnnaBridge 157:e7ca05fa8600 549 #endif
AnnaBridge 157:e7ca05fa8600 550
AnnaBridge 157:e7ca05fa8600 551
AnnaBridge 157:e7ca05fa8600 552 /**
AnnaBridge 157:e7ca05fa8600 553 \brief Set Fault Mask
AnnaBridge 157:e7ca05fa8600 554 \details Assigns the given value to the Fault Mask register.
AnnaBridge 157:e7ca05fa8600 555 \param [in] faultMask Fault Mask value to set
AnnaBridge 157:e7ca05fa8600 556 */
Anna Bridge 169:a7c7b631e539 557 __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 157:e7ca05fa8600 558 {
AnnaBridge 157:e7ca05fa8600 559 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 157:e7ca05fa8600 560 }
AnnaBridge 157:e7ca05fa8600 561
AnnaBridge 157:e7ca05fa8600 562
AnnaBridge 157:e7ca05fa8600 563 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 564 /**
AnnaBridge 157:e7ca05fa8600 565 \brief Set Fault Mask (non-secure)
AnnaBridge 157:e7ca05fa8600 566 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge 157:e7ca05fa8600 567 \param [in] faultMask Fault Mask value to set
AnnaBridge 157:e7ca05fa8600 568 */
Anna Bridge 169:a7c7b631e539 569 __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge 157:e7ca05fa8600 570 {
AnnaBridge 157:e7ca05fa8600 571 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge 157:e7ca05fa8600 572 }
AnnaBridge 157:e7ca05fa8600 573 #endif
AnnaBridge 157:e7ca05fa8600 574
AnnaBridge 157:e7ca05fa8600 575 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 576 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 577 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 157:e7ca05fa8600 578
AnnaBridge 157:e7ca05fa8600 579
AnnaBridge 157:e7ca05fa8600 580 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 581 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 157:e7ca05fa8600 582
AnnaBridge 157:e7ca05fa8600 583 /**
AnnaBridge 157:e7ca05fa8600 584 \brief Get Process Stack Pointer Limit
Anna Bridge 169:a7c7b631e539 585 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 586 Stack Pointer Limit register hence zero is returned always in non-secure
Anna Bridge 169:a7c7b631e539 587 mode.
Anna Bridge 169:a7c7b631e539 588
AnnaBridge 157:e7ca05fa8600 589 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 157:e7ca05fa8600 590 \return PSPLIM Register value
AnnaBridge 157:e7ca05fa8600 591 */
Anna Bridge 169:a7c7b631e539 592 __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
AnnaBridge 157:e7ca05fa8600 593 {
Anna Bridge 169:a7c7b631e539 594 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 595 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 596 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 597 return 0U;
Anna Bridge 169:a7c7b631e539 598 #else
AnnaBridge 157:e7ca05fa8600 599 register uint32_t result;
AnnaBridge 157:e7ca05fa8600 600 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
Anna Bridge 169:a7c7b631e539 601 return result;
Anna Bridge 169:a7c7b631e539 602 #endif
AnnaBridge 157:e7ca05fa8600 603 }
AnnaBridge 157:e7ca05fa8600 604
Anna Bridge 169:a7c7b631e539 605 #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 606 /**
AnnaBridge 157:e7ca05fa8600 607 \brief Get Process Stack Pointer Limit (non-secure)
Anna Bridge 169:a7c7b631e539 608 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 609 Stack Pointer Limit register hence zero is returned always.
Anna Bridge 169:a7c7b631e539 610
AnnaBridge 157:e7ca05fa8600 611 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 157:e7ca05fa8600 612 \return PSPLIM Register value
AnnaBridge 157:e7ca05fa8600 613 */
Anna Bridge 169:a7c7b631e539 614 __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 157:e7ca05fa8600 615 {
Anna Bridge 169:a7c7b631e539 616 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge 169:a7c7b631e539 617 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 618 return 0U;
Anna Bridge 169:a7c7b631e539 619 #else
AnnaBridge 157:e7ca05fa8600 620 register uint32_t result;
AnnaBridge 157:e7ca05fa8600 621 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
Anna Bridge 169:a7c7b631e539 622 return result;
Anna Bridge 169:a7c7b631e539 623 #endif
AnnaBridge 157:e7ca05fa8600 624 }
AnnaBridge 157:e7ca05fa8600 625 #endif
AnnaBridge 157:e7ca05fa8600 626
AnnaBridge 157:e7ca05fa8600 627
AnnaBridge 157:e7ca05fa8600 628 /**
AnnaBridge 157:e7ca05fa8600 629 \brief Set Process Stack Pointer Limit
Anna Bridge 169:a7c7b631e539 630 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 631 Stack Pointer Limit register hence the write is silently ignored in non-secure
Anna Bridge 169:a7c7b631e539 632 mode.
Anna Bridge 169:a7c7b631e539 633
AnnaBridge 157:e7ca05fa8600 634 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 157:e7ca05fa8600 635 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 157:e7ca05fa8600 636 */
Anna Bridge 169:a7c7b631e539 637 __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge 157:e7ca05fa8600 638 {
Anna Bridge 169:a7c7b631e539 639 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 640 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 641 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 642 (void)ProcStackPtrLimit;
Anna Bridge 169:a7c7b631e539 643 #else
AnnaBridge 157:e7ca05fa8600 644 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
Anna Bridge 169:a7c7b631e539 645 #endif
AnnaBridge 157:e7ca05fa8600 646 }
AnnaBridge 157:e7ca05fa8600 647
AnnaBridge 157:e7ca05fa8600 648
Anna Bridge 169:a7c7b631e539 649 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 650 /**
AnnaBridge 157:e7ca05fa8600 651 \brief Set Process Stack Pointer (non-secure)
Anna Bridge 169:a7c7b631e539 652 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 653 Stack Pointer Limit register hence the write is silently ignored.
Anna Bridge 169:a7c7b631e539 654
AnnaBridge 157:e7ca05fa8600 655 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 157:e7ca05fa8600 656 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 157:e7ca05fa8600 657 */
Anna Bridge 169:a7c7b631e539 658 __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge 157:e7ca05fa8600 659 {
Anna Bridge 169:a7c7b631e539 660 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge 169:a7c7b631e539 661 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 662 (void)ProcStackPtrLimit;
Anna Bridge 169:a7c7b631e539 663 #else
AnnaBridge 157:e7ca05fa8600 664 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
Anna Bridge 169:a7c7b631e539 665 #endif
AnnaBridge 157:e7ca05fa8600 666 }
AnnaBridge 157:e7ca05fa8600 667 #endif
AnnaBridge 157:e7ca05fa8600 668
AnnaBridge 157:e7ca05fa8600 669
AnnaBridge 157:e7ca05fa8600 670 /**
AnnaBridge 157:e7ca05fa8600 671 \brief Get Main Stack Pointer Limit
Anna Bridge 169:a7c7b631e539 672 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 673 Stack Pointer Limit register hence zero is returned always in non-secure
Anna Bridge 169:a7c7b631e539 674 mode.
Anna Bridge 169:a7c7b631e539 675
AnnaBridge 157:e7ca05fa8600 676 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 157:e7ca05fa8600 677 \return MSPLIM Register value
AnnaBridge 157:e7ca05fa8600 678 */
Anna Bridge 169:a7c7b631e539 679 __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
AnnaBridge 157:e7ca05fa8600 680 {
Anna Bridge 169:a7c7b631e539 681 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 682 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 683 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 684 return 0U;
Anna Bridge 169:a7c7b631e539 685 #else
AnnaBridge 157:e7ca05fa8600 686 register uint32_t result;
AnnaBridge 157:e7ca05fa8600 687 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
Anna Bridge 169:a7c7b631e539 688 return result;
Anna Bridge 169:a7c7b631e539 689 #endif
AnnaBridge 157:e7ca05fa8600 690 }
AnnaBridge 157:e7ca05fa8600 691
AnnaBridge 157:e7ca05fa8600 692
Anna Bridge 169:a7c7b631e539 693 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 694 /**
AnnaBridge 157:e7ca05fa8600 695 \brief Get Main Stack Pointer Limit (non-secure)
Anna Bridge 169:a7c7b631e539 696 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 697 Stack Pointer Limit register hence zero is returned always.
Anna Bridge 169:a7c7b631e539 698
AnnaBridge 157:e7ca05fa8600 699 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge 157:e7ca05fa8600 700 \return MSPLIM Register value
AnnaBridge 157:e7ca05fa8600 701 */
Anna Bridge 169:a7c7b631e539 702 __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 157:e7ca05fa8600 703 {
Anna Bridge 169:a7c7b631e539 704 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge 169:a7c7b631e539 705 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 706 return 0U;
Anna Bridge 169:a7c7b631e539 707 #else
AnnaBridge 157:e7ca05fa8600 708 register uint32_t result;
AnnaBridge 157:e7ca05fa8600 709 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
Anna Bridge 169:a7c7b631e539 710 return result;
Anna Bridge 169:a7c7b631e539 711 #endif
AnnaBridge 157:e7ca05fa8600 712 }
AnnaBridge 157:e7ca05fa8600 713 #endif
AnnaBridge 157:e7ca05fa8600 714
AnnaBridge 157:e7ca05fa8600 715
AnnaBridge 157:e7ca05fa8600 716 /**
AnnaBridge 157:e7ca05fa8600 717 \brief Set Main Stack Pointer Limit
Anna Bridge 169:a7c7b631e539 718 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 719 Stack Pointer Limit register hence the write is silently ignored in non-secure
Anna Bridge 169:a7c7b631e539 720 mode.
Anna Bridge 169:a7c7b631e539 721
AnnaBridge 157:e7ca05fa8600 722 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 157:e7ca05fa8600 723 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge 157:e7ca05fa8600 724 */
Anna Bridge 169:a7c7b631e539 725 __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge 157:e7ca05fa8600 726 {
Anna Bridge 169:a7c7b631e539 727 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 728 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 729 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 730 (void)MainStackPtrLimit;
Anna Bridge 169:a7c7b631e539 731 #else
AnnaBridge 157:e7ca05fa8600 732 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
Anna Bridge 169:a7c7b631e539 733 #endif
AnnaBridge 157:e7ca05fa8600 734 }
AnnaBridge 157:e7ca05fa8600 735
AnnaBridge 157:e7ca05fa8600 736
Anna Bridge 169:a7c7b631e539 737 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 157:e7ca05fa8600 738 /**
AnnaBridge 157:e7ca05fa8600 739 \brief Set Main Stack Pointer Limit (non-secure)
Anna Bridge 169:a7c7b631e539 740 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 741 Stack Pointer Limit register hence the write is silently ignored.
Anna Bridge 169:a7c7b631e539 742
AnnaBridge 157:e7ca05fa8600 743 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge 157:e7ca05fa8600 744 \param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge 157:e7ca05fa8600 745 */
Anna Bridge 169:a7c7b631e539 746 __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge 157:e7ca05fa8600 747 {
Anna Bridge 169:a7c7b631e539 748 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge 169:a7c7b631e539 749 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 750 (void)MainStackPtrLimit;
Anna Bridge 169:a7c7b631e539 751 #else
AnnaBridge 157:e7ca05fa8600 752 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
Anna Bridge 169:a7c7b631e539 753 #endif
AnnaBridge 157:e7ca05fa8600 754 }
AnnaBridge 157:e7ca05fa8600 755 #endif
AnnaBridge 157:e7ca05fa8600 756
AnnaBridge 157:e7ca05fa8600 757 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 758 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 157:e7ca05fa8600 759
AnnaBridge 157:e7ca05fa8600 760
AnnaBridge 157:e7ca05fa8600 761 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 762 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 157:e7ca05fa8600 763
AnnaBridge 157:e7ca05fa8600 764 /**
AnnaBridge 157:e7ca05fa8600 765 \brief Get FPSCR
AnnaBridge 157:e7ca05fa8600 766 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 157:e7ca05fa8600 767 \return Floating Point Status/Control register value
AnnaBridge 157:e7ca05fa8600 768 */
Anna Bridge 169:a7c7b631e539 769 __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
AnnaBridge 157:e7ca05fa8600 770 {
AnnaBridge 157:e7ca05fa8600 771 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 157:e7ca05fa8600 772 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge 160:5571c4ff569f 773 #if __has_builtin(__builtin_arm_get_fpscr) || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
Anna Bridge 160:5571c4ff569f 774 /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
Anna Bridge 160:5571c4ff569f 775 return __builtin_arm_get_fpscr();
Anna Bridge 160:5571c4ff569f 776 #else
AnnaBridge 157:e7ca05fa8600 777 uint32_t result;
AnnaBridge 157:e7ca05fa8600 778
AnnaBridge 157:e7ca05fa8600 779 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
AnnaBridge 157:e7ca05fa8600 780 return(result);
Anna Bridge 160:5571c4ff569f 781 #endif
AnnaBridge 157:e7ca05fa8600 782 #else
Anna Bridge 160:5571c4ff569f 783 return(0U);
AnnaBridge 157:e7ca05fa8600 784 #endif
AnnaBridge 157:e7ca05fa8600 785 }
AnnaBridge 157:e7ca05fa8600 786
AnnaBridge 157:e7ca05fa8600 787
AnnaBridge 157:e7ca05fa8600 788 /**
AnnaBridge 157:e7ca05fa8600 789 \brief Set FPSCR
AnnaBridge 157:e7ca05fa8600 790 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 157:e7ca05fa8600 791 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 157:e7ca05fa8600 792 */
Anna Bridge 169:a7c7b631e539 793 __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge 157:e7ca05fa8600 794 {
AnnaBridge 157:e7ca05fa8600 795 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 157:e7ca05fa8600 796 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge 160:5571c4ff569f 797 #if __has_builtin(__builtin_arm_set_fpscr) || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
Anna Bridge 160:5571c4ff569f 798 /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
Anna Bridge 160:5571c4ff569f 799 __builtin_arm_set_fpscr(fpscr);
Anna Bridge 160:5571c4ff569f 800 #else
AnnaBridge 157:e7ca05fa8600 801 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
Anna Bridge 160:5571c4ff569f 802 #endif
AnnaBridge 157:e7ca05fa8600 803 #else
AnnaBridge 157:e7ca05fa8600 804 (void)fpscr;
AnnaBridge 157:e7ca05fa8600 805 #endif
AnnaBridge 157:e7ca05fa8600 806 }
AnnaBridge 157:e7ca05fa8600 807
AnnaBridge 157:e7ca05fa8600 808 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 809 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 157:e7ca05fa8600 810
AnnaBridge 157:e7ca05fa8600 811
AnnaBridge 157:e7ca05fa8600 812
AnnaBridge 157:e7ca05fa8600 813 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 157:e7ca05fa8600 814
AnnaBridge 157:e7ca05fa8600 815
AnnaBridge 157:e7ca05fa8600 816 /* ########################## Core Instruction Access ######################### */
AnnaBridge 157:e7ca05fa8600 817 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge 157:e7ca05fa8600 818 Access to dedicated instructions
AnnaBridge 157:e7ca05fa8600 819 @{
AnnaBridge 157:e7ca05fa8600 820 */
AnnaBridge 157:e7ca05fa8600 821
AnnaBridge 157:e7ca05fa8600 822 /* Define macros for porting to both thumb1 and thumb2.
AnnaBridge 157:e7ca05fa8600 823 * For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge 157:e7ca05fa8600 824 * Otherwise, use general registers, specified by constraint "r" */
AnnaBridge 157:e7ca05fa8600 825 #if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge 157:e7ca05fa8600 826 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge 157:e7ca05fa8600 827 #define __CMSIS_GCC_RW_REG(r) "+l" (r)
AnnaBridge 157:e7ca05fa8600 828 #define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge 157:e7ca05fa8600 829 #else
AnnaBridge 157:e7ca05fa8600 830 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge 157:e7ca05fa8600 831 #define __CMSIS_GCC_RW_REG(r) "+r" (r)
AnnaBridge 157:e7ca05fa8600 832 #define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge 157:e7ca05fa8600 833 #endif
AnnaBridge 157:e7ca05fa8600 834
AnnaBridge 157:e7ca05fa8600 835 /**
AnnaBridge 157:e7ca05fa8600 836 \brief No Operation
AnnaBridge 157:e7ca05fa8600 837 \details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge 157:e7ca05fa8600 838 */
Anna Bridge 169:a7c7b631e539 839 #define __NOP() __ASM volatile ("nop")
AnnaBridge 157:e7ca05fa8600 840
AnnaBridge 157:e7ca05fa8600 841 /**
AnnaBridge 157:e7ca05fa8600 842 \brief Wait For Interrupt
AnnaBridge 157:e7ca05fa8600 843 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge 157:e7ca05fa8600 844 */
Anna Bridge 169:a7c7b631e539 845 #define __WFI() __ASM volatile ("wfi")
AnnaBridge 157:e7ca05fa8600 846
AnnaBridge 157:e7ca05fa8600 847
AnnaBridge 157:e7ca05fa8600 848 /**
AnnaBridge 157:e7ca05fa8600 849 \brief Wait For Event
AnnaBridge 157:e7ca05fa8600 850 \details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge 157:e7ca05fa8600 851 a low-power state until one of a number of events occurs.
AnnaBridge 157:e7ca05fa8600 852 */
Anna Bridge 169:a7c7b631e539 853 #define __WFE() __ASM volatile ("wfe")
AnnaBridge 157:e7ca05fa8600 854
AnnaBridge 157:e7ca05fa8600 855
AnnaBridge 157:e7ca05fa8600 856 /**
AnnaBridge 157:e7ca05fa8600 857 \brief Send Event
AnnaBridge 157:e7ca05fa8600 858 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge 157:e7ca05fa8600 859 */
Anna Bridge 169:a7c7b631e539 860 #define __SEV() __ASM volatile ("sev")
AnnaBridge 157:e7ca05fa8600 861
AnnaBridge 157:e7ca05fa8600 862
AnnaBridge 157:e7ca05fa8600 863 /**
AnnaBridge 157:e7ca05fa8600 864 \brief Instruction Synchronization Barrier
AnnaBridge 157:e7ca05fa8600 865 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge 157:e7ca05fa8600 866 so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge 157:e7ca05fa8600 867 after the instruction has been completed.
AnnaBridge 157:e7ca05fa8600 868 */
Anna Bridge 169:a7c7b631e539 869 __STATIC_FORCEINLINE void __ISB(void)
AnnaBridge 157:e7ca05fa8600 870 {
AnnaBridge 157:e7ca05fa8600 871 __ASM volatile ("isb 0xF":::"memory");
AnnaBridge 157:e7ca05fa8600 872 }
AnnaBridge 157:e7ca05fa8600 873
AnnaBridge 157:e7ca05fa8600 874
AnnaBridge 157:e7ca05fa8600 875 /**
AnnaBridge 157:e7ca05fa8600 876 \brief Data Synchronization Barrier
AnnaBridge 157:e7ca05fa8600 877 \details Acts as a special kind of Data Memory Barrier.
AnnaBridge 157:e7ca05fa8600 878 It completes when all explicit memory accesses before this instruction complete.
AnnaBridge 157:e7ca05fa8600 879 */
Anna Bridge 169:a7c7b631e539 880 __STATIC_FORCEINLINE void __DSB(void)
AnnaBridge 157:e7ca05fa8600 881 {
AnnaBridge 157:e7ca05fa8600 882 __ASM volatile ("dsb 0xF":::"memory");
AnnaBridge 157:e7ca05fa8600 883 }
AnnaBridge 157:e7ca05fa8600 884
AnnaBridge 157:e7ca05fa8600 885
AnnaBridge 157:e7ca05fa8600 886 /**
AnnaBridge 157:e7ca05fa8600 887 \brief Data Memory Barrier
AnnaBridge 157:e7ca05fa8600 888 \details Ensures the apparent order of the explicit memory operations before
AnnaBridge 157:e7ca05fa8600 889 and after the instruction, without ensuring their completion.
AnnaBridge 157:e7ca05fa8600 890 */
Anna Bridge 169:a7c7b631e539 891 __STATIC_FORCEINLINE void __DMB(void)
AnnaBridge 157:e7ca05fa8600 892 {
AnnaBridge 157:e7ca05fa8600 893 __ASM volatile ("dmb 0xF":::"memory");
AnnaBridge 157:e7ca05fa8600 894 }
AnnaBridge 157:e7ca05fa8600 895
AnnaBridge 157:e7ca05fa8600 896
AnnaBridge 157:e7ca05fa8600 897 /**
AnnaBridge 157:e7ca05fa8600 898 \brief Reverse byte order (32 bit)
Anna Bridge 169:a7c7b631e539 899 \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
AnnaBridge 157:e7ca05fa8600 900 \param [in] value Value to reverse
AnnaBridge 157:e7ca05fa8600 901 \return Reversed value
AnnaBridge 157:e7ca05fa8600 902 */
Anna Bridge 169:a7c7b631e539 903 __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
AnnaBridge 157:e7ca05fa8600 904 {
AnnaBridge 157:e7ca05fa8600 905 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
AnnaBridge 157:e7ca05fa8600 906 return __builtin_bswap32(value);
AnnaBridge 157:e7ca05fa8600 907 #else
AnnaBridge 157:e7ca05fa8600 908 uint32_t result;
AnnaBridge 157:e7ca05fa8600 909
AnnaBridge 157:e7ca05fa8600 910 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Anna Bridge 169:a7c7b631e539 911 return result;
AnnaBridge 157:e7ca05fa8600 912 #endif
AnnaBridge 157:e7ca05fa8600 913 }
AnnaBridge 157:e7ca05fa8600 914
AnnaBridge 157:e7ca05fa8600 915
AnnaBridge 157:e7ca05fa8600 916 /**
AnnaBridge 157:e7ca05fa8600 917 \brief Reverse byte order (16 bit)
Anna Bridge 169:a7c7b631e539 918 \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
AnnaBridge 157:e7ca05fa8600 919 \param [in] value Value to reverse
AnnaBridge 157:e7ca05fa8600 920 \return Reversed value
AnnaBridge 157:e7ca05fa8600 921 */
Anna Bridge 169:a7c7b631e539 922 __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
AnnaBridge 157:e7ca05fa8600 923 {
Anna Bridge 169:a7c7b631e539 924 uint32_t result;
AnnaBridge 157:e7ca05fa8600 925
AnnaBridge 157:e7ca05fa8600 926 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Anna Bridge 169:a7c7b631e539 927 return result;
AnnaBridge 157:e7ca05fa8600 928 }
AnnaBridge 157:e7ca05fa8600 929
AnnaBridge 157:e7ca05fa8600 930
AnnaBridge 157:e7ca05fa8600 931 /**
Anna Bridge 169:a7c7b631e539 932 \brief Reverse byte order (16 bit)
Anna Bridge 169:a7c7b631e539 933 \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
AnnaBridge 157:e7ca05fa8600 934 \param [in] value Value to reverse
AnnaBridge 157:e7ca05fa8600 935 \return Reversed value
AnnaBridge 157:e7ca05fa8600 936 */
Anna Bridge 169:a7c7b631e539 937 __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
AnnaBridge 157:e7ca05fa8600 938 {
AnnaBridge 157:e7ca05fa8600 939 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Anna Bridge 160:5571c4ff569f 940 return (int16_t)__builtin_bswap16(value);
AnnaBridge 157:e7ca05fa8600 941 #else
Anna Bridge 160:5571c4ff569f 942 int16_t result;
AnnaBridge 157:e7ca05fa8600 943
AnnaBridge 157:e7ca05fa8600 944 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Anna Bridge 160:5571c4ff569f 945 return result;
AnnaBridge 157:e7ca05fa8600 946 #endif
AnnaBridge 157:e7ca05fa8600 947 }
AnnaBridge 157:e7ca05fa8600 948
AnnaBridge 157:e7ca05fa8600 949
AnnaBridge 157:e7ca05fa8600 950 /**
AnnaBridge 157:e7ca05fa8600 951 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 157:e7ca05fa8600 952 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 157:e7ca05fa8600 953 \param [in] op1 Value to rotate
AnnaBridge 157:e7ca05fa8600 954 \param [in] op2 Number of Bits to rotate
AnnaBridge 157:e7ca05fa8600 955 \return Rotated value
AnnaBridge 157:e7ca05fa8600 956 */
Anna Bridge 169:a7c7b631e539 957 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 958 {
Anna Bridge 169:a7c7b631e539 959 op2 %= 32U;
Anna Bridge 169:a7c7b631e539 960 if (op2 == 0U)
Anna Bridge 169:a7c7b631e539 961 {
Anna Bridge 169:a7c7b631e539 962 return op1;
Anna Bridge 169:a7c7b631e539 963 }
AnnaBridge 157:e7ca05fa8600 964 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 157:e7ca05fa8600 965 }
AnnaBridge 157:e7ca05fa8600 966
AnnaBridge 157:e7ca05fa8600 967
AnnaBridge 157:e7ca05fa8600 968 /**
AnnaBridge 157:e7ca05fa8600 969 \brief Breakpoint
AnnaBridge 157:e7ca05fa8600 970 \details Causes the processor to enter Debug state.
AnnaBridge 157:e7ca05fa8600 971 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge 157:e7ca05fa8600 972 \param [in] value is ignored by the processor.
AnnaBridge 157:e7ca05fa8600 973 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 157:e7ca05fa8600 974 */
AnnaBridge 157:e7ca05fa8600 975 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 157:e7ca05fa8600 976
AnnaBridge 157:e7ca05fa8600 977
AnnaBridge 157:e7ca05fa8600 978 /**
AnnaBridge 157:e7ca05fa8600 979 \brief Reverse bit order of value
AnnaBridge 157:e7ca05fa8600 980 \details Reverses the bit order of the given value.
AnnaBridge 157:e7ca05fa8600 981 \param [in] value Value to reverse
AnnaBridge 157:e7ca05fa8600 982 \return Reversed value
AnnaBridge 157:e7ca05fa8600 983 */
Anna Bridge 169:a7c7b631e539 984 __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
AnnaBridge 157:e7ca05fa8600 985 {
AnnaBridge 157:e7ca05fa8600 986 uint32_t result;
AnnaBridge 157:e7ca05fa8600 987
AnnaBridge 157:e7ca05fa8600 988 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 989 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 990 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 157:e7ca05fa8600 991 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
AnnaBridge 157:e7ca05fa8600 992 #else
Anna Bridge 160:5571c4ff569f 993 uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
AnnaBridge 157:e7ca05fa8600 994
AnnaBridge 157:e7ca05fa8600 995 result = value; /* r will be reversed bits of v; first get LSB of v */
Anna Bridge 160:5571c4ff569f 996 for (value >>= 1U; value != 0U; value >>= 1U)
AnnaBridge 157:e7ca05fa8600 997 {
AnnaBridge 157:e7ca05fa8600 998 result <<= 1U;
AnnaBridge 157:e7ca05fa8600 999 result |= value & 1U;
AnnaBridge 157:e7ca05fa8600 1000 s--;
AnnaBridge 157:e7ca05fa8600 1001 }
AnnaBridge 157:e7ca05fa8600 1002 result <<= s; /* shift when v's highest bits are zero */
AnnaBridge 157:e7ca05fa8600 1003 #endif
Anna Bridge 160:5571c4ff569f 1004 return result;
AnnaBridge 157:e7ca05fa8600 1005 }
AnnaBridge 157:e7ca05fa8600 1006
AnnaBridge 157:e7ca05fa8600 1007
AnnaBridge 157:e7ca05fa8600 1008 /**
AnnaBridge 157:e7ca05fa8600 1009 \brief Count leading zeros
AnnaBridge 157:e7ca05fa8600 1010 \details Counts the number of leading zeros of a data value.
AnnaBridge 157:e7ca05fa8600 1011 \param [in] value Value to count the leading zeros
AnnaBridge 157:e7ca05fa8600 1012 \return number of leading zeros in value
AnnaBridge 157:e7ca05fa8600 1013 */
Anna Bridge 169:a7c7b631e539 1014 #define __CLZ (uint8_t)__builtin_clz
AnnaBridge 157:e7ca05fa8600 1015
AnnaBridge 157:e7ca05fa8600 1016
AnnaBridge 157:e7ca05fa8600 1017 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1018 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1019 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1020 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 157:e7ca05fa8600 1021 /**
AnnaBridge 157:e7ca05fa8600 1022 \brief LDR Exclusive (8 bit)
AnnaBridge 157:e7ca05fa8600 1023 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 157:e7ca05fa8600 1024 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1025 \return value of type uint8_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1026 */
Anna Bridge 169:a7c7b631e539 1027 __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
AnnaBridge 157:e7ca05fa8600 1028 {
AnnaBridge 157:e7ca05fa8600 1029 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1030
AnnaBridge 157:e7ca05fa8600 1031 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 157:e7ca05fa8600 1032 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 157:e7ca05fa8600 1033 #else
AnnaBridge 157:e7ca05fa8600 1034 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 157:e7ca05fa8600 1035 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 157:e7ca05fa8600 1036 */
AnnaBridge 157:e7ca05fa8600 1037 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge 157:e7ca05fa8600 1038 #endif
AnnaBridge 157:e7ca05fa8600 1039 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 157:e7ca05fa8600 1040 }
AnnaBridge 157:e7ca05fa8600 1041
AnnaBridge 157:e7ca05fa8600 1042
AnnaBridge 157:e7ca05fa8600 1043 /**
AnnaBridge 157:e7ca05fa8600 1044 \brief LDR Exclusive (16 bit)
AnnaBridge 157:e7ca05fa8600 1045 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 157:e7ca05fa8600 1046 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1047 \return value of type uint16_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1048 */
Anna Bridge 169:a7c7b631e539 1049 __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
AnnaBridge 157:e7ca05fa8600 1050 {
AnnaBridge 157:e7ca05fa8600 1051 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1052
AnnaBridge 157:e7ca05fa8600 1053 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 157:e7ca05fa8600 1054 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 157:e7ca05fa8600 1055 #else
AnnaBridge 157:e7ca05fa8600 1056 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 157:e7ca05fa8600 1057 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 157:e7ca05fa8600 1058 */
AnnaBridge 157:e7ca05fa8600 1059 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge 157:e7ca05fa8600 1060 #endif
AnnaBridge 157:e7ca05fa8600 1061 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 157:e7ca05fa8600 1062 }
AnnaBridge 157:e7ca05fa8600 1063
AnnaBridge 157:e7ca05fa8600 1064
AnnaBridge 157:e7ca05fa8600 1065 /**
AnnaBridge 157:e7ca05fa8600 1066 \brief LDR Exclusive (32 bit)
AnnaBridge 157:e7ca05fa8600 1067 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 157:e7ca05fa8600 1068 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1069 \return value of type uint32_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1070 */
Anna Bridge 169:a7c7b631e539 1071 __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
AnnaBridge 157:e7ca05fa8600 1072 {
AnnaBridge 157:e7ca05fa8600 1073 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1074
AnnaBridge 157:e7ca05fa8600 1075 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 157:e7ca05fa8600 1076 return(result);
AnnaBridge 157:e7ca05fa8600 1077 }
AnnaBridge 157:e7ca05fa8600 1078
AnnaBridge 157:e7ca05fa8600 1079
AnnaBridge 157:e7ca05fa8600 1080 /**
AnnaBridge 157:e7ca05fa8600 1081 \brief STR Exclusive (8 bit)
AnnaBridge 157:e7ca05fa8600 1082 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 157:e7ca05fa8600 1083 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1084 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1085 \return 0 Function succeeded
AnnaBridge 157:e7ca05fa8600 1086 \return 1 Function failed
AnnaBridge 157:e7ca05fa8600 1087 */
Anna Bridge 169:a7c7b631e539 1088 __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
AnnaBridge 157:e7ca05fa8600 1089 {
AnnaBridge 157:e7ca05fa8600 1090 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1091
AnnaBridge 157:e7ca05fa8600 1092 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge 157:e7ca05fa8600 1093 return(result);
AnnaBridge 157:e7ca05fa8600 1094 }
AnnaBridge 157:e7ca05fa8600 1095
AnnaBridge 157:e7ca05fa8600 1096
AnnaBridge 157:e7ca05fa8600 1097 /**
AnnaBridge 157:e7ca05fa8600 1098 \brief STR Exclusive (16 bit)
AnnaBridge 157:e7ca05fa8600 1099 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 157:e7ca05fa8600 1100 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1101 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1102 \return 0 Function succeeded
AnnaBridge 157:e7ca05fa8600 1103 \return 1 Function failed
AnnaBridge 157:e7ca05fa8600 1104 */
Anna Bridge 169:a7c7b631e539 1105 __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
AnnaBridge 157:e7ca05fa8600 1106 {
AnnaBridge 157:e7ca05fa8600 1107 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1108
AnnaBridge 157:e7ca05fa8600 1109 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge 157:e7ca05fa8600 1110 return(result);
AnnaBridge 157:e7ca05fa8600 1111 }
AnnaBridge 157:e7ca05fa8600 1112
AnnaBridge 157:e7ca05fa8600 1113
AnnaBridge 157:e7ca05fa8600 1114 /**
AnnaBridge 157:e7ca05fa8600 1115 \brief STR Exclusive (32 bit)
AnnaBridge 157:e7ca05fa8600 1116 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 157:e7ca05fa8600 1117 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1118 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1119 \return 0 Function succeeded
AnnaBridge 157:e7ca05fa8600 1120 \return 1 Function failed
AnnaBridge 157:e7ca05fa8600 1121 */
Anna Bridge 169:a7c7b631e539 1122 __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
AnnaBridge 157:e7ca05fa8600 1123 {
AnnaBridge 157:e7ca05fa8600 1124 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1125
AnnaBridge 157:e7ca05fa8600 1126 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
AnnaBridge 157:e7ca05fa8600 1127 return(result);
AnnaBridge 157:e7ca05fa8600 1128 }
AnnaBridge 157:e7ca05fa8600 1129
AnnaBridge 157:e7ca05fa8600 1130
AnnaBridge 157:e7ca05fa8600 1131 /**
AnnaBridge 157:e7ca05fa8600 1132 \brief Remove the exclusive lock
AnnaBridge 157:e7ca05fa8600 1133 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 157:e7ca05fa8600 1134 */
Anna Bridge 169:a7c7b631e539 1135 __STATIC_FORCEINLINE void __CLREX(void)
AnnaBridge 157:e7ca05fa8600 1136 {
AnnaBridge 157:e7ca05fa8600 1137 __ASM volatile ("clrex" ::: "memory");
AnnaBridge 157:e7ca05fa8600 1138 }
AnnaBridge 157:e7ca05fa8600 1139
AnnaBridge 157:e7ca05fa8600 1140 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1141 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1142 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1143 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 157:e7ca05fa8600 1144
AnnaBridge 157:e7ca05fa8600 1145
AnnaBridge 157:e7ca05fa8600 1146 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1147 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1148 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 157:e7ca05fa8600 1149 /**
AnnaBridge 157:e7ca05fa8600 1150 \brief Signed Saturate
AnnaBridge 157:e7ca05fa8600 1151 \details Saturates a signed value.
Anna Bridge 160:5571c4ff569f 1152 \param [in] ARG1 Value to be saturated
Anna Bridge 160:5571c4ff569f 1153 \param [in] ARG2 Bit position to saturate to (1..32)
AnnaBridge 157:e7ca05fa8600 1154 \return Saturated value
AnnaBridge 157:e7ca05fa8600 1155 */
AnnaBridge 157:e7ca05fa8600 1156 #define __SSAT(ARG1,ARG2) \
Anna Bridge 160:5571c4ff569f 1157 __extension__ \
AnnaBridge 157:e7ca05fa8600 1158 ({ \
AnnaBridge 157:e7ca05fa8600 1159 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 157:e7ca05fa8600 1160 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 157:e7ca05fa8600 1161 __RES; \
AnnaBridge 157:e7ca05fa8600 1162 })
AnnaBridge 157:e7ca05fa8600 1163
AnnaBridge 157:e7ca05fa8600 1164
AnnaBridge 157:e7ca05fa8600 1165 /**
AnnaBridge 157:e7ca05fa8600 1166 \brief Unsigned Saturate
AnnaBridge 157:e7ca05fa8600 1167 \details Saturates an unsigned value.
Anna Bridge 160:5571c4ff569f 1168 \param [in] ARG1 Value to be saturated
Anna Bridge 160:5571c4ff569f 1169 \param [in] ARG2 Bit position to saturate to (0..31)
AnnaBridge 157:e7ca05fa8600 1170 \return Saturated value
AnnaBridge 157:e7ca05fa8600 1171 */
AnnaBridge 157:e7ca05fa8600 1172 #define __USAT(ARG1,ARG2) \
Anna Bridge 160:5571c4ff569f 1173 __extension__ \
AnnaBridge 157:e7ca05fa8600 1174 ({ \
AnnaBridge 157:e7ca05fa8600 1175 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 157:e7ca05fa8600 1176 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 157:e7ca05fa8600 1177 __RES; \
AnnaBridge 157:e7ca05fa8600 1178 })
AnnaBridge 157:e7ca05fa8600 1179
AnnaBridge 157:e7ca05fa8600 1180
AnnaBridge 157:e7ca05fa8600 1181 /**
AnnaBridge 157:e7ca05fa8600 1182 \brief Rotate Right with Extend (32 bit)
AnnaBridge 157:e7ca05fa8600 1183 \details Moves each bit of a bitstring right by one bit.
AnnaBridge 157:e7ca05fa8600 1184 The carry input is shifted in at the left end of the bitstring.
AnnaBridge 157:e7ca05fa8600 1185 \param [in] value Value to rotate
AnnaBridge 157:e7ca05fa8600 1186 \return Rotated value
AnnaBridge 157:e7ca05fa8600 1187 */
Anna Bridge 169:a7c7b631e539 1188 __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
AnnaBridge 157:e7ca05fa8600 1189 {
AnnaBridge 157:e7ca05fa8600 1190 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1191
AnnaBridge 157:e7ca05fa8600 1192 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 157:e7ca05fa8600 1193 return(result);
AnnaBridge 157:e7ca05fa8600 1194 }
AnnaBridge 157:e7ca05fa8600 1195
AnnaBridge 157:e7ca05fa8600 1196
AnnaBridge 157:e7ca05fa8600 1197 /**
AnnaBridge 157:e7ca05fa8600 1198 \brief LDRT Unprivileged (8 bit)
AnnaBridge 157:e7ca05fa8600 1199 \details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge 157:e7ca05fa8600 1200 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1201 \return value of type uint8_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1202 */
Anna Bridge 169:a7c7b631e539 1203 __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge 157:e7ca05fa8600 1204 {
AnnaBridge 157:e7ca05fa8600 1205 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1206
AnnaBridge 157:e7ca05fa8600 1207 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 157:e7ca05fa8600 1208 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 157:e7ca05fa8600 1209 #else
AnnaBridge 157:e7ca05fa8600 1210 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 157:e7ca05fa8600 1211 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 157:e7ca05fa8600 1212 */
AnnaBridge 157:e7ca05fa8600 1213 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge 157:e7ca05fa8600 1214 #endif
AnnaBridge 157:e7ca05fa8600 1215 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 157:e7ca05fa8600 1216 }
AnnaBridge 157:e7ca05fa8600 1217
AnnaBridge 157:e7ca05fa8600 1218
AnnaBridge 157:e7ca05fa8600 1219 /**
AnnaBridge 157:e7ca05fa8600 1220 \brief LDRT Unprivileged (16 bit)
AnnaBridge 157:e7ca05fa8600 1221 \details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge 157:e7ca05fa8600 1222 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1223 \return value of type uint16_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1224 */
Anna Bridge 169:a7c7b631e539 1225 __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge 157:e7ca05fa8600 1226 {
AnnaBridge 157:e7ca05fa8600 1227 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1228
AnnaBridge 157:e7ca05fa8600 1229 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 157:e7ca05fa8600 1230 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 157:e7ca05fa8600 1231 #else
AnnaBridge 157:e7ca05fa8600 1232 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 157:e7ca05fa8600 1233 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 157:e7ca05fa8600 1234 */
AnnaBridge 157:e7ca05fa8600 1235 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge 157:e7ca05fa8600 1236 #endif
AnnaBridge 157:e7ca05fa8600 1237 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 157:e7ca05fa8600 1238 }
AnnaBridge 157:e7ca05fa8600 1239
AnnaBridge 157:e7ca05fa8600 1240
AnnaBridge 157:e7ca05fa8600 1241 /**
AnnaBridge 157:e7ca05fa8600 1242 \brief LDRT Unprivileged (32 bit)
AnnaBridge 157:e7ca05fa8600 1243 \details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge 157:e7ca05fa8600 1244 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1245 \return value of type uint32_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1246 */
Anna Bridge 169:a7c7b631e539 1247 __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge 157:e7ca05fa8600 1248 {
AnnaBridge 157:e7ca05fa8600 1249 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1250
AnnaBridge 157:e7ca05fa8600 1251 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 157:e7ca05fa8600 1252 return(result);
AnnaBridge 157:e7ca05fa8600 1253 }
AnnaBridge 157:e7ca05fa8600 1254
AnnaBridge 157:e7ca05fa8600 1255
AnnaBridge 157:e7ca05fa8600 1256 /**
AnnaBridge 157:e7ca05fa8600 1257 \brief STRT Unprivileged (8 bit)
AnnaBridge 157:e7ca05fa8600 1258 \details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge 157:e7ca05fa8600 1259 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1260 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1261 */
Anna Bridge 169:a7c7b631e539 1262 __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 157:e7ca05fa8600 1263 {
AnnaBridge 157:e7ca05fa8600 1264 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 157:e7ca05fa8600 1265 }
AnnaBridge 157:e7ca05fa8600 1266
AnnaBridge 157:e7ca05fa8600 1267
AnnaBridge 157:e7ca05fa8600 1268 /**
AnnaBridge 157:e7ca05fa8600 1269 \brief STRT Unprivileged (16 bit)
AnnaBridge 157:e7ca05fa8600 1270 \details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge 157:e7ca05fa8600 1271 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1272 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1273 */
Anna Bridge 169:a7c7b631e539 1274 __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 157:e7ca05fa8600 1275 {
AnnaBridge 157:e7ca05fa8600 1276 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 157:e7ca05fa8600 1277 }
AnnaBridge 157:e7ca05fa8600 1278
AnnaBridge 157:e7ca05fa8600 1279
AnnaBridge 157:e7ca05fa8600 1280 /**
AnnaBridge 157:e7ca05fa8600 1281 \brief STRT Unprivileged (32 bit)
AnnaBridge 157:e7ca05fa8600 1282 \details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge 157:e7ca05fa8600 1283 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1284 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1285 */
Anna Bridge 169:a7c7b631e539 1286 __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 157:e7ca05fa8600 1287 {
AnnaBridge 157:e7ca05fa8600 1288 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge 157:e7ca05fa8600 1289 }
AnnaBridge 157:e7ca05fa8600 1290
Anna Bridge 160:5571c4ff569f 1291 #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Anna Bridge 160:5571c4ff569f 1292 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Anna Bridge 160:5571c4ff569f 1293 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Anna Bridge 160:5571c4ff569f 1294
Anna Bridge 160:5571c4ff569f 1295 /**
Anna Bridge 160:5571c4ff569f 1296 \brief Signed Saturate
Anna Bridge 160:5571c4ff569f 1297 \details Saturates a signed value.
Anna Bridge 160:5571c4ff569f 1298 \param [in] value Value to be saturated
Anna Bridge 160:5571c4ff569f 1299 \param [in] sat Bit position to saturate to (1..32)
Anna Bridge 160:5571c4ff569f 1300 \return Saturated value
Anna Bridge 160:5571c4ff569f 1301 */
Anna Bridge 169:a7c7b631e539 1302 __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
Anna Bridge 160:5571c4ff569f 1303 {
Anna Bridge 169:a7c7b631e539 1304 if ((sat >= 1U) && (sat <= 32U))
Anna Bridge 169:a7c7b631e539 1305 {
Anna Bridge 160:5571c4ff569f 1306 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
Anna Bridge 160:5571c4ff569f 1307 const int32_t min = -1 - max ;
Anna Bridge 169:a7c7b631e539 1308 if (val > max)
Anna Bridge 169:a7c7b631e539 1309 {
Anna Bridge 160:5571c4ff569f 1310 return max;
Anna Bridge 169:a7c7b631e539 1311 }
Anna Bridge 169:a7c7b631e539 1312 else if (val < min)
Anna Bridge 169:a7c7b631e539 1313 {
Anna Bridge 160:5571c4ff569f 1314 return min;
Anna Bridge 160:5571c4ff569f 1315 }
Anna Bridge 160:5571c4ff569f 1316 }
Anna Bridge 160:5571c4ff569f 1317 return val;
Anna Bridge 160:5571c4ff569f 1318 }
Anna Bridge 160:5571c4ff569f 1319
Anna Bridge 160:5571c4ff569f 1320 /**
Anna Bridge 160:5571c4ff569f 1321 \brief Unsigned Saturate
Anna Bridge 160:5571c4ff569f 1322 \details Saturates an unsigned value.
Anna Bridge 160:5571c4ff569f 1323 \param [in] value Value to be saturated
Anna Bridge 160:5571c4ff569f 1324 \param [in] sat Bit position to saturate to (0..31)
Anna Bridge 160:5571c4ff569f 1325 \return Saturated value
Anna Bridge 160:5571c4ff569f 1326 */
Anna Bridge 169:a7c7b631e539 1327 __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
Anna Bridge 160:5571c4ff569f 1328 {
Anna Bridge 169:a7c7b631e539 1329 if (sat <= 31U)
Anna Bridge 169:a7c7b631e539 1330 {
Anna Bridge 160:5571c4ff569f 1331 const uint32_t max = ((1U << sat) - 1U);
Anna Bridge 169:a7c7b631e539 1332 if (val > (int32_t)max)
Anna Bridge 169:a7c7b631e539 1333 {
Anna Bridge 160:5571c4ff569f 1334 return max;
Anna Bridge 169:a7c7b631e539 1335 }
Anna Bridge 169:a7c7b631e539 1336 else if (val < 0)
Anna Bridge 169:a7c7b631e539 1337 {
Anna Bridge 160:5571c4ff569f 1338 return 0U;
Anna Bridge 160:5571c4ff569f 1339 }
Anna Bridge 160:5571c4ff569f 1340 }
Anna Bridge 160:5571c4ff569f 1341 return (uint32_t)val;
Anna Bridge 160:5571c4ff569f 1342 }
Anna Bridge 160:5571c4ff569f 1343
AnnaBridge 157:e7ca05fa8600 1344 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1345 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1346 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 157:e7ca05fa8600 1347
AnnaBridge 157:e7ca05fa8600 1348
AnnaBridge 157:e7ca05fa8600 1349 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1350 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 157:e7ca05fa8600 1351 /**
AnnaBridge 157:e7ca05fa8600 1352 \brief Load-Acquire (8 bit)
AnnaBridge 157:e7ca05fa8600 1353 \details Executes a LDAB instruction for 8 bit value.
AnnaBridge 157:e7ca05fa8600 1354 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1355 \return value of type uint8_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1356 */
Anna Bridge 169:a7c7b631e539 1357 __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 157:e7ca05fa8600 1358 {
AnnaBridge 157:e7ca05fa8600 1359 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1360
AnnaBridge 157:e7ca05fa8600 1361 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 157:e7ca05fa8600 1362 return ((uint8_t) result);
AnnaBridge 157:e7ca05fa8600 1363 }
AnnaBridge 157:e7ca05fa8600 1364
AnnaBridge 157:e7ca05fa8600 1365
AnnaBridge 157:e7ca05fa8600 1366 /**
AnnaBridge 157:e7ca05fa8600 1367 \brief Load-Acquire (16 bit)
AnnaBridge 157:e7ca05fa8600 1368 \details Executes a LDAH instruction for 16 bit values.
AnnaBridge 157:e7ca05fa8600 1369 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1370 \return value of type uint16_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1371 */
Anna Bridge 169:a7c7b631e539 1372 __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 157:e7ca05fa8600 1373 {
AnnaBridge 157:e7ca05fa8600 1374 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1375
AnnaBridge 157:e7ca05fa8600 1376 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 157:e7ca05fa8600 1377 return ((uint16_t) result);
AnnaBridge 157:e7ca05fa8600 1378 }
AnnaBridge 157:e7ca05fa8600 1379
AnnaBridge 157:e7ca05fa8600 1380
AnnaBridge 157:e7ca05fa8600 1381 /**
AnnaBridge 157:e7ca05fa8600 1382 \brief Load-Acquire (32 bit)
AnnaBridge 157:e7ca05fa8600 1383 \details Executes a LDA instruction for 32 bit values.
AnnaBridge 157:e7ca05fa8600 1384 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1385 \return value of type uint32_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1386 */
Anna Bridge 169:a7c7b631e539 1387 __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 157:e7ca05fa8600 1388 {
AnnaBridge 157:e7ca05fa8600 1389 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1390
AnnaBridge 157:e7ca05fa8600 1391 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 157:e7ca05fa8600 1392 return(result);
AnnaBridge 157:e7ca05fa8600 1393 }
AnnaBridge 157:e7ca05fa8600 1394
AnnaBridge 157:e7ca05fa8600 1395
AnnaBridge 157:e7ca05fa8600 1396 /**
AnnaBridge 157:e7ca05fa8600 1397 \brief Store-Release (8 bit)
AnnaBridge 157:e7ca05fa8600 1398 \details Executes a STLB instruction for 8 bit values.
AnnaBridge 157:e7ca05fa8600 1399 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1400 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1401 */
Anna Bridge 169:a7c7b631e539 1402 __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 157:e7ca05fa8600 1403 {
AnnaBridge 157:e7ca05fa8600 1404 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 157:e7ca05fa8600 1405 }
AnnaBridge 157:e7ca05fa8600 1406
AnnaBridge 157:e7ca05fa8600 1407
AnnaBridge 157:e7ca05fa8600 1408 /**
AnnaBridge 157:e7ca05fa8600 1409 \brief Store-Release (16 bit)
AnnaBridge 157:e7ca05fa8600 1410 \details Executes a STLH instruction for 16 bit values.
AnnaBridge 157:e7ca05fa8600 1411 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1412 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1413 */
Anna Bridge 169:a7c7b631e539 1414 __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 157:e7ca05fa8600 1415 {
AnnaBridge 157:e7ca05fa8600 1416 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 157:e7ca05fa8600 1417 }
AnnaBridge 157:e7ca05fa8600 1418
AnnaBridge 157:e7ca05fa8600 1419
AnnaBridge 157:e7ca05fa8600 1420 /**
AnnaBridge 157:e7ca05fa8600 1421 \brief Store-Release (32 bit)
AnnaBridge 157:e7ca05fa8600 1422 \details Executes a STL instruction for 32 bit values.
AnnaBridge 157:e7ca05fa8600 1423 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1424 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1425 */
Anna Bridge 169:a7c7b631e539 1426 __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 157:e7ca05fa8600 1427 {
AnnaBridge 157:e7ca05fa8600 1428 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 157:e7ca05fa8600 1429 }
AnnaBridge 157:e7ca05fa8600 1430
AnnaBridge 157:e7ca05fa8600 1431
AnnaBridge 157:e7ca05fa8600 1432 /**
AnnaBridge 157:e7ca05fa8600 1433 \brief Load-Acquire Exclusive (8 bit)
AnnaBridge 157:e7ca05fa8600 1434 \details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge 157:e7ca05fa8600 1435 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1436 \return value of type uint8_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1437 */
Anna Bridge 169:a7c7b631e539 1438 __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
AnnaBridge 157:e7ca05fa8600 1439 {
AnnaBridge 157:e7ca05fa8600 1440 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1441
AnnaBridge 157:e7ca05fa8600 1442 __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 157:e7ca05fa8600 1443 return ((uint8_t) result);
AnnaBridge 157:e7ca05fa8600 1444 }
AnnaBridge 157:e7ca05fa8600 1445
AnnaBridge 157:e7ca05fa8600 1446
AnnaBridge 157:e7ca05fa8600 1447 /**
AnnaBridge 157:e7ca05fa8600 1448 \brief Load-Acquire Exclusive (16 bit)
AnnaBridge 157:e7ca05fa8600 1449 \details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge 157:e7ca05fa8600 1450 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1451 \return value of type uint16_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1452 */
Anna Bridge 169:a7c7b631e539 1453 __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
AnnaBridge 157:e7ca05fa8600 1454 {
AnnaBridge 157:e7ca05fa8600 1455 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1456
AnnaBridge 157:e7ca05fa8600 1457 __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 157:e7ca05fa8600 1458 return ((uint16_t) result);
AnnaBridge 157:e7ca05fa8600 1459 }
AnnaBridge 157:e7ca05fa8600 1460
AnnaBridge 157:e7ca05fa8600 1461
AnnaBridge 157:e7ca05fa8600 1462 /**
AnnaBridge 157:e7ca05fa8600 1463 \brief Load-Acquire Exclusive (32 bit)
AnnaBridge 157:e7ca05fa8600 1464 \details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge 157:e7ca05fa8600 1465 \param [in] ptr Pointer to data
AnnaBridge 157:e7ca05fa8600 1466 \return value of type uint32_t at (*ptr)
AnnaBridge 157:e7ca05fa8600 1467 */
Anna Bridge 169:a7c7b631e539 1468 __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
AnnaBridge 157:e7ca05fa8600 1469 {
AnnaBridge 157:e7ca05fa8600 1470 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1471
AnnaBridge 157:e7ca05fa8600 1472 __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 157:e7ca05fa8600 1473 return(result);
AnnaBridge 157:e7ca05fa8600 1474 }
AnnaBridge 157:e7ca05fa8600 1475
AnnaBridge 157:e7ca05fa8600 1476
AnnaBridge 157:e7ca05fa8600 1477 /**
AnnaBridge 157:e7ca05fa8600 1478 \brief Store-Release Exclusive (8 bit)
AnnaBridge 157:e7ca05fa8600 1479 \details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge 157:e7ca05fa8600 1480 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1481 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1482 \return 0 Function succeeded
AnnaBridge 157:e7ca05fa8600 1483 \return 1 Function failed
AnnaBridge 157:e7ca05fa8600 1484 */
Anna Bridge 169:a7c7b631e539 1485 __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 157:e7ca05fa8600 1486 {
AnnaBridge 157:e7ca05fa8600 1487 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1488
AnnaBridge 157:e7ca05fa8600 1489 __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 157:e7ca05fa8600 1490 return(result);
AnnaBridge 157:e7ca05fa8600 1491 }
AnnaBridge 157:e7ca05fa8600 1492
AnnaBridge 157:e7ca05fa8600 1493
AnnaBridge 157:e7ca05fa8600 1494 /**
AnnaBridge 157:e7ca05fa8600 1495 \brief Store-Release Exclusive (16 bit)
AnnaBridge 157:e7ca05fa8600 1496 \details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge 157:e7ca05fa8600 1497 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1498 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1499 \return 0 Function succeeded
AnnaBridge 157:e7ca05fa8600 1500 \return 1 Function failed
AnnaBridge 157:e7ca05fa8600 1501 */
Anna Bridge 169:a7c7b631e539 1502 __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 157:e7ca05fa8600 1503 {
AnnaBridge 157:e7ca05fa8600 1504 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1505
AnnaBridge 157:e7ca05fa8600 1506 __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 157:e7ca05fa8600 1507 return(result);
AnnaBridge 157:e7ca05fa8600 1508 }
AnnaBridge 157:e7ca05fa8600 1509
AnnaBridge 157:e7ca05fa8600 1510
AnnaBridge 157:e7ca05fa8600 1511 /**
AnnaBridge 157:e7ca05fa8600 1512 \brief Store-Release Exclusive (32 bit)
AnnaBridge 157:e7ca05fa8600 1513 \details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge 157:e7ca05fa8600 1514 \param [in] value Value to store
AnnaBridge 157:e7ca05fa8600 1515 \param [in] ptr Pointer to location
AnnaBridge 157:e7ca05fa8600 1516 \return 0 Function succeeded
AnnaBridge 157:e7ca05fa8600 1517 \return 1 Function failed
AnnaBridge 157:e7ca05fa8600 1518 */
Anna Bridge 169:a7c7b631e539 1519 __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 157:e7ca05fa8600 1520 {
AnnaBridge 157:e7ca05fa8600 1521 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1522
AnnaBridge 157:e7ca05fa8600 1523 __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 157:e7ca05fa8600 1524 return(result);
AnnaBridge 157:e7ca05fa8600 1525 }
AnnaBridge 157:e7ca05fa8600 1526
AnnaBridge 157:e7ca05fa8600 1527 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 157:e7ca05fa8600 1528 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 157:e7ca05fa8600 1529
AnnaBridge 157:e7ca05fa8600 1530 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge 157:e7ca05fa8600 1531
AnnaBridge 157:e7ca05fa8600 1532
AnnaBridge 157:e7ca05fa8600 1533 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 157:e7ca05fa8600 1534 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 157:e7ca05fa8600 1535 Access to dedicated SIMD instructions
AnnaBridge 157:e7ca05fa8600 1536 @{
AnnaBridge 157:e7ca05fa8600 1537 */
AnnaBridge 157:e7ca05fa8600 1538
Anna Bridge 169:a7c7b631e539 1539 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
AnnaBridge 157:e7ca05fa8600 1540
Anna Bridge 169:a7c7b631e539 1541 __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1542 {
AnnaBridge 157:e7ca05fa8600 1543 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1544
AnnaBridge 157:e7ca05fa8600 1545 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1546 return(result);
AnnaBridge 157:e7ca05fa8600 1547 }
AnnaBridge 157:e7ca05fa8600 1548
Anna Bridge 169:a7c7b631e539 1549 __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1550 {
AnnaBridge 157:e7ca05fa8600 1551 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1552
AnnaBridge 157:e7ca05fa8600 1553 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1554 return(result);
AnnaBridge 157:e7ca05fa8600 1555 }
AnnaBridge 157:e7ca05fa8600 1556
Anna Bridge 169:a7c7b631e539 1557 __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1558 {
AnnaBridge 157:e7ca05fa8600 1559 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1560
AnnaBridge 157:e7ca05fa8600 1561 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1562 return(result);
AnnaBridge 157:e7ca05fa8600 1563 }
AnnaBridge 157:e7ca05fa8600 1564
Anna Bridge 169:a7c7b631e539 1565 __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1566 {
AnnaBridge 157:e7ca05fa8600 1567 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1568
AnnaBridge 157:e7ca05fa8600 1569 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1570 return(result);
AnnaBridge 157:e7ca05fa8600 1571 }
AnnaBridge 157:e7ca05fa8600 1572
Anna Bridge 169:a7c7b631e539 1573 __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1574 {
AnnaBridge 157:e7ca05fa8600 1575 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1576
AnnaBridge 157:e7ca05fa8600 1577 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1578 return(result);
AnnaBridge 157:e7ca05fa8600 1579 }
AnnaBridge 157:e7ca05fa8600 1580
Anna Bridge 169:a7c7b631e539 1581 __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1582 {
AnnaBridge 157:e7ca05fa8600 1583 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1584
AnnaBridge 157:e7ca05fa8600 1585 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1586 return(result);
AnnaBridge 157:e7ca05fa8600 1587 }
AnnaBridge 157:e7ca05fa8600 1588
AnnaBridge 157:e7ca05fa8600 1589
Anna Bridge 169:a7c7b631e539 1590 __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1591 {
AnnaBridge 157:e7ca05fa8600 1592 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1593
AnnaBridge 157:e7ca05fa8600 1594 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1595 return(result);
AnnaBridge 157:e7ca05fa8600 1596 }
AnnaBridge 157:e7ca05fa8600 1597
Anna Bridge 169:a7c7b631e539 1598 __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1599 {
AnnaBridge 157:e7ca05fa8600 1600 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1601
AnnaBridge 157:e7ca05fa8600 1602 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1603 return(result);
AnnaBridge 157:e7ca05fa8600 1604 }
AnnaBridge 157:e7ca05fa8600 1605
Anna Bridge 169:a7c7b631e539 1606 __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1607 {
AnnaBridge 157:e7ca05fa8600 1608 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1609
AnnaBridge 157:e7ca05fa8600 1610 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1611 return(result);
AnnaBridge 157:e7ca05fa8600 1612 }
AnnaBridge 157:e7ca05fa8600 1613
Anna Bridge 169:a7c7b631e539 1614 __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1615 {
AnnaBridge 157:e7ca05fa8600 1616 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1617
AnnaBridge 157:e7ca05fa8600 1618 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1619 return(result);
AnnaBridge 157:e7ca05fa8600 1620 }
AnnaBridge 157:e7ca05fa8600 1621
Anna Bridge 169:a7c7b631e539 1622 __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1623 {
AnnaBridge 157:e7ca05fa8600 1624 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1625
AnnaBridge 157:e7ca05fa8600 1626 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1627 return(result);
AnnaBridge 157:e7ca05fa8600 1628 }
AnnaBridge 157:e7ca05fa8600 1629
Anna Bridge 169:a7c7b631e539 1630 __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1631 {
AnnaBridge 157:e7ca05fa8600 1632 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1633
AnnaBridge 157:e7ca05fa8600 1634 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1635 return(result);
AnnaBridge 157:e7ca05fa8600 1636 }
AnnaBridge 157:e7ca05fa8600 1637
AnnaBridge 157:e7ca05fa8600 1638
Anna Bridge 169:a7c7b631e539 1639 __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1640 {
AnnaBridge 157:e7ca05fa8600 1641 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1642
AnnaBridge 157:e7ca05fa8600 1643 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1644 return(result);
AnnaBridge 157:e7ca05fa8600 1645 }
AnnaBridge 157:e7ca05fa8600 1646
Anna Bridge 169:a7c7b631e539 1647 __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1648 {
AnnaBridge 157:e7ca05fa8600 1649 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1650
AnnaBridge 157:e7ca05fa8600 1651 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1652 return(result);
AnnaBridge 157:e7ca05fa8600 1653 }
AnnaBridge 157:e7ca05fa8600 1654
Anna Bridge 169:a7c7b631e539 1655 __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1656 {
AnnaBridge 157:e7ca05fa8600 1657 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1658
AnnaBridge 157:e7ca05fa8600 1659 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1660 return(result);
AnnaBridge 157:e7ca05fa8600 1661 }
AnnaBridge 157:e7ca05fa8600 1662
Anna Bridge 169:a7c7b631e539 1663 __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1664 {
AnnaBridge 157:e7ca05fa8600 1665 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1666
AnnaBridge 157:e7ca05fa8600 1667 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1668 return(result);
AnnaBridge 157:e7ca05fa8600 1669 }
AnnaBridge 157:e7ca05fa8600 1670
Anna Bridge 169:a7c7b631e539 1671 __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1672 {
AnnaBridge 157:e7ca05fa8600 1673 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1674
AnnaBridge 157:e7ca05fa8600 1675 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1676 return(result);
AnnaBridge 157:e7ca05fa8600 1677 }
AnnaBridge 157:e7ca05fa8600 1678
Anna Bridge 169:a7c7b631e539 1679 __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1680 {
AnnaBridge 157:e7ca05fa8600 1681 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1682
AnnaBridge 157:e7ca05fa8600 1683 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1684 return(result);
AnnaBridge 157:e7ca05fa8600 1685 }
AnnaBridge 157:e7ca05fa8600 1686
Anna Bridge 169:a7c7b631e539 1687 __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1688 {
AnnaBridge 157:e7ca05fa8600 1689 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1690
AnnaBridge 157:e7ca05fa8600 1691 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1692 return(result);
AnnaBridge 157:e7ca05fa8600 1693 }
AnnaBridge 157:e7ca05fa8600 1694
Anna Bridge 169:a7c7b631e539 1695 __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1696 {
AnnaBridge 157:e7ca05fa8600 1697 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1698
AnnaBridge 157:e7ca05fa8600 1699 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1700 return(result);
AnnaBridge 157:e7ca05fa8600 1701 }
AnnaBridge 157:e7ca05fa8600 1702
Anna Bridge 169:a7c7b631e539 1703 __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1704 {
AnnaBridge 157:e7ca05fa8600 1705 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1706
AnnaBridge 157:e7ca05fa8600 1707 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1708 return(result);
AnnaBridge 157:e7ca05fa8600 1709 }
AnnaBridge 157:e7ca05fa8600 1710
Anna Bridge 169:a7c7b631e539 1711 __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1712 {
AnnaBridge 157:e7ca05fa8600 1713 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1714
AnnaBridge 157:e7ca05fa8600 1715 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1716 return(result);
AnnaBridge 157:e7ca05fa8600 1717 }
AnnaBridge 157:e7ca05fa8600 1718
Anna Bridge 169:a7c7b631e539 1719 __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1720 {
AnnaBridge 157:e7ca05fa8600 1721 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1722
AnnaBridge 157:e7ca05fa8600 1723 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1724 return(result);
AnnaBridge 157:e7ca05fa8600 1725 }
AnnaBridge 157:e7ca05fa8600 1726
Anna Bridge 169:a7c7b631e539 1727 __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1728 {
AnnaBridge 157:e7ca05fa8600 1729 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1730
AnnaBridge 157:e7ca05fa8600 1731 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1732 return(result);
AnnaBridge 157:e7ca05fa8600 1733 }
AnnaBridge 157:e7ca05fa8600 1734
Anna Bridge 169:a7c7b631e539 1735 __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1736 {
AnnaBridge 157:e7ca05fa8600 1737 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1738
AnnaBridge 157:e7ca05fa8600 1739 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1740 return(result);
AnnaBridge 157:e7ca05fa8600 1741 }
AnnaBridge 157:e7ca05fa8600 1742
Anna Bridge 169:a7c7b631e539 1743 __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1744 {
AnnaBridge 157:e7ca05fa8600 1745 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1746
AnnaBridge 157:e7ca05fa8600 1747 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1748 return(result);
AnnaBridge 157:e7ca05fa8600 1749 }
AnnaBridge 157:e7ca05fa8600 1750
Anna Bridge 169:a7c7b631e539 1751 __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1752 {
AnnaBridge 157:e7ca05fa8600 1753 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1754
AnnaBridge 157:e7ca05fa8600 1755 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1756 return(result);
AnnaBridge 157:e7ca05fa8600 1757 }
AnnaBridge 157:e7ca05fa8600 1758
Anna Bridge 169:a7c7b631e539 1759 __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1760 {
AnnaBridge 157:e7ca05fa8600 1761 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1762
AnnaBridge 157:e7ca05fa8600 1763 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1764 return(result);
AnnaBridge 157:e7ca05fa8600 1765 }
AnnaBridge 157:e7ca05fa8600 1766
Anna Bridge 169:a7c7b631e539 1767 __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1768 {
AnnaBridge 157:e7ca05fa8600 1769 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1770
AnnaBridge 157:e7ca05fa8600 1771 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1772 return(result);
AnnaBridge 157:e7ca05fa8600 1773 }
AnnaBridge 157:e7ca05fa8600 1774
Anna Bridge 169:a7c7b631e539 1775 __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1776 {
AnnaBridge 157:e7ca05fa8600 1777 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1778
AnnaBridge 157:e7ca05fa8600 1779 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1780 return(result);
AnnaBridge 157:e7ca05fa8600 1781 }
AnnaBridge 157:e7ca05fa8600 1782
Anna Bridge 169:a7c7b631e539 1783 __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1784 {
AnnaBridge 157:e7ca05fa8600 1785 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1786
AnnaBridge 157:e7ca05fa8600 1787 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1788 return(result);
AnnaBridge 157:e7ca05fa8600 1789 }
AnnaBridge 157:e7ca05fa8600 1790
Anna Bridge 169:a7c7b631e539 1791 __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1792 {
AnnaBridge 157:e7ca05fa8600 1793 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1794
AnnaBridge 157:e7ca05fa8600 1795 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1796 return(result);
AnnaBridge 157:e7ca05fa8600 1797 }
AnnaBridge 157:e7ca05fa8600 1798
Anna Bridge 169:a7c7b631e539 1799 __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1800 {
AnnaBridge 157:e7ca05fa8600 1801 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1802
AnnaBridge 157:e7ca05fa8600 1803 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1804 return(result);
AnnaBridge 157:e7ca05fa8600 1805 }
AnnaBridge 157:e7ca05fa8600 1806
Anna Bridge 169:a7c7b631e539 1807 __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1808 {
AnnaBridge 157:e7ca05fa8600 1809 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1810
AnnaBridge 157:e7ca05fa8600 1811 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1812 return(result);
AnnaBridge 157:e7ca05fa8600 1813 }
AnnaBridge 157:e7ca05fa8600 1814
Anna Bridge 169:a7c7b631e539 1815 __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1816 {
AnnaBridge 157:e7ca05fa8600 1817 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1818
AnnaBridge 157:e7ca05fa8600 1819 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1820 return(result);
AnnaBridge 157:e7ca05fa8600 1821 }
AnnaBridge 157:e7ca05fa8600 1822
Anna Bridge 169:a7c7b631e539 1823 __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1824 {
AnnaBridge 157:e7ca05fa8600 1825 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1826
AnnaBridge 157:e7ca05fa8600 1827 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1828 return(result);
AnnaBridge 157:e7ca05fa8600 1829 }
AnnaBridge 157:e7ca05fa8600 1830
Anna Bridge 169:a7c7b631e539 1831 __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1832 {
AnnaBridge 157:e7ca05fa8600 1833 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1834
AnnaBridge 157:e7ca05fa8600 1835 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1836 return(result);
AnnaBridge 157:e7ca05fa8600 1837 }
AnnaBridge 157:e7ca05fa8600 1838
Anna Bridge 169:a7c7b631e539 1839 __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 157:e7ca05fa8600 1840 {
AnnaBridge 157:e7ca05fa8600 1841 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1842
AnnaBridge 157:e7ca05fa8600 1843 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 157:e7ca05fa8600 1844 return(result);
AnnaBridge 157:e7ca05fa8600 1845 }
AnnaBridge 157:e7ca05fa8600 1846
AnnaBridge 157:e7ca05fa8600 1847 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 157:e7ca05fa8600 1848 ({ \
AnnaBridge 157:e7ca05fa8600 1849 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 157:e7ca05fa8600 1850 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 157:e7ca05fa8600 1851 __RES; \
AnnaBridge 157:e7ca05fa8600 1852 })
AnnaBridge 157:e7ca05fa8600 1853
AnnaBridge 157:e7ca05fa8600 1854 #define __USAT16(ARG1,ARG2) \
AnnaBridge 157:e7ca05fa8600 1855 ({ \
AnnaBridge 157:e7ca05fa8600 1856 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 157:e7ca05fa8600 1857 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 157:e7ca05fa8600 1858 __RES; \
AnnaBridge 157:e7ca05fa8600 1859 })
AnnaBridge 157:e7ca05fa8600 1860
Anna Bridge 169:a7c7b631e539 1861 __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 157:e7ca05fa8600 1862 {
AnnaBridge 157:e7ca05fa8600 1863 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1864
AnnaBridge 157:e7ca05fa8600 1865 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 157:e7ca05fa8600 1866 return(result);
AnnaBridge 157:e7ca05fa8600 1867 }
AnnaBridge 157:e7ca05fa8600 1868
Anna Bridge 169:a7c7b631e539 1869 __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1870 {
AnnaBridge 157:e7ca05fa8600 1871 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1872
AnnaBridge 157:e7ca05fa8600 1873 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1874 return(result);
AnnaBridge 157:e7ca05fa8600 1875 }
AnnaBridge 157:e7ca05fa8600 1876
Anna Bridge 169:a7c7b631e539 1877 __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 157:e7ca05fa8600 1878 {
AnnaBridge 157:e7ca05fa8600 1879 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1880
AnnaBridge 157:e7ca05fa8600 1881 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 157:e7ca05fa8600 1882 return(result);
AnnaBridge 157:e7ca05fa8600 1883 }
AnnaBridge 157:e7ca05fa8600 1884
Anna Bridge 169:a7c7b631e539 1885 __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1886 {
AnnaBridge 157:e7ca05fa8600 1887 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1888
AnnaBridge 157:e7ca05fa8600 1889 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1890 return(result);
AnnaBridge 157:e7ca05fa8600 1891 }
AnnaBridge 157:e7ca05fa8600 1892
Anna Bridge 169:a7c7b631e539 1893 __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1894 {
AnnaBridge 157:e7ca05fa8600 1895 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1896
AnnaBridge 157:e7ca05fa8600 1897 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1898 return(result);
AnnaBridge 157:e7ca05fa8600 1899 }
AnnaBridge 157:e7ca05fa8600 1900
Anna Bridge 169:a7c7b631e539 1901 __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1902 {
AnnaBridge 157:e7ca05fa8600 1903 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1904
AnnaBridge 157:e7ca05fa8600 1905 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1906 return(result);
AnnaBridge 157:e7ca05fa8600 1907 }
AnnaBridge 157:e7ca05fa8600 1908
Anna Bridge 169:a7c7b631e539 1909 __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 157:e7ca05fa8600 1910 {
AnnaBridge 157:e7ca05fa8600 1911 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1912
AnnaBridge 157:e7ca05fa8600 1913 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 157:e7ca05fa8600 1914 return(result);
AnnaBridge 157:e7ca05fa8600 1915 }
AnnaBridge 157:e7ca05fa8600 1916
Anna Bridge 169:a7c7b631e539 1917 __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 157:e7ca05fa8600 1918 {
AnnaBridge 157:e7ca05fa8600 1919 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1920
AnnaBridge 157:e7ca05fa8600 1921 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 157:e7ca05fa8600 1922 return(result);
AnnaBridge 157:e7ca05fa8600 1923 }
AnnaBridge 157:e7ca05fa8600 1924
Anna Bridge 169:a7c7b631e539 1925 __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 157:e7ca05fa8600 1926 {
AnnaBridge 157:e7ca05fa8600 1927 union llreg_u{
AnnaBridge 157:e7ca05fa8600 1928 uint32_t w32[2];
AnnaBridge 157:e7ca05fa8600 1929 uint64_t w64;
AnnaBridge 157:e7ca05fa8600 1930 } llr;
AnnaBridge 157:e7ca05fa8600 1931 llr.w64 = acc;
AnnaBridge 157:e7ca05fa8600 1932
AnnaBridge 157:e7ca05fa8600 1933 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 157:e7ca05fa8600 1934 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 157:e7ca05fa8600 1935 #else /* Big endian */
AnnaBridge 157:e7ca05fa8600 1936 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 157:e7ca05fa8600 1937 #endif
AnnaBridge 157:e7ca05fa8600 1938
AnnaBridge 157:e7ca05fa8600 1939 return(llr.w64);
AnnaBridge 157:e7ca05fa8600 1940 }
AnnaBridge 157:e7ca05fa8600 1941
Anna Bridge 169:a7c7b631e539 1942 __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 157:e7ca05fa8600 1943 {
AnnaBridge 157:e7ca05fa8600 1944 union llreg_u{
AnnaBridge 157:e7ca05fa8600 1945 uint32_t w32[2];
AnnaBridge 157:e7ca05fa8600 1946 uint64_t w64;
AnnaBridge 157:e7ca05fa8600 1947 } llr;
AnnaBridge 157:e7ca05fa8600 1948 llr.w64 = acc;
AnnaBridge 157:e7ca05fa8600 1949
AnnaBridge 157:e7ca05fa8600 1950 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 157:e7ca05fa8600 1951 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 157:e7ca05fa8600 1952 #else /* Big endian */
AnnaBridge 157:e7ca05fa8600 1953 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 157:e7ca05fa8600 1954 #endif
AnnaBridge 157:e7ca05fa8600 1955
AnnaBridge 157:e7ca05fa8600 1956 return(llr.w64);
AnnaBridge 157:e7ca05fa8600 1957 }
AnnaBridge 157:e7ca05fa8600 1958
Anna Bridge 169:a7c7b631e539 1959 __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1960 {
AnnaBridge 157:e7ca05fa8600 1961 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1962
AnnaBridge 157:e7ca05fa8600 1963 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1964 return(result);
AnnaBridge 157:e7ca05fa8600 1965 }
AnnaBridge 157:e7ca05fa8600 1966
Anna Bridge 169:a7c7b631e539 1967 __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 1968 {
AnnaBridge 157:e7ca05fa8600 1969 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1970
AnnaBridge 157:e7ca05fa8600 1971 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 1972 return(result);
AnnaBridge 157:e7ca05fa8600 1973 }
AnnaBridge 157:e7ca05fa8600 1974
Anna Bridge 169:a7c7b631e539 1975 __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 157:e7ca05fa8600 1976 {
AnnaBridge 157:e7ca05fa8600 1977 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1978
AnnaBridge 157:e7ca05fa8600 1979 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 157:e7ca05fa8600 1980 return(result);
AnnaBridge 157:e7ca05fa8600 1981 }
AnnaBridge 157:e7ca05fa8600 1982
Anna Bridge 169:a7c7b631e539 1983 __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 157:e7ca05fa8600 1984 {
AnnaBridge 157:e7ca05fa8600 1985 uint32_t result;
AnnaBridge 157:e7ca05fa8600 1986
AnnaBridge 157:e7ca05fa8600 1987 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 157:e7ca05fa8600 1988 return(result);
AnnaBridge 157:e7ca05fa8600 1989 }
AnnaBridge 157:e7ca05fa8600 1990
Anna Bridge 169:a7c7b631e539 1991 __STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 157:e7ca05fa8600 1992 {
AnnaBridge 157:e7ca05fa8600 1993 union llreg_u{
AnnaBridge 157:e7ca05fa8600 1994 uint32_t w32[2];
AnnaBridge 157:e7ca05fa8600 1995 uint64_t w64;
AnnaBridge 157:e7ca05fa8600 1996 } llr;
AnnaBridge 157:e7ca05fa8600 1997 llr.w64 = acc;
AnnaBridge 157:e7ca05fa8600 1998
AnnaBridge 157:e7ca05fa8600 1999 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 157:e7ca05fa8600 2000 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 157:e7ca05fa8600 2001 #else /* Big endian */
AnnaBridge 157:e7ca05fa8600 2002 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 157:e7ca05fa8600 2003 #endif
AnnaBridge 157:e7ca05fa8600 2004
AnnaBridge 157:e7ca05fa8600 2005 return(llr.w64);
AnnaBridge 157:e7ca05fa8600 2006 }
AnnaBridge 157:e7ca05fa8600 2007
Anna Bridge 169:a7c7b631e539 2008 __STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 157:e7ca05fa8600 2009 {
AnnaBridge 157:e7ca05fa8600 2010 union llreg_u{
AnnaBridge 157:e7ca05fa8600 2011 uint32_t w32[2];
AnnaBridge 157:e7ca05fa8600 2012 uint64_t w64;
AnnaBridge 157:e7ca05fa8600 2013 } llr;
AnnaBridge 157:e7ca05fa8600 2014 llr.w64 = acc;
AnnaBridge 157:e7ca05fa8600 2015
AnnaBridge 157:e7ca05fa8600 2016 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 157:e7ca05fa8600 2017 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 157:e7ca05fa8600 2018 #else /* Big endian */
AnnaBridge 157:e7ca05fa8600 2019 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 157:e7ca05fa8600 2020 #endif
AnnaBridge 157:e7ca05fa8600 2021
AnnaBridge 157:e7ca05fa8600 2022 return(llr.w64);
AnnaBridge 157:e7ca05fa8600 2023 }
AnnaBridge 157:e7ca05fa8600 2024
Anna Bridge 169:a7c7b631e539 2025 __STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 157:e7ca05fa8600 2026 {
AnnaBridge 157:e7ca05fa8600 2027 uint32_t result;
AnnaBridge 157:e7ca05fa8600 2028
AnnaBridge 157:e7ca05fa8600 2029 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 2030 return(result);
AnnaBridge 157:e7ca05fa8600 2031 }
AnnaBridge 157:e7ca05fa8600 2032
Anna Bridge 169:a7c7b631e539 2033 __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge 157:e7ca05fa8600 2034 {
AnnaBridge 157:e7ca05fa8600 2035 int32_t result;
AnnaBridge 157:e7ca05fa8600 2036
AnnaBridge 157:e7ca05fa8600 2037 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 2038 return(result);
AnnaBridge 157:e7ca05fa8600 2039 }
AnnaBridge 157:e7ca05fa8600 2040
Anna Bridge 169:a7c7b631e539 2041 __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge 157:e7ca05fa8600 2042 {
AnnaBridge 157:e7ca05fa8600 2043 int32_t result;
AnnaBridge 157:e7ca05fa8600 2044
AnnaBridge 157:e7ca05fa8600 2045 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 157:e7ca05fa8600 2046 return(result);
AnnaBridge 157:e7ca05fa8600 2047 }
AnnaBridge 157:e7ca05fa8600 2048
AnnaBridge 157:e7ca05fa8600 2049 #if 0
AnnaBridge 157:e7ca05fa8600 2050 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 157:e7ca05fa8600 2051 ({ \
AnnaBridge 157:e7ca05fa8600 2052 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 157:e7ca05fa8600 2053 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 157:e7ca05fa8600 2054 __RES; \
AnnaBridge 157:e7ca05fa8600 2055 })
AnnaBridge 157:e7ca05fa8600 2056
AnnaBridge 157:e7ca05fa8600 2057 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 157:e7ca05fa8600 2058 ({ \
AnnaBridge 157:e7ca05fa8600 2059 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 157:e7ca05fa8600 2060 if (ARG3 == 0) \
AnnaBridge 157:e7ca05fa8600 2061 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 157:e7ca05fa8600 2062 else \
AnnaBridge 157:e7ca05fa8600 2063 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 157:e7ca05fa8600 2064 __RES; \
AnnaBridge 157:e7ca05fa8600 2065 })
AnnaBridge 157:e7ca05fa8600 2066 #endif
AnnaBridge 157:e7ca05fa8600 2067
AnnaBridge 157:e7ca05fa8600 2068 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 157:e7ca05fa8600 2069 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 157:e7ca05fa8600 2070
AnnaBridge 157:e7ca05fa8600 2071 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 157:e7ca05fa8600 2072 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 157:e7ca05fa8600 2073
Anna Bridge 169:a7c7b631e539 2074 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 157:e7ca05fa8600 2075 {
AnnaBridge 157:e7ca05fa8600 2076 int32_t result;
AnnaBridge 157:e7ca05fa8600 2077
AnnaBridge 157:e7ca05fa8600 2078 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 157:e7ca05fa8600 2079 return(result);
AnnaBridge 157:e7ca05fa8600 2080 }
AnnaBridge 157:e7ca05fa8600 2081
AnnaBridge 157:e7ca05fa8600 2082 #endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge 157:e7ca05fa8600 2083 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 157:e7ca05fa8600 2084
AnnaBridge 157:e7ca05fa8600 2085
AnnaBridge 157:e7ca05fa8600 2086 #pragma GCC diagnostic pop
AnnaBridge 157:e7ca05fa8600 2087
AnnaBridge 157:e7ca05fa8600 2088 #endif /* __CMSIS_GCC_H */