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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_L011K4/TARGET_STM/mbed_rtx.h@170:e95d10626187, 2018-09-06 (annotated)

Committer:
AnnaBridge
Date:
Thu Sep 06 13:39:34 2018 +0100
Revision:
170:e95d10626187
Parent:
169:a7c7b631e539 
mbed library. Release version 163

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 157:e7ca05fa8600 1 /* mbed Microcontroller Library
AnnaBridge 157:e7ca05fa8600 2 * Copyright (c) 2017 ARM Limited
AnnaBridge 157:e7ca05fa8600 3 *
AnnaBridge 157:e7ca05fa8600 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 157:e7ca05fa8600 5 * you may not use this file except in compliance with the License.
AnnaBridge 157:e7ca05fa8600 6 * You may obtain a copy of the License at
AnnaBridge 157:e7ca05fa8600 7 *
AnnaBridge 157:e7ca05fa8600 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 157:e7ca05fa8600 9 *
AnnaBridge 157:e7ca05fa8600 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 157:e7ca05fa8600 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 157:e7ca05fa8600 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 157:e7ca05fa8600 13 * See the License for the specific language governing permissions and
AnnaBridge 157:e7ca05fa8600 14 * limitations under the License.
AnnaBridge 157:e7ca05fa8600 15 */
AnnaBridge 157:e7ca05fa8600 16
AnnaBridge 157:e7ca05fa8600 17 #ifndef MBED_MBED_RTX_H
AnnaBridge 157:e7ca05fa8600 18 #define MBED_MBED_RTX_H
AnnaBridge 157:e7ca05fa8600 19
Anna Bridge 169:a7c7b631e539 20 #include <stdint.h>
Anna Bridge 169:a7c7b631e539 21
AnnaBridge 157:e7ca05fa8600 22 #ifndef INITIAL_SP
AnnaBridge 157:e7ca05fa8600 23
AnnaBridge 163:e59c8e839560 24 #if (defined(TARGET_STM32L475VG) ||\
AnnaBridge 163:e59c8e839560 25 defined(TARGET_STM32L476RG) ||\
AnnaBridge 163:e59c8e839560 26 defined(TARGET_STM32L476JG) ||\
AnnaBridge 163:e59c8e839560 27 defined(TARGET_STM32L476VG) ||\
AnnaBridge 163:e59c8e839560 28 defined(TARGET_STM32L486RG))
AnnaBridge 163:e59c8e839560 29 /* only GCC_ARM and IAR toolchains have the stack on SRAM2 */
AnnaBridge 163:e59c8e839560 30 #if (((defined(__GNUC__) && !defined(__CC_ARM)) ||\
AnnaBridge 163:e59c8e839560 31 defined(__IAR_SYSTEMS_ICC__ )) &&\
AnnaBridge 163:e59c8e839560 32 defined(TWO_RAM_REGIONS))
AnnaBridge 163:e59c8e839560 33 #define INITIAL_SP (0x10008000UL)
AnnaBridge 163:e59c8e839560 34 #else
AnnaBridge 163:e59c8e839560 35 #define INITIAL_SP (0x20018000UL)
AnnaBridge 163:e59c8e839560 36 #endif /* toolchains */
AnnaBridge 163:e59c8e839560 37
AnnaBridge 163:e59c8e839560 38 #elif (defined(TARGET_STM32F051R8) ||\
AnnaBridge 157:e7ca05fa8600 39 defined(TARGET_STM32F100RB) ||\
AnnaBridge 157:e7ca05fa8600 40 defined(TARGET_STM32L031K6) ||\
AnnaBridge 157:e7ca05fa8600 41 defined(TARGET_STM32L053C8) ||\
AnnaBridge 157:e7ca05fa8600 42 defined(TARGET_STM32L053R8))
AnnaBridge 157:e7ca05fa8600 43 #define INITIAL_SP (0x20002000UL)
AnnaBridge 157:e7ca05fa8600 44
AnnaBridge 157:e7ca05fa8600 45 #elif (defined(TARGET_STM32F303K8) ||\
AnnaBridge 157:e7ca05fa8600 46 defined(TARGET_STM32F334C8) ||\
AnnaBridge 157:e7ca05fa8600 47 defined(TARGET_STM32F334R8))
AnnaBridge 157:e7ca05fa8600 48 #define INITIAL_SP (0x20003000UL)
AnnaBridge 157:e7ca05fa8600 49
AnnaBridge 157:e7ca05fa8600 50 #elif (defined(TARGET_STM32F070RB) ||\
AnnaBridge 157:e7ca05fa8600 51 defined(TARGET_STM32F072RB) ||\
AnnaBridge 157:e7ca05fa8600 52 defined(TARGET_STM32F302R8))
AnnaBridge 157:e7ca05fa8600 53 #define INITIAL_SP (0x20004000UL)
AnnaBridge 157:e7ca05fa8600 54
AnnaBridge 157:e7ca05fa8600 55 #elif (defined(TARGET_STM32F103RB) ||\
AnnaBridge 157:e7ca05fa8600 56 defined(TARGET_STM32F103C8) ||\
AnnaBridge 157:e7ca05fa8600 57 defined(TARGET_STM32L072CZ) ||\
AnnaBridge 161:aa5281ff4a02 58 defined(TARGET_STM32L073RZ) ||\
AnnaBridge 161:aa5281ff4a02 59 defined(TARGET_STM32L0x2xZ))
AnnaBridge 157:e7ca05fa8600 60 #define INITIAL_SP (0x20005000UL)
AnnaBridge 157:e7ca05fa8600 61
AnnaBridge 157:e7ca05fa8600 62 #elif (defined(TARGET_STM32F091RC) ||\
AnnaBridge 157:e7ca05fa8600 63 defined(TARGET_STM32F410RB) ||\
AnnaBridge 165:d1b4690b3f8b 64 defined(TARGET_STM32L151CBA)||\
AnnaBridge 157:e7ca05fa8600 65 defined(TARGET_STM32L151CC) ||\
AnnaBridge 157:e7ca05fa8600 66 defined(TARGET_STM32L151RC) ||\
AnnaBridge 157:e7ca05fa8600 67 defined(TARGET_STM32L152RC))
AnnaBridge 157:e7ca05fa8600 68 #define INITIAL_SP (0x20008000UL)
AnnaBridge 157:e7ca05fa8600 69
AnnaBridge 157:e7ca05fa8600 70 #elif defined(TARGET_STM32F303VC)
AnnaBridge 157:e7ca05fa8600 71 #define INITIAL_SP (0x2000A000UL)
AnnaBridge 157:e7ca05fa8600 72
AnnaBridge 161:aa5281ff4a02 73 #elif defined(TARGET_STM32L443RC)
AnnaBridge 161:aa5281ff4a02 74 #define INITIAL_SP (0x2000C000UL)
AnnaBridge 161:aa5281ff4a02 75
Anna Bridge 160:5571c4ff569f 76 #elif defined(TARGET_STM32L432KC) ||\
Anna Bridge 160:5571c4ff569f 77 defined (TARGET_STM32L433RC)
AnnaBridge 157:e7ca05fa8600 78 #define INITIAL_SP (0x20010000UL)
AnnaBridge 157:e7ca05fa8600 79
AnnaBridge 157:e7ca05fa8600 80 #elif (defined(TARGET_STM32F303RE) ||\
AnnaBridge 157:e7ca05fa8600 81 defined(TARGET_STM32F303ZE) ||\
AnnaBridge 157:e7ca05fa8600 82 defined(TARGET_STM32F401VC))
AnnaBridge 157:e7ca05fa8600 83 #define INITIAL_SP (0x20010000UL)
AnnaBridge 157:e7ca05fa8600 84
AnnaBridge 157:e7ca05fa8600 85 #elif defined(TARGET_STM32L152RE)
AnnaBridge 157:e7ca05fa8600 86 #define INITIAL_SP (0x20014000UL)
AnnaBridge 157:e7ca05fa8600 87
AnnaBridge 157:e7ca05fa8600 88 #elif (defined(TARGET_STM32F401RE) ||\
AnnaBridge 163:e59c8e839560 89 defined(TARGET_STM32F401VE))
AnnaBridge 157:e7ca05fa8600 90 #define INITIAL_SP (0x20018000UL)
AnnaBridge 157:e7ca05fa8600 91
AnnaBridge 157:e7ca05fa8600 92 #elif (defined(TARGET_STM32F207ZG) ||\
AnnaBridge 157:e7ca05fa8600 93 defined(TARGET_STM32F405RG) ||\
AnnaBridge 157:e7ca05fa8600 94 defined(TARGET_STM32F407VG) ||\
AnnaBridge 157:e7ca05fa8600 95 defined(TARGET_STM32F411RE) ||\
AnnaBridge 157:e7ca05fa8600 96 defined(TARGET_STM32F446RE) ||\
AnnaBridge 157:e7ca05fa8600 97 defined(TARGET_STM32F446VE) ||\
AnnaBridge 157:e7ca05fa8600 98 defined(TARGET_STM32F446ZE))
AnnaBridge 157:e7ca05fa8600 99 #define INITIAL_SP (0x20020000UL)
AnnaBridge 157:e7ca05fa8600 100
AnnaBridge 157:e7ca05fa8600 101 #elif (defined(TARGET_STM32F429ZI) ||\
AnnaBridge 157:e7ca05fa8600 102 defined(TARGET_STM32F437VG) ||\
Anna Bridge 169:a7c7b631e539 103 defined(TARGET_STM32F439VI) ||\
AnnaBridge 157:e7ca05fa8600 104 defined(TARGET_STM32F439ZI))
AnnaBridge 157:e7ca05fa8600 105 #define INITIAL_SP (0x20030000UL)
AnnaBridge 157:e7ca05fa8600 106
AnnaBridge 157:e7ca05fa8600 107 #elif defined(TARGET_STM32F412ZG)
AnnaBridge 157:e7ca05fa8600 108 #define INITIAL_SP (0x20040000UL)
AnnaBridge 157:e7ca05fa8600 109
AnnaBridge 157:e7ca05fa8600 110 #elif (defined(TARGET_STM32F413ZH) ||\
AnnaBridge 157:e7ca05fa8600 111 defined(TARGET_STM32F469NI) ||\
AnnaBridge 157:e7ca05fa8600 112 defined(TARGET_STM32F746NG) ||\
AnnaBridge 157:e7ca05fa8600 113 defined(TARGET_STM32F746ZG) ||\
AnnaBridge 157:e7ca05fa8600 114 defined(TARGET_STM32F756ZG) ||\
AnnaBridge 165:d1b4690b3f8b 115 defined(TARGET_STM32L496AG) ||\
AnnaBridge 157:e7ca05fa8600 116 defined(TARGET_STM32L496ZG))
AnnaBridge 157:e7ca05fa8600 117 #define INITIAL_SP (0x20050000UL)
AnnaBridge 157:e7ca05fa8600 118
AnnaBridge 157:e7ca05fa8600 119 #elif (defined(TARGET_STM32F767ZI) ||\
AnnaBridge 157:e7ca05fa8600 120 defined(TARGET_STM32F769NI))
AnnaBridge 157:e7ca05fa8600 121 #define INITIAL_SP (0x20080000UL)
AnnaBridge 157:e7ca05fa8600 122
AnnaBridge 157:e7ca05fa8600 123 #else
AnnaBridge 157:e7ca05fa8600 124 #error "INITIAL_SP is not defined for this target in the mbed_rtx.h file"
AnnaBridge 157:e7ca05fa8600 125 #endif
AnnaBridge 157:e7ca05fa8600 126
AnnaBridge 157:e7ca05fa8600 127 #endif // INITIAL_SP
AnnaBridge 167:84c0a372a020 128 #if (defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION) && defined(TWO_RAM_REGIONS))
AnnaBridge 170:e95d10626187 129 extern uint32_t __StackLimit[];
AnnaBridge 170:e95d10626187 130 extern uint32_t __StackTop[];
AnnaBridge 170:e95d10626187 131 extern uint32_t __end__[];
AnnaBridge 170:e95d10626187 132 extern uint32_t __HeapLimit[];
AnnaBridge 170:e95d10626187 133 #define HEAP_START ((unsigned char*)__end__)
AnnaBridge 170:e95d10626187 134 #define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START))
AnnaBridge 170:e95d10626187 135 #define ISR_STACK_START ((unsigned char*)__StackLimit)
AnnaBridge 170:e95d10626187 136 #define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit))
AnnaBridge 163:e59c8e839560 137 #endif
AnnaBridge 157:e7ca05fa8600 138
AnnaBridge 157:e7ca05fa8600 139 #endif // MBED_MBED_RTX_H