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mbed 2
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TARGET_MIMXRT1050_EVK/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct@170:e95d10626187, 2018-09-06 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Sep 06 13:39:34 2018 +0100
- Revision:
- 170:e95d10626187
- Parent:
- 161:aa5281ff4a02
mbed library. Release version 163
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 161:aa5281ff4a02 | 1 | #! armcc -E |
AnnaBridge | 161:aa5281ff4a02 | 2 | /* |
AnnaBridge | 161:aa5281ff4a02 | 3 | ** ################################################################### |
AnnaBridge | 170:e95d10626187 | 4 | ** Processors: MIMXRT1052CVJ5B |
AnnaBridge | 170:e95d10626187 | 5 | ** MIMXRT1052CVL5B |
AnnaBridge | 170:e95d10626187 | 6 | ** MIMXRT1052DVJ6B |
AnnaBridge | 170:e95d10626187 | 7 | ** MIMXRT1052DVL6B |
AnnaBridge | 161:aa5281ff4a02 | 8 | ** |
AnnaBridge | 161:aa5281ff4a02 | 9 | ** Compiler: Keil ARM C/C++ Compiler |
AnnaBridge | 170:e95d10626187 | 10 | ** Reference manual: IMXRT1050RM Rev.1, 03/2018 |
AnnaBridge | 161:aa5281ff4a02 | 11 | ** Version: rev. 0.1, 2017-01-10 |
AnnaBridge | 170:e95d10626187 | 12 | ** Build: b180606 |
AnnaBridge | 161:aa5281ff4a02 | 13 | ** |
AnnaBridge | 161:aa5281ff4a02 | 14 | ** Abstract: |
AnnaBridge | 161:aa5281ff4a02 | 15 | ** Linker file for the Keil ARM C/C++ Compiler |
AnnaBridge | 161:aa5281ff4a02 | 16 | ** |
AnnaBridge | 170:e95d10626187 | 17 | ** The Clear BSD License |
AnnaBridge | 161:aa5281ff4a02 | 18 | ** Copyright 2016 Freescale Semiconductor, Inc. |
AnnaBridge | 170:e95d10626187 | 19 | ** Copyright 2016-2018 NXP |
AnnaBridge | 170:e95d10626187 | 20 | ** All rights reserved. |
AnnaBridge | 161:aa5281ff4a02 | 21 | ** |
AnnaBridge | 170:e95d10626187 | 22 | ** Redistribution and use in source and binary forms, with or without |
AnnaBridge | 170:e95d10626187 | 23 | ** modification, are permitted (subject to the limitations in the |
AnnaBridge | 170:e95d10626187 | 24 | ** disclaimer below) provided that the following conditions are met: |
AnnaBridge | 161:aa5281ff4a02 | 25 | ** |
AnnaBridge | 170:e95d10626187 | 26 | ** * Redistributions of source code must retain the above copyright |
AnnaBridge | 170:e95d10626187 | 27 | ** notice, this list of conditions and the following disclaimer. |
AnnaBridge | 170:e95d10626187 | 28 | ** |
AnnaBridge | 170:e95d10626187 | 29 | ** * Redistributions in binary form must reproduce the above copyright |
AnnaBridge | 170:e95d10626187 | 30 | ** notice, this list of conditions and the following disclaimer in the |
AnnaBridge | 170:e95d10626187 | 31 | ** documentation and/or other materials provided with the distribution. |
AnnaBridge | 161:aa5281ff4a02 | 32 | ** |
AnnaBridge | 170:e95d10626187 | 33 | ** * Neither the name of the copyright holder nor the names of its |
AnnaBridge | 170:e95d10626187 | 34 | ** contributors may be used to endorse or promote products derived from |
AnnaBridge | 170:e95d10626187 | 35 | ** this software without specific prior written permission. |
AnnaBridge | 161:aa5281ff4a02 | 36 | ** |
AnnaBridge | 170:e95d10626187 | 37 | ** NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE |
AnnaBridge | 170:e95d10626187 | 38 | ** GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT |
AnnaBridge | 170:e95d10626187 | 39 | ** HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED |
AnnaBridge | 170:e95d10626187 | 40 | ** WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
AnnaBridge | 170:e95d10626187 | 41 | ** MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 170:e95d10626187 | 42 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
AnnaBridge | 170:e95d10626187 | 43 | ** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
AnnaBridge | 170:e95d10626187 | 44 | ** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
AnnaBridge | 170:e95d10626187 | 45 | ** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
AnnaBridge | 170:e95d10626187 | 46 | ** BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
AnnaBridge | 170:e95d10626187 | 47 | ** WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
AnnaBridge | 170:e95d10626187 | 48 | ** OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
AnnaBridge | 170:e95d10626187 | 49 | ** IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 161:aa5281ff4a02 | 50 | ** |
AnnaBridge | 161:aa5281ff4a02 | 51 | ** http: www.nxp.com |
AnnaBridge | 161:aa5281ff4a02 | 52 | ** mail: support@nxp.com |
AnnaBridge | 161:aa5281ff4a02 | 53 | ** |
AnnaBridge | 161:aa5281ff4a02 | 54 | ** ################################################################### |
AnnaBridge | 161:aa5281ff4a02 | 55 | */ |
AnnaBridge | 170:e95d10626187 | 56 | |
AnnaBridge | 170:e95d10626187 | 57 | #define __ram_vector_table__ 1 |
AnnaBridge | 170:e95d10626187 | 58 | |
AnnaBridge | 170:e95d10626187 | 59 | #define __stack_size__ 0x8000 |
AnnaBridge | 170:e95d10626187 | 60 | #define __heap_size__ 0x10000 |
AnnaBridge | 161:aa5281ff4a02 | 61 | |
AnnaBridge | 161:aa5281ff4a02 | 62 | #if (defined(__ram_vector_table__)) |
AnnaBridge | 161:aa5281ff4a02 | 63 | #define __ram_vector_table_size__ 0x00000400 |
AnnaBridge | 161:aa5281ff4a02 | 64 | #else |
AnnaBridge | 161:aa5281ff4a02 | 65 | #define __ram_vector_table_size__ 0x00000000 |
AnnaBridge | 161:aa5281ff4a02 | 66 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 67 | |
AnnaBridge | 170:e95d10626187 | 68 | #define m_flash_config_start 0x60000000 |
AnnaBridge | 170:e95d10626187 | 69 | #define m_flash_config_size 0x00001000 |
AnnaBridge | 170:e95d10626187 | 70 | |
AnnaBridge | 170:e95d10626187 | 71 | #define m_ivt_start 0x60001000 |
AnnaBridge | 170:e95d10626187 | 72 | #define m_ivt_size 0x00001000 |
AnnaBridge | 170:e95d10626187 | 73 | |
AnnaBridge | 161:aa5281ff4a02 | 74 | #define m_interrupts_start 0x60002000 |
AnnaBridge | 161:aa5281ff4a02 | 75 | #define m_interrupts_size 0x00000400 |
AnnaBridge | 161:aa5281ff4a02 | 76 | |
AnnaBridge | 161:aa5281ff4a02 | 77 | #define m_text_start 0x60002400 |
AnnaBridge | 161:aa5281ff4a02 | 78 | #define m_text_size 0x03FFDC00 |
AnnaBridge | 161:aa5281ff4a02 | 79 | |
AnnaBridge | 170:e95d10626187 | 80 | #define m_text2_start 0x00000000 |
AnnaBridge | 170:e95d10626187 | 81 | #define m_text2_size 0x00020000 |
AnnaBridge | 170:e95d10626187 | 82 | |
AnnaBridge | 170:e95d10626187 | 83 | #define m_data_start 0x80000000 |
AnnaBridge | 170:e95d10626187 | 84 | #define m_data_size 0x01E00000 |
AnnaBridge | 170:e95d10626187 | 85 | |
AnnaBridge | 170:e95d10626187 | 86 | #define m_ncache_start 0x81E00000 |
AnnaBridge | 170:e95d10626187 | 87 | #define m_ncache_size 0x00200000 |
AnnaBridge | 170:e95d10626187 | 88 | |
AnnaBridge | 161:aa5281ff4a02 | 89 | #define m_interrupts_ram_start 0x20000000 |
AnnaBridge | 161:aa5281ff4a02 | 90 | #define m_interrupts_ram_size __ram_vector_table_size__ |
AnnaBridge | 161:aa5281ff4a02 | 91 | |
AnnaBridge | 170:e95d10626187 | 92 | #define m_data2_start (m_interrupts_ram_start + m_interrupts_ram_size) |
AnnaBridge | 170:e95d10626187 | 93 | #define m_data2_size (0x00020000 - m_interrupts_ram_size) |
AnnaBridge | 161:aa5281ff4a02 | 94 | |
AnnaBridge | 170:e95d10626187 | 95 | #define m_data3_start 0x20200000 |
AnnaBridge | 170:e95d10626187 | 96 | #define m_data3_size 0x00040000 |
AnnaBridge | 161:aa5281ff4a02 | 97 | |
AnnaBridge | 161:aa5281ff4a02 | 98 | /* Sizes */ |
AnnaBridge | 161:aa5281ff4a02 | 99 | #if (defined(__stack_size__)) |
AnnaBridge | 161:aa5281ff4a02 | 100 | #define Stack_Size __stack_size__ |
AnnaBridge | 161:aa5281ff4a02 | 101 | #else |
AnnaBridge | 161:aa5281ff4a02 | 102 | #define Stack_Size 0x0400 |
AnnaBridge | 161:aa5281ff4a02 | 103 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 104 | |
AnnaBridge | 161:aa5281ff4a02 | 105 | #if (defined(__heap_size__)) |
AnnaBridge | 161:aa5281ff4a02 | 106 | #define Heap_Size __heap_size__ |
AnnaBridge | 161:aa5281ff4a02 | 107 | #else |
AnnaBridge | 161:aa5281ff4a02 | 108 | #define Heap_Size 0x0400 |
AnnaBridge | 161:aa5281ff4a02 | 109 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 110 | |
AnnaBridge | 170:e95d10626187 | 111 | LR_IROM1 m_flash_config_start m_text_start+m_text_size-m_flash_config_start { ; load region size_region |
AnnaBridge | 170:e95d10626187 | 112 | RW_m_config_text m_flash_config_start FIXED m_flash_config_size { ; load address = execution address |
AnnaBridge | 170:e95d10626187 | 113 | * (.boot_hdr.conf, +FIRST) |
AnnaBridge | 170:e95d10626187 | 114 | } |
AnnaBridge | 170:e95d10626187 | 115 | |
AnnaBridge | 170:e95d10626187 | 116 | RW_m_ivt_text m_ivt_start FIXED m_ivt_size { ; load address = execution address |
AnnaBridge | 170:e95d10626187 | 117 | * (.boot_hdr.ivt, +FIRST) |
AnnaBridge | 170:e95d10626187 | 118 | * (.boot_hdr.boot_data) |
AnnaBridge | 170:e95d10626187 | 119 | * (.boot_hdr.dcd_data) |
AnnaBridge | 170:e95d10626187 | 120 | } |
AnnaBridge | 170:e95d10626187 | 121 | VECTOR_ROM m_interrupts_start FIXED m_interrupts_size { ; load address = execution address |
AnnaBridge | 161:aa5281ff4a02 | 122 | * (RESET,+FIRST) |
AnnaBridge | 161:aa5281ff4a02 | 123 | } |
AnnaBridge | 170:e95d10626187 | 124 | ER_IROM1 m_text_start FIXED m_text_size { ; load address = execution address |
AnnaBridge | 161:aa5281ff4a02 | 125 | * (InRoot$$Sections) |
AnnaBridge | 161:aa5281ff4a02 | 126 | .ANY (+RO) |
AnnaBridge | 161:aa5281ff4a02 | 127 | } |
AnnaBridge | 161:aa5281ff4a02 | 128 | |
AnnaBridge | 161:aa5281ff4a02 | 129 | #if (defined(__ram_vector_table__)) |
AnnaBridge | 161:aa5281ff4a02 | 130 | VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size { |
AnnaBridge | 161:aa5281ff4a02 | 131 | } |
AnnaBridge | 161:aa5281ff4a02 | 132 | #else |
AnnaBridge | 161:aa5281ff4a02 | 133 | VECTOR_RAM m_interrupts_start EMPTY 0 { |
AnnaBridge | 161:aa5281ff4a02 | 134 | } |
AnnaBridge | 161:aa5281ff4a02 | 135 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 136 | RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data |
AnnaBridge | 161:aa5281ff4a02 | 137 | .ANY (+RW +ZI) |
AnnaBridge | 170:e95d10626187 | 138 | *(m_usb_dma_init_data) |
AnnaBridge | 170:e95d10626187 | 139 | *(m_usb_dma_noninit_data) |
AnnaBridge | 161:aa5281ff4a02 | 140 | } |
AnnaBridge | 161:aa5281ff4a02 | 141 | RW_IRAM1 +0 EMPTY Heap_Size { ; Heap region growing up |
AnnaBridge | 161:aa5281ff4a02 | 142 | } |
AnnaBridge | 161:aa5281ff4a02 | 143 | ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down |
AnnaBridge | 161:aa5281ff4a02 | 144 | } |
AnnaBridge | 170:e95d10626187 | 145 | RW_m_ram_text m_text2_start UNINIT m_text2_size { ; load address = execution address |
AnnaBridge | 170:e95d10626187 | 146 | * (RamFunction) |
AnnaBridge | 170:e95d10626187 | 147 | } |
AnnaBridge | 170:e95d10626187 | 148 | RW_m_ncache m_ncache_start m_ncache_size { ; ncache RW data |
AnnaBridge | 170:e95d10626187 | 149 | * (NonCacheable.init) |
AnnaBridge | 170:e95d10626187 | 150 | * (NonCacheable) |
AnnaBridge | 170:e95d10626187 | 151 | } |
AnnaBridge | 161:aa5281ff4a02 | 152 | } |
AnnaBridge | 161:aa5281ff4a02 | 153 |