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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_GR_LYCHEE/cmsis_armclang.h@170:e95d10626187, 2018-09-06 (annotated)

Committer:
AnnaBridge
Date:
Thu Sep 06 13:39:34 2018 +0100
Revision:
170:e95d10626187
Parent:
169:a7c7b631e539 
mbed library. Release version 163

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 161:aa5281ff4a02 1 /**************************************************************************//**
AnnaBridge 161:aa5281ff4a02 2 * @file cmsis_armclang.h
AnnaBridge 161:aa5281ff4a02 3 * @brief CMSIS compiler specific macros, functions, instructions
Anna Bridge 169:a7c7b631e539 4 * @version V1.0.2
Anna Bridge 169:a7c7b631e539 5 * @date 10. January 2018
AnnaBridge 161:aa5281ff4a02 6 ******************************************************************************/
AnnaBridge 161:aa5281ff4a02 7 /*
Anna Bridge 169:a7c7b631e539 8 * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
AnnaBridge 161:aa5281ff4a02 9 *
AnnaBridge 161:aa5281ff4a02 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 161:aa5281ff4a02 11 *
AnnaBridge 161:aa5281ff4a02 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 161:aa5281ff4a02 13 * not use this file except in compliance with the License.
AnnaBridge 161:aa5281ff4a02 14 * You may obtain a copy of the License at
AnnaBridge 161:aa5281ff4a02 15 *
AnnaBridge 161:aa5281ff4a02 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 161:aa5281ff4a02 17 *
AnnaBridge 161:aa5281ff4a02 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 161:aa5281ff4a02 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 161:aa5281ff4a02 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 161:aa5281ff4a02 21 * See the License for the specific language governing permissions and
AnnaBridge 161:aa5281ff4a02 22 * limitations under the License.
AnnaBridge 161:aa5281ff4a02 23 */
AnnaBridge 161:aa5281ff4a02 24
AnnaBridge 161:aa5281ff4a02 25 #ifndef __CMSIS_ARMCLANG_H
AnnaBridge 161:aa5281ff4a02 26 #define __CMSIS_ARMCLANG_H
AnnaBridge 161:aa5281ff4a02 27
AnnaBridge 161:aa5281ff4a02 28 #pragma clang system_header /* treat file as system include file */
AnnaBridge 161:aa5281ff4a02 29
AnnaBridge 161:aa5281ff4a02 30 #ifndef __ARM_COMPAT_H
Anna Bridge 169:a7c7b631e539 31 #include <arm_compat.h> /* Compatibility header for Arm Compiler 5 intrinsics */
AnnaBridge 161:aa5281ff4a02 32 #endif
AnnaBridge 161:aa5281ff4a02 33
AnnaBridge 161:aa5281ff4a02 34 /* CMSIS compiler specific defines */
AnnaBridge 161:aa5281ff4a02 35 #ifndef __ASM
AnnaBridge 161:aa5281ff4a02 36 #define __ASM __asm
AnnaBridge 161:aa5281ff4a02 37 #endif
AnnaBridge 161:aa5281ff4a02 38 #ifndef __INLINE
AnnaBridge 161:aa5281ff4a02 39 #define __INLINE __inline
AnnaBridge 161:aa5281ff4a02 40 #endif
AnnaBridge 161:aa5281ff4a02 41 #ifndef __FORCEINLINE
AnnaBridge 161:aa5281ff4a02 42 #define __FORCEINLINE __attribute__((always_inline))
AnnaBridge 161:aa5281ff4a02 43 #endif
AnnaBridge 161:aa5281ff4a02 44 #ifndef __STATIC_INLINE
AnnaBridge 161:aa5281ff4a02 45 #define __STATIC_INLINE static __inline
AnnaBridge 161:aa5281ff4a02 46 #endif
AnnaBridge 161:aa5281ff4a02 47 #ifndef __STATIC_FORCEINLINE
AnnaBridge 161:aa5281ff4a02 48 #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline
AnnaBridge 161:aa5281ff4a02 49 #endif
AnnaBridge 161:aa5281ff4a02 50 #ifndef __NO_RETURN
AnnaBridge 161:aa5281ff4a02 51 #define __NO_RETURN __attribute__((__noreturn__))
AnnaBridge 161:aa5281ff4a02 52 #endif
AnnaBridge 161:aa5281ff4a02 53 #ifndef CMSIS_DEPRECATED
AnnaBridge 161:aa5281ff4a02 54 #define CMSIS_DEPRECATED __attribute__((deprecated))
AnnaBridge 161:aa5281ff4a02 55 #endif
AnnaBridge 161:aa5281ff4a02 56 #ifndef __USED
AnnaBridge 161:aa5281ff4a02 57 #define __USED __attribute__((used))
AnnaBridge 161:aa5281ff4a02 58 #endif
AnnaBridge 161:aa5281ff4a02 59 #ifndef __WEAK
AnnaBridge 161:aa5281ff4a02 60 #define __WEAK __attribute__((weak))
AnnaBridge 161:aa5281ff4a02 61 #endif
AnnaBridge 161:aa5281ff4a02 62 #ifndef __PACKED
AnnaBridge 161:aa5281ff4a02 63 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 161:aa5281ff4a02 64 #endif
AnnaBridge 161:aa5281ff4a02 65 #ifndef __PACKED_STRUCT
AnnaBridge 161:aa5281ff4a02 66 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 161:aa5281ff4a02 67 #endif
AnnaBridge 161:aa5281ff4a02 68 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 161:aa5281ff4a02 69 #pragma clang diagnostic push
AnnaBridge 161:aa5281ff4a02 70 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 71 /*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
AnnaBridge 161:aa5281ff4a02 72 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 161:aa5281ff4a02 73 #pragma clang diagnostic pop
AnnaBridge 161:aa5281ff4a02 74 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 161:aa5281ff4a02 75 #endif
AnnaBridge 161:aa5281ff4a02 76 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 161:aa5281ff4a02 77 #pragma clang diagnostic push
AnnaBridge 161:aa5281ff4a02 78 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 79 /*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
AnnaBridge 161:aa5281ff4a02 80 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 161:aa5281ff4a02 81 #pragma clang diagnostic pop
AnnaBridge 161:aa5281ff4a02 82 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 161:aa5281ff4a02 83 #endif
AnnaBridge 161:aa5281ff4a02 84 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 161:aa5281ff4a02 85 #pragma clang diagnostic push
AnnaBridge 161:aa5281ff4a02 86 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 87 /*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
AnnaBridge 161:aa5281ff4a02 88 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 161:aa5281ff4a02 89 #pragma clang diagnostic pop
AnnaBridge 161:aa5281ff4a02 90 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 161:aa5281ff4a02 91 #endif
AnnaBridge 161:aa5281ff4a02 92 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 161:aa5281ff4a02 93 #pragma clang diagnostic push
AnnaBridge 161:aa5281ff4a02 94 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 161:aa5281ff4a02 95 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 161:aa5281ff4a02 96 #pragma clang diagnostic pop
AnnaBridge 161:aa5281ff4a02 97 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 161:aa5281ff4a02 98 #endif
AnnaBridge 161:aa5281ff4a02 99 #ifndef __ALIGNED
AnnaBridge 161:aa5281ff4a02 100 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 161:aa5281ff4a02 101 #endif
AnnaBridge 161:aa5281ff4a02 102 #ifndef __PACKED
AnnaBridge 161:aa5281ff4a02 103 #define __PACKED __attribute__((packed))
AnnaBridge 161:aa5281ff4a02 104 #endif
AnnaBridge 161:aa5281ff4a02 105
AnnaBridge 161:aa5281ff4a02 106 /* ########################## Core Instruction Access ######################### */
AnnaBridge 161:aa5281ff4a02 107 /**
AnnaBridge 161:aa5281ff4a02 108 \brief No Operation
AnnaBridge 161:aa5281ff4a02 109 */
AnnaBridge 161:aa5281ff4a02 110 #define __NOP __builtin_arm_nop
AnnaBridge 161:aa5281ff4a02 111
AnnaBridge 161:aa5281ff4a02 112 /**
AnnaBridge 161:aa5281ff4a02 113 \brief Wait For Interrupt
AnnaBridge 161:aa5281ff4a02 114 */
AnnaBridge 161:aa5281ff4a02 115 #define __WFI __builtin_arm_wfi
AnnaBridge 161:aa5281ff4a02 116
AnnaBridge 161:aa5281ff4a02 117 /**
AnnaBridge 161:aa5281ff4a02 118 \brief Wait For Event
AnnaBridge 161:aa5281ff4a02 119 */
AnnaBridge 161:aa5281ff4a02 120 #define __WFE __builtin_arm_wfe
AnnaBridge 161:aa5281ff4a02 121
AnnaBridge 161:aa5281ff4a02 122 /**
AnnaBridge 161:aa5281ff4a02 123 \brief Send Event
AnnaBridge 161:aa5281ff4a02 124 */
AnnaBridge 161:aa5281ff4a02 125 #define __SEV __builtin_arm_sev
AnnaBridge 161:aa5281ff4a02 126
AnnaBridge 161:aa5281ff4a02 127 /**
AnnaBridge 161:aa5281ff4a02 128 \brief Instruction Synchronization Barrier
AnnaBridge 161:aa5281ff4a02 129 */
AnnaBridge 161:aa5281ff4a02 130 #define __ISB() do {\
AnnaBridge 161:aa5281ff4a02 131 __schedule_barrier();\
AnnaBridge 161:aa5281ff4a02 132 __builtin_arm_isb(0xF);\
AnnaBridge 161:aa5281ff4a02 133 __schedule_barrier();\
AnnaBridge 161:aa5281ff4a02 134 } while (0U)
AnnaBridge 161:aa5281ff4a02 135
AnnaBridge 161:aa5281ff4a02 136 /**
AnnaBridge 161:aa5281ff4a02 137 \brief Data Synchronization Barrier
AnnaBridge 161:aa5281ff4a02 138 */
AnnaBridge 161:aa5281ff4a02 139 #define __DSB() do {\
AnnaBridge 161:aa5281ff4a02 140 __schedule_barrier();\
AnnaBridge 161:aa5281ff4a02 141 __builtin_arm_dsb(0xF);\
AnnaBridge 161:aa5281ff4a02 142 __schedule_barrier();\
AnnaBridge 161:aa5281ff4a02 143 } while (0U)
AnnaBridge 161:aa5281ff4a02 144
AnnaBridge 161:aa5281ff4a02 145 /**
AnnaBridge 161:aa5281ff4a02 146 \brief Data Memory Barrier
AnnaBridge 161:aa5281ff4a02 147 */
AnnaBridge 161:aa5281ff4a02 148 #define __DMB() do {\
AnnaBridge 161:aa5281ff4a02 149 __schedule_barrier();\
AnnaBridge 161:aa5281ff4a02 150 __builtin_arm_dmb(0xF);\
AnnaBridge 161:aa5281ff4a02 151 __schedule_barrier();\
AnnaBridge 161:aa5281ff4a02 152 } while (0U)
AnnaBridge 161:aa5281ff4a02 153
AnnaBridge 161:aa5281ff4a02 154 /**
AnnaBridge 161:aa5281ff4a02 155 \brief Reverse byte order (32 bit)
AnnaBridge 161:aa5281ff4a02 156 \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
AnnaBridge 161:aa5281ff4a02 157 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 158 \return Reversed value
AnnaBridge 161:aa5281ff4a02 159 */
AnnaBridge 161:aa5281ff4a02 160 #define __REV(value) __builtin_bswap32(value)
AnnaBridge 161:aa5281ff4a02 161
AnnaBridge 161:aa5281ff4a02 162 /**
AnnaBridge 161:aa5281ff4a02 163 \brief Reverse byte order (16 bit)
AnnaBridge 161:aa5281ff4a02 164 \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
AnnaBridge 161:aa5281ff4a02 165 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 166 \return Reversed value
AnnaBridge 161:aa5281ff4a02 167 */
AnnaBridge 161:aa5281ff4a02 168 #define __REV16(value) __ROR(__REV(value), 16)
AnnaBridge 161:aa5281ff4a02 169
AnnaBridge 161:aa5281ff4a02 170
AnnaBridge 161:aa5281ff4a02 171 /**
AnnaBridge 161:aa5281ff4a02 172 \brief Reverse byte order (16 bit)
AnnaBridge 161:aa5281ff4a02 173 \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
AnnaBridge 161:aa5281ff4a02 174 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 175 \return Reversed value
AnnaBridge 161:aa5281ff4a02 176 */
AnnaBridge 161:aa5281ff4a02 177 #define __REVSH(value) (int16_t)__builtin_bswap16(value)
AnnaBridge 161:aa5281ff4a02 178
AnnaBridge 161:aa5281ff4a02 179
AnnaBridge 161:aa5281ff4a02 180 /**
AnnaBridge 161:aa5281ff4a02 181 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 161:aa5281ff4a02 182 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 161:aa5281ff4a02 183 \param [in] op1 Value to rotate
AnnaBridge 161:aa5281ff4a02 184 \param [in] op2 Number of Bits to rotate
AnnaBridge 161:aa5281ff4a02 185 \return Rotated value
AnnaBridge 161:aa5281ff4a02 186 */
AnnaBridge 161:aa5281ff4a02 187 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 161:aa5281ff4a02 188 {
AnnaBridge 161:aa5281ff4a02 189 op2 %= 32U;
AnnaBridge 161:aa5281ff4a02 190 if (op2 == 0U)
AnnaBridge 161:aa5281ff4a02 191 {
AnnaBridge 161:aa5281ff4a02 192 return op1;
AnnaBridge 161:aa5281ff4a02 193 }
AnnaBridge 161:aa5281ff4a02 194 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 161:aa5281ff4a02 195 }
AnnaBridge 161:aa5281ff4a02 196
AnnaBridge 161:aa5281ff4a02 197
AnnaBridge 161:aa5281ff4a02 198 /**
AnnaBridge 161:aa5281ff4a02 199 \brief Breakpoint
AnnaBridge 161:aa5281ff4a02 200 \param [in] value is ignored by the processor.
AnnaBridge 161:aa5281ff4a02 201 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 161:aa5281ff4a02 202 */
AnnaBridge 161:aa5281ff4a02 203 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 161:aa5281ff4a02 204
AnnaBridge 161:aa5281ff4a02 205 /**
AnnaBridge 161:aa5281ff4a02 206 \brief Reverse bit order of value
AnnaBridge 161:aa5281ff4a02 207 \param [in] value Value to reverse
AnnaBridge 161:aa5281ff4a02 208 \return Reversed value
AnnaBridge 161:aa5281ff4a02 209 */
AnnaBridge 161:aa5281ff4a02 210 #define __RBIT __builtin_arm_rbit
AnnaBridge 161:aa5281ff4a02 211
AnnaBridge 161:aa5281ff4a02 212 /**
AnnaBridge 161:aa5281ff4a02 213 \brief Count leading zeros
AnnaBridge 161:aa5281ff4a02 214 \param [in] value Value to count the leading zeros
AnnaBridge 161:aa5281ff4a02 215 \return number of leading zeros in value
AnnaBridge 161:aa5281ff4a02 216 */
AnnaBridge 161:aa5281ff4a02 217 #define __CLZ (uint8_t)__builtin_clz
AnnaBridge 161:aa5281ff4a02 218
AnnaBridge 161:aa5281ff4a02 219 /**
AnnaBridge 161:aa5281ff4a02 220 \brief LDR Exclusive (8 bit)
AnnaBridge 161:aa5281ff4a02 221 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 161:aa5281ff4a02 222 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 223 \return value of type uint8_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 224 */
AnnaBridge 161:aa5281ff4a02 225 #define __LDREXB (uint8_t)__builtin_arm_ldrex
AnnaBridge 161:aa5281ff4a02 226
AnnaBridge 161:aa5281ff4a02 227
AnnaBridge 161:aa5281ff4a02 228 /**
AnnaBridge 161:aa5281ff4a02 229 \brief LDR Exclusive (16 bit)
AnnaBridge 161:aa5281ff4a02 230 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 231 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 232 \return value of type uint16_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 233 */
AnnaBridge 161:aa5281ff4a02 234 #define __LDREXH (uint16_t)__builtin_arm_ldrex
AnnaBridge 161:aa5281ff4a02 235
AnnaBridge 161:aa5281ff4a02 236 /**
AnnaBridge 161:aa5281ff4a02 237 \brief LDR Exclusive (32 bit)
AnnaBridge 161:aa5281ff4a02 238 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 239 \param [in] ptr Pointer to data
AnnaBridge 161:aa5281ff4a02 240 \return value of type uint32_t at (*ptr)
AnnaBridge 161:aa5281ff4a02 241 */
AnnaBridge 161:aa5281ff4a02 242 #define __LDREXW (uint32_t)__builtin_arm_ldrex
AnnaBridge 161:aa5281ff4a02 243
AnnaBridge 161:aa5281ff4a02 244 /**
AnnaBridge 161:aa5281ff4a02 245 \brief STR Exclusive (8 bit)
AnnaBridge 161:aa5281ff4a02 246 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 161:aa5281ff4a02 247 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 248 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 249 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 250 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 251 */
AnnaBridge 161:aa5281ff4a02 252 #define __STREXB (uint32_t)__builtin_arm_strex
AnnaBridge 161:aa5281ff4a02 253
AnnaBridge 161:aa5281ff4a02 254 /**
AnnaBridge 161:aa5281ff4a02 255 \brief STR Exclusive (16 bit)
AnnaBridge 161:aa5281ff4a02 256 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 161:aa5281ff4a02 257 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 258 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 259 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 260 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 261 */
AnnaBridge 161:aa5281ff4a02 262 #define __STREXH (uint32_t)__builtin_arm_strex
AnnaBridge 161:aa5281ff4a02 263
AnnaBridge 161:aa5281ff4a02 264 /**
AnnaBridge 161:aa5281ff4a02 265 \brief STR Exclusive (32 bit)
AnnaBridge 161:aa5281ff4a02 266 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 161:aa5281ff4a02 267 \param [in] value Value to store
AnnaBridge 161:aa5281ff4a02 268 \param [in] ptr Pointer to location
AnnaBridge 161:aa5281ff4a02 269 \return 0 Function succeeded
AnnaBridge 161:aa5281ff4a02 270 \return 1 Function failed
AnnaBridge 161:aa5281ff4a02 271 */
AnnaBridge 161:aa5281ff4a02 272 #define __STREXW (uint32_t)__builtin_arm_strex
AnnaBridge 161:aa5281ff4a02 273
AnnaBridge 161:aa5281ff4a02 274 /**
AnnaBridge 161:aa5281ff4a02 275 \brief Remove the exclusive lock
AnnaBridge 161:aa5281ff4a02 276 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 161:aa5281ff4a02 277 */
AnnaBridge 161:aa5281ff4a02 278 #define __CLREX __builtin_arm_clrex
AnnaBridge 161:aa5281ff4a02 279
AnnaBridge 161:aa5281ff4a02 280 /**
AnnaBridge 161:aa5281ff4a02 281 \brief Signed Saturate
AnnaBridge 161:aa5281ff4a02 282 \details Saturates a signed value.
AnnaBridge 161:aa5281ff4a02 283 \param [in] value Value to be saturated
AnnaBridge 161:aa5281ff4a02 284 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 161:aa5281ff4a02 285 \return Saturated value
AnnaBridge 161:aa5281ff4a02 286 */
AnnaBridge 161:aa5281ff4a02 287 #define __SSAT __builtin_arm_ssat
AnnaBridge 161:aa5281ff4a02 288
AnnaBridge 161:aa5281ff4a02 289 /**
AnnaBridge 161:aa5281ff4a02 290 \brief Unsigned Saturate
AnnaBridge 161:aa5281ff4a02 291 \details Saturates an unsigned value.
AnnaBridge 161:aa5281ff4a02 292 \param [in] value Value to be saturated
AnnaBridge 161:aa5281ff4a02 293 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 161:aa5281ff4a02 294 \return Saturated value
AnnaBridge 161:aa5281ff4a02 295 */
AnnaBridge 161:aa5281ff4a02 296 #define __USAT __builtin_arm_usat
AnnaBridge 161:aa5281ff4a02 297
AnnaBridge 161:aa5281ff4a02 298
AnnaBridge 161:aa5281ff4a02 299 /* ########################### Core Function Access ########################### */
AnnaBridge 161:aa5281ff4a02 300
AnnaBridge 161:aa5281ff4a02 301 /**
AnnaBridge 161:aa5281ff4a02 302 \brief Get FPSCR
AnnaBridge 161:aa5281ff4a02 303 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 161:aa5281ff4a02 304 \return Floating Point Status/Control register value
AnnaBridge 161:aa5281ff4a02 305 */
AnnaBridge 161:aa5281ff4a02 306 #define __get_FPSCR __builtin_arm_get_fpscr
AnnaBridge 161:aa5281ff4a02 307
AnnaBridge 161:aa5281ff4a02 308 /**
AnnaBridge 161:aa5281ff4a02 309 \brief Set FPSCR
AnnaBridge 161:aa5281ff4a02 310 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 161:aa5281ff4a02 311 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 161:aa5281ff4a02 312 */
AnnaBridge 161:aa5281ff4a02 313 #define __set_FPSCR __builtin_arm_set_fpscr
AnnaBridge 161:aa5281ff4a02 314
AnnaBridge 161:aa5281ff4a02 315 /** \brief Get CPSR Register
AnnaBridge 161:aa5281ff4a02 316 \return CPSR Register value
AnnaBridge 161:aa5281ff4a02 317 */
AnnaBridge 161:aa5281ff4a02 318 __STATIC_FORCEINLINE uint32_t __get_CPSR(void)
AnnaBridge 161:aa5281ff4a02 319 {
AnnaBridge 161:aa5281ff4a02 320 uint32_t result;
AnnaBridge 161:aa5281ff4a02 321 __ASM volatile("MRS %0, cpsr" : "=r" (result) );
AnnaBridge 161:aa5281ff4a02 322 return(result);
AnnaBridge 161:aa5281ff4a02 323 }
AnnaBridge 161:aa5281ff4a02 324
AnnaBridge 161:aa5281ff4a02 325 /** \brief Set CPSR Register
AnnaBridge 161:aa5281ff4a02 326 \param [in] cpsr CPSR value to set
AnnaBridge 161:aa5281ff4a02 327 */
AnnaBridge 161:aa5281ff4a02 328 __STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
AnnaBridge 161:aa5281ff4a02 329 {
AnnaBridge 161:aa5281ff4a02 330 __ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "memory");
AnnaBridge 161:aa5281ff4a02 331 }
AnnaBridge 161:aa5281ff4a02 332
AnnaBridge 161:aa5281ff4a02 333 /** \brief Get Mode
AnnaBridge 161:aa5281ff4a02 334 \return Processor Mode
AnnaBridge 161:aa5281ff4a02 335 */
AnnaBridge 161:aa5281ff4a02 336 __STATIC_FORCEINLINE uint32_t __get_mode(void)
AnnaBridge 161:aa5281ff4a02 337 {
AnnaBridge 161:aa5281ff4a02 338 return (__get_CPSR() & 0x1FU);
AnnaBridge 161:aa5281ff4a02 339 }
AnnaBridge 161:aa5281ff4a02 340
AnnaBridge 161:aa5281ff4a02 341 /** \brief Set Mode
AnnaBridge 161:aa5281ff4a02 342 \param [in] mode Mode value to set
AnnaBridge 161:aa5281ff4a02 343 */
AnnaBridge 161:aa5281ff4a02 344 __STATIC_FORCEINLINE void __set_mode(uint32_t mode)
AnnaBridge 161:aa5281ff4a02 345 {
AnnaBridge 161:aa5281ff4a02 346 __ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory");
AnnaBridge 161:aa5281ff4a02 347 }
AnnaBridge 161:aa5281ff4a02 348
AnnaBridge 161:aa5281ff4a02 349 /** \brief Get Stack Pointer
AnnaBridge 161:aa5281ff4a02 350 \return Stack Pointer value
AnnaBridge 161:aa5281ff4a02 351 */
AnnaBridge 161:aa5281ff4a02 352 __STATIC_FORCEINLINE uint32_t __get_SP()
AnnaBridge 161:aa5281ff4a02 353 {
AnnaBridge 161:aa5281ff4a02 354 uint32_t result;
AnnaBridge 161:aa5281ff4a02 355 __ASM volatile("MOV %0, sp" : "=r" (result) : : "memory");
AnnaBridge 161:aa5281ff4a02 356 return result;
AnnaBridge 161:aa5281ff4a02 357 }
AnnaBridge 161:aa5281ff4a02 358
AnnaBridge 161:aa5281ff4a02 359 /** \brief Set Stack Pointer
AnnaBridge 161:aa5281ff4a02 360 \param [in] stack Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 361 */
AnnaBridge 161:aa5281ff4a02 362 __STATIC_FORCEINLINE void __set_SP(uint32_t stack)
AnnaBridge 161:aa5281ff4a02 363 {
AnnaBridge 161:aa5281ff4a02 364 __ASM volatile("MOV sp, %0" : : "r" (stack) : "memory");
AnnaBridge 161:aa5281ff4a02 365 }
AnnaBridge 161:aa5281ff4a02 366
AnnaBridge 161:aa5281ff4a02 367 /** \brief Get USR/SYS Stack Pointer
AnnaBridge 161:aa5281ff4a02 368 \return USR/SYS Stack Pointer value
AnnaBridge 161:aa5281ff4a02 369 */
AnnaBridge 161:aa5281ff4a02 370 __STATIC_FORCEINLINE uint32_t __get_SP_usr()
AnnaBridge 161:aa5281ff4a02 371 {
AnnaBridge 161:aa5281ff4a02 372 uint32_t cpsr;
AnnaBridge 161:aa5281ff4a02 373 uint32_t result;
AnnaBridge 161:aa5281ff4a02 374 __ASM volatile(
AnnaBridge 161:aa5281ff4a02 375 "MRS %0, cpsr \n"
AnnaBridge 161:aa5281ff4a02 376 "CPS #0x1F \n" // no effect in USR mode
AnnaBridge 161:aa5281ff4a02 377 "MOV %1, sp \n"
AnnaBridge 161:aa5281ff4a02 378 "MSR cpsr_c, %2 \n" // no effect in USR mode
AnnaBridge 161:aa5281ff4a02 379 "ISB" : "=r"(cpsr), "=r"(result) : "r"(cpsr) : "memory"
AnnaBridge 161:aa5281ff4a02 380 );
AnnaBridge 161:aa5281ff4a02 381 return result;
AnnaBridge 161:aa5281ff4a02 382 }
AnnaBridge 161:aa5281ff4a02 383
AnnaBridge 161:aa5281ff4a02 384 /** \brief Set USR/SYS Stack Pointer
AnnaBridge 161:aa5281ff4a02 385 \param [in] topOfProcStack USR/SYS Stack Pointer value to set
AnnaBridge 161:aa5281ff4a02 386 */
AnnaBridge 161:aa5281ff4a02 387 __STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
AnnaBridge 161:aa5281ff4a02 388 {
AnnaBridge 161:aa5281ff4a02 389 uint32_t cpsr;
AnnaBridge 161:aa5281ff4a02 390 __ASM volatile(
AnnaBridge 161:aa5281ff4a02 391 "MRS %0, cpsr \n"
AnnaBridge 161:aa5281ff4a02 392 "CPS #0x1F \n" // no effect in USR mode
AnnaBridge 161:aa5281ff4a02 393 "MOV sp, %1 \n"
AnnaBridge 161:aa5281ff4a02 394 "MSR cpsr_c, %2 \n" // no effect in USR mode
AnnaBridge 161:aa5281ff4a02 395 "ISB" : "=r"(cpsr) : "r" (topOfProcStack), "r"(cpsr) : "memory"
AnnaBridge 161:aa5281ff4a02 396 );
AnnaBridge 161:aa5281ff4a02 397 }
AnnaBridge 161:aa5281ff4a02 398
AnnaBridge 161:aa5281ff4a02 399 /** \brief Get FPEXC
AnnaBridge 161:aa5281ff4a02 400 \return Floating Point Exception Control register value
AnnaBridge 161:aa5281ff4a02 401 */
AnnaBridge 161:aa5281ff4a02 402 __STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
AnnaBridge 161:aa5281ff4a02 403 {
AnnaBridge 161:aa5281ff4a02 404 #if (__FPU_PRESENT == 1)
AnnaBridge 161:aa5281ff4a02 405 uint32_t result;
AnnaBridge 161:aa5281ff4a02 406 __ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory");
AnnaBridge 161:aa5281ff4a02 407 return(result);
AnnaBridge 161:aa5281ff4a02 408 #else
AnnaBridge 161:aa5281ff4a02 409 return(0);
AnnaBridge 161:aa5281ff4a02 410 #endif
AnnaBridge 161:aa5281ff4a02 411 }
AnnaBridge 161:aa5281ff4a02 412
AnnaBridge 161:aa5281ff4a02 413 /** \brief Set FPEXC
AnnaBridge 161:aa5281ff4a02 414 \param [in] fpexc Floating Point Exception Control value to set
AnnaBridge 161:aa5281ff4a02 415 */
AnnaBridge 161:aa5281ff4a02 416 __STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
AnnaBridge 161:aa5281ff4a02 417 {
AnnaBridge 161:aa5281ff4a02 418 #if (__FPU_PRESENT == 1)
AnnaBridge 161:aa5281ff4a02 419 __ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
AnnaBridge 161:aa5281ff4a02 420 #endif
AnnaBridge 161:aa5281ff4a02 421 }
AnnaBridge 161:aa5281ff4a02 422
AnnaBridge 161:aa5281ff4a02 423 /*
AnnaBridge 161:aa5281ff4a02 424 * Include common core functions to access Coprocessor 15 registers
AnnaBridge 161:aa5281ff4a02 425 */
AnnaBridge 161:aa5281ff4a02 426
AnnaBridge 161:aa5281ff4a02 427 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
AnnaBridge 161:aa5281ff4a02 428 #define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
AnnaBridge 161:aa5281ff4a02 429 #define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" )
AnnaBridge 161:aa5281ff4a02 430 #define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" )
AnnaBridge 161:aa5281ff4a02 431
AnnaBridge 161:aa5281ff4a02 432 #include "cmsis_cp15.h"
AnnaBridge 161:aa5281ff4a02 433
AnnaBridge 161:aa5281ff4a02 434 /** \brief Enable Floating Point Unit
AnnaBridge 161:aa5281ff4a02 435
AnnaBridge 161:aa5281ff4a02 436 Critical section, called from undef handler, so systick is disabled
AnnaBridge 161:aa5281ff4a02 437 */
AnnaBridge 161:aa5281ff4a02 438 __STATIC_INLINE void __FPU_Enable(void)
AnnaBridge 161:aa5281ff4a02 439 {
AnnaBridge 161:aa5281ff4a02 440 __ASM volatile(
AnnaBridge 161:aa5281ff4a02 441 //Permit access to VFP/NEON, registers by modifying CPACR
AnnaBridge 161:aa5281ff4a02 442 " MRC p15,0,R1,c1,c0,2 \n"
AnnaBridge 161:aa5281ff4a02 443 " ORR R1,R1,#0x00F00000 \n"
AnnaBridge 161:aa5281ff4a02 444 " MCR p15,0,R1,c1,c0,2 \n"
AnnaBridge 161:aa5281ff4a02 445
AnnaBridge 161:aa5281ff4a02 446 //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted
AnnaBridge 161:aa5281ff4a02 447 " ISB \n"
AnnaBridge 161:aa5281ff4a02 448
AnnaBridge 161:aa5281ff4a02 449 //Enable VFP/NEON
AnnaBridge 161:aa5281ff4a02 450 " VMRS R1,FPEXC \n"
AnnaBridge 161:aa5281ff4a02 451 " ORR R1,R1,#0x40000000 \n"
AnnaBridge 161:aa5281ff4a02 452 " VMSR FPEXC,R1 \n"
AnnaBridge 161:aa5281ff4a02 453
AnnaBridge 161:aa5281ff4a02 454 //Initialise VFP/NEON registers to 0
AnnaBridge 161:aa5281ff4a02 455 " MOV R2,#0 \n"
AnnaBridge 161:aa5281ff4a02 456
AnnaBridge 161:aa5281ff4a02 457 //Initialise D16 registers to 0
AnnaBridge 161:aa5281ff4a02 458 " VMOV D0, R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 459 " VMOV D1, R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 460 " VMOV D2, R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 461 " VMOV D3, R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 462 " VMOV D4, R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 463 " VMOV D5, R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 464 " VMOV D6, R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 465 " VMOV D7, R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 466 " VMOV D8, R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 467 " VMOV D9, R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 468 " VMOV D10,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 469 " VMOV D11,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 470 " VMOV D12,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 471 " VMOV D13,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 472 " VMOV D14,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 473 " VMOV D15,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 474
AnnaBridge 161:aa5281ff4a02 475 #if __ARM_NEON == 1
AnnaBridge 161:aa5281ff4a02 476 //Initialise D32 registers to 0
AnnaBridge 161:aa5281ff4a02 477 " VMOV D16,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 478 " VMOV D17,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 479 " VMOV D18,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 480 " VMOV D19,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 481 " VMOV D20,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 482 " VMOV D21,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 483 " VMOV D22,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 484 " VMOV D23,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 485 " VMOV D24,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 486 " VMOV D25,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 487 " VMOV D26,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 488 " VMOV D27,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 489 " VMOV D28,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 490 " VMOV D29,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 491 " VMOV D30,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 492 " VMOV D31,R2,R2 \n"
AnnaBridge 161:aa5281ff4a02 493 #endif
AnnaBridge 161:aa5281ff4a02 494
AnnaBridge 161:aa5281ff4a02 495 //Initialise FPSCR to a known state
AnnaBridge 161:aa5281ff4a02 496 " VMRS R2,FPSCR \n"
AnnaBridge 161:aa5281ff4a02 497 " LDR R3,=0x00086060 \n" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero.
AnnaBridge 161:aa5281ff4a02 498 " AND R2,R2,R3 \n"
AnnaBridge 161:aa5281ff4a02 499 " VMSR FPSCR,R2 "
AnnaBridge 161:aa5281ff4a02 500 );
AnnaBridge 161:aa5281ff4a02 501 }
AnnaBridge 161:aa5281ff4a02 502
AnnaBridge 161:aa5281ff4a02 503 #endif /* __CMSIS_ARMCLANG_H */