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TARGET_NUCLEO_F091RC/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_ll_gpio.h@157:e7ca05fa8600, 2017-11-09 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 09 11:14:10 2017 +0000
Revision:
157:e7ca05fa8600
Parent:
134:ad3be0349dc5
Child:
160:5571c4ff569f
Release 155 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 134:ad3be0349dc5 1 /**
<> 134:ad3be0349dc5 2 ******************************************************************************
<> 134:ad3be0349dc5 3 * @file stm32f0xx_ll_gpio.h
<> 134:ad3be0349dc5 4 * @author MCD Application Team
<> 134:ad3be0349dc5 5 * @version V1.4.0
<> 134:ad3be0349dc5 6 * @date 27-May-2016
<> 134:ad3be0349dc5 7 * @brief Header file of GPIO LL module.
<> 134:ad3be0349dc5 8 ******************************************************************************
<> 134:ad3be0349dc5 9 * @attention
<> 134:ad3be0349dc5 10 *
<> 134:ad3be0349dc5 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 134:ad3be0349dc5 12 *
<> 134:ad3be0349dc5 13 * Redistribution and use in source and binary forms, with or without modification,
<> 134:ad3be0349dc5 14 * are permitted provided that the following conditions are met:
<> 134:ad3be0349dc5 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 134:ad3be0349dc5 16 * this list of conditions and the following disclaimer.
<> 134:ad3be0349dc5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 134:ad3be0349dc5 18 * this list of conditions and the following disclaimer in the documentation
<> 134:ad3be0349dc5 19 * and/or other materials provided with the distribution.
<> 134:ad3be0349dc5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 134:ad3be0349dc5 21 * may be used to endorse or promote products derived from this software
<> 134:ad3be0349dc5 22 * without specific prior written permission.
<> 134:ad3be0349dc5 23 *
<> 134:ad3be0349dc5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 134:ad3be0349dc5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 134:ad3be0349dc5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 134:ad3be0349dc5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 134:ad3be0349dc5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 134:ad3be0349dc5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 134:ad3be0349dc5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 134:ad3be0349dc5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 134:ad3be0349dc5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 134:ad3be0349dc5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 134:ad3be0349dc5 34 *
<> 134:ad3be0349dc5 35 ******************************************************************************
<> 134:ad3be0349dc5 36 */
<> 134:ad3be0349dc5 37
<> 134:ad3be0349dc5 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 134:ad3be0349dc5 39 #ifndef __STM32F0xx_LL_GPIO_H
<> 134:ad3be0349dc5 40 #define __STM32F0xx_LL_GPIO_H
<> 134:ad3be0349dc5 41
<> 134:ad3be0349dc5 42 #ifdef __cplusplus
<> 134:ad3be0349dc5 43 extern "C" {
<> 134:ad3be0349dc5 44 #endif
<> 134:ad3be0349dc5 45
<> 134:ad3be0349dc5 46 /* Includes ------------------------------------------------------------------*/
<> 134:ad3be0349dc5 47 #include "stm32f0xx.h"
<> 134:ad3be0349dc5 48
<> 134:ad3be0349dc5 49 /** @addtogroup STM32F0xx_LL_Driver
<> 134:ad3be0349dc5 50 * @{
<> 134:ad3be0349dc5 51 */
<> 134:ad3be0349dc5 52
<> 134:ad3be0349dc5 53 #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF)
<> 134:ad3be0349dc5 54
<> 134:ad3be0349dc5 55 /** @defgroup GPIO_LL GPIO
<> 134:ad3be0349dc5 56 * @{
<> 134:ad3be0349dc5 57 */
<> 134:ad3be0349dc5 58
<> 134:ad3be0349dc5 59 /* Private types -------------------------------------------------------------*/
<> 134:ad3be0349dc5 60 /* Private variables ---------------------------------------------------------*/
<> 134:ad3be0349dc5 61 /* Private constants ---------------------------------------------------------*/
<> 134:ad3be0349dc5 62 /* Private macros ------------------------------------------------------------*/
<> 134:ad3be0349dc5 63 #if defined(USE_FULL_LL_DRIVER)
<> 134:ad3be0349dc5 64 /** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
<> 134:ad3be0349dc5 65 * @{
<> 134:ad3be0349dc5 66 */
<> 134:ad3be0349dc5 67
<> 134:ad3be0349dc5 68 /**
<> 134:ad3be0349dc5 69 * @}
<> 134:ad3be0349dc5 70 */
<> 134:ad3be0349dc5 71 #endif /*USE_FULL_LL_DRIVER*/
<> 134:ad3be0349dc5 72
<> 134:ad3be0349dc5 73 /* Exported types ------------------------------------------------------------*/
<> 134:ad3be0349dc5 74 #if defined(USE_FULL_LL_DRIVER)
<> 134:ad3be0349dc5 75 /** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
<> 134:ad3be0349dc5 76 * @{
<> 134:ad3be0349dc5 77 */
<> 134:ad3be0349dc5 78
<> 134:ad3be0349dc5 79 /**
<> 134:ad3be0349dc5 80 * @brief LL GPIO Init Structure definition
<> 134:ad3be0349dc5 81 */
<> 134:ad3be0349dc5 82 typedef struct
<> 134:ad3be0349dc5 83 {
<> 134:ad3be0349dc5 84 uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
<> 134:ad3be0349dc5 85 This parameter can be any value of @ref GPIO_LL_EC_PIN */
<> 134:ad3be0349dc5 86
<> 134:ad3be0349dc5 87 uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
<> 134:ad3be0349dc5 88 This parameter can be a value of @ref GPIO_LL_EC_MODE.
<> 134:ad3be0349dc5 89
<> 134:ad3be0349dc5 90 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/
<> 134:ad3be0349dc5 91
<> 134:ad3be0349dc5 92 uint32_t Speed; /*!< Specifies the speed for the selected pins.
<> 134:ad3be0349dc5 93 This parameter can be a value of @ref GPIO_LL_EC_SPEED.
<> 134:ad3be0349dc5 94
<> 134:ad3be0349dc5 95 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/
<> 134:ad3be0349dc5 96
<> 134:ad3be0349dc5 97 uint32_t OutputType; /*!< Specifies the operating output type for the selected pins.
<> 134:ad3be0349dc5 98 This parameter can be a value of @ref GPIO_LL_EC_OUTPUT.
<> 134:ad3be0349dc5 99
<> 134:ad3be0349dc5 100 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/
<> 134:ad3be0349dc5 101
<> 134:ad3be0349dc5 102 uint32_t Pull; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
<> 134:ad3be0349dc5 103 This parameter can be a value of @ref GPIO_LL_EC_PULL.
<> 134:ad3be0349dc5 104
<> 134:ad3be0349dc5 105 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/
<> 134:ad3be0349dc5 106
<> 134:ad3be0349dc5 107 uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins.
<> 134:ad3be0349dc5 108 This parameter can be a value of @ref GPIO_LL_EC_AF.
<> 134:ad3be0349dc5 109
<> 134:ad3be0349dc5 110 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/
<> 134:ad3be0349dc5 111 } LL_GPIO_InitTypeDef;
<> 134:ad3be0349dc5 112
<> 134:ad3be0349dc5 113 /**
<> 134:ad3be0349dc5 114 * @}
<> 134:ad3be0349dc5 115 */
<> 134:ad3be0349dc5 116 #endif /* USE_FULL_LL_DRIVER */
<> 134:ad3be0349dc5 117
<> 134:ad3be0349dc5 118 /* Exported constants --------------------------------------------------------*/
<> 134:ad3be0349dc5 119 /** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
<> 134:ad3be0349dc5 120 * @{
<> 134:ad3be0349dc5 121 */
<> 134:ad3be0349dc5 122
<> 134:ad3be0349dc5 123 /** @defgroup GPIO_LL_EC_PIN PIN
<> 134:ad3be0349dc5 124 * @{
<> 134:ad3be0349dc5 125 */
<> 134:ad3be0349dc5 126 #define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */
<> 134:ad3be0349dc5 127 #define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */
<> 134:ad3be0349dc5 128 #define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */
<> 134:ad3be0349dc5 129 #define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */
<> 134:ad3be0349dc5 130 #define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */
<> 134:ad3be0349dc5 131 #define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */
<> 134:ad3be0349dc5 132 #define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */
<> 134:ad3be0349dc5 133 #define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */
<> 134:ad3be0349dc5 134 #define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */
<> 134:ad3be0349dc5 135 #define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */
<> 134:ad3be0349dc5 136 #define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */
<> 134:ad3be0349dc5 137 #define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */
<> 134:ad3be0349dc5 138 #define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */
<> 134:ad3be0349dc5 139 #define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */
<> 134:ad3be0349dc5 140 #define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */
<> 134:ad3be0349dc5 141 #define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */
<> 134:ad3be0349dc5 142 #define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \
<> 134:ad3be0349dc5 143 GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
<> 134:ad3be0349dc5 144 GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
<> 134:ad3be0349dc5 145 GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
<> 134:ad3be0349dc5 146 GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
<> 134:ad3be0349dc5 147 GPIO_BSRR_BS_15) /*!< Select all pins */
<> 134:ad3be0349dc5 148 /**
<> 134:ad3be0349dc5 149 * @}
<> 134:ad3be0349dc5 150 */
<> 134:ad3be0349dc5 151
<> 134:ad3be0349dc5 152 /** @defgroup GPIO_LL_EC_MODE Mode
<> 134:ad3be0349dc5 153 * @{
<> 134:ad3be0349dc5 154 */
<> 134:ad3be0349dc5 155 #define LL_GPIO_MODE_INPUT ((uint32_t)0x00000000U) /*!< Select input mode */
<> 134:ad3be0349dc5 156 #define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0 /*!< Select output mode */
<> 134:ad3be0349dc5 157 #define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1 /*!< Select alternate function mode */
<> 134:ad3be0349dc5 158 #define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0 /*!< Select analog mode */
<> 134:ad3be0349dc5 159 /**
<> 134:ad3be0349dc5 160 * @}
<> 134:ad3be0349dc5 161 */
<> 134:ad3be0349dc5 162
<> 134:ad3be0349dc5 163 /** @defgroup GPIO_LL_EC_OUTPUT Output Type
<> 134:ad3be0349dc5 164 * @{
<> 134:ad3be0349dc5 165 */
<> 134:ad3be0349dc5 166 #define LL_GPIO_OUTPUT_PUSHPULL ((uint32_t)0x00000000U) /*!< Select push-pull as output type */
<> 134:ad3be0349dc5 167 #define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
<> 134:ad3be0349dc5 168 /**
<> 134:ad3be0349dc5 169 * @}
<> 134:ad3be0349dc5 170 */
<> 134:ad3be0349dc5 171
<> 134:ad3be0349dc5 172 /** @defgroup GPIO_LL_EC_SPEED Output Speed
<> 134:ad3be0349dc5 173 * @{
<> 134:ad3be0349dc5 174 */
<> 134:ad3be0349dc5 175 #define LL_GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000U) /*!< Select I/O low output speed */
<> 134:ad3be0349dc5 176 #define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDR_OSPEEDR0_0 /*!< Select I/O medium output speed */
<> 134:ad3be0349dc5 177 #define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDR_OSPEEDR0_1 /*!< Select I/O fast output speed */
<> 134:ad3be0349dc5 178 #define LL_GPIO_SPEED_FREQ_VERY_HIGH GPIO_OSPEEDR_OSPEEDR0 /*!< Select I/O high output speed */
<> 134:ad3be0349dc5 179 /**
<> 134:ad3be0349dc5 180 * @}
<> 134:ad3be0349dc5 181 */
<> 134:ad3be0349dc5 182 #define LL_GPIO_SPEED_LOW LL_GPIO_SPEED_FREQ_LOW
<> 134:ad3be0349dc5 183 #define LL_GPIO_SPEED_MEDIUM LL_GPIO_SPEED_FREQ_MEDIUM
<> 134:ad3be0349dc5 184 #define LL_GPIO_SPEED_FAST LL_GPIO_SPEED_FREQ_HIGH
<> 134:ad3be0349dc5 185 #define LL_GPIO_SPEED_HIGH LL_GPIO_SPEED_FREQ_VERY_HIGH
<> 134:ad3be0349dc5 186
<> 134:ad3be0349dc5 187
<> 134:ad3be0349dc5 188 /** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
<> 134:ad3be0349dc5 189 * @{
<> 134:ad3be0349dc5 190 */
<> 134:ad3be0349dc5 191 #define LL_GPIO_PULL_NO ((uint32_t)0x00000000U) /*!< Select I/O no pull */
<> 134:ad3be0349dc5 192 #define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0 /*!< Select I/O pull up */
<> 134:ad3be0349dc5 193 #define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1 /*!< Select I/O pull down */
<> 134:ad3be0349dc5 194 /**
<> 134:ad3be0349dc5 195 * @}
<> 134:ad3be0349dc5 196 */
<> 134:ad3be0349dc5 197
<> 134:ad3be0349dc5 198 /** @defgroup GPIO_LL_EC_AF Alternate Function
<> 134:ad3be0349dc5 199 * @{
<> 134:ad3be0349dc5 200 */
<> 134:ad3be0349dc5 201 #define LL_GPIO_AF_0 ((uint32_t)0x0000000U) /*!< Select alternate function 0 */
<> 134:ad3be0349dc5 202 #define LL_GPIO_AF_1 ((uint32_t)0x0000001U) /*!< Select alternate function 1 */
<> 134:ad3be0349dc5 203 #define LL_GPIO_AF_2 ((uint32_t)0x0000002U) /*!< Select alternate function 2 */
<> 134:ad3be0349dc5 204 #define LL_GPIO_AF_3 ((uint32_t)0x0000003U) /*!< Select alternate function 3 */
<> 134:ad3be0349dc5 205 #define LL_GPIO_AF_4 ((uint32_t)0x0000004U) /*!< Select alternate function 4 */
<> 134:ad3be0349dc5 206 #define LL_GPIO_AF_5 ((uint32_t)0x0000005U) /*!< Select alternate function 5 */
<> 134:ad3be0349dc5 207 #define LL_GPIO_AF_6 ((uint32_t)0x0000006U) /*!< Select alternate function 6 */
<> 134:ad3be0349dc5 208 #define LL_GPIO_AF_7 ((uint32_t)0x0000007U) /*!< Select alternate function 7 */
<> 134:ad3be0349dc5 209 /**
<> 134:ad3be0349dc5 210 * @}
<> 134:ad3be0349dc5 211 */
<> 134:ad3be0349dc5 212
<> 134:ad3be0349dc5 213 /**
<> 134:ad3be0349dc5 214 * @}
<> 134:ad3be0349dc5 215 */
<> 134:ad3be0349dc5 216
<> 134:ad3be0349dc5 217 /* Exported macro ------------------------------------------------------------*/
<> 134:ad3be0349dc5 218 /** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
<> 134:ad3be0349dc5 219 * @{
<> 134:ad3be0349dc5 220 */
<> 134:ad3be0349dc5 221
<> 134:ad3be0349dc5 222 /** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
<> 134:ad3be0349dc5 223 * @{
<> 134:ad3be0349dc5 224 */
<> 134:ad3be0349dc5 225
<> 134:ad3be0349dc5 226 /**
<> 134:ad3be0349dc5 227 * @brief Write a value in GPIO register
<> 134:ad3be0349dc5 228 * @param __INSTANCE__ GPIO Instance
<> 134:ad3be0349dc5 229 * @param __REG__ Register to be written
<> 134:ad3be0349dc5 230 * @param __VALUE__ Value to be written in the register
<> 134:ad3be0349dc5 231 * @retval None
<> 134:ad3be0349dc5 232 */
<> 134:ad3be0349dc5 233 #define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 134:ad3be0349dc5 234
<> 134:ad3be0349dc5 235 /**
<> 134:ad3be0349dc5 236 * @brief Read a value in GPIO register
<> 134:ad3be0349dc5 237 * @param __INSTANCE__ GPIO Instance
<> 134:ad3be0349dc5 238 * @param __REG__ Register to be read
<> 134:ad3be0349dc5 239 * @retval Register value
<> 134:ad3be0349dc5 240 */
<> 134:ad3be0349dc5 241 #define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 134:ad3be0349dc5 242 /**
<> 134:ad3be0349dc5 243 * @}
<> 134:ad3be0349dc5 244 */
<> 134:ad3be0349dc5 245
<> 134:ad3be0349dc5 246 /**
<> 134:ad3be0349dc5 247 * @}
<> 134:ad3be0349dc5 248 */
<> 134:ad3be0349dc5 249
<> 134:ad3be0349dc5 250 /* Exported functions --------------------------------------------------------*/
<> 134:ad3be0349dc5 251 /** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
<> 134:ad3be0349dc5 252 * @{
<> 134:ad3be0349dc5 253 */
<> 134:ad3be0349dc5 254
<> 134:ad3be0349dc5 255 /** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
<> 134:ad3be0349dc5 256 * @{
<> 134:ad3be0349dc5 257 */
<> 134:ad3be0349dc5 258
<> 134:ad3be0349dc5 259 /**
<> 134:ad3be0349dc5 260 * @brief Configure gpio mode for a dedicated pin on dedicated port.
<> 134:ad3be0349dc5 261 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 134:ad3be0349dc5 262 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 263 * @rmtoll MODER MODEy LL_GPIO_SetPinMode
<> 134:ad3be0349dc5 264 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 265 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 266 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 267 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 268 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 269 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 270 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 271 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 272 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 273 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 274 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 275 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 276 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 277 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 278 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 279 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 280 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 281 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 282 * @param Mode This parameter can be one of the following values:
<> 134:ad3be0349dc5 283 * @arg @ref LL_GPIO_MODE_INPUT
<> 134:ad3be0349dc5 284 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 134:ad3be0349dc5 285 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 134:ad3be0349dc5 286 * @arg @ref LL_GPIO_MODE_ANALOG
<> 134:ad3be0349dc5 287 * @retval None
<> 134:ad3be0349dc5 288 */
<> 134:ad3be0349dc5 289 __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
<> 134:ad3be0349dc5 290 {
<> 134:ad3be0349dc5 291 MODIFY_REG(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0), ((Pin * Pin) * Mode));
<> 134:ad3be0349dc5 292 }
<> 134:ad3be0349dc5 293
<> 134:ad3be0349dc5 294 /**
<> 134:ad3be0349dc5 295 * @brief Return gpio mode for a dedicated pin on dedicated port.
<> 134:ad3be0349dc5 296 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 134:ad3be0349dc5 297 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 298 * @rmtoll MODER MODEy LL_GPIO_GetPinMode
<> 134:ad3be0349dc5 299 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 300 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 301 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 302 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 303 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 304 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 305 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 306 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 307 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 308 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 309 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 310 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 311 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 312 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 313 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 314 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 315 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 316 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 317 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 318 * @arg @ref LL_GPIO_MODE_INPUT
<> 134:ad3be0349dc5 319 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 134:ad3be0349dc5 320 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 134:ad3be0349dc5 321 * @arg @ref LL_GPIO_MODE_ANALOG
<> 134:ad3be0349dc5 322 */
<> 134:ad3be0349dc5 323 __STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 324 {
<> 134:ad3be0349dc5 325 return (uint32_t)(READ_BIT(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0)) / (Pin * Pin));
<> 134:ad3be0349dc5 326 }
<> 134:ad3be0349dc5 327
<> 134:ad3be0349dc5 328 /**
<> 134:ad3be0349dc5 329 * @brief Configure gpio output type for several pins on dedicated port.
<> 134:ad3be0349dc5 330 * @note Output type as to be set when gpio pin is in output or
<> 134:ad3be0349dc5 331 * alternate modes. Possible type are Push-pull or Open-drain.
<> 134:ad3be0349dc5 332 * @rmtoll OTYPER OTy LL_GPIO_SetPinOutputType
<> 134:ad3be0349dc5 333 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 334 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 335 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 336 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 337 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 338 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 339 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 340 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 341 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 342 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 343 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 344 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 345 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 346 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 347 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 348 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 349 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 350 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 351 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 352 * @param OutputType This parameter can be one of the following values:
<> 134:ad3be0349dc5 353 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 134:ad3be0349dc5 354 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 134:ad3be0349dc5 355 * @retval None
<> 134:ad3be0349dc5 356 */
<> 134:ad3be0349dc5 357 __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
<> 134:ad3be0349dc5 358 {
<> 134:ad3be0349dc5 359 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
<> 134:ad3be0349dc5 360 }
<> 134:ad3be0349dc5 361
<> 134:ad3be0349dc5 362 /**
<> 134:ad3be0349dc5 363 * @brief Return gpio output type for several pins on dedicated port.
<> 134:ad3be0349dc5 364 * @note Output type as to be set when gpio pin is in output or
<> 134:ad3be0349dc5 365 * alternate modes. Possible type are Push-pull or Open-drain.
<> 134:ad3be0349dc5 366 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 367 * @rmtoll OTYPER OTy LL_GPIO_GetPinOutputType
<> 134:ad3be0349dc5 368 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 369 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 370 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 371 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 372 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 373 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 374 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 375 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 376 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 377 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 378 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 379 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 380 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 381 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 382 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 383 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 384 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 385 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 386 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 387 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 388 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 134:ad3be0349dc5 389 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 134:ad3be0349dc5 390 */
<> 134:ad3be0349dc5 391 __STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 392 {
<> 134:ad3be0349dc5 393 return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) / Pin);
<> 134:ad3be0349dc5 394 }
<> 134:ad3be0349dc5 395
<> 134:ad3be0349dc5 396 /**
<> 134:ad3be0349dc5 397 * @brief Configure gpio speed for a dedicated pin on dedicated port.
<> 134:ad3be0349dc5 398 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 134:ad3be0349dc5 399 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 400 * @note Refer to datasheet for frequency specifications and the power
<> 134:ad3be0349dc5 401 * supply and load conditions for each speed.
<> 134:ad3be0349dc5 402 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_SetPinSpeed
<> 134:ad3be0349dc5 403 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 404 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 405 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 406 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 407 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 408 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 409 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 410 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 411 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 412 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 413 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 414 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 415 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 416 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 417 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 418 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 419 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 420 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 421 * @param Speed This parameter can be one of the following values:
<> 134:ad3be0349dc5 422 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 134:ad3be0349dc5 423 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 134:ad3be0349dc5 424 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 134:ad3be0349dc5 425 * @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
<> 134:ad3be0349dc5 426 * @retval None
<> 134:ad3be0349dc5 427 */
<> 134:ad3be0349dc5 428 __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
<> 134:ad3be0349dc5 429 {
<> 134:ad3be0349dc5 430 MODIFY_REG(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDR_OSPEEDR0), ((Pin * Pin) * Speed));
<> 134:ad3be0349dc5 431 }
<> 134:ad3be0349dc5 432
<> 134:ad3be0349dc5 433 /**
<> 134:ad3be0349dc5 434 * @brief Return gpio speed for a dedicated pin on dedicated port.
<> 134:ad3be0349dc5 435 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 134:ad3be0349dc5 436 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 437 * @note Refer to datasheet for frequency specifications and the power
<> 134:ad3be0349dc5 438 * supply and load conditions for each speed.
<> 134:ad3be0349dc5 439 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_GetPinSpeed
<> 134:ad3be0349dc5 440 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 441 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 442 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 443 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 444 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 445 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 446 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 447 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 448 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 449 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 450 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 451 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 452 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 453 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 454 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 455 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 456 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 457 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 458 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 459 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 134:ad3be0349dc5 460 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 134:ad3be0349dc5 461 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 134:ad3be0349dc5 462 * @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
<> 134:ad3be0349dc5 463 */
<> 134:ad3be0349dc5 464 __STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 465 {
<> 134:ad3be0349dc5 466 return (uint32_t)(READ_BIT(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDR_OSPEEDR0)) / (Pin * Pin));
<> 134:ad3be0349dc5 467 }
<> 134:ad3be0349dc5 468
<> 134:ad3be0349dc5 469 /**
<> 134:ad3be0349dc5 470 * @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
<> 134:ad3be0349dc5 471 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 472 * @rmtoll PUPDR PUPDy LL_GPIO_SetPinPull
<> 134:ad3be0349dc5 473 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 474 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 475 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 476 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 477 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 478 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 479 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 480 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 481 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 482 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 483 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 484 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 485 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 486 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 487 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 488 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 489 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 490 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 491 * @param Pull This parameter can be one of the following values:
<> 134:ad3be0349dc5 492 * @arg @ref LL_GPIO_PULL_NO
<> 134:ad3be0349dc5 493 * @arg @ref LL_GPIO_PULL_UP
<> 134:ad3be0349dc5 494 * @arg @ref LL_GPIO_PULL_DOWN
<> 134:ad3be0349dc5 495 * @retval None
<> 134:ad3be0349dc5 496 */
<> 134:ad3be0349dc5 497 __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
<> 134:ad3be0349dc5 498 {
<> 134:ad3be0349dc5 499 MODIFY_REG(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPDR0), ((Pin * Pin) * Pull));
<> 134:ad3be0349dc5 500 }
<> 134:ad3be0349dc5 501
<> 134:ad3be0349dc5 502 /**
<> 134:ad3be0349dc5 503 * @brief Return gpio pull-up or pull-down for a dedicated pin on a dedicated port
<> 134:ad3be0349dc5 504 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 505 * @rmtoll PUPDR PUPDy LL_GPIO_GetPinPull
<> 134:ad3be0349dc5 506 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 507 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 508 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 509 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 510 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 511 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 512 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 513 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 514 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 515 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 516 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 517 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 518 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 519 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 520 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 521 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 522 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 523 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 524 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 525 * @arg @ref LL_GPIO_PULL_NO
<> 134:ad3be0349dc5 526 * @arg @ref LL_GPIO_PULL_UP
<> 134:ad3be0349dc5 527 * @arg @ref LL_GPIO_PULL_DOWN
<> 134:ad3be0349dc5 528 */
<> 134:ad3be0349dc5 529 __STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 530 {
<> 134:ad3be0349dc5 531 return (uint32_t)(READ_BIT(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPDR0)) / (Pin * Pin));
<> 134:ad3be0349dc5 532 }
<> 134:ad3be0349dc5 533
<> 134:ad3be0349dc5 534 /**
<> 134:ad3be0349dc5 535 * @brief Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 134:ad3be0349dc5 536 * @note Possible values are from AF0 to AF7 depending on target.
<> 134:ad3be0349dc5 537 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 538 * @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7
<> 134:ad3be0349dc5 539 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 540 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 541 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 542 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 543 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 544 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 545 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 546 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 547 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 548 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 549 * @param Alternate This parameter can be one of the following values:
<> 134:ad3be0349dc5 550 * @arg @ref LL_GPIO_AF_0
<> 134:ad3be0349dc5 551 * @arg @ref LL_GPIO_AF_1
<> 134:ad3be0349dc5 552 * @arg @ref LL_GPIO_AF_2
<> 134:ad3be0349dc5 553 * @arg @ref LL_GPIO_AF_3
<> 134:ad3be0349dc5 554 * @arg @ref LL_GPIO_AF_4
<> 134:ad3be0349dc5 555 * @arg @ref LL_GPIO_AF_5
<> 134:ad3be0349dc5 556 * @arg @ref LL_GPIO_AF_6
<> 134:ad3be0349dc5 557 * @arg @ref LL_GPIO_AF_7
<> 134:ad3be0349dc5 558 * @retval None
<> 134:ad3be0349dc5 559 */
<> 134:ad3be0349dc5 560 __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 134:ad3be0349dc5 561 {
<> 134:ad3be0349dc5 562 MODIFY_REG(GPIOx->AFR[0], ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFRL0),
<> 134:ad3be0349dc5 563 ((((Pin * Pin) * Pin) * Pin) * Alternate));
<> 134:ad3be0349dc5 564 }
<> 134:ad3be0349dc5 565
<> 134:ad3be0349dc5 566 /**
<> 134:ad3be0349dc5 567 * @brief Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 134:ad3be0349dc5 568 * @rmtoll AFRL AFSELy LL_GPIO_GetAFPin_0_7
<> 134:ad3be0349dc5 569 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 570 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 571 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 572 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 573 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 574 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 575 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 576 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 577 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 578 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 579 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 580 * @arg @ref LL_GPIO_AF_0
<> 134:ad3be0349dc5 581 * @arg @ref LL_GPIO_AF_1
<> 134:ad3be0349dc5 582 * @arg @ref LL_GPIO_AF_2
<> 134:ad3be0349dc5 583 * @arg @ref LL_GPIO_AF_3
<> 134:ad3be0349dc5 584 * @arg @ref LL_GPIO_AF_4
<> 134:ad3be0349dc5 585 * @arg @ref LL_GPIO_AF_5
<> 134:ad3be0349dc5 586 * @arg @ref LL_GPIO_AF_6
<> 134:ad3be0349dc5 587 * @arg @ref LL_GPIO_AF_7
<> 134:ad3be0349dc5 588 */
<> 134:ad3be0349dc5 589 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 590 {
<> 134:ad3be0349dc5 591 return (uint32_t)(READ_BIT(GPIOx->AFR[0],
<> 134:ad3be0349dc5 592 ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFRL0)) / (((Pin * Pin) * Pin) * Pin));
<> 134:ad3be0349dc5 593 }
<> 134:ad3be0349dc5 594
<> 134:ad3be0349dc5 595 /**
<> 134:ad3be0349dc5 596 * @brief Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 134:ad3be0349dc5 597 * @note Possible values are from AF0 to AF7 depending on target.
<> 134:ad3be0349dc5 598 * @note Warning: only one pin can be passed as parameter.
<> 134:ad3be0349dc5 599 * @rmtoll AFRH AFSELy LL_GPIO_SetAFPin_8_15
<> 134:ad3be0349dc5 600 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 601 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 602 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 603 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 604 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 605 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 606 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 607 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 608 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 609 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 610 * @param Alternate This parameter can be one of the following values:
<> 134:ad3be0349dc5 611 * @arg @ref LL_GPIO_AF_0
<> 134:ad3be0349dc5 612 * @arg @ref LL_GPIO_AF_1
<> 134:ad3be0349dc5 613 * @arg @ref LL_GPIO_AF_2
<> 134:ad3be0349dc5 614 * @arg @ref LL_GPIO_AF_3
<> 134:ad3be0349dc5 615 * @arg @ref LL_GPIO_AF_4
<> 134:ad3be0349dc5 616 * @arg @ref LL_GPIO_AF_5
<> 134:ad3be0349dc5 617 * @arg @ref LL_GPIO_AF_6
<> 134:ad3be0349dc5 618 * @arg @ref LL_GPIO_AF_7
<> 134:ad3be0349dc5 619 * @retval None
<> 134:ad3be0349dc5 620 */
<> 134:ad3be0349dc5 621 __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 134:ad3be0349dc5 622 {
<> 134:ad3be0349dc5 623 MODIFY_REG(GPIOx->AFR[1], (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFRH0),
<> 134:ad3be0349dc5 624 (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * Alternate));
<> 134:ad3be0349dc5 625 }
<> 134:ad3be0349dc5 626
<> 134:ad3be0349dc5 627 /**
<> 134:ad3be0349dc5 628 * @brief Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 134:ad3be0349dc5 629 * @note Possible values are from AF0 to AF7 depending on target.
<> 134:ad3be0349dc5 630 * @rmtoll AFRH AFSELy LL_GPIO_GetAFPin_8_15
<> 134:ad3be0349dc5 631 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 632 * @param Pin This parameter can be one of the following values:
<> 134:ad3be0349dc5 633 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 634 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 635 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 636 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 637 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 638 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 639 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 640 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 641 * @retval Returned value can be one of the following values:
<> 134:ad3be0349dc5 642 * @arg @ref LL_GPIO_AF_0
<> 134:ad3be0349dc5 643 * @arg @ref LL_GPIO_AF_1
<> 134:ad3be0349dc5 644 * @arg @ref LL_GPIO_AF_2
<> 134:ad3be0349dc5 645 * @arg @ref LL_GPIO_AF_3
<> 134:ad3be0349dc5 646 * @arg @ref LL_GPIO_AF_4
<> 134:ad3be0349dc5 647 * @arg @ref LL_GPIO_AF_5
<> 134:ad3be0349dc5 648 * @arg @ref LL_GPIO_AF_6
<> 134:ad3be0349dc5 649 * @arg @ref LL_GPIO_AF_7
<> 134:ad3be0349dc5 650 */
<> 134:ad3be0349dc5 651 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 134:ad3be0349dc5 652 {
<> 134:ad3be0349dc5 653 return (uint32_t)(READ_BIT(GPIOx->AFR[1],
<> 134:ad3be0349dc5 654 (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFRH0)) / ((((Pin >> 8U) *
<> 134:ad3be0349dc5 655 (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)));
<> 134:ad3be0349dc5 656 }
<> 134:ad3be0349dc5 657
<> 134:ad3be0349dc5 658
<> 134:ad3be0349dc5 659 /**
<> 134:ad3be0349dc5 660 * @brief Lock configuration of several pins for a dedicated port.
<> 134:ad3be0349dc5 661 * @note When the lock sequence has been applied on a port bit, the
<> 134:ad3be0349dc5 662 * value of this port bit can no longer be modified until the
<> 134:ad3be0349dc5 663 * next reset.
<> 134:ad3be0349dc5 664 * @note Each lock bit freezes a specific configuration register
<> 134:ad3be0349dc5 665 * (control and alternate function registers).
<> 134:ad3be0349dc5 666 * @rmtoll LCKR LCKK LL_GPIO_LockPin
<> 134:ad3be0349dc5 667 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 668 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 669 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 670 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 671 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 672 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 673 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 674 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 675 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 676 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 677 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 678 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 679 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 680 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 681 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 682 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 683 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 684 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 685 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 686 * @retval None
<> 134:ad3be0349dc5 687 */
<> 134:ad3be0349dc5 688 __STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 689 {
<> 134:ad3be0349dc5 690 __IO uint32_t temp;
<> 134:ad3be0349dc5 691 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 134:ad3be0349dc5 692 WRITE_REG(GPIOx->LCKR, PinMask);
<> 134:ad3be0349dc5 693 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 134:ad3be0349dc5 694 temp = READ_REG(GPIOx->LCKR);
<> 134:ad3be0349dc5 695 (void) temp;
<> 134:ad3be0349dc5 696 }
<> 134:ad3be0349dc5 697
<> 134:ad3be0349dc5 698 /**
<> 134:ad3be0349dc5 699 * @brief Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0.
<> 134:ad3be0349dc5 700 * @rmtoll LCKR LCKy LL_GPIO_IsPinLocked
<> 134:ad3be0349dc5 701 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 702 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 703 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 704 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 705 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 706 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 707 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 708 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 709 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 710 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 711 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 712 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 713 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 714 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 715 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 716 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 717 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 718 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 719 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 720 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 721 */
<> 134:ad3be0349dc5 722 __STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 723 {
<> 134:ad3be0349dc5 724 return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
<> 134:ad3be0349dc5 725 }
<> 134:ad3be0349dc5 726
<> 134:ad3be0349dc5 727 /**
<> 134:ad3be0349dc5 728 * @brief Return 1 if one of the pin of a dedicated port is locked. else return 0.
<> 134:ad3be0349dc5 729 * @rmtoll LCKR LCKK LL_GPIO_IsAnyPinLocked
<> 134:ad3be0349dc5 730 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 731 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 732 */
<> 134:ad3be0349dc5 733 __STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
<> 134:ad3be0349dc5 734 {
<> 134:ad3be0349dc5 735 return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
<> 134:ad3be0349dc5 736 }
<> 134:ad3be0349dc5 737
<> 134:ad3be0349dc5 738 /**
<> 134:ad3be0349dc5 739 * @}
<> 134:ad3be0349dc5 740 */
<> 134:ad3be0349dc5 741
<> 134:ad3be0349dc5 742 /** @defgroup GPIO_LL_EF_Data_Access Data Access
<> 134:ad3be0349dc5 743 * @{
<> 134:ad3be0349dc5 744 */
<> 134:ad3be0349dc5 745
<> 134:ad3be0349dc5 746 /**
<> 134:ad3be0349dc5 747 * @brief Return full input data register value for a dedicated port.
<> 134:ad3be0349dc5 748 * @rmtoll IDR IDy LL_GPIO_ReadInputPort
<> 134:ad3be0349dc5 749 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 750 * @retval Input data register value of port
<> 134:ad3be0349dc5 751 */
<> 134:ad3be0349dc5 752 __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
<> 134:ad3be0349dc5 753 {
<> 134:ad3be0349dc5 754 return (uint32_t)(READ_REG(GPIOx->IDR));
<> 134:ad3be0349dc5 755 }
<> 134:ad3be0349dc5 756
<> 134:ad3be0349dc5 757 /**
<> 134:ad3be0349dc5 758 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 134:ad3be0349dc5 759 * @rmtoll IDR IDy LL_GPIO_IsInputPinSet
<> 134:ad3be0349dc5 760 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 761 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 762 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 763 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 764 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 765 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 766 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 767 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 768 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 769 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 770 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 771 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 772 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 773 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 774 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 775 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 776 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 777 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 778 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 779 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 780 */
<> 134:ad3be0349dc5 781 __STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 782 {
<> 134:ad3be0349dc5 783 return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
<> 134:ad3be0349dc5 784 }
<> 134:ad3be0349dc5 785
<> 134:ad3be0349dc5 786 /**
<> 134:ad3be0349dc5 787 * @brief Write output data register for the port.
<> 134:ad3be0349dc5 788 * @rmtoll ODR ODy LL_GPIO_WriteOutputPort
<> 134:ad3be0349dc5 789 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 790 * @param PortValue Level value for each pin of the port
<> 134:ad3be0349dc5 791 * @retval None
<> 134:ad3be0349dc5 792 */
<> 134:ad3be0349dc5 793 __STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
<> 134:ad3be0349dc5 794 {
<> 134:ad3be0349dc5 795 WRITE_REG(GPIOx->ODR, PortValue);
<> 134:ad3be0349dc5 796 }
<> 134:ad3be0349dc5 797
<> 134:ad3be0349dc5 798 /**
<> 134:ad3be0349dc5 799 * @brief Return full output data register value for a dedicated port.
<> 134:ad3be0349dc5 800 * @rmtoll ODR ODy LL_GPIO_ReadOutputPort
<> 134:ad3be0349dc5 801 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 802 * @retval Output data register value of port
<> 134:ad3be0349dc5 803 */
<> 134:ad3be0349dc5 804 __STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
<> 134:ad3be0349dc5 805 {
<> 134:ad3be0349dc5 806 return (uint32_t)(READ_REG(GPIOx->ODR));
<> 134:ad3be0349dc5 807 }
<> 134:ad3be0349dc5 808
<> 134:ad3be0349dc5 809 /**
<> 134:ad3be0349dc5 810 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 134:ad3be0349dc5 811 * @rmtoll ODR ODy LL_GPIO_IsOutputPinSet
<> 134:ad3be0349dc5 812 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 813 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 814 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 815 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 816 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 817 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 818 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 819 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 820 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 821 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 822 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 823 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 824 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 825 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 826 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 827 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 828 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 829 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 830 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 831 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 832 */
<> 134:ad3be0349dc5 833 __STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 834 {
<> 134:ad3be0349dc5 835 return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
<> 134:ad3be0349dc5 836 }
<> 134:ad3be0349dc5 837
<> 134:ad3be0349dc5 838 /**
<> 134:ad3be0349dc5 839 * @brief Set several pins to high level on dedicated gpio port.
<> 134:ad3be0349dc5 840 * @rmtoll BSRR BSy LL_GPIO_SetOutputPin
<> 134:ad3be0349dc5 841 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 842 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 843 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 844 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 845 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 846 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 847 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 848 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 849 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 850 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 851 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 852 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 853 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 854 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 855 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 856 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 857 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 858 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 859 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 860 * @retval None
<> 134:ad3be0349dc5 861 */
<> 134:ad3be0349dc5 862 __STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 863 {
<> 134:ad3be0349dc5 864 WRITE_REG(GPIOx->BSRR, PinMask);
<> 134:ad3be0349dc5 865 }
<> 134:ad3be0349dc5 866
<> 134:ad3be0349dc5 867 /**
<> 134:ad3be0349dc5 868 * @brief Set several pins to low level on dedicated gpio port.
<> 134:ad3be0349dc5 869 * @rmtoll BRR BRy LL_GPIO_ResetOutputPin
<> 134:ad3be0349dc5 870 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 871 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 872 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 873 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 874 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 875 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 876 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 877 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 878 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 879 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 880 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 881 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 882 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 883 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 884 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 885 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 886 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 887 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 888 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 889 * @retval None
<> 134:ad3be0349dc5 890 */
<> 134:ad3be0349dc5 891 __STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 892 {
<> 134:ad3be0349dc5 893 WRITE_REG(GPIOx->BRR, PinMask);
<> 134:ad3be0349dc5 894 }
<> 134:ad3be0349dc5 895
<> 134:ad3be0349dc5 896 /**
<> 134:ad3be0349dc5 897 * @brief Toggle data value for several pin of dedicated port.
<> 134:ad3be0349dc5 898 * @rmtoll ODR ODy LL_GPIO_TogglePin
<> 134:ad3be0349dc5 899 * @param GPIOx GPIO Port
<> 134:ad3be0349dc5 900 * @param PinMask This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 901 * @arg @ref LL_GPIO_PIN_0
<> 134:ad3be0349dc5 902 * @arg @ref LL_GPIO_PIN_1
<> 134:ad3be0349dc5 903 * @arg @ref LL_GPIO_PIN_2
<> 134:ad3be0349dc5 904 * @arg @ref LL_GPIO_PIN_3
<> 134:ad3be0349dc5 905 * @arg @ref LL_GPIO_PIN_4
<> 134:ad3be0349dc5 906 * @arg @ref LL_GPIO_PIN_5
<> 134:ad3be0349dc5 907 * @arg @ref LL_GPIO_PIN_6
<> 134:ad3be0349dc5 908 * @arg @ref LL_GPIO_PIN_7
<> 134:ad3be0349dc5 909 * @arg @ref LL_GPIO_PIN_8
<> 134:ad3be0349dc5 910 * @arg @ref LL_GPIO_PIN_9
<> 134:ad3be0349dc5 911 * @arg @ref LL_GPIO_PIN_10
<> 134:ad3be0349dc5 912 * @arg @ref LL_GPIO_PIN_11
<> 134:ad3be0349dc5 913 * @arg @ref LL_GPIO_PIN_12
<> 134:ad3be0349dc5 914 * @arg @ref LL_GPIO_PIN_13
<> 134:ad3be0349dc5 915 * @arg @ref LL_GPIO_PIN_14
<> 134:ad3be0349dc5 916 * @arg @ref LL_GPIO_PIN_15
<> 134:ad3be0349dc5 917 * @arg @ref LL_GPIO_PIN_ALL
<> 134:ad3be0349dc5 918 * @retval None
<> 134:ad3be0349dc5 919 */
<> 134:ad3be0349dc5 920 __STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 134:ad3be0349dc5 921 {
<> 134:ad3be0349dc5 922 WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask);
<> 134:ad3be0349dc5 923 }
<> 134:ad3be0349dc5 924
<> 134:ad3be0349dc5 925 /**
<> 134:ad3be0349dc5 926 * @}
<> 134:ad3be0349dc5 927 */
<> 134:ad3be0349dc5 928
<> 134:ad3be0349dc5 929 #if defined(USE_FULL_LL_DRIVER)
<> 134:ad3be0349dc5 930 /** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
<> 134:ad3be0349dc5 931 * @{
<> 134:ad3be0349dc5 932 */
<> 134:ad3be0349dc5 933
<> 134:ad3be0349dc5 934 ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
<> 134:ad3be0349dc5 935 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 134:ad3be0349dc5 936 void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 134:ad3be0349dc5 937
<> 134:ad3be0349dc5 938 /**
<> 134:ad3be0349dc5 939 * @}
<> 134:ad3be0349dc5 940 */
<> 134:ad3be0349dc5 941 #endif /* USE_FULL_LL_DRIVER */
<> 134:ad3be0349dc5 942
<> 134:ad3be0349dc5 943 /**
<> 134:ad3be0349dc5 944 * @}
<> 134:ad3be0349dc5 945 */
<> 134:ad3be0349dc5 946
<> 134:ad3be0349dc5 947 /**
<> 134:ad3be0349dc5 948 * @}
<> 134:ad3be0349dc5 949 */
<> 134:ad3be0349dc5 950
<> 134:ad3be0349dc5 951 #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) */
<> 134:ad3be0349dc5 952 /**
<> 134:ad3be0349dc5 953 * @}
<> 134:ad3be0349dc5 954 */
<> 134:ad3be0349dc5 955
<> 134:ad3be0349dc5 956 #ifdef __cplusplus
<> 134:ad3be0349dc5 957 }
<> 134:ad3be0349dc5 958 #endif
<> 134:ad3be0349dc5 959
<> 134:ad3be0349dc5 960 #endif /* __STM32F0xx_LL_GPIO_H */
<> 134:ad3be0349dc5 961
<> 134:ad3be0349dc5 962 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/