The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
AnnaBridge
Date:
Thu Nov 09 11:14:10 2017 +0000
Revision:
157:e7ca05fa8600
Parent:
156:ff21514d8981
Child:
160:5571c4ff569f
Release 155 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 156:ff21514d8981 1 /**
AnnaBridge 156:ff21514d8981 2 ******************************************************************************
AnnaBridge 156:ff21514d8981 3 * @file stm32f0xx_hal_pwr_ex.h
AnnaBridge 156:ff21514d8981 4 * @author MCD Application Team
AnnaBridge 156:ff21514d8981 5 * @version V1.5.0
AnnaBridge 156:ff21514d8981 6 * @date 04-November-2016
AnnaBridge 156:ff21514d8981 7 * @brief Header file of PWR HAL Extension module.
AnnaBridge 156:ff21514d8981 8 ******************************************************************************
AnnaBridge 156:ff21514d8981 9 * @attention
AnnaBridge 156:ff21514d8981 10 *
AnnaBridge 156:ff21514d8981 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 156:ff21514d8981 12 *
AnnaBridge 156:ff21514d8981 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 156:ff21514d8981 14 * are permitted provided that the following conditions are met:
AnnaBridge 156:ff21514d8981 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 156:ff21514d8981 16 * this list of conditions and the following disclaimer.
AnnaBridge 156:ff21514d8981 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 156:ff21514d8981 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 156:ff21514d8981 19 * and/or other materials provided with the distribution.
AnnaBridge 156:ff21514d8981 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 156:ff21514d8981 21 * may be used to endorse or promote products derived from this software
AnnaBridge 156:ff21514d8981 22 * without specific prior written permission.
AnnaBridge 156:ff21514d8981 23 *
AnnaBridge 156:ff21514d8981 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 156:ff21514d8981 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 156:ff21514d8981 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 156:ff21514d8981 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 156:ff21514d8981 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 156:ff21514d8981 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 156:ff21514d8981 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 156:ff21514d8981 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 156:ff21514d8981 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 156:ff21514d8981 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 156:ff21514d8981 34 *
AnnaBridge 156:ff21514d8981 35 ******************************************************************************
AnnaBridge 156:ff21514d8981 36 */
AnnaBridge 156:ff21514d8981 37
AnnaBridge 156:ff21514d8981 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 156:ff21514d8981 39 #ifndef __STM32F0xx_HAL_PWR_EX_H
AnnaBridge 156:ff21514d8981 40 #define __STM32F0xx_HAL_PWR_EX_H
AnnaBridge 156:ff21514d8981 41
AnnaBridge 156:ff21514d8981 42 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 43 extern "C" {
AnnaBridge 156:ff21514d8981 44 #endif
AnnaBridge 156:ff21514d8981 45
AnnaBridge 156:ff21514d8981 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 47 #include "stm32f0xx_hal_def.h"
AnnaBridge 156:ff21514d8981 48
AnnaBridge 156:ff21514d8981 49 /** @addtogroup STM32F0xx_HAL_Driver
AnnaBridge 156:ff21514d8981 50 * @{
AnnaBridge 156:ff21514d8981 51 */
AnnaBridge 156:ff21514d8981 52
AnnaBridge 156:ff21514d8981 53 /** @addtogroup PWREx
AnnaBridge 156:ff21514d8981 54 * @{
AnnaBridge 156:ff21514d8981 55 */
AnnaBridge 156:ff21514d8981 56
AnnaBridge 156:ff21514d8981 57 /* Exported types ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 58
AnnaBridge 156:ff21514d8981 59 /** @defgroup PWREx_Exported_Types PWREx Exported Types
AnnaBridge 156:ff21514d8981 60 * @{
AnnaBridge 156:ff21514d8981 61 */
AnnaBridge 156:ff21514d8981 62
AnnaBridge 156:ff21514d8981 63 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
AnnaBridge 156:ff21514d8981 64 defined (STM32F071xB) || defined (STM32F072xB) || \
AnnaBridge 156:ff21514d8981 65 defined (STM32F091xC)
AnnaBridge 156:ff21514d8981 66
AnnaBridge 156:ff21514d8981 67 /**
AnnaBridge 156:ff21514d8981 68 * @brief PWR PVD configuration structure definition
AnnaBridge 156:ff21514d8981 69 */
AnnaBridge 156:ff21514d8981 70 typedef struct
AnnaBridge 156:ff21514d8981 71 {
AnnaBridge 156:ff21514d8981 72 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level
AnnaBridge 156:ff21514d8981 73 This parameter can be a value of @ref PWREx_PVD_detection_level */
AnnaBridge 156:ff21514d8981 74
AnnaBridge 156:ff21514d8981 75 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
AnnaBridge 156:ff21514d8981 76 This parameter can be a value of @ref PWREx_PVD_Mode */
AnnaBridge 156:ff21514d8981 77 }PWR_PVDTypeDef;
AnnaBridge 156:ff21514d8981 78
AnnaBridge 156:ff21514d8981 79 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
AnnaBridge 156:ff21514d8981 80 /* defined (STM32F071xB) || defined (STM32F072xB) || */
AnnaBridge 156:ff21514d8981 81 /* defined (STM32F091xC) */
AnnaBridge 156:ff21514d8981 82 /**
AnnaBridge 156:ff21514d8981 83 * @}
AnnaBridge 156:ff21514d8981 84 */
AnnaBridge 156:ff21514d8981 85 /* Exported constants --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 86
AnnaBridge 156:ff21514d8981 87 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
AnnaBridge 156:ff21514d8981 88 * @{
AnnaBridge 156:ff21514d8981 89 */
AnnaBridge 156:ff21514d8981 90
AnnaBridge 156:ff21514d8981 91
AnnaBridge 156:ff21514d8981 92 /** @defgroup PWREx_WakeUp_Pins PWREx Wakeup Pins
AnnaBridge 156:ff21514d8981 93 * @{
AnnaBridge 156:ff21514d8981 94 */
AnnaBridge 156:ff21514d8981 95 #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
AnnaBridge 156:ff21514d8981 96 defined (STM32F091xC) || defined (STM32F098xx)
AnnaBridge 156:ff21514d8981 97 #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1)
AnnaBridge 156:ff21514d8981 98 #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2)
AnnaBridge 156:ff21514d8981 99 #define PWR_WAKEUP_PIN3 ((uint32_t)PWR_CSR_EWUP3)
AnnaBridge 156:ff21514d8981 100 #define PWR_WAKEUP_PIN4 ((uint32_t)PWR_CSR_EWUP4)
AnnaBridge 156:ff21514d8981 101 #define PWR_WAKEUP_PIN5 ((uint32_t)PWR_CSR_EWUP5)
AnnaBridge 156:ff21514d8981 102 #define PWR_WAKEUP_PIN6 ((uint32_t)PWR_CSR_EWUP6)
AnnaBridge 156:ff21514d8981 103 #define PWR_WAKEUP_PIN7 ((uint32_t)PWR_CSR_EWUP7)
AnnaBridge 156:ff21514d8981 104 #define PWR_WAKEUP_PIN8 ((uint32_t)PWR_CSR_EWUP8)
AnnaBridge 156:ff21514d8981 105
AnnaBridge 156:ff21514d8981 106 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
AnnaBridge 156:ff21514d8981 107 ((PIN) == PWR_WAKEUP_PIN2) || \
AnnaBridge 156:ff21514d8981 108 ((PIN) == PWR_WAKEUP_PIN3) || \
AnnaBridge 156:ff21514d8981 109 ((PIN) == PWR_WAKEUP_PIN4) || \
AnnaBridge 156:ff21514d8981 110 ((PIN) == PWR_WAKEUP_PIN5) || \
AnnaBridge 156:ff21514d8981 111 ((PIN) == PWR_WAKEUP_PIN6) || \
AnnaBridge 156:ff21514d8981 112 ((PIN) == PWR_WAKEUP_PIN7) || \
AnnaBridge 156:ff21514d8981 113 ((PIN) == PWR_WAKEUP_PIN8))
AnnaBridge 156:ff21514d8981 114
AnnaBridge 156:ff21514d8981 115 #elif defined(STM32F030xC) || defined (STM32F070xB)
AnnaBridge 156:ff21514d8981 116 #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1)
AnnaBridge 156:ff21514d8981 117 #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2)
AnnaBridge 156:ff21514d8981 118 #define PWR_WAKEUP_PIN4 ((uint32_t)PWR_CSR_EWUP4)
AnnaBridge 156:ff21514d8981 119 #define PWR_WAKEUP_PIN5 ((uint32_t)PWR_CSR_EWUP5)
AnnaBridge 156:ff21514d8981 120 #define PWR_WAKEUP_PIN6 ((uint32_t)PWR_CSR_EWUP6)
AnnaBridge 156:ff21514d8981 121 #define PWR_WAKEUP_PIN7 ((uint32_t)PWR_CSR_EWUP7)
AnnaBridge 156:ff21514d8981 122
AnnaBridge 156:ff21514d8981 123 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
AnnaBridge 156:ff21514d8981 124 ((PIN) == PWR_WAKEUP_PIN2) || \
AnnaBridge 156:ff21514d8981 125 ((PIN) == PWR_WAKEUP_PIN4) || \
AnnaBridge 156:ff21514d8981 126 ((PIN) == PWR_WAKEUP_PIN5) || \
AnnaBridge 156:ff21514d8981 127 ((PIN) == PWR_WAKEUP_PIN6) || \
AnnaBridge 156:ff21514d8981 128 ((PIN) == PWR_WAKEUP_PIN7))
AnnaBridge 156:ff21514d8981 129
AnnaBridge 156:ff21514d8981 130 #elif defined(STM32F042x6) || defined (STM32F048xx)
AnnaBridge 156:ff21514d8981 131 #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1)
AnnaBridge 156:ff21514d8981 132 #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2)
AnnaBridge 156:ff21514d8981 133 #define PWR_WAKEUP_PIN4 ((uint32_t)PWR_CSR_EWUP4)
AnnaBridge 156:ff21514d8981 134 #define PWR_WAKEUP_PIN6 ((uint32_t)PWR_CSR_EWUP6)
AnnaBridge 156:ff21514d8981 135 #define PWR_WAKEUP_PIN7 ((uint32_t)PWR_CSR_EWUP7)
AnnaBridge 156:ff21514d8981 136
AnnaBridge 156:ff21514d8981 137 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
AnnaBridge 156:ff21514d8981 138 ((PIN) == PWR_WAKEUP_PIN2) || \
AnnaBridge 156:ff21514d8981 139 ((PIN) == PWR_WAKEUP_PIN4) || \
AnnaBridge 156:ff21514d8981 140 ((PIN) == PWR_WAKEUP_PIN6) || \
AnnaBridge 156:ff21514d8981 141 ((PIN) == PWR_WAKEUP_PIN7))
AnnaBridge 156:ff21514d8981 142
AnnaBridge 156:ff21514d8981 143 #else
AnnaBridge 156:ff21514d8981 144 #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1)
AnnaBridge 156:ff21514d8981 145 #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2)
AnnaBridge 156:ff21514d8981 146
AnnaBridge 156:ff21514d8981 147
AnnaBridge 156:ff21514d8981 148 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
AnnaBridge 156:ff21514d8981 149 ((PIN) == PWR_WAKEUP_PIN2))
AnnaBridge 156:ff21514d8981 150
AnnaBridge 156:ff21514d8981 151 #endif
AnnaBridge 156:ff21514d8981 152
AnnaBridge 156:ff21514d8981 153 /**
AnnaBridge 156:ff21514d8981 154 * @}
AnnaBridge 156:ff21514d8981 155 */
AnnaBridge 156:ff21514d8981 156
AnnaBridge 156:ff21514d8981 157 /** @defgroup PWREx_EXTI_Line PWREx EXTI Line
AnnaBridge 156:ff21514d8981 158 * @{
AnnaBridge 156:ff21514d8981 159 */
AnnaBridge 156:ff21514d8981 160 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
AnnaBridge 156:ff21514d8981 161 defined (STM32F071xB) || defined (STM32F072xB) || \
AnnaBridge 156:ff21514d8981 162 defined (STM32F091xC)
AnnaBridge 156:ff21514d8981 163
AnnaBridge 156:ff21514d8981 164 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
AnnaBridge 156:ff21514d8981 165
AnnaBridge 156:ff21514d8981 166 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
AnnaBridge 156:ff21514d8981 167 /* defined (STM32F071xB) || defined (STM32F072xB) || */
AnnaBridge 156:ff21514d8981 168 /* defined (STM32F091xC) */
AnnaBridge 156:ff21514d8981 169
AnnaBridge 156:ff21514d8981 170 #if defined (STM32F042x6) || defined (STM32F048xx) || \
AnnaBridge 156:ff21514d8981 171 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
AnnaBridge 156:ff21514d8981 172 defined (STM32F091xC) || defined (STM32F098xx)
AnnaBridge 156:ff21514d8981 173
AnnaBridge 156:ff21514d8981 174 #define PWR_EXTI_LINE_VDDIO2 ((uint32_t)EXTI_IMR_MR31) /*!< External interrupt line 31 Connected to the Vddio2 Monitor EXTI Line */
AnnaBridge 156:ff21514d8981 175
AnnaBridge 156:ff21514d8981 176 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
AnnaBridge 156:ff21514d8981 177 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
AnnaBridge 156:ff21514d8981 178 defined (STM32F091xC) || defined (STM32F098xx) ||*/
AnnaBridge 156:ff21514d8981 179 /**
AnnaBridge 156:ff21514d8981 180 * @}
AnnaBridge 156:ff21514d8981 181 */
AnnaBridge 156:ff21514d8981 182
AnnaBridge 156:ff21514d8981 183 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
AnnaBridge 156:ff21514d8981 184 defined (STM32F071xB) || defined (STM32F072xB) || \
AnnaBridge 156:ff21514d8981 185 defined (STM32F091xC)
AnnaBridge 156:ff21514d8981 186 /** @defgroup PWREx_PVD_detection_level PWREx PVD detection level
AnnaBridge 156:ff21514d8981 187 * @{
AnnaBridge 156:ff21514d8981 188 */
AnnaBridge 156:ff21514d8981 189 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
AnnaBridge 156:ff21514d8981 190 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
AnnaBridge 156:ff21514d8981 191 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
AnnaBridge 156:ff21514d8981 192 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
AnnaBridge 156:ff21514d8981 193 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
AnnaBridge 156:ff21514d8981 194 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
AnnaBridge 156:ff21514d8981 195 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
AnnaBridge 156:ff21514d8981 196 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7
AnnaBridge 156:ff21514d8981 197 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
AnnaBridge 156:ff21514d8981 198 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
AnnaBridge 156:ff21514d8981 199 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
AnnaBridge 156:ff21514d8981 200 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
AnnaBridge 156:ff21514d8981 201 /**
AnnaBridge 156:ff21514d8981 202 * @}
AnnaBridge 156:ff21514d8981 203 */
AnnaBridge 156:ff21514d8981 204
AnnaBridge 156:ff21514d8981 205 /** @defgroup PWREx_PVD_Mode PWREx PVD Mode
AnnaBridge 156:ff21514d8981 206 * @{
AnnaBridge 156:ff21514d8981 207 */
AnnaBridge 156:ff21514d8981 208 #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< basic mode is used */
AnnaBridge 156:ff21514d8981 209 #define PWR_PVD_MODE_IT_RISING (0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */
AnnaBridge 156:ff21514d8981 210 #define PWR_PVD_MODE_IT_FALLING (0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */
AnnaBridge 156:ff21514d8981 211 #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
AnnaBridge 156:ff21514d8981 212 #define PWR_PVD_MODE_EVENT_RISING (0x00020001U) /*!< Event Mode with Rising edge trigger detection */
AnnaBridge 156:ff21514d8981 213 #define PWR_PVD_MODE_EVENT_FALLING (0x00020002U) /*!< Event Mode with Falling edge trigger detection */
AnnaBridge 156:ff21514d8981 214 #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */
AnnaBridge 156:ff21514d8981 215
AnnaBridge 156:ff21514d8981 216 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
AnnaBridge 156:ff21514d8981 217 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
AnnaBridge 156:ff21514d8981 218 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
AnnaBridge 156:ff21514d8981 219 ((MODE) == PWR_PVD_MODE_NORMAL))
AnnaBridge 156:ff21514d8981 220 /**
AnnaBridge 156:ff21514d8981 221 * @}
AnnaBridge 156:ff21514d8981 222 */
AnnaBridge 156:ff21514d8981 223 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
AnnaBridge 156:ff21514d8981 224 /* defined (STM32F071xB) || defined (STM32F072xB) || */
AnnaBridge 156:ff21514d8981 225 /* defined (STM32F091xC) */
AnnaBridge 156:ff21514d8981 226
AnnaBridge 156:ff21514d8981 227 /** @defgroup PWREx_Flag PWREx Flag
AnnaBridge 156:ff21514d8981 228 * @{
AnnaBridge 156:ff21514d8981 229 */
AnnaBridge 156:ff21514d8981 230 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
AnnaBridge 156:ff21514d8981 231 defined (STM32F071xB) || defined (STM32F072xB) || \
AnnaBridge 156:ff21514d8981 232 defined (STM32F091xC)
AnnaBridge 156:ff21514d8981 233
AnnaBridge 156:ff21514d8981 234 #define PWR_FLAG_WU PWR_CSR_WUF
AnnaBridge 156:ff21514d8981 235 #define PWR_FLAG_SB PWR_CSR_SBF
AnnaBridge 156:ff21514d8981 236 #define PWR_FLAG_PVDO PWR_CSR_PVDO
AnnaBridge 156:ff21514d8981 237 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
AnnaBridge 156:ff21514d8981 238 #elif defined (STM32F070x6) || defined (STM32F070xB) || defined (STM32F030xC)
AnnaBridge 156:ff21514d8981 239 #define PWR_FLAG_WU PWR_CSR_WUF
AnnaBridge 156:ff21514d8981 240 #define PWR_FLAG_SB PWR_CSR_SBF
AnnaBridge 156:ff21514d8981 241 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
AnnaBridge 156:ff21514d8981 242 #else
AnnaBridge 156:ff21514d8981 243 #define PWR_FLAG_WU PWR_CSR_WUF
AnnaBridge 156:ff21514d8981 244 #define PWR_FLAG_SB PWR_CSR_SBF
AnnaBridge 156:ff21514d8981 245
AnnaBridge 156:ff21514d8981 246 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
AnnaBridge 156:ff21514d8981 247 /* defined (STM32F071xB) || defined (STM32F072xB) || */
AnnaBridge 156:ff21514d8981 248 /* defined (STM32F091xC) */
AnnaBridge 156:ff21514d8981 249 /**
AnnaBridge 156:ff21514d8981 250 * @}
AnnaBridge 156:ff21514d8981 251 */
AnnaBridge 156:ff21514d8981 252
AnnaBridge 156:ff21514d8981 253 /**
AnnaBridge 156:ff21514d8981 254 * @}
AnnaBridge 156:ff21514d8981 255 */
AnnaBridge 156:ff21514d8981 256
AnnaBridge 156:ff21514d8981 257 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 258 /** @defgroup PWREx_Exported_Macros PWREx Exported Macros
AnnaBridge 156:ff21514d8981 259 * @{
AnnaBridge 156:ff21514d8981 260 */
AnnaBridge 156:ff21514d8981 261 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
AnnaBridge 156:ff21514d8981 262 defined (STM32F071xB) || defined (STM32F072xB) || \
AnnaBridge 156:ff21514d8981 263 defined (STM32F091xC)
AnnaBridge 156:ff21514d8981 264 /**
AnnaBridge 156:ff21514d8981 265 * @brief Enable interrupt on PVD Exti Line 16.
AnnaBridge 156:ff21514d8981 266 * @retval None.
AnnaBridge 156:ff21514d8981 267 */
AnnaBridge 156:ff21514d8981 268 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
AnnaBridge 156:ff21514d8981 269
AnnaBridge 156:ff21514d8981 270 /**
AnnaBridge 156:ff21514d8981 271 * @brief Disable interrupt on PVD Exti Line 16.
AnnaBridge 156:ff21514d8981 272 * @retval None.
AnnaBridge 156:ff21514d8981 273 */
AnnaBridge 156:ff21514d8981 274 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
AnnaBridge 156:ff21514d8981 275
AnnaBridge 156:ff21514d8981 276 /**
AnnaBridge 156:ff21514d8981 277 * @brief Enable event on PVD Exti Line 16.
AnnaBridge 156:ff21514d8981 278 * @retval None.
AnnaBridge 156:ff21514d8981 279 */
AnnaBridge 156:ff21514d8981 280 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
AnnaBridge 156:ff21514d8981 281
AnnaBridge 156:ff21514d8981 282 /**
AnnaBridge 156:ff21514d8981 283 * @brief Disable event on PVD Exti Line 16.
AnnaBridge 156:ff21514d8981 284 * @retval None.
AnnaBridge 156:ff21514d8981 285 */
AnnaBridge 156:ff21514d8981 286 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
AnnaBridge 156:ff21514d8981 287
AnnaBridge 156:ff21514d8981 288 /**
AnnaBridge 156:ff21514d8981 289 * @brief Disable the PVD Extended Interrupt Rising Trigger.
AnnaBridge 156:ff21514d8981 290 * @retval None.
AnnaBridge 156:ff21514d8981 291 */
AnnaBridge 156:ff21514d8981 292 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
AnnaBridge 156:ff21514d8981 293
AnnaBridge 156:ff21514d8981 294 /**
AnnaBridge 156:ff21514d8981 295 * @brief Disable the PVD Extended Interrupt Falling Trigger.
AnnaBridge 156:ff21514d8981 296 * @retval None.
AnnaBridge 156:ff21514d8981 297 */
AnnaBridge 156:ff21514d8981 298 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
AnnaBridge 156:ff21514d8981 299
AnnaBridge 156:ff21514d8981 300 /**
AnnaBridge 156:ff21514d8981 301 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
AnnaBridge 156:ff21514d8981 302 * @retval None
AnnaBridge 156:ff21514d8981 303 */
AnnaBridge 156:ff21514d8981 304 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
AnnaBridge 156:ff21514d8981 305
AnnaBridge 156:ff21514d8981 306
AnnaBridge 156:ff21514d8981 307 /**
AnnaBridge 156:ff21514d8981 308 * @brief PVD EXTI line configuration: set falling edge trigger.
AnnaBridge 156:ff21514d8981 309 * @retval None.
AnnaBridge 156:ff21514d8981 310 */
AnnaBridge 156:ff21514d8981 311 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() EXTI->FTSR |= (PWR_EXTI_LINE_PVD)
AnnaBridge 156:ff21514d8981 312
AnnaBridge 156:ff21514d8981 313 /**
AnnaBridge 156:ff21514d8981 314 * @brief PVD EXTI line configuration: set rising edge trigger.
AnnaBridge 156:ff21514d8981 315 * @retval None.
AnnaBridge 156:ff21514d8981 316 */
AnnaBridge 156:ff21514d8981 317 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() EXTI->RTSR |= (PWR_EXTI_LINE_PVD)
AnnaBridge 156:ff21514d8981 318
AnnaBridge 156:ff21514d8981 319 /**
AnnaBridge 156:ff21514d8981 320 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger.
AnnaBridge 156:ff21514d8981 321 * @retval None
AnnaBridge 156:ff21514d8981 322 */
AnnaBridge 156:ff21514d8981 323 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
AnnaBridge 156:ff21514d8981 324
AnnaBridge 156:ff21514d8981 325 /**
AnnaBridge 156:ff21514d8981 326 * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
AnnaBridge 156:ff21514d8981 327 * @retval EXTI PVD Line Status.
AnnaBridge 156:ff21514d8981 328 */
AnnaBridge 156:ff21514d8981 329 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
AnnaBridge 156:ff21514d8981 330
AnnaBridge 156:ff21514d8981 331 /**
AnnaBridge 156:ff21514d8981 332 * @brief Clear the PVD EXTI flag.
AnnaBridge 156:ff21514d8981 333 * @retval None.
AnnaBridge 156:ff21514d8981 334 */
AnnaBridge 156:ff21514d8981 335 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
AnnaBridge 156:ff21514d8981 336
AnnaBridge 156:ff21514d8981 337 /**
AnnaBridge 156:ff21514d8981 338 * @brief Generate a Software interrupt on selected EXTI line.
AnnaBridge 156:ff21514d8981 339 * @retval None.
AnnaBridge 156:ff21514d8981 340 */
AnnaBridge 156:ff21514d8981 341 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
AnnaBridge 156:ff21514d8981 342
AnnaBridge 156:ff21514d8981 343 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
AnnaBridge 156:ff21514d8981 344 /* defined (STM32F071xB) || defined (STM32F072xB) || */
AnnaBridge 156:ff21514d8981 345 /* defined (STM32F091xC) */
AnnaBridge 156:ff21514d8981 346
AnnaBridge 156:ff21514d8981 347
AnnaBridge 156:ff21514d8981 348 #if defined (STM32F042x6) || defined (STM32F048xx) || \
AnnaBridge 156:ff21514d8981 349 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
AnnaBridge 156:ff21514d8981 350 defined (STM32F091xC) || defined (STM32F098xx)
AnnaBridge 156:ff21514d8981 351 /**
AnnaBridge 156:ff21514d8981 352 * @brief Enable interrupt on Vddio2 Monitor Exti Line 31.
AnnaBridge 156:ff21514d8981 353 * @retval None.
AnnaBridge 156:ff21514d8981 354 */
AnnaBridge 156:ff21514d8981 355 #define __HAL_PWR_VDDIO2_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_VDDIO2))
AnnaBridge 156:ff21514d8981 356
AnnaBridge 156:ff21514d8981 357 /**
AnnaBridge 156:ff21514d8981 358 * @brief Disable interrupt on Vddio2 Monitor Exti Line 31.
AnnaBridge 156:ff21514d8981 359 * @retval None.
AnnaBridge 156:ff21514d8981 360 */
AnnaBridge 156:ff21514d8981 361 #define __HAL_PWR_VDDIO2_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_VDDIO2))
AnnaBridge 156:ff21514d8981 362
AnnaBridge 156:ff21514d8981 363 /**
AnnaBridge 156:ff21514d8981 364 * @brief Vddio2 Monitor EXTI line configuration: clear falling edge and rising edge trigger.
AnnaBridge 156:ff21514d8981 365 * @retval None.
AnnaBridge 156:ff21514d8981 366 */
AnnaBridge 156:ff21514d8981 367 #define __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE() \
AnnaBridge 156:ff21514d8981 368 do{ \
AnnaBridge 156:ff21514d8981 369 EXTI->FTSR &= ~(PWR_EXTI_LINE_VDDIO2); \
AnnaBridge 156:ff21514d8981 370 EXTI->RTSR &= ~(PWR_EXTI_LINE_VDDIO2); \
AnnaBridge 156:ff21514d8981 371 } while(0)
AnnaBridge 156:ff21514d8981 372
AnnaBridge 156:ff21514d8981 373 /**
AnnaBridge 156:ff21514d8981 374 * @brief Vddio2 Monitor EXTI line configuration: set falling edge trigger.
AnnaBridge 156:ff21514d8981 375 * @retval None.
AnnaBridge 156:ff21514d8981 376 */
AnnaBridge 156:ff21514d8981 377 #define __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE() EXTI->FTSR |= (PWR_EXTI_LINE_VDDIO2)
AnnaBridge 156:ff21514d8981 378
AnnaBridge 156:ff21514d8981 379 /**
AnnaBridge 156:ff21514d8981 380 * @brief Check whether the specified VDDIO2 monitor EXTI interrupt flag is set or not.
AnnaBridge 156:ff21514d8981 381 * @retval EXTI VDDIO2 Monitor Line Status.
AnnaBridge 156:ff21514d8981 382 */
AnnaBridge 156:ff21514d8981 383 #define __HAL_PWR_VDDIO2_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_VDDIO2))
AnnaBridge 156:ff21514d8981 384
AnnaBridge 156:ff21514d8981 385 /**
AnnaBridge 156:ff21514d8981 386 * @brief Clear the VDDIO2 Monitor EXTI flag.
AnnaBridge 156:ff21514d8981 387 * @retval None.
AnnaBridge 156:ff21514d8981 388 */
AnnaBridge 156:ff21514d8981 389 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_VDDIO2))
AnnaBridge 156:ff21514d8981 390
AnnaBridge 156:ff21514d8981 391 /**
AnnaBridge 156:ff21514d8981 392 * @brief Generate a Software interrupt on selected EXTI line.
AnnaBridge 156:ff21514d8981 393 * @retval None.
AnnaBridge 156:ff21514d8981 394 */
AnnaBridge 156:ff21514d8981 395 #define __HAL_PWR_VDDIO2_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_VDDIO2))
AnnaBridge 156:ff21514d8981 396
AnnaBridge 156:ff21514d8981 397
AnnaBridge 156:ff21514d8981 398 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
AnnaBridge 156:ff21514d8981 399 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
AnnaBridge 156:ff21514d8981 400 defined (STM32F091xC) || defined (STM32F098xx) */
AnnaBridge 156:ff21514d8981 401
AnnaBridge 156:ff21514d8981 402 /**
AnnaBridge 156:ff21514d8981 403 * @}
AnnaBridge 156:ff21514d8981 404 */
AnnaBridge 156:ff21514d8981 405
AnnaBridge 156:ff21514d8981 406 /* Exported functions --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 407
AnnaBridge 156:ff21514d8981 408 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
AnnaBridge 156:ff21514d8981 409 * @{
AnnaBridge 156:ff21514d8981 410 */
AnnaBridge 156:ff21514d8981 411
AnnaBridge 156:ff21514d8981 412 /** @addtogroup PWREx_Exported_Functions_Group1
AnnaBridge 156:ff21514d8981 413 * @{
AnnaBridge 156:ff21514d8981 414 */
AnnaBridge 156:ff21514d8981 415 /* I/O operation functions ***************************************************/
AnnaBridge 156:ff21514d8981 416 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
AnnaBridge 156:ff21514d8981 417 defined (STM32F071xB) || defined (STM32F072xB) || \
AnnaBridge 156:ff21514d8981 418 defined (STM32F091xC)
AnnaBridge 156:ff21514d8981 419 void HAL_PWR_PVD_IRQHandler(void);
AnnaBridge 156:ff21514d8981 420 void HAL_PWR_PVDCallback(void);
AnnaBridge 156:ff21514d8981 421 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
AnnaBridge 156:ff21514d8981 422 /* defined (STM32F071xB) || defined (STM32F072xB) || */
AnnaBridge 156:ff21514d8981 423 /* defined (STM32F091xC) */
AnnaBridge 156:ff21514d8981 424
AnnaBridge 156:ff21514d8981 425 #if defined (STM32F042x6) || defined (STM32F048xx) || \
AnnaBridge 156:ff21514d8981 426 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
AnnaBridge 156:ff21514d8981 427 defined (STM32F091xC) || defined (STM32F098xx)
AnnaBridge 156:ff21514d8981 428 void HAL_PWREx_Vddio2Monitor_IRQHandler(void);
AnnaBridge 156:ff21514d8981 429 void HAL_PWREx_Vddio2MonitorCallback(void);
AnnaBridge 156:ff21514d8981 430 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
AnnaBridge 156:ff21514d8981 431 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
AnnaBridge 156:ff21514d8981 432 defined (STM32F091xC) || defined (STM32F098xx) */
AnnaBridge 156:ff21514d8981 433
AnnaBridge 156:ff21514d8981 434 /* Peripheral Control functions **********************************************/
AnnaBridge 156:ff21514d8981 435 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
AnnaBridge 156:ff21514d8981 436 defined (STM32F071xB) || defined (STM32F072xB) || \
AnnaBridge 156:ff21514d8981 437 defined (STM32F091xC)
AnnaBridge 156:ff21514d8981 438 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
AnnaBridge 156:ff21514d8981 439 void HAL_PWR_EnablePVD(void);
AnnaBridge 156:ff21514d8981 440 void HAL_PWR_DisablePVD(void);
AnnaBridge 156:ff21514d8981 441 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
AnnaBridge 156:ff21514d8981 442 /* defined (STM32F071xB) || defined (STM32F072xB) || */
AnnaBridge 156:ff21514d8981 443 /* defined (STM32F091xC) */
AnnaBridge 156:ff21514d8981 444
AnnaBridge 156:ff21514d8981 445 #if defined (STM32F042x6) || defined (STM32F048xx) || \
AnnaBridge 156:ff21514d8981 446 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
AnnaBridge 156:ff21514d8981 447 defined (STM32F091xC) || defined (STM32F098xx)
AnnaBridge 156:ff21514d8981 448 void HAL_PWREx_EnableVddio2Monitor(void);
AnnaBridge 156:ff21514d8981 449 void HAL_PWREx_DisableVddio2Monitor(void);
AnnaBridge 156:ff21514d8981 450 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
AnnaBridge 156:ff21514d8981 451 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
AnnaBridge 156:ff21514d8981 452 defined (STM32F091xC) || defined (STM32F098xx) */
AnnaBridge 156:ff21514d8981 453
AnnaBridge 156:ff21514d8981 454 /**
AnnaBridge 156:ff21514d8981 455 * @}
AnnaBridge 156:ff21514d8981 456 */
AnnaBridge 156:ff21514d8981 457
AnnaBridge 156:ff21514d8981 458 /**
AnnaBridge 156:ff21514d8981 459 * @}
AnnaBridge 156:ff21514d8981 460 */
AnnaBridge 156:ff21514d8981 461
AnnaBridge 156:ff21514d8981 462 /**
AnnaBridge 156:ff21514d8981 463 * @}
AnnaBridge 156:ff21514d8981 464 */
AnnaBridge 156:ff21514d8981 465
AnnaBridge 156:ff21514d8981 466 /**
AnnaBridge 156:ff21514d8981 467 * @}
AnnaBridge 156:ff21514d8981 468 */
AnnaBridge 156:ff21514d8981 469
AnnaBridge 156:ff21514d8981 470 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 471 }
AnnaBridge 156:ff21514d8981 472 #endif
AnnaBridge 156:ff21514d8981 473
AnnaBridge 156:ff21514d8981 474 #endif /* __STM32F0xx_HAL_PWR_EX_H */
AnnaBridge 156:ff21514d8981 475
AnnaBridge 156:ff21514d8981 476 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
AnnaBridge 156:ff21514d8981 477