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TARGET_NUCLEO_F091RC/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_flash_ex.h@157:e7ca05fa8600, 2017-11-09 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 09 11:14:10 2017 +0000
- Revision:
- 157:e7ca05fa8600
- Parent:
- 156:ff21514d8981
- Child:
- 160:5571c4ff569f
Release 155 of the mbed library.
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 156:ff21514d8981 | 1 | /** |
| AnnaBridge | 156:ff21514d8981 | 2 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 3 | * @file stm32f0xx_hal_flash_ex.h |
| AnnaBridge | 156:ff21514d8981 | 4 | * @author MCD Application Team |
| AnnaBridge | 156:ff21514d8981 | 5 | * @version V1.5.0 |
| AnnaBridge | 156:ff21514d8981 | 6 | * @date 04-November-2016 |
| AnnaBridge | 156:ff21514d8981 | 7 | * @brief Header file of Flash HAL Extended module. |
| AnnaBridge | 156:ff21514d8981 | 8 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 9 | * @attention |
| AnnaBridge | 156:ff21514d8981 | 10 | * |
| AnnaBridge | 156:ff21514d8981 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 156:ff21514d8981 | 12 | * |
| AnnaBridge | 156:ff21514d8981 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 156:ff21514d8981 | 14 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 156:ff21514d8981 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 156:ff21514d8981 | 16 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 156:ff21514d8981 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 156:ff21514d8981 | 18 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 156:ff21514d8981 | 19 | * and/or other materials provided with the distribution. |
| AnnaBridge | 156:ff21514d8981 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 156:ff21514d8981 | 21 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 156:ff21514d8981 | 22 | * without specific prior written permission. |
| AnnaBridge | 156:ff21514d8981 | 23 | * |
| AnnaBridge | 156:ff21514d8981 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 156:ff21514d8981 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 156:ff21514d8981 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 156:ff21514d8981 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 156:ff21514d8981 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 156:ff21514d8981 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 156:ff21514d8981 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 156:ff21514d8981 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 156:ff21514d8981 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 156:ff21514d8981 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 156:ff21514d8981 | 34 | * |
| AnnaBridge | 156:ff21514d8981 | 35 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 36 | */ |
| AnnaBridge | 156:ff21514d8981 | 37 | |
| AnnaBridge | 156:ff21514d8981 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 39 | #ifndef __STM32F0xx_HAL_FLASH_EX_H |
| AnnaBridge | 156:ff21514d8981 | 40 | #define __STM32F0xx_HAL_FLASH_EX_H |
| AnnaBridge | 156:ff21514d8981 | 41 | |
| AnnaBridge | 156:ff21514d8981 | 42 | #ifdef __cplusplus |
| AnnaBridge | 156:ff21514d8981 | 43 | extern "C" { |
| AnnaBridge | 156:ff21514d8981 | 44 | #endif |
| AnnaBridge | 156:ff21514d8981 | 45 | |
| AnnaBridge | 156:ff21514d8981 | 46 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 47 | #include "stm32f0xx_hal_def.h" |
| AnnaBridge | 156:ff21514d8981 | 48 | |
| AnnaBridge | 156:ff21514d8981 | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
| AnnaBridge | 156:ff21514d8981 | 50 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 51 | */ |
| AnnaBridge | 156:ff21514d8981 | 52 | |
| AnnaBridge | 156:ff21514d8981 | 53 | /** @addtogroup FLASHEx |
| AnnaBridge | 156:ff21514d8981 | 54 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 55 | */ |
| AnnaBridge | 156:ff21514d8981 | 56 | |
| AnnaBridge | 156:ff21514d8981 | 57 | /** @addtogroup FLASHEx_Private_Macros |
| AnnaBridge | 156:ff21514d8981 | 58 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 59 | */ |
| AnnaBridge | 156:ff21514d8981 | 60 | #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \ |
| AnnaBridge | 156:ff21514d8981 | 61 | ((VALUE) == FLASH_TYPEERASE_MASSERASE)) |
| AnnaBridge | 156:ff21514d8981 | 62 | |
| AnnaBridge | 156:ff21514d8981 | 63 | #define IS_OPTIONBYTE(VALUE) ((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA)) |
| AnnaBridge | 156:ff21514d8981 | 64 | |
| AnnaBridge | 156:ff21514d8981 | 65 | #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || \ |
| AnnaBridge | 156:ff21514d8981 | 66 | ((VALUE) == OB_WRPSTATE_ENABLE)) |
| AnnaBridge | 156:ff21514d8981 | 67 | |
| AnnaBridge | 156:ff21514d8981 | 68 | #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1)) |
| AnnaBridge | 156:ff21514d8981 | 69 | |
| AnnaBridge | 156:ff21514d8981 | 70 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ |
| AnnaBridge | 156:ff21514d8981 | 71 | ((LEVEL) == OB_RDP_LEVEL_1))/*||\ |
| AnnaBridge | 156:ff21514d8981 | 72 | ((LEVEL) == OB_RDP_LEVEL_2))*/ |
| AnnaBridge | 156:ff21514d8981 | 73 | |
| AnnaBridge | 156:ff21514d8981 | 74 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
| AnnaBridge | 156:ff21514d8981 | 75 | |
| AnnaBridge | 156:ff21514d8981 | 76 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) |
| AnnaBridge | 156:ff21514d8981 | 77 | |
| AnnaBridge | 156:ff21514d8981 | 78 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) |
| AnnaBridge | 156:ff21514d8981 | 79 | |
| AnnaBridge | 156:ff21514d8981 | 80 | #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET)) |
| AnnaBridge | 156:ff21514d8981 | 81 | |
| AnnaBridge | 156:ff21514d8981 | 82 | #define IS_OB_VDDA_ANALOG(ANALOG) (((ANALOG) == OB_VDDA_ANALOG_ON) || ((ANALOG) == OB_VDDA_ANALOG_OFF)) |
| AnnaBridge | 156:ff21514d8981 | 83 | |
| AnnaBridge | 156:ff21514d8981 | 84 | #define IS_OB_SRAM_PARITY(PARITY) (((PARITY) == OB_SRAM_PARITY_SET) || ((PARITY) == OB_SRAM_PARITY_RESET)) |
| AnnaBridge | 156:ff21514d8981 | 85 | |
| AnnaBridge | 156:ff21514d8981 | 86 | #if defined(FLASH_OBR_BOOT_SEL) |
| AnnaBridge | 156:ff21514d8981 | 87 | #define IS_OB_BOOT_SEL(BOOT_SEL) (((BOOT_SEL) == OB_BOOT_SEL_RESET) || ((BOOT_SEL) == OB_BOOT_SEL_SET)) |
| AnnaBridge | 156:ff21514d8981 | 88 | #define IS_OB_BOOT0(BOOT0) (((BOOT0) == OB_BOOT0_RESET) || ((BOOT0) == OB_BOOT0_SET)) |
| AnnaBridge | 156:ff21514d8981 | 89 | #endif /* FLASH_OBR_BOOT_SEL */ |
| AnnaBridge | 156:ff21514d8981 | 90 | |
| AnnaBridge | 156:ff21514d8981 | 91 | |
| AnnaBridge | 156:ff21514d8981 | 92 | #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000U)) |
| AnnaBridge | 156:ff21514d8981 | 93 | |
| AnnaBridge | 156:ff21514d8981 | 94 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= FLASH_BANK1_END) |
| AnnaBridge | 156:ff21514d8981 | 95 | |
| AnnaBridge | 156:ff21514d8981 | 96 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_BANK1_END)) |
| AnnaBridge | 156:ff21514d8981 | 97 | |
| AnnaBridge | 156:ff21514d8981 | 98 | /** |
| AnnaBridge | 156:ff21514d8981 | 99 | * @} |
| AnnaBridge | 156:ff21514d8981 | 100 | */ |
| AnnaBridge | 156:ff21514d8981 | 101 | |
| AnnaBridge | 156:ff21514d8981 | 102 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 103 | /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types |
| AnnaBridge | 156:ff21514d8981 | 104 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 105 | */ |
| AnnaBridge | 156:ff21514d8981 | 106 | /** |
| AnnaBridge | 156:ff21514d8981 | 107 | * @brief FLASH Erase structure definition |
| AnnaBridge | 156:ff21514d8981 | 108 | */ |
| AnnaBridge | 156:ff21514d8981 | 109 | typedef struct |
| AnnaBridge | 156:ff21514d8981 | 110 | { |
| AnnaBridge | 156:ff21514d8981 | 111 | uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase. |
| AnnaBridge | 156:ff21514d8981 | 112 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
| AnnaBridge | 156:ff21514d8981 | 113 | |
| AnnaBridge | 156:ff21514d8981 | 114 | uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled |
| AnnaBridge | 156:ff21514d8981 | 115 | This parameter must be a number between Min_Data = FLASH_BASE and Max_Data = FLASH_BANK1_END */ |
| AnnaBridge | 156:ff21514d8981 | 116 | |
| AnnaBridge | 156:ff21514d8981 | 117 | uint32_t NbPages; /*!< NbPages: Number of pagess to be erased. |
| AnnaBridge | 156:ff21514d8981 | 118 | This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/ |
| AnnaBridge | 156:ff21514d8981 | 119 | |
| AnnaBridge | 156:ff21514d8981 | 120 | } FLASH_EraseInitTypeDef; |
| AnnaBridge | 156:ff21514d8981 | 121 | |
| AnnaBridge | 156:ff21514d8981 | 122 | /** |
| AnnaBridge | 156:ff21514d8981 | 123 | * @brief FLASH Options bytes program structure definition |
| AnnaBridge | 156:ff21514d8981 | 124 | */ |
| AnnaBridge | 156:ff21514d8981 | 125 | typedef struct |
| AnnaBridge | 156:ff21514d8981 | 126 | { |
| AnnaBridge | 156:ff21514d8981 | 127 | uint32_t OptionType; /*!< OptionType: Option byte to be configured. |
| AnnaBridge | 156:ff21514d8981 | 128 | This parameter can be a value of @ref FLASHEx_OB_Type */ |
| AnnaBridge | 156:ff21514d8981 | 129 | |
| AnnaBridge | 156:ff21514d8981 | 130 | uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. |
| AnnaBridge | 156:ff21514d8981 | 131 | This parameter can be a value of @ref FLASHEx_OB_WRP_State */ |
| AnnaBridge | 156:ff21514d8981 | 132 | |
| AnnaBridge | 156:ff21514d8981 | 133 | uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected |
| AnnaBridge | 156:ff21514d8981 | 134 | This parameter can be a value of @ref FLASHEx_OB_Write_Protection */ |
| AnnaBridge | 156:ff21514d8981 | 135 | |
| AnnaBridge | 156:ff21514d8981 | 136 | uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.. |
| AnnaBridge | 156:ff21514d8981 | 137 | This parameter can be a value of @ref FLASHEx_OB_Read_Protection */ |
| AnnaBridge | 156:ff21514d8981 | 138 | |
| AnnaBridge | 156:ff21514d8981 | 139 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: |
| AnnaBridge | 156:ff21514d8981 | 140 | IWDG / STOP / STDBY / BOOT1 / VDDA_ANALOG / SRAM_PARITY |
| AnnaBridge | 156:ff21514d8981 | 141 | This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, |
| AnnaBridge | 156:ff21514d8981 | 142 | @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1, @ref FLASHEx_OB_VDDA_Analog_Monitoring and |
| AnnaBridge | 156:ff21514d8981 | 143 | @ref FLASHEx_OB_RAM_Parity_Check_Enable */ |
| AnnaBridge | 156:ff21514d8981 | 144 | |
| AnnaBridge | 156:ff21514d8981 | 145 | uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed |
| AnnaBridge | 156:ff21514d8981 | 146 | This parameter can be a value of @ref FLASHEx_OB_Data_Address */ |
| AnnaBridge | 156:ff21514d8981 | 147 | |
| AnnaBridge | 156:ff21514d8981 | 148 | uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA |
| AnnaBridge | 156:ff21514d8981 | 149 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
| AnnaBridge | 156:ff21514d8981 | 150 | } FLASH_OBProgramInitTypeDef; |
| AnnaBridge | 156:ff21514d8981 | 151 | /** |
| AnnaBridge | 156:ff21514d8981 | 152 | * @} |
| AnnaBridge | 156:ff21514d8981 | 153 | */ |
| AnnaBridge | 156:ff21514d8981 | 154 | |
| AnnaBridge | 156:ff21514d8981 | 155 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 156 | /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants |
| AnnaBridge | 156:ff21514d8981 | 157 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 158 | */ |
| AnnaBridge | 156:ff21514d8981 | 159 | |
| AnnaBridge | 156:ff21514d8981 | 160 | /** @defgroup FLASHEx_Page_Size FLASHEx Page Size |
| AnnaBridge | 156:ff21514d8981 | 161 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 162 | */ |
| AnnaBridge | 156:ff21514d8981 | 163 | #if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \ |
| AnnaBridge | 156:ff21514d8981 | 164 | || defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6) |
| AnnaBridge | 156:ff21514d8981 | 165 | #define FLASH_PAGE_SIZE 0x400U |
| AnnaBridge | 156:ff21514d8981 | 166 | #endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F058xx || STM32F070x6 */ |
| AnnaBridge | 156:ff21514d8981 | 167 | |
| AnnaBridge | 156:ff21514d8981 | 168 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \ |
| AnnaBridge | 156:ff21514d8981 | 169 | || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) |
| AnnaBridge | 156:ff21514d8981 | 170 | #define FLASH_PAGE_SIZE 0x800U |
| AnnaBridge | 156:ff21514d8981 | 171 | #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F030xC */ |
| AnnaBridge | 156:ff21514d8981 | 172 | /** |
| AnnaBridge | 156:ff21514d8981 | 173 | * @} |
| AnnaBridge | 156:ff21514d8981 | 174 | */ |
| AnnaBridge | 156:ff21514d8981 | 175 | |
| AnnaBridge | 156:ff21514d8981 | 176 | /** @defgroup FLASHEx_Type_Erase FLASH Type Erase |
| AnnaBridge | 156:ff21514d8981 | 177 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 178 | */ |
| AnnaBridge | 156:ff21514d8981 | 179 | #define FLASH_TYPEERASE_PAGES (0x00U) /*!<Pages erase only*/ |
| AnnaBridge | 156:ff21514d8981 | 180 | #define FLASH_TYPEERASE_MASSERASE (0x01U) /*!<Flash mass erase activation*/ |
| AnnaBridge | 156:ff21514d8981 | 181 | |
| AnnaBridge | 156:ff21514d8981 | 182 | /** |
| AnnaBridge | 156:ff21514d8981 | 183 | * @} |
| AnnaBridge | 156:ff21514d8981 | 184 | */ |
| AnnaBridge | 156:ff21514d8981 | 185 | |
| AnnaBridge | 156:ff21514d8981 | 186 | /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants |
| AnnaBridge | 156:ff21514d8981 | 187 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 188 | */ |
| AnnaBridge | 156:ff21514d8981 | 189 | |
| AnnaBridge | 156:ff21514d8981 | 190 | /** @defgroup FLASHEx_OB_Type Option Bytes Type |
| AnnaBridge | 156:ff21514d8981 | 191 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 192 | */ |
| AnnaBridge | 156:ff21514d8981 | 193 | #define OPTIONBYTE_WRP (0x01U) /*!<WRP option byte configuration*/ |
| AnnaBridge | 156:ff21514d8981 | 194 | #define OPTIONBYTE_RDP (0x02U) /*!<RDP option byte configuration*/ |
| AnnaBridge | 156:ff21514d8981 | 195 | #define OPTIONBYTE_USER (0x04U) /*!<USER option byte configuration*/ |
| AnnaBridge | 156:ff21514d8981 | 196 | #define OPTIONBYTE_DATA (0x08U) /*!<DATA option byte configuration*/ |
| AnnaBridge | 156:ff21514d8981 | 197 | |
| AnnaBridge | 156:ff21514d8981 | 198 | /** |
| AnnaBridge | 156:ff21514d8981 | 199 | * @} |
| AnnaBridge | 156:ff21514d8981 | 200 | */ |
| AnnaBridge | 156:ff21514d8981 | 201 | |
| AnnaBridge | 156:ff21514d8981 | 202 | /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State |
| AnnaBridge | 156:ff21514d8981 | 203 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 204 | */ |
| AnnaBridge | 156:ff21514d8981 | 205 | #define OB_WRPSTATE_DISABLE (0x00U) /*!<Disable the write protection of the desired pages*/ |
| AnnaBridge | 156:ff21514d8981 | 206 | #define OB_WRPSTATE_ENABLE (0x01U) /*!<Enable the write protection of the desired pagess*/ |
| AnnaBridge | 156:ff21514d8981 | 207 | |
| AnnaBridge | 156:ff21514d8981 | 208 | /** |
| AnnaBridge | 156:ff21514d8981 | 209 | * @} |
| AnnaBridge | 156:ff21514d8981 | 210 | */ |
| AnnaBridge | 156:ff21514d8981 | 211 | |
| AnnaBridge | 156:ff21514d8981 | 212 | /** @defgroup FLASHEx_OB_Write_Protection FLASHEx OB Write Protection |
| AnnaBridge | 156:ff21514d8981 | 213 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 214 | */ |
| AnnaBridge | 156:ff21514d8981 | 215 | #if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \ |
| AnnaBridge | 156:ff21514d8981 | 216 | || defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6) |
| AnnaBridge | 156:ff21514d8981 | 217 | #define OB_WRP_PAGES0TO3 (0x00000001U) /* Write protection of page 0 to 3 */ |
| AnnaBridge | 156:ff21514d8981 | 218 | #define OB_WRP_PAGES4TO7 (0x00000002U) /* Write protection of page 4 to 7 */ |
| AnnaBridge | 156:ff21514d8981 | 219 | #define OB_WRP_PAGES8TO11 (0x00000004U) /* Write protection of page 8 to 11 */ |
| AnnaBridge | 156:ff21514d8981 | 220 | #define OB_WRP_PAGES12TO15 (0x00000008U) /* Write protection of page 12 to 15 */ |
| AnnaBridge | 156:ff21514d8981 | 221 | #define OB_WRP_PAGES16TO19 (0x00000010U) /* Write protection of page 16 to 19 */ |
| AnnaBridge | 156:ff21514d8981 | 222 | #define OB_WRP_PAGES20TO23 (0x00000020U) /* Write protection of page 20 to 23 */ |
| AnnaBridge | 156:ff21514d8981 | 223 | #define OB_WRP_PAGES24TO27 (0x00000040U) /* Write protection of page 24 to 27 */ |
| AnnaBridge | 156:ff21514d8981 | 224 | #define OB_WRP_PAGES28TO31 (0x00000080U) /* Write protection of page 28 to 31 */ |
| AnnaBridge | 156:ff21514d8981 | 225 | #if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx) |
| AnnaBridge | 156:ff21514d8981 | 226 | #define OB_WRP_PAGES32TO35 (0x00000100U) /* Write protection of page 32 to 35 */ |
| AnnaBridge | 156:ff21514d8981 | 227 | #define OB_WRP_PAGES36TO39 (0x00000200U) /* Write protection of page 36 to 39 */ |
| AnnaBridge | 156:ff21514d8981 | 228 | #define OB_WRP_PAGES40TO43 (0x00000400U) /* Write protection of page 40 to 43 */ |
| AnnaBridge | 156:ff21514d8981 | 229 | #define OB_WRP_PAGES44TO47 (0x00000800U) /* Write protection of page 44 to 47 */ |
| AnnaBridge | 156:ff21514d8981 | 230 | #define OB_WRP_PAGES48TO51 (0x00001000U) /* Write protection of page 48 to 51 */ |
| AnnaBridge | 156:ff21514d8981 | 231 | #define OB_WRP_PAGES52TO57 (0x00002000U) /* Write protection of page 52 to 57 */ |
| AnnaBridge | 156:ff21514d8981 | 232 | #define OB_WRP_PAGES56TO59 (0x00004000U) /* Write protection of page 56 to 59 */ |
| AnnaBridge | 156:ff21514d8981 | 233 | #define OB_WRP_PAGES60TO63 (0x00008000U) /* Write protection of page 60 to 63 */ |
| AnnaBridge | 156:ff21514d8981 | 234 | #endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */ |
| AnnaBridge | 156:ff21514d8981 | 235 | |
| AnnaBridge | 156:ff21514d8981 | 236 | #if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \ |
| AnnaBridge | 156:ff21514d8981 | 237 | || defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6) |
| AnnaBridge | 156:ff21514d8981 | 238 | #define OB_WRP_PAGES0TO31MASK (0x000000FFU) |
| AnnaBridge | 156:ff21514d8981 | 239 | #endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F058xx || STM32F070x6 */ |
| AnnaBridge | 156:ff21514d8981 | 240 | |
| AnnaBridge | 156:ff21514d8981 | 241 | #if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx) |
| AnnaBridge | 156:ff21514d8981 | 242 | #define OB_WRP_PAGES32TO63MASK (0x0000FF00U) |
| AnnaBridge | 156:ff21514d8981 | 243 | #endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */ |
| AnnaBridge | 156:ff21514d8981 | 244 | |
| AnnaBridge | 156:ff21514d8981 | 245 | #if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F038xx)|| defined(STM32F070x6) |
| AnnaBridge | 156:ff21514d8981 | 246 | #define OB_WRP_ALLPAGES (0x000000FFU) /*!< Write protection of all pages */ |
| AnnaBridge | 156:ff21514d8981 | 247 | #endif /* STM32F030x6 || STM32F031x6 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F070x6 */ |
| AnnaBridge | 156:ff21514d8981 | 248 | |
| AnnaBridge | 156:ff21514d8981 | 249 | #if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx) |
| AnnaBridge | 156:ff21514d8981 | 250 | #define OB_WRP_ALLPAGES (0x0000FFFFU) /*!< Write protection of all pages */ |
| AnnaBridge | 156:ff21514d8981 | 251 | #endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */ |
| AnnaBridge | 156:ff21514d8981 | 252 | #endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F058xx || STM32F070x6 */ |
| AnnaBridge | 156:ff21514d8981 | 253 | |
| AnnaBridge | 156:ff21514d8981 | 254 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \ |
| AnnaBridge | 156:ff21514d8981 | 255 | || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) |
| AnnaBridge | 156:ff21514d8981 | 256 | #define OB_WRP_PAGES0TO1 (0x00000001U) /* Write protection of page 0 to 1 */ |
| AnnaBridge | 156:ff21514d8981 | 257 | #define OB_WRP_PAGES2TO3 (0x00000002U) /* Write protection of page 2 to 3 */ |
| AnnaBridge | 156:ff21514d8981 | 258 | #define OB_WRP_PAGES4TO5 (0x00000004U) /* Write protection of page 4 to 5 */ |
| AnnaBridge | 156:ff21514d8981 | 259 | #define OB_WRP_PAGES6TO7 (0x00000008U) /* Write protection of page 6 to 7 */ |
| AnnaBridge | 156:ff21514d8981 | 260 | #define OB_WRP_PAGES8TO9 (0x00000010U) /* Write protection of page 8 to 9 */ |
| AnnaBridge | 156:ff21514d8981 | 261 | #define OB_WRP_PAGES10TO11 (0x00000020U) /* Write protection of page 10 to 11 */ |
| AnnaBridge | 156:ff21514d8981 | 262 | #define OB_WRP_PAGES12TO13 (0x00000040U) /* Write protection of page 12 to 13 */ |
| AnnaBridge | 156:ff21514d8981 | 263 | #define OB_WRP_PAGES14TO15 (0x00000080U) /* Write protection of page 14 to 15 */ |
| AnnaBridge | 156:ff21514d8981 | 264 | #define OB_WRP_PAGES16TO17 (0x00000100U) /* Write protection of page 16 to 17 */ |
| AnnaBridge | 156:ff21514d8981 | 265 | #define OB_WRP_PAGES18TO19 (0x00000200U) /* Write protection of page 18 to 19 */ |
| AnnaBridge | 156:ff21514d8981 | 266 | #define OB_WRP_PAGES20TO21 (0x00000400U) /* Write protection of page 20 to 21 */ |
| AnnaBridge | 156:ff21514d8981 | 267 | #define OB_WRP_PAGES22TO23 (0x00000800U) /* Write protection of page 22 to 23 */ |
| AnnaBridge | 156:ff21514d8981 | 268 | #define OB_WRP_PAGES24TO25 (0x00001000U) /* Write protection of page 24 to 25 */ |
| AnnaBridge | 156:ff21514d8981 | 269 | #define OB_WRP_PAGES26TO27 (0x00002000U) /* Write protection of page 26 to 27 */ |
| AnnaBridge | 156:ff21514d8981 | 270 | #define OB_WRP_PAGES28TO29 (0x00004000U) /* Write protection of page 28 to 29 */ |
| AnnaBridge | 156:ff21514d8981 | 271 | #define OB_WRP_PAGES30TO31 (0x00008000U) /* Write protection of page 30 to 31 */ |
| AnnaBridge | 156:ff21514d8981 | 272 | #define OB_WRP_PAGES32TO33 (0x00010000U) /* Write protection of page 32 to 33 */ |
| AnnaBridge | 156:ff21514d8981 | 273 | #define OB_WRP_PAGES34TO35 (0x00020000U) /* Write protection of page 34 to 35 */ |
| AnnaBridge | 156:ff21514d8981 | 274 | #define OB_WRP_PAGES36TO37 (0x00040000U) /* Write protection of page 36 to 37 */ |
| AnnaBridge | 156:ff21514d8981 | 275 | #define OB_WRP_PAGES38TO39 (0x00080000U) /* Write protection of page 38 to 39 */ |
| AnnaBridge | 156:ff21514d8981 | 276 | #define OB_WRP_PAGES40TO41 (0x00100000U) /* Write protection of page 40 to 41 */ |
| AnnaBridge | 156:ff21514d8981 | 277 | #define OB_WRP_PAGES42TO43 (0x00200000U) /* Write protection of page 42 to 43 */ |
| AnnaBridge | 156:ff21514d8981 | 278 | #define OB_WRP_PAGES44TO45 (0x00400000U) /* Write protection of page 44 to 45 */ |
| AnnaBridge | 156:ff21514d8981 | 279 | #define OB_WRP_PAGES46TO47 (0x00800000U) /* Write protection of page 46 to 47 */ |
| AnnaBridge | 156:ff21514d8981 | 280 | #define OB_WRP_PAGES48TO49 (0x01000000U) /* Write protection of page 48 to 49 */ |
| AnnaBridge | 156:ff21514d8981 | 281 | #define OB_WRP_PAGES50TO51 (0x02000000U) /* Write protection of page 50 to 51 */ |
| AnnaBridge | 156:ff21514d8981 | 282 | #define OB_WRP_PAGES52TO53 (0x04000000U) /* Write protection of page 52 to 53 */ |
| AnnaBridge | 156:ff21514d8981 | 283 | #define OB_WRP_PAGES54TO55 (0x08000000U) /* Write protection of page 54 to 55 */ |
| AnnaBridge | 156:ff21514d8981 | 284 | #define OB_WRP_PAGES56TO57 (0x10000000U) /* Write protection of page 56 to 57 */ |
| AnnaBridge | 156:ff21514d8981 | 285 | #define OB_WRP_PAGES58TO59 (0x20000000U) /* Write protection of page 58 to 59 */ |
| AnnaBridge | 156:ff21514d8981 | 286 | #define OB_WRP_PAGES60TO61 (0x40000000U) /* Write protection of page 60 to 61 */ |
| AnnaBridge | 156:ff21514d8981 | 287 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) |
| AnnaBridge | 156:ff21514d8981 | 288 | #define OB_WRP_PAGES62TO63 (0x80000000U) /* Write protection of page 62 to 63 */ |
| AnnaBridge | 156:ff21514d8981 | 289 | #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB */ |
| AnnaBridge | 156:ff21514d8981 | 290 | #if defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) |
| AnnaBridge | 156:ff21514d8981 | 291 | #define OB_WRP_PAGES62TO127 (0x80000000U) /* Write protection of page 62 to 127 */ |
| AnnaBridge | 156:ff21514d8981 | 292 | #endif /* STM32F091xC || STM32F098xx || STM32F030xC */ |
| AnnaBridge | 156:ff21514d8981 | 293 | |
| AnnaBridge | 156:ff21514d8981 | 294 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \ |
| AnnaBridge | 156:ff21514d8981 | 295 | || defined(STM32F091xC) || defined(STM32F098xx)|| defined(STM32F030xC) |
| AnnaBridge | 156:ff21514d8981 | 296 | #define OB_WRP_PAGES0TO15MASK (0x000000FFU) |
| AnnaBridge | 156:ff21514d8981 | 297 | #define OB_WRP_PAGES16TO31MASK (0x0000FF00U) |
| AnnaBridge | 156:ff21514d8981 | 298 | #define OB_WRP_PAGES32TO47MASK (0x00FF0000U) |
| AnnaBridge | 156:ff21514d8981 | 299 | #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F070xB || STM32F030xC */ |
| AnnaBridge | 156:ff21514d8981 | 300 | |
| AnnaBridge | 156:ff21514d8981 | 301 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) |
| AnnaBridge | 156:ff21514d8981 | 302 | #define OB_WRP_PAGES48TO63MASK (0xFF000000U) |
| AnnaBridge | 156:ff21514d8981 | 303 | #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB */ |
| AnnaBridge | 156:ff21514d8981 | 304 | #if defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) |
| AnnaBridge | 156:ff21514d8981 | 305 | #define OB_WRP_PAGES48TO127MASK (0xFF000000U) |
| AnnaBridge | 156:ff21514d8981 | 306 | #endif /* STM32F091xC || STM32F098xx || STM32F030xC */ |
| AnnaBridge | 156:ff21514d8981 | 307 | |
| AnnaBridge | 156:ff21514d8981 | 308 | #define OB_WRP_ALLPAGES (0xFFFFFFFFU) /*!< Write protection of all pages */ |
| AnnaBridge | 156:ff21514d8981 | 309 | #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F030xC || STM32F070xB */ |
| AnnaBridge | 156:ff21514d8981 | 310 | |
| AnnaBridge | 156:ff21514d8981 | 311 | /** |
| AnnaBridge | 156:ff21514d8981 | 312 | * @} |
| AnnaBridge | 156:ff21514d8981 | 313 | */ |
| AnnaBridge | 156:ff21514d8981 | 314 | |
| AnnaBridge | 156:ff21514d8981 | 315 | /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection |
| AnnaBridge | 156:ff21514d8981 | 316 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 317 | */ |
| AnnaBridge | 156:ff21514d8981 | 318 | #define OB_RDP_LEVEL_0 ((uint8_t)0xAAU) |
| AnnaBridge | 156:ff21514d8981 | 319 | #define OB_RDP_LEVEL_1 ((uint8_t)0xBBU) |
| AnnaBridge | 156:ff21514d8981 | 320 | #define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /*!< Warning: When enabling read protection level 2 |
| AnnaBridge | 156:ff21514d8981 | 321 | it's no more possible to go back to level 1 or 0 */ |
| AnnaBridge | 156:ff21514d8981 | 322 | /** |
| AnnaBridge | 156:ff21514d8981 | 323 | * @} |
| AnnaBridge | 156:ff21514d8981 | 324 | */ |
| AnnaBridge | 156:ff21514d8981 | 325 | |
| AnnaBridge | 156:ff21514d8981 | 326 | /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog |
| AnnaBridge | 156:ff21514d8981 | 327 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 328 | */ |
| AnnaBridge | 156:ff21514d8981 | 329 | #define OB_IWDG_SW ((uint8_t)0x01U) /*!< Software IWDG selected */ |
| AnnaBridge | 156:ff21514d8981 | 330 | #define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware IWDG selected */ |
| AnnaBridge | 156:ff21514d8981 | 331 | /** |
| AnnaBridge | 156:ff21514d8981 | 332 | * @} |
| AnnaBridge | 156:ff21514d8981 | 333 | */ |
| AnnaBridge | 156:ff21514d8981 | 334 | |
| AnnaBridge | 156:ff21514d8981 | 335 | /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP |
| AnnaBridge | 156:ff21514d8981 | 336 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 337 | */ |
| AnnaBridge | 156:ff21514d8981 | 338 | #define OB_STOP_NO_RST ((uint8_t)0x02U) /*!< No reset generated when entering in STOP */ |
| AnnaBridge | 156:ff21514d8981 | 339 | #define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */ |
| AnnaBridge | 156:ff21514d8981 | 340 | /** |
| AnnaBridge | 156:ff21514d8981 | 341 | * @} |
| AnnaBridge | 156:ff21514d8981 | 342 | */ |
| AnnaBridge | 156:ff21514d8981 | 343 | |
| AnnaBridge | 156:ff21514d8981 | 344 | /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY |
| AnnaBridge | 156:ff21514d8981 | 345 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 346 | */ |
| AnnaBridge | 156:ff21514d8981 | 347 | #define OB_STDBY_NO_RST ((uint8_t)0x04U) /*!< No reset generated when entering in STANDBY */ |
| AnnaBridge | 156:ff21514d8981 | 348 | #define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */ |
| AnnaBridge | 156:ff21514d8981 | 349 | /** |
| AnnaBridge | 156:ff21514d8981 | 350 | * @} |
| AnnaBridge | 156:ff21514d8981 | 351 | */ |
| AnnaBridge | 156:ff21514d8981 | 352 | |
| AnnaBridge | 156:ff21514d8981 | 353 | /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1 |
| AnnaBridge | 156:ff21514d8981 | 354 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 355 | */ |
| AnnaBridge | 156:ff21514d8981 | 356 | #define OB_BOOT1_RESET ((uint8_t)0x00U) /*!< BOOT1 Reset */ |
| AnnaBridge | 156:ff21514d8981 | 357 | #define OB_BOOT1_SET ((uint8_t)0x10U) /*!< BOOT1 Set */ |
| AnnaBridge | 156:ff21514d8981 | 358 | /** |
| AnnaBridge | 156:ff21514d8981 | 359 | * @} |
| AnnaBridge | 156:ff21514d8981 | 360 | */ |
| AnnaBridge | 156:ff21514d8981 | 361 | |
| AnnaBridge | 156:ff21514d8981 | 362 | /** @defgroup FLASHEx_OB_VDDA_Analog_Monitoring Option Byte VDDA Analog Monitoring |
| AnnaBridge | 156:ff21514d8981 | 363 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 364 | */ |
| AnnaBridge | 156:ff21514d8981 | 365 | #define OB_VDDA_ANALOG_ON ((uint8_t)0x20U) /*!< Analog monitoring on VDDA Power source ON */ |
| AnnaBridge | 156:ff21514d8981 | 366 | #define OB_VDDA_ANALOG_OFF ((uint8_t)0x00U) /*!< Analog monitoring on VDDA Power source OFF */ |
| AnnaBridge | 156:ff21514d8981 | 367 | /** |
| AnnaBridge | 156:ff21514d8981 | 368 | * @} |
| AnnaBridge | 156:ff21514d8981 | 369 | */ |
| AnnaBridge | 156:ff21514d8981 | 370 | |
| AnnaBridge | 156:ff21514d8981 | 371 | /** @defgroup FLASHEx_OB_RAM_Parity_Check_Enable Option Byte SRAM Parity Check Enable |
| AnnaBridge | 156:ff21514d8981 | 372 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 373 | */ |
| AnnaBridge | 156:ff21514d8981 | 374 | #define OB_SRAM_PARITY_SET ((uint8_t)0x00U) /*!< SRAM parity check enable set */ |
| AnnaBridge | 156:ff21514d8981 | 375 | #define OB_SRAM_PARITY_RESET ((uint8_t)0x40U) /*!< SRAM parity check enable reset */ |
| AnnaBridge | 156:ff21514d8981 | 376 | /** |
| AnnaBridge | 156:ff21514d8981 | 377 | * @} |
| AnnaBridge | 156:ff21514d8981 | 378 | */ |
| AnnaBridge | 156:ff21514d8981 | 379 | |
| AnnaBridge | 156:ff21514d8981 | 380 | #if defined(FLASH_OBR_BOOT_SEL) |
| AnnaBridge | 156:ff21514d8981 | 381 | /** @defgroup FLASHEx_OB_BOOT_SEL FLASHEx Option Byte BOOT SEL |
| AnnaBridge | 156:ff21514d8981 | 382 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 383 | */ |
| AnnaBridge | 156:ff21514d8981 | 384 | #define OB_BOOT_SEL_RESET ((uint8_t)0x00U) /*!< BOOT_SEL Reset */ |
| AnnaBridge | 156:ff21514d8981 | 385 | #define OB_BOOT_SEL_SET ((uint8_t)0x80U) /*!< BOOT_SEL Set */ |
| AnnaBridge | 156:ff21514d8981 | 386 | /** |
| AnnaBridge | 156:ff21514d8981 | 387 | * @} |
| AnnaBridge | 156:ff21514d8981 | 388 | */ |
| AnnaBridge | 156:ff21514d8981 | 389 | |
| AnnaBridge | 156:ff21514d8981 | 390 | /** @defgroup FLASHEx_OB_BOOT0 FLASHEx Option Byte BOOT0 |
| AnnaBridge | 156:ff21514d8981 | 391 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 392 | */ |
| AnnaBridge | 156:ff21514d8981 | 393 | #define OB_BOOT0_RESET ((uint8_t)0x00U) /*!< BOOT0 Reset */ |
| AnnaBridge | 156:ff21514d8981 | 394 | #define OB_BOOT0_SET ((uint8_t)0x08U) /*!< BOOT0 Set */ |
| AnnaBridge | 156:ff21514d8981 | 395 | /** |
| AnnaBridge | 156:ff21514d8981 | 396 | * @} |
| AnnaBridge | 156:ff21514d8981 | 397 | */ |
| AnnaBridge | 156:ff21514d8981 | 398 | #endif /* FLASH_OBR_BOOT_SEL */ |
| AnnaBridge | 156:ff21514d8981 | 399 | |
| AnnaBridge | 156:ff21514d8981 | 400 | |
| AnnaBridge | 156:ff21514d8981 | 401 | /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address |
| AnnaBridge | 156:ff21514d8981 | 402 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 403 | */ |
| AnnaBridge | 156:ff21514d8981 | 404 | #define OB_DATA_ADDRESS_DATA0 (0x1FFFF804U) |
| AnnaBridge | 156:ff21514d8981 | 405 | #define OB_DATA_ADDRESS_DATA1 (0x1FFFF806U) |
| AnnaBridge | 156:ff21514d8981 | 406 | /** |
| AnnaBridge | 156:ff21514d8981 | 407 | * @} |
| AnnaBridge | 156:ff21514d8981 | 408 | */ |
| AnnaBridge | 156:ff21514d8981 | 409 | |
| AnnaBridge | 156:ff21514d8981 | 410 | /** |
| AnnaBridge | 156:ff21514d8981 | 411 | * @} |
| AnnaBridge | 156:ff21514d8981 | 412 | */ |
| AnnaBridge | 156:ff21514d8981 | 413 | |
| AnnaBridge | 156:ff21514d8981 | 414 | /** |
| AnnaBridge | 156:ff21514d8981 | 415 | * @} |
| AnnaBridge | 156:ff21514d8981 | 416 | */ |
| AnnaBridge | 156:ff21514d8981 | 417 | |
| AnnaBridge | 156:ff21514d8981 | 418 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 419 | /** @addtogroup FLASHEx_Exported_Functions |
| AnnaBridge | 156:ff21514d8981 | 420 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 421 | */ |
| AnnaBridge | 156:ff21514d8981 | 422 | |
| AnnaBridge | 156:ff21514d8981 | 423 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
| AnnaBridge | 156:ff21514d8981 | 424 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 425 | */ |
| AnnaBridge | 156:ff21514d8981 | 426 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 156:ff21514d8981 | 427 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); |
| AnnaBridge | 156:ff21514d8981 | 428 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
| AnnaBridge | 156:ff21514d8981 | 429 | |
| AnnaBridge | 156:ff21514d8981 | 430 | /** |
| AnnaBridge | 156:ff21514d8981 | 431 | * @} |
| AnnaBridge | 156:ff21514d8981 | 432 | */ |
| AnnaBridge | 156:ff21514d8981 | 433 | |
| AnnaBridge | 156:ff21514d8981 | 434 | /** @addtogroup FLASHEx_Exported_Functions_Group2 |
| AnnaBridge | 156:ff21514d8981 | 435 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 436 | */ |
| AnnaBridge | 156:ff21514d8981 | 437 | /* Peripheral Control functions ***********************************************/ |
| AnnaBridge | 156:ff21514d8981 | 438 | HAL_StatusTypeDef HAL_FLASHEx_OBErase(void); |
| AnnaBridge | 156:ff21514d8981 | 439 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
| AnnaBridge | 156:ff21514d8981 | 440 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
| AnnaBridge | 156:ff21514d8981 | 441 | uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress); |
| AnnaBridge | 156:ff21514d8981 | 442 | |
| AnnaBridge | 156:ff21514d8981 | 443 | /** |
| AnnaBridge | 156:ff21514d8981 | 444 | * @} |
| AnnaBridge | 156:ff21514d8981 | 445 | */ |
| AnnaBridge | 156:ff21514d8981 | 446 | |
| AnnaBridge | 156:ff21514d8981 | 447 | /** |
| AnnaBridge | 156:ff21514d8981 | 448 | * @} |
| AnnaBridge | 156:ff21514d8981 | 449 | */ |
| AnnaBridge | 156:ff21514d8981 | 450 | |
| AnnaBridge | 156:ff21514d8981 | 451 | /** |
| AnnaBridge | 156:ff21514d8981 | 452 | * @} |
| AnnaBridge | 156:ff21514d8981 | 453 | */ |
| AnnaBridge | 156:ff21514d8981 | 454 | |
| AnnaBridge | 156:ff21514d8981 | 455 | /** |
| AnnaBridge | 156:ff21514d8981 | 456 | * @} |
| AnnaBridge | 156:ff21514d8981 | 457 | */ |
| AnnaBridge | 156:ff21514d8981 | 458 | |
| AnnaBridge | 156:ff21514d8981 | 459 | #ifdef __cplusplus |
| AnnaBridge | 156:ff21514d8981 | 460 | } |
| AnnaBridge | 156:ff21514d8981 | 461 | #endif |
| AnnaBridge | 156:ff21514d8981 | 462 | |
| AnnaBridge | 156:ff21514d8981 | 463 | #endif /* __STM32F0xx_HAL_FLASH_EX_H */ |
| AnnaBridge | 156:ff21514d8981 | 464 | |
| AnnaBridge | 156:ff21514d8981 | 465 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| AnnaBridge | 156:ff21514d8981 | 466 |
