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TARGET_LPC546XX/cmsis_armclang.h@157:e7ca05fa8600, 2017-11-09 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 09 11:14:10 2017 +0000
Revision:
157:e7ca05fa8600
Parent:
153:b484a57bc302
Child:
160:5571c4ff569f
Release 155 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 153:b484a57bc302 1 /**************************************************************************//**
AnnaBridge 153:b484a57bc302 2 * @file cmsis_armclang.h
AnnaBridge 153:b484a57bc302 3 * @brief CMSIS compiler ARMCLANG (ARM compiler V6) header file
AnnaBridge 153:b484a57bc302 4 * @version V5.0.3
AnnaBridge 153:b484a57bc302 5 * @date 27. March 2017
AnnaBridge 153:b484a57bc302 6 ******************************************************************************/
AnnaBridge 153:b484a57bc302 7 /*
AnnaBridge 153:b484a57bc302 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 153:b484a57bc302 9 *
AnnaBridge 153:b484a57bc302 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 153:b484a57bc302 11 *
AnnaBridge 153:b484a57bc302 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 153:b484a57bc302 13 * not use this file except in compliance with the License.
AnnaBridge 153:b484a57bc302 14 * You may obtain a copy of the License at
AnnaBridge 153:b484a57bc302 15 *
AnnaBridge 153:b484a57bc302 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 153:b484a57bc302 17 *
AnnaBridge 153:b484a57bc302 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 153:b484a57bc302 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 153:b484a57bc302 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 153:b484a57bc302 21 * See the License for the specific language governing permissions and
AnnaBridge 153:b484a57bc302 22 * limitations under the License.
AnnaBridge 153:b484a57bc302 23 */
AnnaBridge 153:b484a57bc302 24
AnnaBridge 153:b484a57bc302 25 //lint -esym(9058, IRQn) disable MISRA 2012 Rule 2.4 for IRQn
AnnaBridge 153:b484a57bc302 26
AnnaBridge 153:b484a57bc302 27 #ifndef __CMSIS_ARMCLANG_H
AnnaBridge 153:b484a57bc302 28 #define __CMSIS_ARMCLANG_H
AnnaBridge 153:b484a57bc302 29
AnnaBridge 153:b484a57bc302 30 #ifndef __ARM_COMPAT_H
AnnaBridge 153:b484a57bc302 31 #include <arm_compat.h> /* Compatibility header for ARM Compiler 5 intrinsics */
AnnaBridge 153:b484a57bc302 32 #endif
AnnaBridge 153:b484a57bc302 33
AnnaBridge 153:b484a57bc302 34 /* CMSIS compiler specific defines */
AnnaBridge 153:b484a57bc302 35 #ifndef __ASM
AnnaBridge 153:b484a57bc302 36 #define __ASM __asm
AnnaBridge 153:b484a57bc302 37 #endif
AnnaBridge 153:b484a57bc302 38 #ifndef __INLINE
AnnaBridge 153:b484a57bc302 39 #define __INLINE __inline
AnnaBridge 153:b484a57bc302 40 #endif
AnnaBridge 153:b484a57bc302 41 #ifndef __STATIC_INLINE
AnnaBridge 153:b484a57bc302 42 #define __STATIC_INLINE static __inline
AnnaBridge 153:b484a57bc302 43 #endif
AnnaBridge 153:b484a57bc302 44 #ifndef __NO_RETURN
AnnaBridge 153:b484a57bc302 45 #define __NO_RETURN __attribute__((noreturn))
AnnaBridge 153:b484a57bc302 46 #endif
AnnaBridge 153:b484a57bc302 47 #ifndef __USED
AnnaBridge 153:b484a57bc302 48 #define __USED __attribute__((used))
AnnaBridge 153:b484a57bc302 49 #endif
AnnaBridge 153:b484a57bc302 50 #ifndef __WEAK
AnnaBridge 153:b484a57bc302 51 #define __WEAK __attribute__((weak))
AnnaBridge 153:b484a57bc302 52 #endif
AnnaBridge 153:b484a57bc302 53 #ifndef __PACKED
AnnaBridge 153:b484a57bc302 54 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 153:b484a57bc302 55 #endif
AnnaBridge 153:b484a57bc302 56 #ifndef __PACKED_STRUCT
AnnaBridge 153:b484a57bc302 57 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 153:b484a57bc302 58 #endif
AnnaBridge 153:b484a57bc302 59 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 153:b484a57bc302 60 #pragma clang diagnostic push
AnnaBridge 153:b484a57bc302 61 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 153:b484a57bc302 62 //lint -esym(9058, T_UINT32) disable MISRA 2012 Rule 2.4 for T_UINT32
AnnaBridge 153:b484a57bc302 63 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge 153:b484a57bc302 64 #pragma clang diagnostic pop
AnnaBridge 153:b484a57bc302 65 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge 153:b484a57bc302 66 #endif
AnnaBridge 153:b484a57bc302 67 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 153:b484a57bc302 68 #pragma clang diagnostic push
AnnaBridge 153:b484a57bc302 69 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 153:b484a57bc302 70 //lint -esym(9058, T_UINT16_WRITE) disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE
AnnaBridge 153:b484a57bc302 71 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 153:b484a57bc302 72 #pragma clang diagnostic pop
AnnaBridge 153:b484a57bc302 73 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 153:b484a57bc302 74 #endif
AnnaBridge 153:b484a57bc302 75 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 153:b484a57bc302 76 #pragma clang diagnostic push
AnnaBridge 153:b484a57bc302 77 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 153:b484a57bc302 78 //lint -esym(9058, T_UINT16_READ) disable MISRA 2012 Rule 2.4 for T_UINT16_READ
AnnaBridge 153:b484a57bc302 79 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 153:b484a57bc302 80 #pragma clang diagnostic pop
AnnaBridge 153:b484a57bc302 81 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 153:b484a57bc302 82 #endif
AnnaBridge 153:b484a57bc302 83 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 153:b484a57bc302 84 #pragma clang diagnostic push
AnnaBridge 153:b484a57bc302 85 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 153:b484a57bc302 86 //lint -esym(9058, T_UINT32_WRITE) disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE
AnnaBridge 153:b484a57bc302 87 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 153:b484a57bc302 88 #pragma clang diagnostic pop
AnnaBridge 153:b484a57bc302 89 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 153:b484a57bc302 90 #endif
AnnaBridge 153:b484a57bc302 91 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 153:b484a57bc302 92 #pragma clang diagnostic push
AnnaBridge 153:b484a57bc302 93 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 153:b484a57bc302 94 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 153:b484a57bc302 95 #pragma clang diagnostic pop
AnnaBridge 153:b484a57bc302 96 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 153:b484a57bc302 97 #endif
AnnaBridge 153:b484a57bc302 98 #ifndef __ALIGNED
AnnaBridge 153:b484a57bc302 99 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 153:b484a57bc302 100 #endif
AnnaBridge 153:b484a57bc302 101
AnnaBridge 153:b484a57bc302 102
AnnaBridge 153:b484a57bc302 103 /* ########################### Core Function Access ########################### */
AnnaBridge 153:b484a57bc302 104 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 153:b484a57bc302 105 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 153:b484a57bc302 106 @{
AnnaBridge 153:b484a57bc302 107 */
AnnaBridge 153:b484a57bc302 108
AnnaBridge 153:b484a57bc302 109 /**
AnnaBridge 153:b484a57bc302 110 \brief Enable IRQ Interrupts
AnnaBridge 153:b484a57bc302 111 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 153:b484a57bc302 112 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 113 */
AnnaBridge 153:b484a57bc302 114 /* intrinsic void __enable_irq(); see arm_compat.h */
AnnaBridge 153:b484a57bc302 115
AnnaBridge 153:b484a57bc302 116
AnnaBridge 153:b484a57bc302 117 /**
AnnaBridge 153:b484a57bc302 118 \brief Disable IRQ Interrupts
AnnaBridge 153:b484a57bc302 119 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 153:b484a57bc302 120 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 121 */
AnnaBridge 153:b484a57bc302 122 /* intrinsic void __disable_irq(); see arm_compat.h */
AnnaBridge 153:b484a57bc302 123
AnnaBridge 153:b484a57bc302 124
AnnaBridge 153:b484a57bc302 125 /**
AnnaBridge 153:b484a57bc302 126 \brief Get Control Register
AnnaBridge 153:b484a57bc302 127 \details Returns the content of the Control Register.
AnnaBridge 153:b484a57bc302 128 \return Control Register value
AnnaBridge 153:b484a57bc302 129 */
AnnaBridge 153:b484a57bc302 130 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge 153:b484a57bc302 131 {
AnnaBridge 153:b484a57bc302 132 uint32_t result;
AnnaBridge 153:b484a57bc302 133
AnnaBridge 153:b484a57bc302 134 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 153:b484a57bc302 135 return(result);
AnnaBridge 153:b484a57bc302 136 }
AnnaBridge 153:b484a57bc302 137
AnnaBridge 153:b484a57bc302 138
AnnaBridge 153:b484a57bc302 139 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 140 /**
AnnaBridge 153:b484a57bc302 141 \brief Get Control Register (non-secure)
AnnaBridge 153:b484a57bc302 142 \details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge 153:b484a57bc302 143 \return non-secure Control Register value
AnnaBridge 153:b484a57bc302 144 */
AnnaBridge 153:b484a57bc302 145 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 153:b484a57bc302 146 {
AnnaBridge 153:b484a57bc302 147 uint32_t result;
AnnaBridge 153:b484a57bc302 148
AnnaBridge 153:b484a57bc302 149 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 150 return(result);
AnnaBridge 153:b484a57bc302 151 }
AnnaBridge 153:b484a57bc302 152 #endif
AnnaBridge 153:b484a57bc302 153
AnnaBridge 153:b484a57bc302 154
AnnaBridge 153:b484a57bc302 155 /**
AnnaBridge 153:b484a57bc302 156 \brief Set Control Register
AnnaBridge 153:b484a57bc302 157 \details Writes the given value to the Control Register.
AnnaBridge 153:b484a57bc302 158 \param [in] control Control Register value to set
AnnaBridge 153:b484a57bc302 159 */
AnnaBridge 153:b484a57bc302 160 __attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge 153:b484a57bc302 161 {
AnnaBridge 153:b484a57bc302 162 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 153:b484a57bc302 163 }
AnnaBridge 153:b484a57bc302 164
AnnaBridge 153:b484a57bc302 165
AnnaBridge 153:b484a57bc302 166 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 167 /**
AnnaBridge 153:b484a57bc302 168 \brief Set Control Register (non-secure)
AnnaBridge 153:b484a57bc302 169 \details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge 153:b484a57bc302 170 \param [in] control Control Register value to set
AnnaBridge 153:b484a57bc302 171 */
AnnaBridge 153:b484a57bc302 172 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge 153:b484a57bc302 173 {
AnnaBridge 153:b484a57bc302 174 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge 153:b484a57bc302 175 }
AnnaBridge 153:b484a57bc302 176 #endif
AnnaBridge 153:b484a57bc302 177
AnnaBridge 153:b484a57bc302 178
AnnaBridge 153:b484a57bc302 179 /**
AnnaBridge 153:b484a57bc302 180 \brief Get IPSR Register
AnnaBridge 153:b484a57bc302 181 \details Returns the content of the IPSR Register.
AnnaBridge 153:b484a57bc302 182 \return IPSR Register value
AnnaBridge 153:b484a57bc302 183 */
AnnaBridge 153:b484a57bc302 184 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge 153:b484a57bc302 185 {
AnnaBridge 153:b484a57bc302 186 uint32_t result;
AnnaBridge 153:b484a57bc302 187
AnnaBridge 153:b484a57bc302 188 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 153:b484a57bc302 189 return(result);
AnnaBridge 153:b484a57bc302 190 }
AnnaBridge 153:b484a57bc302 191
AnnaBridge 153:b484a57bc302 192
AnnaBridge 153:b484a57bc302 193 /**
AnnaBridge 153:b484a57bc302 194 \brief Get APSR Register
AnnaBridge 153:b484a57bc302 195 \details Returns the content of the APSR Register.
AnnaBridge 153:b484a57bc302 196 \return APSR Register value
AnnaBridge 153:b484a57bc302 197 */
AnnaBridge 153:b484a57bc302 198 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 153:b484a57bc302 199 {
AnnaBridge 153:b484a57bc302 200 uint32_t result;
AnnaBridge 153:b484a57bc302 201
AnnaBridge 153:b484a57bc302 202 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 153:b484a57bc302 203 return(result);
AnnaBridge 153:b484a57bc302 204 }
AnnaBridge 153:b484a57bc302 205
AnnaBridge 153:b484a57bc302 206
AnnaBridge 153:b484a57bc302 207 /**
AnnaBridge 153:b484a57bc302 208 \brief Get xPSR Register
AnnaBridge 153:b484a57bc302 209 \details Returns the content of the xPSR Register.
AnnaBridge 153:b484a57bc302 210 \return xPSR Register value
AnnaBridge 153:b484a57bc302 211 */
AnnaBridge 153:b484a57bc302 212 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge 153:b484a57bc302 213 {
AnnaBridge 153:b484a57bc302 214 uint32_t result;
AnnaBridge 153:b484a57bc302 215
AnnaBridge 153:b484a57bc302 216 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 153:b484a57bc302 217 return(result);
AnnaBridge 153:b484a57bc302 218 }
AnnaBridge 153:b484a57bc302 219
AnnaBridge 153:b484a57bc302 220
AnnaBridge 153:b484a57bc302 221 /**
AnnaBridge 153:b484a57bc302 222 \brief Get Process Stack Pointer
AnnaBridge 153:b484a57bc302 223 \details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 153:b484a57bc302 224 \return PSP Register value
AnnaBridge 153:b484a57bc302 225 */
AnnaBridge 153:b484a57bc302 226 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge 153:b484a57bc302 227 {
AnnaBridge 153:b484a57bc302 228 register uint32_t result;
AnnaBridge 153:b484a57bc302 229
AnnaBridge 153:b484a57bc302 230 __ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge 153:b484a57bc302 231 return(result);
AnnaBridge 153:b484a57bc302 232 }
AnnaBridge 153:b484a57bc302 233
AnnaBridge 153:b484a57bc302 234
AnnaBridge 153:b484a57bc302 235 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 236 /**
AnnaBridge 153:b484a57bc302 237 \brief Get Process Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 238 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 153:b484a57bc302 239 \return PSP Register value
AnnaBridge 153:b484a57bc302 240 */
AnnaBridge 153:b484a57bc302 241 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 153:b484a57bc302 242 {
AnnaBridge 153:b484a57bc302 243 register uint32_t result;
AnnaBridge 153:b484a57bc302 244
AnnaBridge 153:b484a57bc302 245 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 246 return(result);
AnnaBridge 153:b484a57bc302 247 }
AnnaBridge 153:b484a57bc302 248 #endif
AnnaBridge 153:b484a57bc302 249
AnnaBridge 153:b484a57bc302 250
AnnaBridge 153:b484a57bc302 251 /**
AnnaBridge 153:b484a57bc302 252 \brief Set Process Stack Pointer
AnnaBridge 153:b484a57bc302 253 \details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 153:b484a57bc302 254 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 153:b484a57bc302 255 */
AnnaBridge 153:b484a57bc302 256 __attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 153:b484a57bc302 257 {
AnnaBridge 153:b484a57bc302 258 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge 153:b484a57bc302 259 }
AnnaBridge 153:b484a57bc302 260
AnnaBridge 153:b484a57bc302 261
AnnaBridge 153:b484a57bc302 262 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 263 /**
AnnaBridge 153:b484a57bc302 264 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 265 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 153:b484a57bc302 266 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 153:b484a57bc302 267 */
AnnaBridge 153:b484a57bc302 268 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge 153:b484a57bc302 269 {
AnnaBridge 153:b484a57bc302 270 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge 153:b484a57bc302 271 }
AnnaBridge 153:b484a57bc302 272 #endif
AnnaBridge 153:b484a57bc302 273
AnnaBridge 153:b484a57bc302 274
AnnaBridge 153:b484a57bc302 275 /**
AnnaBridge 153:b484a57bc302 276 \brief Get Main Stack Pointer
AnnaBridge 153:b484a57bc302 277 \details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 153:b484a57bc302 278 \return MSP Register value
AnnaBridge 153:b484a57bc302 279 */
AnnaBridge 153:b484a57bc302 280 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge 153:b484a57bc302 281 {
AnnaBridge 153:b484a57bc302 282 register uint32_t result;
AnnaBridge 153:b484a57bc302 283
AnnaBridge 153:b484a57bc302 284 __ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge 153:b484a57bc302 285 return(result);
AnnaBridge 153:b484a57bc302 286 }
AnnaBridge 153:b484a57bc302 287
AnnaBridge 153:b484a57bc302 288
AnnaBridge 153:b484a57bc302 289 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 290 /**
AnnaBridge 153:b484a57bc302 291 \brief Get Main Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 292 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 153:b484a57bc302 293 \return MSP Register value
AnnaBridge 153:b484a57bc302 294 */
AnnaBridge 153:b484a57bc302 295 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 153:b484a57bc302 296 {
AnnaBridge 153:b484a57bc302 297 register uint32_t result;
AnnaBridge 153:b484a57bc302 298
AnnaBridge 153:b484a57bc302 299 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 300 return(result);
AnnaBridge 153:b484a57bc302 301 }
AnnaBridge 153:b484a57bc302 302 #endif
AnnaBridge 153:b484a57bc302 303
AnnaBridge 153:b484a57bc302 304
AnnaBridge 153:b484a57bc302 305 /**
AnnaBridge 153:b484a57bc302 306 \brief Set Main Stack Pointer
AnnaBridge 153:b484a57bc302 307 \details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 153:b484a57bc302 308 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 153:b484a57bc302 309 */
AnnaBridge 153:b484a57bc302 310 __attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 153:b484a57bc302 311 {
AnnaBridge 153:b484a57bc302 312 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge 153:b484a57bc302 313 }
AnnaBridge 153:b484a57bc302 314
AnnaBridge 153:b484a57bc302 315
AnnaBridge 153:b484a57bc302 316 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 317 /**
AnnaBridge 153:b484a57bc302 318 \brief Set Main Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 319 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 153:b484a57bc302 320 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 153:b484a57bc302 321 */
AnnaBridge 153:b484a57bc302 322 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge 153:b484a57bc302 323 {
AnnaBridge 153:b484a57bc302 324 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge 153:b484a57bc302 325 }
AnnaBridge 153:b484a57bc302 326 #endif
AnnaBridge 153:b484a57bc302 327
AnnaBridge 153:b484a57bc302 328
AnnaBridge 153:b484a57bc302 329 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 330 /**
AnnaBridge 153:b484a57bc302 331 \brief Get Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 332 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 153:b484a57bc302 333 \return SP Register value
AnnaBridge 153:b484a57bc302 334 */
AnnaBridge 153:b484a57bc302 335 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge 153:b484a57bc302 336 {
AnnaBridge 153:b484a57bc302 337 register uint32_t result;
AnnaBridge 153:b484a57bc302 338
AnnaBridge 153:b484a57bc302 339 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 340 return(result);
AnnaBridge 153:b484a57bc302 341 }
AnnaBridge 153:b484a57bc302 342
AnnaBridge 153:b484a57bc302 343
AnnaBridge 153:b484a57bc302 344 /**
AnnaBridge 153:b484a57bc302 345 \brief Set Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 346 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 153:b484a57bc302 347 \param [in] topOfStack Stack Pointer value to set
AnnaBridge 153:b484a57bc302 348 */
AnnaBridge 153:b484a57bc302 349 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge 153:b484a57bc302 350 {
AnnaBridge 153:b484a57bc302 351 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge 153:b484a57bc302 352 }
AnnaBridge 153:b484a57bc302 353 #endif
AnnaBridge 153:b484a57bc302 354
AnnaBridge 153:b484a57bc302 355
AnnaBridge 153:b484a57bc302 356 /**
AnnaBridge 153:b484a57bc302 357 \brief Get Priority Mask
AnnaBridge 153:b484a57bc302 358 \details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 153:b484a57bc302 359 \return Priority Mask value
AnnaBridge 153:b484a57bc302 360 */
AnnaBridge 153:b484a57bc302 361 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge 153:b484a57bc302 362 {
AnnaBridge 153:b484a57bc302 363 uint32_t result;
AnnaBridge 153:b484a57bc302 364
AnnaBridge 153:b484a57bc302 365 __ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge 153:b484a57bc302 366 return(result);
AnnaBridge 153:b484a57bc302 367 }
AnnaBridge 153:b484a57bc302 368
AnnaBridge 153:b484a57bc302 369
AnnaBridge 153:b484a57bc302 370 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 371 /**
AnnaBridge 153:b484a57bc302 372 \brief Get Priority Mask (non-secure)
AnnaBridge 153:b484a57bc302 373 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge 153:b484a57bc302 374 \return Priority Mask value
AnnaBridge 153:b484a57bc302 375 */
AnnaBridge 153:b484a57bc302 376 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 153:b484a57bc302 377 {
AnnaBridge 153:b484a57bc302 378 uint32_t result;
AnnaBridge 153:b484a57bc302 379
AnnaBridge 153:b484a57bc302 380 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 381 return(result);
AnnaBridge 153:b484a57bc302 382 }
AnnaBridge 153:b484a57bc302 383 #endif
AnnaBridge 153:b484a57bc302 384
AnnaBridge 153:b484a57bc302 385
AnnaBridge 153:b484a57bc302 386 /**
AnnaBridge 153:b484a57bc302 387 \brief Set Priority Mask
AnnaBridge 153:b484a57bc302 388 \details Assigns the given value to the Priority Mask Register.
AnnaBridge 153:b484a57bc302 389 \param [in] priMask Priority Mask
AnnaBridge 153:b484a57bc302 390 */
AnnaBridge 153:b484a57bc302 391 __attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 153:b484a57bc302 392 {
AnnaBridge 153:b484a57bc302 393 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 153:b484a57bc302 394 }
AnnaBridge 153:b484a57bc302 395
AnnaBridge 153:b484a57bc302 396
AnnaBridge 153:b484a57bc302 397 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 398 /**
AnnaBridge 153:b484a57bc302 399 \brief Set Priority Mask (non-secure)
AnnaBridge 153:b484a57bc302 400 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge 153:b484a57bc302 401 \param [in] priMask Priority Mask
AnnaBridge 153:b484a57bc302 402 */
AnnaBridge 153:b484a57bc302 403 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge 153:b484a57bc302 404 {
AnnaBridge 153:b484a57bc302 405 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge 153:b484a57bc302 406 }
AnnaBridge 153:b484a57bc302 407 #endif
AnnaBridge 153:b484a57bc302 408
AnnaBridge 153:b484a57bc302 409
AnnaBridge 153:b484a57bc302 410 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 411 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 412 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 413 /**
AnnaBridge 153:b484a57bc302 414 \brief Enable FIQ
AnnaBridge 153:b484a57bc302 415 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 153:b484a57bc302 416 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 417 */
AnnaBridge 153:b484a57bc302 418 #define __enable_fault_irq __enable_fiq /* see arm_compat.h */
AnnaBridge 153:b484a57bc302 419
AnnaBridge 153:b484a57bc302 420
AnnaBridge 153:b484a57bc302 421 /**
AnnaBridge 153:b484a57bc302 422 \brief Disable FIQ
AnnaBridge 153:b484a57bc302 423 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 153:b484a57bc302 424 Can only be executed in Privileged modes.
AnnaBridge 153:b484a57bc302 425 */
AnnaBridge 153:b484a57bc302 426 #define __disable_fault_irq __disable_fiq /* see arm_compat.h */
AnnaBridge 153:b484a57bc302 427
AnnaBridge 153:b484a57bc302 428
AnnaBridge 153:b484a57bc302 429 /**
AnnaBridge 153:b484a57bc302 430 \brief Get Base Priority
AnnaBridge 153:b484a57bc302 431 \details Returns the current value of the Base Priority register.
AnnaBridge 153:b484a57bc302 432 \return Base Priority register value
AnnaBridge 153:b484a57bc302 433 */
AnnaBridge 153:b484a57bc302 434 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge 153:b484a57bc302 435 {
AnnaBridge 153:b484a57bc302 436 uint32_t result;
AnnaBridge 153:b484a57bc302 437
AnnaBridge 153:b484a57bc302 438 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 153:b484a57bc302 439 return(result);
AnnaBridge 153:b484a57bc302 440 }
AnnaBridge 153:b484a57bc302 441
AnnaBridge 153:b484a57bc302 442
AnnaBridge 153:b484a57bc302 443 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 444 /**
AnnaBridge 153:b484a57bc302 445 \brief Get Base Priority (non-secure)
AnnaBridge 153:b484a57bc302 446 \details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge 153:b484a57bc302 447 \return Base Priority register value
AnnaBridge 153:b484a57bc302 448 */
AnnaBridge 153:b484a57bc302 449 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 153:b484a57bc302 450 {
AnnaBridge 153:b484a57bc302 451 uint32_t result;
AnnaBridge 153:b484a57bc302 452
AnnaBridge 153:b484a57bc302 453 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 454 return(result);
AnnaBridge 153:b484a57bc302 455 }
AnnaBridge 153:b484a57bc302 456 #endif
AnnaBridge 153:b484a57bc302 457
AnnaBridge 153:b484a57bc302 458
AnnaBridge 153:b484a57bc302 459 /**
AnnaBridge 153:b484a57bc302 460 \brief Set Base Priority
AnnaBridge 153:b484a57bc302 461 \details Assigns the given value to the Base Priority register.
AnnaBridge 153:b484a57bc302 462 \param [in] basePri Base Priority value to set
AnnaBridge 153:b484a57bc302 463 */
AnnaBridge 153:b484a57bc302 464 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 153:b484a57bc302 465 {
AnnaBridge 153:b484a57bc302 466 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge 153:b484a57bc302 467 }
AnnaBridge 153:b484a57bc302 468
AnnaBridge 153:b484a57bc302 469
AnnaBridge 153:b484a57bc302 470 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 471 /**
AnnaBridge 153:b484a57bc302 472 \brief Set Base Priority (non-secure)
AnnaBridge 153:b484a57bc302 473 \details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge 153:b484a57bc302 474 \param [in] basePri Base Priority value to set
AnnaBridge 153:b484a57bc302 475 */
AnnaBridge 153:b484a57bc302 476 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge 153:b484a57bc302 477 {
AnnaBridge 153:b484a57bc302 478 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge 153:b484a57bc302 479 }
AnnaBridge 153:b484a57bc302 480 #endif
AnnaBridge 153:b484a57bc302 481
AnnaBridge 153:b484a57bc302 482
AnnaBridge 153:b484a57bc302 483 /**
AnnaBridge 153:b484a57bc302 484 \brief Set Base Priority with condition
AnnaBridge 153:b484a57bc302 485 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 153:b484a57bc302 486 or the new value increases the BASEPRI priority level.
AnnaBridge 153:b484a57bc302 487 \param [in] basePri Base Priority value to set
AnnaBridge 153:b484a57bc302 488 */
AnnaBridge 153:b484a57bc302 489 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 153:b484a57bc302 490 {
AnnaBridge 153:b484a57bc302 491 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge 153:b484a57bc302 492 }
AnnaBridge 153:b484a57bc302 493
AnnaBridge 153:b484a57bc302 494
AnnaBridge 153:b484a57bc302 495 /**
AnnaBridge 153:b484a57bc302 496 \brief Get Fault Mask
AnnaBridge 153:b484a57bc302 497 \details Returns the current value of the Fault Mask register.
AnnaBridge 153:b484a57bc302 498 \return Fault Mask register value
AnnaBridge 153:b484a57bc302 499 */
AnnaBridge 153:b484a57bc302 500 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 153:b484a57bc302 501 {
AnnaBridge 153:b484a57bc302 502 uint32_t result;
AnnaBridge 153:b484a57bc302 503
AnnaBridge 153:b484a57bc302 504 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 153:b484a57bc302 505 return(result);
AnnaBridge 153:b484a57bc302 506 }
AnnaBridge 153:b484a57bc302 507
AnnaBridge 153:b484a57bc302 508
AnnaBridge 153:b484a57bc302 509 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 510 /**
AnnaBridge 153:b484a57bc302 511 \brief Get Fault Mask (non-secure)
AnnaBridge 153:b484a57bc302 512 \details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge 153:b484a57bc302 513 \return Fault Mask register value
AnnaBridge 153:b484a57bc302 514 */
AnnaBridge 153:b484a57bc302 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 153:b484a57bc302 516 {
AnnaBridge 153:b484a57bc302 517 uint32_t result;
AnnaBridge 153:b484a57bc302 518
AnnaBridge 153:b484a57bc302 519 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 520 return(result);
AnnaBridge 153:b484a57bc302 521 }
AnnaBridge 153:b484a57bc302 522 #endif
AnnaBridge 153:b484a57bc302 523
AnnaBridge 153:b484a57bc302 524
AnnaBridge 153:b484a57bc302 525 /**
AnnaBridge 153:b484a57bc302 526 \brief Set Fault Mask
AnnaBridge 153:b484a57bc302 527 \details Assigns the given value to the Fault Mask register.
AnnaBridge 153:b484a57bc302 528 \param [in] faultMask Fault Mask value to set
AnnaBridge 153:b484a57bc302 529 */
AnnaBridge 153:b484a57bc302 530 __attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 153:b484a57bc302 531 {
AnnaBridge 153:b484a57bc302 532 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 153:b484a57bc302 533 }
AnnaBridge 153:b484a57bc302 534
AnnaBridge 153:b484a57bc302 535
AnnaBridge 153:b484a57bc302 536 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 153:b484a57bc302 537 /**
AnnaBridge 153:b484a57bc302 538 \brief Set Fault Mask (non-secure)
AnnaBridge 153:b484a57bc302 539 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge 153:b484a57bc302 540 \param [in] faultMask Fault Mask value to set
AnnaBridge 153:b484a57bc302 541 */
AnnaBridge 153:b484a57bc302 542 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge 153:b484a57bc302 543 {
AnnaBridge 153:b484a57bc302 544 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge 153:b484a57bc302 545 }
AnnaBridge 153:b484a57bc302 546 #endif
AnnaBridge 153:b484a57bc302 547
AnnaBridge 153:b484a57bc302 548 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 549 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 550 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 153:b484a57bc302 551
AnnaBridge 153:b484a57bc302 552
AnnaBridge 153:b484a57bc302 553 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 554 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 153:b484a57bc302 555
AnnaBridge 153:b484a57bc302 556 /**
AnnaBridge 153:b484a57bc302 557 \brief Get Process Stack Pointer Limit
AnnaBridge 153:b484a57bc302 558 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 153:b484a57bc302 559 \return PSPLIM Register value
AnnaBridge 153:b484a57bc302 560 */
AnnaBridge 153:b484a57bc302 561 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge 153:b484a57bc302 562 {
AnnaBridge 153:b484a57bc302 563 register uint32_t result;
AnnaBridge 153:b484a57bc302 564
AnnaBridge 153:b484a57bc302 565 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge 153:b484a57bc302 566 return(result);
AnnaBridge 153:b484a57bc302 567 }
AnnaBridge 153:b484a57bc302 568
AnnaBridge 153:b484a57bc302 569
AnnaBridge 153:b484a57bc302 570 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 571 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 572 /**
AnnaBridge 153:b484a57bc302 573 \brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge 153:b484a57bc302 574 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 575 \return PSPLIM Register value
AnnaBridge 153:b484a57bc302 576 */
AnnaBridge 153:b484a57bc302 577 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 153:b484a57bc302 578 {
AnnaBridge 153:b484a57bc302 579 register uint32_t result;
AnnaBridge 153:b484a57bc302 580
AnnaBridge 153:b484a57bc302 581 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 582 return(result);
AnnaBridge 153:b484a57bc302 583 }
AnnaBridge 153:b484a57bc302 584 #endif
AnnaBridge 153:b484a57bc302 585
AnnaBridge 153:b484a57bc302 586
AnnaBridge 153:b484a57bc302 587 /**
AnnaBridge 153:b484a57bc302 588 \brief Set Process Stack Pointer Limit
AnnaBridge 153:b484a57bc302 589 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 153:b484a57bc302 590 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 153:b484a57bc302 591 */
AnnaBridge 153:b484a57bc302 592 __attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge 153:b484a57bc302 593 {
AnnaBridge 153:b484a57bc302 594 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge 153:b484a57bc302 595 }
AnnaBridge 153:b484a57bc302 596
AnnaBridge 153:b484a57bc302 597
AnnaBridge 153:b484a57bc302 598 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 599 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 600 /**
AnnaBridge 153:b484a57bc302 601 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 153:b484a57bc302 602 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 603 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 153:b484a57bc302 604 */
AnnaBridge 153:b484a57bc302 605 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge 153:b484a57bc302 606 {
AnnaBridge 153:b484a57bc302 607 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge 153:b484a57bc302 608 }
AnnaBridge 153:b484a57bc302 609 #endif
AnnaBridge 153:b484a57bc302 610
AnnaBridge 153:b484a57bc302 611
AnnaBridge 153:b484a57bc302 612 /**
AnnaBridge 153:b484a57bc302 613 \brief Get Main Stack Pointer Limit
AnnaBridge 153:b484a57bc302 614 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 153:b484a57bc302 615 \return MSPLIM Register value
AnnaBridge 153:b484a57bc302 616 */
AnnaBridge 153:b484a57bc302 617 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge 153:b484a57bc302 618 {
AnnaBridge 153:b484a57bc302 619 register uint32_t result;
AnnaBridge 153:b484a57bc302 620
AnnaBridge 153:b484a57bc302 621 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge 153:b484a57bc302 622
AnnaBridge 153:b484a57bc302 623 return(result);
AnnaBridge 153:b484a57bc302 624 }
AnnaBridge 153:b484a57bc302 625
AnnaBridge 153:b484a57bc302 626
AnnaBridge 153:b484a57bc302 627 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 628 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 629 /**
AnnaBridge 153:b484a57bc302 630 \brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge 153:b484a57bc302 631 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 632 \return MSPLIM Register value
AnnaBridge 153:b484a57bc302 633 */
AnnaBridge 153:b484a57bc302 634 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 153:b484a57bc302 635 {
AnnaBridge 153:b484a57bc302 636 register uint32_t result;
AnnaBridge 153:b484a57bc302 637
AnnaBridge 153:b484a57bc302 638 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge 153:b484a57bc302 639 return(result);
AnnaBridge 153:b484a57bc302 640 }
AnnaBridge 153:b484a57bc302 641 #endif
AnnaBridge 153:b484a57bc302 642
AnnaBridge 153:b484a57bc302 643
AnnaBridge 153:b484a57bc302 644 /**
AnnaBridge 153:b484a57bc302 645 \brief Set Main Stack Pointer Limit
AnnaBridge 153:b484a57bc302 646 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 153:b484a57bc302 647 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge 153:b484a57bc302 648 */
AnnaBridge 153:b484a57bc302 649 __attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge 153:b484a57bc302 650 {
AnnaBridge 153:b484a57bc302 651 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 153:b484a57bc302 652 }
AnnaBridge 153:b484a57bc302 653
AnnaBridge 153:b484a57bc302 654
AnnaBridge 153:b484a57bc302 655 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 153:b484a57bc302 656 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 657 /**
AnnaBridge 153:b484a57bc302 658 \brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge 153:b484a57bc302 659 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge 153:b484a57bc302 660 \param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge 153:b484a57bc302 661 */
AnnaBridge 153:b484a57bc302 662 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge 153:b484a57bc302 663 {
AnnaBridge 153:b484a57bc302 664 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 153:b484a57bc302 665 }
AnnaBridge 153:b484a57bc302 666 #endif
AnnaBridge 153:b484a57bc302 667
AnnaBridge 153:b484a57bc302 668 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 669 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 153:b484a57bc302 670
AnnaBridge 153:b484a57bc302 671
AnnaBridge 153:b484a57bc302 672 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 673 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 674
AnnaBridge 153:b484a57bc302 675 /**
AnnaBridge 153:b484a57bc302 676 \brief Get FPSCR
AnnaBridge 153:b484a57bc302 677 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 153:b484a57bc302 678 \return Floating Point Status/Control register value
AnnaBridge 153:b484a57bc302 679 */
AnnaBridge 153:b484a57bc302 680 /* #define __get_FPSCR __builtin_arm_get_fpscr */
AnnaBridge 153:b484a57bc302 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
AnnaBridge 153:b484a57bc302 682 {
AnnaBridge 153:b484a57bc302 683 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 153:b484a57bc302 684 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 153:b484a57bc302 685 uint32_t result;
AnnaBridge 153:b484a57bc302 686
AnnaBridge 153:b484a57bc302 687 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
AnnaBridge 153:b484a57bc302 688 return(result);
AnnaBridge 153:b484a57bc302 689 #else
AnnaBridge 153:b484a57bc302 690 return(0U);
AnnaBridge 153:b484a57bc302 691 #endif
AnnaBridge 153:b484a57bc302 692 }
AnnaBridge 153:b484a57bc302 693
AnnaBridge 153:b484a57bc302 694
AnnaBridge 153:b484a57bc302 695 /**
AnnaBridge 153:b484a57bc302 696 \brief Set FPSCR
AnnaBridge 153:b484a57bc302 697 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 153:b484a57bc302 698 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 153:b484a57bc302 699 */
AnnaBridge 153:b484a57bc302 700 /* #define __set_FPSCR __builtin_arm_set_fpscr */
AnnaBridge 153:b484a57bc302 701 __attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge 153:b484a57bc302 702 {
AnnaBridge 153:b484a57bc302 703 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 153:b484a57bc302 704 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 153:b484a57bc302 705 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "memory");
AnnaBridge 153:b484a57bc302 706 #else
AnnaBridge 153:b484a57bc302 707 (void)fpscr;
AnnaBridge 153:b484a57bc302 708 #endif
AnnaBridge 153:b484a57bc302 709 }
AnnaBridge 153:b484a57bc302 710
AnnaBridge 153:b484a57bc302 711 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 712 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 153:b484a57bc302 713
AnnaBridge 153:b484a57bc302 714
AnnaBridge 153:b484a57bc302 715
AnnaBridge 153:b484a57bc302 716 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 153:b484a57bc302 717
AnnaBridge 153:b484a57bc302 718
AnnaBridge 153:b484a57bc302 719 /* ########################## Core Instruction Access ######################### */
AnnaBridge 153:b484a57bc302 720 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge 153:b484a57bc302 721 Access to dedicated instructions
AnnaBridge 153:b484a57bc302 722 @{
AnnaBridge 153:b484a57bc302 723 */
AnnaBridge 153:b484a57bc302 724
AnnaBridge 153:b484a57bc302 725 /* Define macros for porting to both thumb1 and thumb2.
AnnaBridge 153:b484a57bc302 726 * For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge 153:b484a57bc302 727 * Otherwise, use general registers, specified by constraint "r" */
AnnaBridge 153:b484a57bc302 728 #if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge 153:b484a57bc302 729 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge 153:b484a57bc302 730 #define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge 153:b484a57bc302 731 #else
AnnaBridge 153:b484a57bc302 732 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge 153:b484a57bc302 733 #define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge 153:b484a57bc302 734 #endif
AnnaBridge 153:b484a57bc302 735
AnnaBridge 153:b484a57bc302 736 /**
AnnaBridge 153:b484a57bc302 737 \brief No Operation
AnnaBridge 153:b484a57bc302 738 \details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge 153:b484a57bc302 739 */
AnnaBridge 153:b484a57bc302 740 #define __NOP __builtin_arm_nop
AnnaBridge 153:b484a57bc302 741
AnnaBridge 153:b484a57bc302 742 /**
AnnaBridge 153:b484a57bc302 743 \brief Wait For Interrupt
AnnaBridge 153:b484a57bc302 744 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge 153:b484a57bc302 745 */
AnnaBridge 153:b484a57bc302 746 #define __WFI __builtin_arm_wfi
AnnaBridge 153:b484a57bc302 747
AnnaBridge 153:b484a57bc302 748
AnnaBridge 153:b484a57bc302 749 /**
AnnaBridge 153:b484a57bc302 750 \brief Wait For Event
AnnaBridge 153:b484a57bc302 751 \details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge 153:b484a57bc302 752 a low-power state until one of a number of events occurs.
AnnaBridge 153:b484a57bc302 753 */
AnnaBridge 153:b484a57bc302 754 #define __WFE __builtin_arm_wfe
AnnaBridge 153:b484a57bc302 755
AnnaBridge 153:b484a57bc302 756
AnnaBridge 153:b484a57bc302 757 /**
AnnaBridge 153:b484a57bc302 758 \brief Send Event
AnnaBridge 153:b484a57bc302 759 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge 153:b484a57bc302 760 */
AnnaBridge 153:b484a57bc302 761 #define __SEV __builtin_arm_sev
AnnaBridge 153:b484a57bc302 762
AnnaBridge 153:b484a57bc302 763
AnnaBridge 153:b484a57bc302 764 /**
AnnaBridge 153:b484a57bc302 765 \brief Instruction Synchronization Barrier
AnnaBridge 153:b484a57bc302 766 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge 153:b484a57bc302 767 so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge 153:b484a57bc302 768 after the instruction has been completed.
AnnaBridge 153:b484a57bc302 769 */
AnnaBridge 153:b484a57bc302 770 #define __ISB() __builtin_arm_isb(0xF);
AnnaBridge 153:b484a57bc302 771
AnnaBridge 153:b484a57bc302 772 /**
AnnaBridge 153:b484a57bc302 773 \brief Data Synchronization Barrier
AnnaBridge 153:b484a57bc302 774 \details Acts as a special kind of Data Memory Barrier.
AnnaBridge 153:b484a57bc302 775 It completes when all explicit memory accesses before this instruction complete.
AnnaBridge 153:b484a57bc302 776 */
AnnaBridge 153:b484a57bc302 777 #define __DSB() __builtin_arm_dsb(0xF);
AnnaBridge 153:b484a57bc302 778
AnnaBridge 153:b484a57bc302 779
AnnaBridge 153:b484a57bc302 780 /**
AnnaBridge 153:b484a57bc302 781 \brief Data Memory Barrier
AnnaBridge 153:b484a57bc302 782 \details Ensures the apparent order of the explicit memory operations before
AnnaBridge 153:b484a57bc302 783 and after the instruction, without ensuring their completion.
AnnaBridge 153:b484a57bc302 784 */
AnnaBridge 153:b484a57bc302 785 #define __DMB() __builtin_arm_dmb(0xF);
AnnaBridge 153:b484a57bc302 786
AnnaBridge 153:b484a57bc302 787
AnnaBridge 153:b484a57bc302 788 /**
AnnaBridge 153:b484a57bc302 789 \brief Reverse byte order (32 bit)
AnnaBridge 153:b484a57bc302 790 \details Reverses the byte order in integer value.
AnnaBridge 153:b484a57bc302 791 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 792 \return Reversed value
AnnaBridge 153:b484a57bc302 793 */
AnnaBridge 153:b484a57bc302 794 #define __REV __builtin_bswap32
AnnaBridge 153:b484a57bc302 795
AnnaBridge 153:b484a57bc302 796
AnnaBridge 153:b484a57bc302 797 /**
AnnaBridge 153:b484a57bc302 798 \brief Reverse byte order (16 bit)
AnnaBridge 153:b484a57bc302 799 \details Reverses the byte order in two unsigned short values.
AnnaBridge 153:b484a57bc302 800 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 801 \return Reversed value
AnnaBridge 153:b484a57bc302 802 */
AnnaBridge 153:b484a57bc302 803 #define __REV16 __builtin_bswap16 /* ToDo ARMCLANG: check if __builtin_bswap16 could be used */
AnnaBridge 153:b484a57bc302 804 #if 0
AnnaBridge 153:b484a57bc302 805 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
AnnaBridge 153:b484a57bc302 806 {
AnnaBridge 153:b484a57bc302 807 uint32_t result;
AnnaBridge 153:b484a57bc302 808
AnnaBridge 153:b484a57bc302 809 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 153:b484a57bc302 810 return(result);
AnnaBridge 153:b484a57bc302 811 }
AnnaBridge 153:b484a57bc302 812 #endif
AnnaBridge 153:b484a57bc302 813
AnnaBridge 153:b484a57bc302 814
AnnaBridge 153:b484a57bc302 815 /**
AnnaBridge 153:b484a57bc302 816 \brief Reverse byte order in signed short value
AnnaBridge 153:b484a57bc302 817 \details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge 153:b484a57bc302 818 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 819 \return Reversed value
AnnaBridge 153:b484a57bc302 820 */
AnnaBridge 153:b484a57bc302 821 /* ToDo ARMCLANG: check if __builtin_bswap16 could be used */
AnnaBridge 153:b484a57bc302 822 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
AnnaBridge 153:b484a57bc302 823 {
AnnaBridge 153:b484a57bc302 824 int32_t result;
AnnaBridge 153:b484a57bc302 825
AnnaBridge 153:b484a57bc302 826 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 153:b484a57bc302 827 return(result);
AnnaBridge 153:b484a57bc302 828 }
AnnaBridge 153:b484a57bc302 829
AnnaBridge 153:b484a57bc302 830
AnnaBridge 153:b484a57bc302 831 /**
AnnaBridge 153:b484a57bc302 832 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 153:b484a57bc302 833 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 153:b484a57bc302 834 \param [in] op1 Value to rotate
AnnaBridge 153:b484a57bc302 835 \param [in] op2 Number of Bits to rotate
AnnaBridge 153:b484a57bc302 836 \return Rotated value
AnnaBridge 153:b484a57bc302 837 */
AnnaBridge 153:b484a57bc302 838 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 839 {
AnnaBridge 153:b484a57bc302 840 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 153:b484a57bc302 841 }
AnnaBridge 153:b484a57bc302 842
AnnaBridge 153:b484a57bc302 843
AnnaBridge 153:b484a57bc302 844 /**
AnnaBridge 153:b484a57bc302 845 \brief Breakpoint
AnnaBridge 153:b484a57bc302 846 \details Causes the processor to enter Debug state.
AnnaBridge 153:b484a57bc302 847 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge 153:b484a57bc302 848 \param [in] value is ignored by the processor.
AnnaBridge 153:b484a57bc302 849 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 153:b484a57bc302 850 */
AnnaBridge 153:b484a57bc302 851 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 153:b484a57bc302 852
AnnaBridge 153:b484a57bc302 853
AnnaBridge 153:b484a57bc302 854 /**
AnnaBridge 153:b484a57bc302 855 \brief Reverse bit order of value
AnnaBridge 153:b484a57bc302 856 \details Reverses the bit order of the given value.
AnnaBridge 153:b484a57bc302 857 \param [in] value Value to reverse
AnnaBridge 153:b484a57bc302 858 \return Reversed value
AnnaBridge 153:b484a57bc302 859 */
AnnaBridge 153:b484a57bc302 860 /* ToDo ARMCLANG: check if __builtin_arm_rbit is supported */
AnnaBridge 153:b484a57bc302 861 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
AnnaBridge 153:b484a57bc302 862 {
AnnaBridge 153:b484a57bc302 863 uint32_t result;
AnnaBridge 153:b484a57bc302 864
AnnaBridge 153:b484a57bc302 865 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 866 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 867 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 868 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
AnnaBridge 153:b484a57bc302 869 #else
AnnaBridge 153:b484a57bc302 870 int32_t s = (4 /*sizeof(v)*/ * 8) - 1; /* extra shift needed at end */
AnnaBridge 153:b484a57bc302 871
AnnaBridge 153:b484a57bc302 872 result = value; /* r will be reversed bits of v; first get LSB of v */
AnnaBridge 153:b484a57bc302 873 for (value >>= 1U; value; value >>= 1U)
AnnaBridge 153:b484a57bc302 874 {
AnnaBridge 153:b484a57bc302 875 result <<= 1U;
AnnaBridge 153:b484a57bc302 876 result |= value & 1U;
AnnaBridge 153:b484a57bc302 877 s--;
AnnaBridge 153:b484a57bc302 878 }
AnnaBridge 153:b484a57bc302 879 result <<= s; /* shift when v's highest bits are zero */
AnnaBridge 153:b484a57bc302 880 #endif
AnnaBridge 153:b484a57bc302 881 return(result);
AnnaBridge 153:b484a57bc302 882 }
AnnaBridge 153:b484a57bc302 883
AnnaBridge 153:b484a57bc302 884
AnnaBridge 153:b484a57bc302 885 /**
AnnaBridge 153:b484a57bc302 886 \brief Count leading zeros
AnnaBridge 153:b484a57bc302 887 \details Counts the number of leading zeros of a data value.
AnnaBridge 153:b484a57bc302 888 \param [in] value Value to count the leading zeros
AnnaBridge 153:b484a57bc302 889 \return number of leading zeros in value
AnnaBridge 153:b484a57bc302 890 */
AnnaBridge 153:b484a57bc302 891 #define __CLZ __builtin_clz
AnnaBridge 153:b484a57bc302 892
AnnaBridge 153:b484a57bc302 893
AnnaBridge 153:b484a57bc302 894 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 895 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 896 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 897 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 153:b484a57bc302 898 /**
AnnaBridge 153:b484a57bc302 899 \brief LDR Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 900 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 901 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 902 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 903 */
AnnaBridge 153:b484a57bc302 904 #define __LDREXB (uint8_t)__builtin_arm_ldrex
AnnaBridge 153:b484a57bc302 905
AnnaBridge 153:b484a57bc302 906
AnnaBridge 153:b484a57bc302 907 /**
AnnaBridge 153:b484a57bc302 908 \brief LDR Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 909 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 910 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 911 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 912 */
AnnaBridge 153:b484a57bc302 913 #define __LDREXH (uint16_t)__builtin_arm_ldrex
AnnaBridge 153:b484a57bc302 914
AnnaBridge 153:b484a57bc302 915
AnnaBridge 153:b484a57bc302 916 /**
AnnaBridge 153:b484a57bc302 917 \brief LDR Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 918 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 919 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 920 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 921 */
AnnaBridge 153:b484a57bc302 922 #define __LDREXW (uint32_t)__builtin_arm_ldrex
AnnaBridge 153:b484a57bc302 923
AnnaBridge 153:b484a57bc302 924
AnnaBridge 153:b484a57bc302 925 /**
AnnaBridge 153:b484a57bc302 926 \brief STR Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 927 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 928 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 929 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 930 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 931 \return 1 Function failed
AnnaBridge 153:b484a57bc302 932 */
AnnaBridge 153:b484a57bc302 933 #define __STREXB (uint32_t)__builtin_arm_strex
AnnaBridge 153:b484a57bc302 934
AnnaBridge 153:b484a57bc302 935
AnnaBridge 153:b484a57bc302 936 /**
AnnaBridge 153:b484a57bc302 937 \brief STR Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 938 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 939 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 940 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 941 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 942 \return 1 Function failed
AnnaBridge 153:b484a57bc302 943 */
AnnaBridge 153:b484a57bc302 944 #define __STREXH (uint32_t)__builtin_arm_strex
AnnaBridge 153:b484a57bc302 945
AnnaBridge 153:b484a57bc302 946
AnnaBridge 153:b484a57bc302 947 /**
AnnaBridge 153:b484a57bc302 948 \brief STR Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 949 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 950 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 951 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 952 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 953 \return 1 Function failed
AnnaBridge 153:b484a57bc302 954 */
AnnaBridge 153:b484a57bc302 955 #define __STREXW (uint32_t)__builtin_arm_strex
AnnaBridge 153:b484a57bc302 956
AnnaBridge 153:b484a57bc302 957
AnnaBridge 153:b484a57bc302 958 /**
AnnaBridge 153:b484a57bc302 959 \brief Remove the exclusive lock
AnnaBridge 153:b484a57bc302 960 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 153:b484a57bc302 961 */
AnnaBridge 153:b484a57bc302 962 #define __CLREX __builtin_arm_clrex
AnnaBridge 153:b484a57bc302 963
AnnaBridge 153:b484a57bc302 964 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 965 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 966 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 967 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 153:b484a57bc302 968
AnnaBridge 153:b484a57bc302 969
AnnaBridge 153:b484a57bc302 970 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 971 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 972 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 153:b484a57bc302 973 /**
AnnaBridge 153:b484a57bc302 974 \brief Signed Saturate
AnnaBridge 153:b484a57bc302 975 \details Saturates a signed value.
AnnaBridge 153:b484a57bc302 976 \param [in] value Value to be saturated
AnnaBridge 153:b484a57bc302 977 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 153:b484a57bc302 978 \return Saturated value
AnnaBridge 153:b484a57bc302 979 */
AnnaBridge 153:b484a57bc302 980 #define __SSAT __builtin_arm_ssat
AnnaBridge 153:b484a57bc302 981
AnnaBridge 153:b484a57bc302 982
AnnaBridge 153:b484a57bc302 983 /**
AnnaBridge 153:b484a57bc302 984 \brief Unsigned Saturate
AnnaBridge 153:b484a57bc302 985 \details Saturates an unsigned value.
AnnaBridge 153:b484a57bc302 986 \param [in] value Value to be saturated
AnnaBridge 153:b484a57bc302 987 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 153:b484a57bc302 988 \return Saturated value
AnnaBridge 153:b484a57bc302 989 */
AnnaBridge 153:b484a57bc302 990 #define __USAT __builtin_arm_usat
AnnaBridge 153:b484a57bc302 991
AnnaBridge 153:b484a57bc302 992
AnnaBridge 153:b484a57bc302 993 /**
AnnaBridge 153:b484a57bc302 994 \brief Rotate Right with Extend (32 bit)
AnnaBridge 153:b484a57bc302 995 \details Moves each bit of a bitstring right by one bit.
AnnaBridge 153:b484a57bc302 996 The carry input is shifted in at the left end of the bitstring.
AnnaBridge 153:b484a57bc302 997 \param [in] value Value to rotate
AnnaBridge 153:b484a57bc302 998 \return Rotated value
AnnaBridge 153:b484a57bc302 999 */
AnnaBridge 153:b484a57bc302 1000 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge 153:b484a57bc302 1001 {
AnnaBridge 153:b484a57bc302 1002 uint32_t result;
AnnaBridge 153:b484a57bc302 1003
AnnaBridge 153:b484a57bc302 1004 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 153:b484a57bc302 1005 return(result);
AnnaBridge 153:b484a57bc302 1006 }
AnnaBridge 153:b484a57bc302 1007
AnnaBridge 153:b484a57bc302 1008
AnnaBridge 153:b484a57bc302 1009 /**
AnnaBridge 153:b484a57bc302 1010 \brief LDRT Unprivileged (8 bit)
AnnaBridge 153:b484a57bc302 1011 \details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 1012 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1013 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 1014 */
AnnaBridge 153:b484a57bc302 1015 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1016 {
AnnaBridge 153:b484a57bc302 1017 uint32_t result;
AnnaBridge 153:b484a57bc302 1018
AnnaBridge 153:b484a57bc302 1019 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1020 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 153:b484a57bc302 1021 }
AnnaBridge 153:b484a57bc302 1022
AnnaBridge 153:b484a57bc302 1023
AnnaBridge 153:b484a57bc302 1024 /**
AnnaBridge 153:b484a57bc302 1025 \brief LDRT Unprivileged (16 bit)
AnnaBridge 153:b484a57bc302 1026 \details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1027 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1028 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 1029 */
AnnaBridge 153:b484a57bc302 1030 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1031 {
AnnaBridge 153:b484a57bc302 1032 uint32_t result;
AnnaBridge 153:b484a57bc302 1033
AnnaBridge 153:b484a57bc302 1034 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1035 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 153:b484a57bc302 1036 }
AnnaBridge 153:b484a57bc302 1037
AnnaBridge 153:b484a57bc302 1038
AnnaBridge 153:b484a57bc302 1039 /**
AnnaBridge 153:b484a57bc302 1040 \brief LDRT Unprivileged (32 bit)
AnnaBridge 153:b484a57bc302 1041 \details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1042 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1043 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 1044 */
AnnaBridge 153:b484a57bc302 1045 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1046 {
AnnaBridge 153:b484a57bc302 1047 uint32_t result;
AnnaBridge 153:b484a57bc302 1048
AnnaBridge 153:b484a57bc302 1049 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1050 return(result);
AnnaBridge 153:b484a57bc302 1051 }
AnnaBridge 153:b484a57bc302 1052
AnnaBridge 153:b484a57bc302 1053
AnnaBridge 153:b484a57bc302 1054 /**
AnnaBridge 153:b484a57bc302 1055 \brief STRT Unprivileged (8 bit)
AnnaBridge 153:b484a57bc302 1056 \details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 1057 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1058 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1059 */
AnnaBridge 153:b484a57bc302 1060 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1061 {
AnnaBridge 153:b484a57bc302 1062 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1063 }
AnnaBridge 153:b484a57bc302 1064
AnnaBridge 153:b484a57bc302 1065
AnnaBridge 153:b484a57bc302 1066 /**
AnnaBridge 153:b484a57bc302 1067 \brief STRT Unprivileged (16 bit)
AnnaBridge 153:b484a57bc302 1068 \details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1069 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1070 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1071 */
AnnaBridge 153:b484a57bc302 1072 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1073 {
AnnaBridge 153:b484a57bc302 1074 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1075 }
AnnaBridge 153:b484a57bc302 1076
AnnaBridge 153:b484a57bc302 1077
AnnaBridge 153:b484a57bc302 1078 /**
AnnaBridge 153:b484a57bc302 1079 \brief STRT Unprivileged (32 bit)
AnnaBridge 153:b484a57bc302 1080 \details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1081 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1082 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1083 */
AnnaBridge 153:b484a57bc302 1084 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1085 {
AnnaBridge 153:b484a57bc302 1086 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge 153:b484a57bc302 1087 }
AnnaBridge 153:b484a57bc302 1088
AnnaBridge 153:b484a57bc302 1089 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 153:b484a57bc302 1090 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 153:b484a57bc302 1091 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 153:b484a57bc302 1092
AnnaBridge 153:b484a57bc302 1093
AnnaBridge 153:b484a57bc302 1094 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 1095 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 153:b484a57bc302 1096 /**
AnnaBridge 153:b484a57bc302 1097 \brief Load-Acquire (8 bit)
AnnaBridge 153:b484a57bc302 1098 \details Executes a LDAB instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 1099 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1100 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 1101 */
AnnaBridge 153:b484a57bc302 1102 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1103 {
AnnaBridge 153:b484a57bc302 1104 uint32_t result;
AnnaBridge 153:b484a57bc302 1105
AnnaBridge 153:b484a57bc302 1106 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1107 return ((uint8_t) result);
AnnaBridge 153:b484a57bc302 1108 }
AnnaBridge 153:b484a57bc302 1109
AnnaBridge 153:b484a57bc302 1110
AnnaBridge 153:b484a57bc302 1111 /**
AnnaBridge 153:b484a57bc302 1112 \brief Load-Acquire (16 bit)
AnnaBridge 153:b484a57bc302 1113 \details Executes a LDAH instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1114 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1115 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 1116 */
AnnaBridge 153:b484a57bc302 1117 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1118 {
AnnaBridge 153:b484a57bc302 1119 uint32_t result;
AnnaBridge 153:b484a57bc302 1120
AnnaBridge 153:b484a57bc302 1121 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1122 return ((uint16_t) result);
AnnaBridge 153:b484a57bc302 1123 }
AnnaBridge 153:b484a57bc302 1124
AnnaBridge 153:b484a57bc302 1125
AnnaBridge 153:b484a57bc302 1126 /**
AnnaBridge 153:b484a57bc302 1127 \brief Load-Acquire (32 bit)
AnnaBridge 153:b484a57bc302 1128 \details Executes a LDA instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1129 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1130 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 1131 */
AnnaBridge 153:b484a57bc302 1132 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1133 {
AnnaBridge 153:b484a57bc302 1134 uint32_t result;
AnnaBridge 153:b484a57bc302 1135
AnnaBridge 153:b484a57bc302 1136 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 153:b484a57bc302 1137 return(result);
AnnaBridge 153:b484a57bc302 1138 }
AnnaBridge 153:b484a57bc302 1139
AnnaBridge 153:b484a57bc302 1140
AnnaBridge 153:b484a57bc302 1141 /**
AnnaBridge 153:b484a57bc302 1142 \brief Store-Release (8 bit)
AnnaBridge 153:b484a57bc302 1143 \details Executes a STLB instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 1144 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1145 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1146 */
AnnaBridge 153:b484a57bc302 1147 __attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 153:b484a57bc302 1148 {
AnnaBridge 153:b484a57bc302 1149 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1150 }
AnnaBridge 153:b484a57bc302 1151
AnnaBridge 153:b484a57bc302 1152
AnnaBridge 153:b484a57bc302 1153 /**
AnnaBridge 153:b484a57bc302 1154 \brief Store-Release (16 bit)
AnnaBridge 153:b484a57bc302 1155 \details Executes a STLH instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1156 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1157 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1158 */
AnnaBridge 153:b484a57bc302 1159 __attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 153:b484a57bc302 1160 {
AnnaBridge 153:b484a57bc302 1161 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1162 }
AnnaBridge 153:b484a57bc302 1163
AnnaBridge 153:b484a57bc302 1164
AnnaBridge 153:b484a57bc302 1165 /**
AnnaBridge 153:b484a57bc302 1166 \brief Store-Release (32 bit)
AnnaBridge 153:b484a57bc302 1167 \details Executes a STL instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1168 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1169 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1170 */
AnnaBridge 153:b484a57bc302 1171 __attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 153:b484a57bc302 1172 {
AnnaBridge 153:b484a57bc302 1173 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 153:b484a57bc302 1174 }
AnnaBridge 153:b484a57bc302 1175
AnnaBridge 153:b484a57bc302 1176
AnnaBridge 153:b484a57bc302 1177 /**
AnnaBridge 153:b484a57bc302 1178 \brief Load-Acquire Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 1179 \details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge 153:b484a57bc302 1180 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1181 \return value of type uint8_t at (*ptr)
AnnaBridge 153:b484a57bc302 1182 */
AnnaBridge 153:b484a57bc302 1183 #define __LDAEXB (uint8_t)__builtin_arm_ldaex
AnnaBridge 153:b484a57bc302 1184
AnnaBridge 153:b484a57bc302 1185
AnnaBridge 153:b484a57bc302 1186 /**
AnnaBridge 153:b484a57bc302 1187 \brief Load-Acquire Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 1188 \details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1189 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1190 \return value of type uint16_t at (*ptr)
AnnaBridge 153:b484a57bc302 1191 */
AnnaBridge 153:b484a57bc302 1192 #define __LDAEXH (uint16_t)__builtin_arm_ldaex
AnnaBridge 153:b484a57bc302 1193
AnnaBridge 153:b484a57bc302 1194
AnnaBridge 153:b484a57bc302 1195 /**
AnnaBridge 153:b484a57bc302 1196 \brief Load-Acquire Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 1197 \details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1198 \param [in] ptr Pointer to data
AnnaBridge 153:b484a57bc302 1199 \return value of type uint32_t at (*ptr)
AnnaBridge 153:b484a57bc302 1200 */
AnnaBridge 153:b484a57bc302 1201 #define __LDAEX (uint32_t)__builtin_arm_ldaex
AnnaBridge 153:b484a57bc302 1202
AnnaBridge 153:b484a57bc302 1203
AnnaBridge 153:b484a57bc302 1204 /**
AnnaBridge 153:b484a57bc302 1205 \brief Store-Release Exclusive (8 bit)
AnnaBridge 153:b484a57bc302 1206 \details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge 153:b484a57bc302 1207 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1208 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1209 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1210 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1211 */
AnnaBridge 153:b484a57bc302 1212 #define __STLEXB (uint32_t)__builtin_arm_stlex
AnnaBridge 153:b484a57bc302 1213
AnnaBridge 153:b484a57bc302 1214
AnnaBridge 153:b484a57bc302 1215 /**
AnnaBridge 153:b484a57bc302 1216 \brief Store-Release Exclusive (16 bit)
AnnaBridge 153:b484a57bc302 1217 \details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge 153:b484a57bc302 1218 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1219 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1220 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1221 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1222 */
AnnaBridge 153:b484a57bc302 1223 #define __STLEXH (uint32_t)__builtin_arm_stlex
AnnaBridge 153:b484a57bc302 1224
AnnaBridge 153:b484a57bc302 1225
AnnaBridge 153:b484a57bc302 1226 /**
AnnaBridge 153:b484a57bc302 1227 \brief Store-Release Exclusive (32 bit)
AnnaBridge 153:b484a57bc302 1228 \details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge 153:b484a57bc302 1229 \param [in] value Value to store
AnnaBridge 153:b484a57bc302 1230 \param [in] ptr Pointer to location
AnnaBridge 153:b484a57bc302 1231 \return 0 Function succeeded
AnnaBridge 153:b484a57bc302 1232 \return 1 Function failed
AnnaBridge 153:b484a57bc302 1233 */
AnnaBridge 153:b484a57bc302 1234 #define __STLEX (uint32_t)__builtin_arm_stlex
AnnaBridge 153:b484a57bc302 1235
AnnaBridge 153:b484a57bc302 1236 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 153:b484a57bc302 1237 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 153:b484a57bc302 1238
AnnaBridge 153:b484a57bc302 1239 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge 153:b484a57bc302 1240
AnnaBridge 153:b484a57bc302 1241
AnnaBridge 153:b484a57bc302 1242 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 153:b484a57bc302 1243 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 153:b484a57bc302 1244 Access to dedicated SIMD instructions
AnnaBridge 153:b484a57bc302 1245 @{
AnnaBridge 153:b484a57bc302 1246 */
AnnaBridge 153:b484a57bc302 1247
AnnaBridge 153:b484a57bc302 1248 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
AnnaBridge 153:b484a57bc302 1249
AnnaBridge 153:b484a57bc302 1250 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1251 {
AnnaBridge 153:b484a57bc302 1252 uint32_t result;
AnnaBridge 153:b484a57bc302 1253
AnnaBridge 153:b484a57bc302 1254 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1255 return(result);
AnnaBridge 153:b484a57bc302 1256 }
AnnaBridge 153:b484a57bc302 1257
AnnaBridge 153:b484a57bc302 1258 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1259 {
AnnaBridge 153:b484a57bc302 1260 uint32_t result;
AnnaBridge 153:b484a57bc302 1261
AnnaBridge 153:b484a57bc302 1262 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1263 return(result);
AnnaBridge 153:b484a57bc302 1264 }
AnnaBridge 153:b484a57bc302 1265
AnnaBridge 153:b484a57bc302 1266 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1267 {
AnnaBridge 153:b484a57bc302 1268 uint32_t result;
AnnaBridge 153:b484a57bc302 1269
AnnaBridge 153:b484a57bc302 1270 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1271 return(result);
AnnaBridge 153:b484a57bc302 1272 }
AnnaBridge 153:b484a57bc302 1273
AnnaBridge 153:b484a57bc302 1274 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1275 {
AnnaBridge 153:b484a57bc302 1276 uint32_t result;
AnnaBridge 153:b484a57bc302 1277
AnnaBridge 153:b484a57bc302 1278 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1279 return(result);
AnnaBridge 153:b484a57bc302 1280 }
AnnaBridge 153:b484a57bc302 1281
AnnaBridge 153:b484a57bc302 1282 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1283 {
AnnaBridge 153:b484a57bc302 1284 uint32_t result;
AnnaBridge 153:b484a57bc302 1285
AnnaBridge 153:b484a57bc302 1286 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1287 return(result);
AnnaBridge 153:b484a57bc302 1288 }
AnnaBridge 153:b484a57bc302 1289
AnnaBridge 153:b484a57bc302 1290 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1291 {
AnnaBridge 153:b484a57bc302 1292 uint32_t result;
AnnaBridge 153:b484a57bc302 1293
AnnaBridge 153:b484a57bc302 1294 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1295 return(result);
AnnaBridge 153:b484a57bc302 1296 }
AnnaBridge 153:b484a57bc302 1297
AnnaBridge 153:b484a57bc302 1298
AnnaBridge 153:b484a57bc302 1299 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1300 {
AnnaBridge 153:b484a57bc302 1301 uint32_t result;
AnnaBridge 153:b484a57bc302 1302
AnnaBridge 153:b484a57bc302 1303 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1304 return(result);
AnnaBridge 153:b484a57bc302 1305 }
AnnaBridge 153:b484a57bc302 1306
AnnaBridge 153:b484a57bc302 1307 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1308 {
AnnaBridge 153:b484a57bc302 1309 uint32_t result;
AnnaBridge 153:b484a57bc302 1310
AnnaBridge 153:b484a57bc302 1311 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1312 return(result);
AnnaBridge 153:b484a57bc302 1313 }
AnnaBridge 153:b484a57bc302 1314
AnnaBridge 153:b484a57bc302 1315 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1316 {
AnnaBridge 153:b484a57bc302 1317 uint32_t result;
AnnaBridge 153:b484a57bc302 1318
AnnaBridge 153:b484a57bc302 1319 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1320 return(result);
AnnaBridge 153:b484a57bc302 1321 }
AnnaBridge 153:b484a57bc302 1322
AnnaBridge 153:b484a57bc302 1323 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1324 {
AnnaBridge 153:b484a57bc302 1325 uint32_t result;
AnnaBridge 153:b484a57bc302 1326
AnnaBridge 153:b484a57bc302 1327 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1328 return(result);
AnnaBridge 153:b484a57bc302 1329 }
AnnaBridge 153:b484a57bc302 1330
AnnaBridge 153:b484a57bc302 1331 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1332 {
AnnaBridge 153:b484a57bc302 1333 uint32_t result;
AnnaBridge 153:b484a57bc302 1334
AnnaBridge 153:b484a57bc302 1335 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1336 return(result);
AnnaBridge 153:b484a57bc302 1337 }
AnnaBridge 153:b484a57bc302 1338
AnnaBridge 153:b484a57bc302 1339 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1340 {
AnnaBridge 153:b484a57bc302 1341 uint32_t result;
AnnaBridge 153:b484a57bc302 1342
AnnaBridge 153:b484a57bc302 1343 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1344 return(result);
AnnaBridge 153:b484a57bc302 1345 }
AnnaBridge 153:b484a57bc302 1346
AnnaBridge 153:b484a57bc302 1347
AnnaBridge 153:b484a57bc302 1348 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1349 {
AnnaBridge 153:b484a57bc302 1350 uint32_t result;
AnnaBridge 153:b484a57bc302 1351
AnnaBridge 153:b484a57bc302 1352 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1353 return(result);
AnnaBridge 153:b484a57bc302 1354 }
AnnaBridge 153:b484a57bc302 1355
AnnaBridge 153:b484a57bc302 1356 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1357 {
AnnaBridge 153:b484a57bc302 1358 uint32_t result;
AnnaBridge 153:b484a57bc302 1359
AnnaBridge 153:b484a57bc302 1360 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1361 return(result);
AnnaBridge 153:b484a57bc302 1362 }
AnnaBridge 153:b484a57bc302 1363
AnnaBridge 153:b484a57bc302 1364 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1365 {
AnnaBridge 153:b484a57bc302 1366 uint32_t result;
AnnaBridge 153:b484a57bc302 1367
AnnaBridge 153:b484a57bc302 1368 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1369 return(result);
AnnaBridge 153:b484a57bc302 1370 }
AnnaBridge 153:b484a57bc302 1371
AnnaBridge 153:b484a57bc302 1372 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1373 {
AnnaBridge 153:b484a57bc302 1374 uint32_t result;
AnnaBridge 153:b484a57bc302 1375
AnnaBridge 153:b484a57bc302 1376 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1377 return(result);
AnnaBridge 153:b484a57bc302 1378 }
AnnaBridge 153:b484a57bc302 1379
AnnaBridge 153:b484a57bc302 1380 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1381 {
AnnaBridge 153:b484a57bc302 1382 uint32_t result;
AnnaBridge 153:b484a57bc302 1383
AnnaBridge 153:b484a57bc302 1384 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1385 return(result);
AnnaBridge 153:b484a57bc302 1386 }
AnnaBridge 153:b484a57bc302 1387
AnnaBridge 153:b484a57bc302 1388 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1389 {
AnnaBridge 153:b484a57bc302 1390 uint32_t result;
AnnaBridge 153:b484a57bc302 1391
AnnaBridge 153:b484a57bc302 1392 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1393 return(result);
AnnaBridge 153:b484a57bc302 1394 }
AnnaBridge 153:b484a57bc302 1395
AnnaBridge 153:b484a57bc302 1396 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1397 {
AnnaBridge 153:b484a57bc302 1398 uint32_t result;
AnnaBridge 153:b484a57bc302 1399
AnnaBridge 153:b484a57bc302 1400 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1401 return(result);
AnnaBridge 153:b484a57bc302 1402 }
AnnaBridge 153:b484a57bc302 1403
AnnaBridge 153:b484a57bc302 1404 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1405 {
AnnaBridge 153:b484a57bc302 1406 uint32_t result;
AnnaBridge 153:b484a57bc302 1407
AnnaBridge 153:b484a57bc302 1408 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1409 return(result);
AnnaBridge 153:b484a57bc302 1410 }
AnnaBridge 153:b484a57bc302 1411
AnnaBridge 153:b484a57bc302 1412 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1413 {
AnnaBridge 153:b484a57bc302 1414 uint32_t result;
AnnaBridge 153:b484a57bc302 1415
AnnaBridge 153:b484a57bc302 1416 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1417 return(result);
AnnaBridge 153:b484a57bc302 1418 }
AnnaBridge 153:b484a57bc302 1419
AnnaBridge 153:b484a57bc302 1420 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1421 {
AnnaBridge 153:b484a57bc302 1422 uint32_t result;
AnnaBridge 153:b484a57bc302 1423
AnnaBridge 153:b484a57bc302 1424 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1425 return(result);
AnnaBridge 153:b484a57bc302 1426 }
AnnaBridge 153:b484a57bc302 1427
AnnaBridge 153:b484a57bc302 1428 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1429 {
AnnaBridge 153:b484a57bc302 1430 uint32_t result;
AnnaBridge 153:b484a57bc302 1431
AnnaBridge 153:b484a57bc302 1432 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1433 return(result);
AnnaBridge 153:b484a57bc302 1434 }
AnnaBridge 153:b484a57bc302 1435
AnnaBridge 153:b484a57bc302 1436 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1437 {
AnnaBridge 153:b484a57bc302 1438 uint32_t result;
AnnaBridge 153:b484a57bc302 1439
AnnaBridge 153:b484a57bc302 1440 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1441 return(result);
AnnaBridge 153:b484a57bc302 1442 }
AnnaBridge 153:b484a57bc302 1443
AnnaBridge 153:b484a57bc302 1444 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1445 {
AnnaBridge 153:b484a57bc302 1446 uint32_t result;
AnnaBridge 153:b484a57bc302 1447
AnnaBridge 153:b484a57bc302 1448 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1449 return(result);
AnnaBridge 153:b484a57bc302 1450 }
AnnaBridge 153:b484a57bc302 1451
AnnaBridge 153:b484a57bc302 1452 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1453 {
AnnaBridge 153:b484a57bc302 1454 uint32_t result;
AnnaBridge 153:b484a57bc302 1455
AnnaBridge 153:b484a57bc302 1456 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1457 return(result);
AnnaBridge 153:b484a57bc302 1458 }
AnnaBridge 153:b484a57bc302 1459
AnnaBridge 153:b484a57bc302 1460 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1461 {
AnnaBridge 153:b484a57bc302 1462 uint32_t result;
AnnaBridge 153:b484a57bc302 1463
AnnaBridge 153:b484a57bc302 1464 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1465 return(result);
AnnaBridge 153:b484a57bc302 1466 }
AnnaBridge 153:b484a57bc302 1467
AnnaBridge 153:b484a57bc302 1468 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1469 {
AnnaBridge 153:b484a57bc302 1470 uint32_t result;
AnnaBridge 153:b484a57bc302 1471
AnnaBridge 153:b484a57bc302 1472 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1473 return(result);
AnnaBridge 153:b484a57bc302 1474 }
AnnaBridge 153:b484a57bc302 1475
AnnaBridge 153:b484a57bc302 1476 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1477 {
AnnaBridge 153:b484a57bc302 1478 uint32_t result;
AnnaBridge 153:b484a57bc302 1479
AnnaBridge 153:b484a57bc302 1480 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1481 return(result);
AnnaBridge 153:b484a57bc302 1482 }
AnnaBridge 153:b484a57bc302 1483
AnnaBridge 153:b484a57bc302 1484 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1485 {
AnnaBridge 153:b484a57bc302 1486 uint32_t result;
AnnaBridge 153:b484a57bc302 1487
AnnaBridge 153:b484a57bc302 1488 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1489 return(result);
AnnaBridge 153:b484a57bc302 1490 }
AnnaBridge 153:b484a57bc302 1491
AnnaBridge 153:b484a57bc302 1492 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1493 {
AnnaBridge 153:b484a57bc302 1494 uint32_t result;
AnnaBridge 153:b484a57bc302 1495
AnnaBridge 153:b484a57bc302 1496 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1497 return(result);
AnnaBridge 153:b484a57bc302 1498 }
AnnaBridge 153:b484a57bc302 1499
AnnaBridge 153:b484a57bc302 1500 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1501 {
AnnaBridge 153:b484a57bc302 1502 uint32_t result;
AnnaBridge 153:b484a57bc302 1503
AnnaBridge 153:b484a57bc302 1504 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1505 return(result);
AnnaBridge 153:b484a57bc302 1506 }
AnnaBridge 153:b484a57bc302 1507
AnnaBridge 153:b484a57bc302 1508 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1509 {
AnnaBridge 153:b484a57bc302 1510 uint32_t result;
AnnaBridge 153:b484a57bc302 1511
AnnaBridge 153:b484a57bc302 1512 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1513 return(result);
AnnaBridge 153:b484a57bc302 1514 }
AnnaBridge 153:b484a57bc302 1515
AnnaBridge 153:b484a57bc302 1516 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1517 {
AnnaBridge 153:b484a57bc302 1518 uint32_t result;
AnnaBridge 153:b484a57bc302 1519
AnnaBridge 153:b484a57bc302 1520 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1521 return(result);
AnnaBridge 153:b484a57bc302 1522 }
AnnaBridge 153:b484a57bc302 1523
AnnaBridge 153:b484a57bc302 1524 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1525 {
AnnaBridge 153:b484a57bc302 1526 uint32_t result;
AnnaBridge 153:b484a57bc302 1527
AnnaBridge 153:b484a57bc302 1528 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1529 return(result);
AnnaBridge 153:b484a57bc302 1530 }
AnnaBridge 153:b484a57bc302 1531
AnnaBridge 153:b484a57bc302 1532 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1533 {
AnnaBridge 153:b484a57bc302 1534 uint32_t result;
AnnaBridge 153:b484a57bc302 1535
AnnaBridge 153:b484a57bc302 1536 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1537 return(result);
AnnaBridge 153:b484a57bc302 1538 }
AnnaBridge 153:b484a57bc302 1539
AnnaBridge 153:b484a57bc302 1540 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1541 {
AnnaBridge 153:b484a57bc302 1542 uint32_t result;
AnnaBridge 153:b484a57bc302 1543
AnnaBridge 153:b484a57bc302 1544 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1545 return(result);
AnnaBridge 153:b484a57bc302 1546 }
AnnaBridge 153:b484a57bc302 1547
AnnaBridge 153:b484a57bc302 1548 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1549 {
AnnaBridge 153:b484a57bc302 1550 uint32_t result;
AnnaBridge 153:b484a57bc302 1551
AnnaBridge 153:b484a57bc302 1552 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1553 return(result);
AnnaBridge 153:b484a57bc302 1554 }
AnnaBridge 153:b484a57bc302 1555
AnnaBridge 153:b484a57bc302 1556 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 153:b484a57bc302 1557 ({ \
AnnaBridge 153:b484a57bc302 1558 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 153:b484a57bc302 1559 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 153:b484a57bc302 1560 __RES; \
AnnaBridge 153:b484a57bc302 1561 })
AnnaBridge 153:b484a57bc302 1562
AnnaBridge 153:b484a57bc302 1563 #define __USAT16(ARG1,ARG2) \
AnnaBridge 153:b484a57bc302 1564 ({ \
AnnaBridge 153:b484a57bc302 1565 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 153:b484a57bc302 1566 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 153:b484a57bc302 1567 __RES; \
AnnaBridge 153:b484a57bc302 1568 })
AnnaBridge 153:b484a57bc302 1569
AnnaBridge 153:b484a57bc302 1570 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 153:b484a57bc302 1571 {
AnnaBridge 153:b484a57bc302 1572 uint32_t result;
AnnaBridge 153:b484a57bc302 1573
AnnaBridge 153:b484a57bc302 1574 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 153:b484a57bc302 1575 return(result);
AnnaBridge 153:b484a57bc302 1576 }
AnnaBridge 153:b484a57bc302 1577
AnnaBridge 153:b484a57bc302 1578 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1579 {
AnnaBridge 153:b484a57bc302 1580 uint32_t result;
AnnaBridge 153:b484a57bc302 1581
AnnaBridge 153:b484a57bc302 1582 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1583 return(result);
AnnaBridge 153:b484a57bc302 1584 }
AnnaBridge 153:b484a57bc302 1585
AnnaBridge 153:b484a57bc302 1586 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 153:b484a57bc302 1587 {
AnnaBridge 153:b484a57bc302 1588 uint32_t result;
AnnaBridge 153:b484a57bc302 1589
AnnaBridge 153:b484a57bc302 1590 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 153:b484a57bc302 1591 return(result);
AnnaBridge 153:b484a57bc302 1592 }
AnnaBridge 153:b484a57bc302 1593
AnnaBridge 153:b484a57bc302 1594 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1595 {
AnnaBridge 153:b484a57bc302 1596 uint32_t result;
AnnaBridge 153:b484a57bc302 1597
AnnaBridge 153:b484a57bc302 1598 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1599 return(result);
AnnaBridge 153:b484a57bc302 1600 }
AnnaBridge 153:b484a57bc302 1601
AnnaBridge 153:b484a57bc302 1602 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1603 {
AnnaBridge 153:b484a57bc302 1604 uint32_t result;
AnnaBridge 153:b484a57bc302 1605
AnnaBridge 153:b484a57bc302 1606 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1607 return(result);
AnnaBridge 153:b484a57bc302 1608 }
AnnaBridge 153:b484a57bc302 1609
AnnaBridge 153:b484a57bc302 1610 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1611 {
AnnaBridge 153:b484a57bc302 1612 uint32_t result;
AnnaBridge 153:b484a57bc302 1613
AnnaBridge 153:b484a57bc302 1614 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1615 return(result);
AnnaBridge 153:b484a57bc302 1616 }
AnnaBridge 153:b484a57bc302 1617
AnnaBridge 153:b484a57bc302 1618 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1619 {
AnnaBridge 153:b484a57bc302 1620 uint32_t result;
AnnaBridge 153:b484a57bc302 1621
AnnaBridge 153:b484a57bc302 1622 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1623 return(result);
AnnaBridge 153:b484a57bc302 1624 }
AnnaBridge 153:b484a57bc302 1625
AnnaBridge 153:b484a57bc302 1626 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1627 {
AnnaBridge 153:b484a57bc302 1628 uint32_t result;
AnnaBridge 153:b484a57bc302 1629
AnnaBridge 153:b484a57bc302 1630 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1631 return(result);
AnnaBridge 153:b484a57bc302 1632 }
AnnaBridge 153:b484a57bc302 1633
AnnaBridge 153:b484a57bc302 1634 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1635 {
AnnaBridge 153:b484a57bc302 1636 union llreg_u{
AnnaBridge 153:b484a57bc302 1637 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1638 uint64_t w64;
AnnaBridge 153:b484a57bc302 1639 } llr;
AnnaBridge 153:b484a57bc302 1640 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1641
AnnaBridge 153:b484a57bc302 1642 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1643 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1644 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1645 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1646 #endif
AnnaBridge 153:b484a57bc302 1647
AnnaBridge 153:b484a57bc302 1648 return(llr.w64);
AnnaBridge 153:b484a57bc302 1649 }
AnnaBridge 153:b484a57bc302 1650
AnnaBridge 153:b484a57bc302 1651 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1652 {
AnnaBridge 153:b484a57bc302 1653 union llreg_u{
AnnaBridge 153:b484a57bc302 1654 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1655 uint64_t w64;
AnnaBridge 153:b484a57bc302 1656 } llr;
AnnaBridge 153:b484a57bc302 1657 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1658
AnnaBridge 153:b484a57bc302 1659 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1660 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1661 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1662 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1663 #endif
AnnaBridge 153:b484a57bc302 1664
AnnaBridge 153:b484a57bc302 1665 return(llr.w64);
AnnaBridge 153:b484a57bc302 1666 }
AnnaBridge 153:b484a57bc302 1667
AnnaBridge 153:b484a57bc302 1668 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1669 {
AnnaBridge 153:b484a57bc302 1670 uint32_t result;
AnnaBridge 153:b484a57bc302 1671
AnnaBridge 153:b484a57bc302 1672 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1673 return(result);
AnnaBridge 153:b484a57bc302 1674 }
AnnaBridge 153:b484a57bc302 1675
AnnaBridge 153:b484a57bc302 1676 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1677 {
AnnaBridge 153:b484a57bc302 1678 uint32_t result;
AnnaBridge 153:b484a57bc302 1679
AnnaBridge 153:b484a57bc302 1680 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1681 return(result);
AnnaBridge 153:b484a57bc302 1682 }
AnnaBridge 153:b484a57bc302 1683
AnnaBridge 153:b484a57bc302 1684 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1685 {
AnnaBridge 153:b484a57bc302 1686 uint32_t result;
AnnaBridge 153:b484a57bc302 1687
AnnaBridge 153:b484a57bc302 1688 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1689 return(result);
AnnaBridge 153:b484a57bc302 1690 }
AnnaBridge 153:b484a57bc302 1691
AnnaBridge 153:b484a57bc302 1692 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 153:b484a57bc302 1693 {
AnnaBridge 153:b484a57bc302 1694 uint32_t result;
AnnaBridge 153:b484a57bc302 1695
AnnaBridge 153:b484a57bc302 1696 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1697 return(result);
AnnaBridge 153:b484a57bc302 1698 }
AnnaBridge 153:b484a57bc302 1699
AnnaBridge 153:b484a57bc302 1700 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1701 {
AnnaBridge 153:b484a57bc302 1702 union llreg_u{
AnnaBridge 153:b484a57bc302 1703 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1704 uint64_t w64;
AnnaBridge 153:b484a57bc302 1705 } llr;
AnnaBridge 153:b484a57bc302 1706 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1707
AnnaBridge 153:b484a57bc302 1708 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1709 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1710 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1711 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1712 #endif
AnnaBridge 153:b484a57bc302 1713
AnnaBridge 153:b484a57bc302 1714 return(llr.w64);
AnnaBridge 153:b484a57bc302 1715 }
AnnaBridge 153:b484a57bc302 1716
AnnaBridge 153:b484a57bc302 1717 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 153:b484a57bc302 1718 {
AnnaBridge 153:b484a57bc302 1719 union llreg_u{
AnnaBridge 153:b484a57bc302 1720 uint32_t w32[2];
AnnaBridge 153:b484a57bc302 1721 uint64_t w64;
AnnaBridge 153:b484a57bc302 1722 } llr;
AnnaBridge 153:b484a57bc302 1723 llr.w64 = acc;
AnnaBridge 153:b484a57bc302 1724
AnnaBridge 153:b484a57bc302 1725 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 153:b484a57bc302 1726 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 153:b484a57bc302 1727 #else /* Big endian */
AnnaBridge 153:b484a57bc302 1728 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 153:b484a57bc302 1729 #endif
AnnaBridge 153:b484a57bc302 1730
AnnaBridge 153:b484a57bc302 1731 return(llr.w64);
AnnaBridge 153:b484a57bc302 1732 }
AnnaBridge 153:b484a57bc302 1733
AnnaBridge 153:b484a57bc302 1734 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 153:b484a57bc302 1735 {
AnnaBridge 153:b484a57bc302 1736 uint32_t result;
AnnaBridge 153:b484a57bc302 1737
AnnaBridge 153:b484a57bc302 1738 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1739 return(result);
AnnaBridge 153:b484a57bc302 1740 }
AnnaBridge 153:b484a57bc302 1741
AnnaBridge 153:b484a57bc302 1742 __attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge 153:b484a57bc302 1743 {
AnnaBridge 153:b484a57bc302 1744 int32_t result;
AnnaBridge 153:b484a57bc302 1745
AnnaBridge 153:b484a57bc302 1746 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1747 return(result);
AnnaBridge 153:b484a57bc302 1748 }
AnnaBridge 153:b484a57bc302 1749
AnnaBridge 153:b484a57bc302 1750 __attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge 153:b484a57bc302 1751 {
AnnaBridge 153:b484a57bc302 1752 int32_t result;
AnnaBridge 153:b484a57bc302 1753
AnnaBridge 153:b484a57bc302 1754 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 153:b484a57bc302 1755 return(result);
AnnaBridge 153:b484a57bc302 1756 }
AnnaBridge 153:b484a57bc302 1757
AnnaBridge 153:b484a57bc302 1758 #if 0
AnnaBridge 153:b484a57bc302 1759 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 153:b484a57bc302 1760 ({ \
AnnaBridge 153:b484a57bc302 1761 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 153:b484a57bc302 1762 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 153:b484a57bc302 1763 __RES; \
AnnaBridge 153:b484a57bc302 1764 })
AnnaBridge 153:b484a57bc302 1765
AnnaBridge 153:b484a57bc302 1766 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 153:b484a57bc302 1767 ({ \
AnnaBridge 153:b484a57bc302 1768 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 153:b484a57bc302 1769 if (ARG3 == 0) \
AnnaBridge 153:b484a57bc302 1770 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 153:b484a57bc302 1771 else \
AnnaBridge 153:b484a57bc302 1772 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 153:b484a57bc302 1773 __RES; \
AnnaBridge 153:b484a57bc302 1774 })
AnnaBridge 153:b484a57bc302 1775 #endif
AnnaBridge 153:b484a57bc302 1776
AnnaBridge 153:b484a57bc302 1777 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 153:b484a57bc302 1778 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 153:b484a57bc302 1779
AnnaBridge 153:b484a57bc302 1780 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 153:b484a57bc302 1781 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 153:b484a57bc302 1782
AnnaBridge 153:b484a57bc302 1783 __attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 153:b484a57bc302 1784 {
AnnaBridge 153:b484a57bc302 1785 int32_t result;
AnnaBridge 153:b484a57bc302 1786
AnnaBridge 153:b484a57bc302 1787 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 153:b484a57bc302 1788 return(result);
AnnaBridge 153:b484a57bc302 1789 }
AnnaBridge 153:b484a57bc302 1790
AnnaBridge 153:b484a57bc302 1791 #endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge 153:b484a57bc302 1792 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 153:b484a57bc302 1793
AnnaBridge 153:b484a57bc302 1794
AnnaBridge 153:b484a57bc302 1795 #endif /* __CMSIS_ARMCLANG_H */