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TARGET_DISCO_F413ZH/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc.h@163:e59c8e839560, 2018-03-20 (annotated)

Committer:
AnnaBridge
Date:
Tue Mar 20 13:30:58 2018 +0000
Revision:
163:e59c8e839560
Parent:
146:22da6e220af6
Child:
169:a7c7b631e539
mbed library. Release version 160

Who changed what in which revision?

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AnnaBridge 146:22da6e220af6 1 /**
AnnaBridge 146:22da6e220af6 2 ******************************************************************************
AnnaBridge 146:22da6e220af6 3 * @file stm32f4xx_hal_adc.h
AnnaBridge 146:22da6e220af6 4 * @author MCD Application Team
AnnaBridge 146:22da6e220af6 5 * @brief Header file containing functions prototypes of ADC HAL library.
AnnaBridge 146:22da6e220af6 6 ******************************************************************************
AnnaBridge 146:22da6e220af6 7 * @attention
AnnaBridge 146:22da6e220af6 8 *
AnnaBridge 146:22da6e220af6 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 146:22da6e220af6 10 *
AnnaBridge 146:22da6e220af6 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 146:22da6e220af6 12 * are permitted provided that the following conditions are met:
AnnaBridge 146:22da6e220af6 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 146:22da6e220af6 14 * this list of conditions and the following disclaimer.
AnnaBridge 146:22da6e220af6 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 146:22da6e220af6 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 146:22da6e220af6 17 * and/or other materials provided with the distribution.
AnnaBridge 146:22da6e220af6 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 146:22da6e220af6 19 * may be used to endorse or promote products derived from this software
AnnaBridge 146:22da6e220af6 20 * without specific prior written permission.
AnnaBridge 146:22da6e220af6 21 *
AnnaBridge 146:22da6e220af6 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 146:22da6e220af6 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 146:22da6e220af6 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 146:22da6e220af6 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 146:22da6e220af6 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 146:22da6e220af6 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 146:22da6e220af6 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 146:22da6e220af6 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 146:22da6e220af6 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 146:22da6e220af6 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 146:22da6e220af6 32 *
AnnaBridge 146:22da6e220af6 33 ******************************************************************************
AnnaBridge 146:22da6e220af6 34 */
AnnaBridge 146:22da6e220af6 35
AnnaBridge 146:22da6e220af6 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 146:22da6e220af6 37 #ifndef __STM32F4xx_ADC_H
AnnaBridge 146:22da6e220af6 38 #define __STM32F4xx_ADC_H
AnnaBridge 146:22da6e220af6 39
AnnaBridge 146:22da6e220af6 40 #ifdef __cplusplus
AnnaBridge 146:22da6e220af6 41 extern "C" {
AnnaBridge 146:22da6e220af6 42 #endif
AnnaBridge 146:22da6e220af6 43
AnnaBridge 146:22da6e220af6 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 45 #include "stm32f4xx_hal_def.h"
AnnaBridge 146:22da6e220af6 46
AnnaBridge 146:22da6e220af6 47 /** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge 146:22da6e220af6 48 * @{
AnnaBridge 146:22da6e220af6 49 */
AnnaBridge 146:22da6e220af6 50
AnnaBridge 146:22da6e220af6 51 /** @addtogroup ADC
AnnaBridge 146:22da6e220af6 52 * @{
AnnaBridge 146:22da6e220af6 53 */
AnnaBridge 146:22da6e220af6 54
AnnaBridge 146:22da6e220af6 55 /* Exported types ------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 56 /** @defgroup ADC_Exported_Types ADC Exported Types
AnnaBridge 146:22da6e220af6 57 * @{
AnnaBridge 146:22da6e220af6 58 */
AnnaBridge 146:22da6e220af6 59
AnnaBridge 146:22da6e220af6 60 /**
AnnaBridge 146:22da6e220af6 61 * @brief Structure definition of ADC and regular group initialization
AnnaBridge 146:22da6e220af6 62 * @note Parameters of this structure are shared within 2 scopes:
AnnaBridge 146:22da6e220af6 63 * - Scope entire ADC (affects regular and injected groups): ClockPrescaler, Resolution, ScanConvMode, DataAlign, ScanConvMode, EOCSelection, LowPowerAutoWait, LowPowerAutoPowerOff, ChannelsBank.
AnnaBridge 146:22da6e220af6 64 * - Scope regular group: ContinuousConvMode, NbrOfConversion, DiscontinuousConvMode, NbrOfDiscConversion, ExternalTrigConvEdge, ExternalTrigConv.
AnnaBridge 146:22da6e220af6 65 * @note The setting of these parameters with function HAL_ADC_Init() is conditioned to ADC state.
AnnaBridge 146:22da6e220af6 66 * ADC state can be either:
AnnaBridge 146:22da6e220af6 67 * - For all parameters: ADC disabled
AnnaBridge 146:22da6e220af6 68 * - For all parameters except 'Resolution', 'ScanConvMode', 'DiscontinuousConvMode', 'NbrOfDiscConversion' : ADC enabled without conversion on going on regular group.
AnnaBridge 146:22da6e220af6 69 * - For parameters 'ExternalTrigConv' and 'ExternalTrigConvEdge': ADC enabled, even with conversion on going.
AnnaBridge 146:22da6e220af6 70 * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
AnnaBridge 146:22da6e220af6 71 * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly).
AnnaBridge 146:22da6e220af6 72 */
AnnaBridge 146:22da6e220af6 73 typedef struct
AnnaBridge 146:22da6e220af6 74 {
AnnaBridge 146:22da6e220af6 75 uint32_t ClockPrescaler; /*!< Select ADC clock prescaler. The clock is common for
AnnaBridge 146:22da6e220af6 76 all the ADCs.
AnnaBridge 146:22da6e220af6 77 This parameter can be a value of @ref ADC_ClockPrescaler */
AnnaBridge 146:22da6e220af6 78 uint32_t Resolution; /*!< Configures the ADC resolution.
AnnaBridge 146:22da6e220af6 79 This parameter can be a value of @ref ADC_Resolution */
AnnaBridge 146:22da6e220af6 80 uint32_t DataAlign; /*!< Specifies ADC data alignment to right (MSB on register bit 11 and LSB on register bit 0) (default setting)
AnnaBridge 146:22da6e220af6 81 or to left (if regular group: MSB on register bit 15 and LSB on register bit 4, if injected group (MSB kept as signed value due to potential negative value after offset application): MSB on register bit 14 and LSB on register bit 3).
AnnaBridge 146:22da6e220af6 82 This parameter can be a value of @ref ADC_Data_align */
AnnaBridge 146:22da6e220af6 83 uint32_t ScanConvMode; /*!< Configures the sequencer of regular and injected groups.
AnnaBridge 146:22da6e220af6 84 This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
AnnaBridge 146:22da6e220af6 85 If disabled: Conversion is performed in single mode (one channel converted, the one defined in rank 1).
AnnaBridge 146:22da6e220af6 86 Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1).
AnnaBridge 146:22da6e220af6 87 If enabled: Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion'/'InjectedNbrOfConversion' and each channel rank).
AnnaBridge 146:22da6e220af6 88 Scan direction is upward: from rank1 to rank 'n'.
AnnaBridge 146:22da6e220af6 89 This parameter can be set to ENABLE or DISABLE */
AnnaBridge 146:22da6e220af6 90 uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence.
AnnaBridge 146:22da6e220af6 91 This parameter can be a value of @ref ADC_EOCSelection.
AnnaBridge 146:22da6e220af6 92 Note: For injected group, end of conversion (flag&IT) is raised only at the end of the sequence.
AnnaBridge 146:22da6e220af6 93 Therefore, if end of conversion is set to end of each conversion, injected group should not be used with interruption (HAL_ADCEx_InjectedStart_IT)
AnnaBridge 146:22da6e220af6 94 or polling (HAL_ADCEx_InjectedStart and HAL_ADCEx_InjectedPollForConversion). By the way, polling is still possible since driver will use an estimated timing for end of injected conversion.
AnnaBridge 146:22da6e220af6 95 Note: If overrun feature is intended to be used, use ADC in mode 'interruption' (function HAL_ADC_Start_IT() ) with parameter EOCSelection set to end of each conversion or in mode 'transfer by DMA' (function HAL_ADC_Start_DMA()).
AnnaBridge 146:22da6e220af6 96 If overrun feature is intended to be bypassed, use ADC in mode 'polling' or 'interruption' with parameter EOCSelection must be set to end of sequence */
AnnaBridge 146:22da6e220af6 97 uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
AnnaBridge 146:22da6e220af6 98 after the selected trigger occurred (software start or external trigger).
AnnaBridge 146:22da6e220af6 99 This parameter can be set to ENABLE or DISABLE. */
AnnaBridge 146:22da6e220af6 100 uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
AnnaBridge 146:22da6e220af6 101 To use regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
AnnaBridge 146:22da6e220af6 102 This parameter must be a number between Min_Data = 1 and Max_Data = 16. */
AnnaBridge 146:22da6e220af6 103 uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
AnnaBridge 146:22da6e220af6 104 Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
AnnaBridge 146:22da6e220af6 105 Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
AnnaBridge 146:22da6e220af6 106 This parameter can be set to ENABLE or DISABLE. */
AnnaBridge 146:22da6e220af6 107 uint32_t NbrOfDiscConversion; /*!< Specifies the number of discontinuous conversions in which the main sequence of regular group (parameter NbrOfConversion) will be subdivided.
AnnaBridge 146:22da6e220af6 108 If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded.
AnnaBridge 146:22da6e220af6 109 This parameter must be a number between Min_Data = 1 and Max_Data = 8. */
AnnaBridge 146:22da6e220af6 110 uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
AnnaBridge 146:22da6e220af6 111 If set to ADC_SOFTWARE_START, external triggers are disabled.
AnnaBridge 146:22da6e220af6 112 If set to external trigger source, triggering is on event rising edge by default.
AnnaBridge 146:22da6e220af6 113 This parameter can be a value of @ref ADC_External_trigger_Source_Regular */
AnnaBridge 146:22da6e220af6 114 uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group.
AnnaBridge 146:22da6e220af6 115 If trigger is set to ADC_SOFTWARE_START, this parameter is discarded.
AnnaBridge 146:22da6e220af6 116 This parameter can be a value of @ref ADC_External_trigger_edge_Regular */
AnnaBridge 146:22da6e220af6 117 uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
AnnaBridge 146:22da6e220af6 118 or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
AnnaBridge 146:22da6e220af6 119 Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
AnnaBridge 146:22da6e220af6 120 Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion).
AnnaBridge 146:22da6e220af6 121 This parameter can be set to ENABLE or DISABLE. */
AnnaBridge 146:22da6e220af6 122 }ADC_InitTypeDef;
AnnaBridge 146:22da6e220af6 123
AnnaBridge 146:22da6e220af6 124
AnnaBridge 146:22da6e220af6 125
AnnaBridge 146:22da6e220af6 126 /**
AnnaBridge 146:22da6e220af6 127 * @brief Structure definition of ADC channel for regular group
AnnaBridge 146:22da6e220af6 128 * @note The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned to ADC state.
AnnaBridge 146:22da6e220af6 129 * ADC can be either disabled or enabled without conversion on going on regular group.
AnnaBridge 146:22da6e220af6 130 */
AnnaBridge 146:22da6e220af6 131 typedef struct
AnnaBridge 146:22da6e220af6 132 {
AnnaBridge 146:22da6e220af6 133 uint32_t Channel; /*!< Specifies the channel to configure into ADC regular group.
AnnaBridge 146:22da6e220af6 134 This parameter can be a value of @ref ADC_channels */
AnnaBridge 146:22da6e220af6 135 uint32_t Rank; /*!< Specifies the rank in the regular group sequencer.
AnnaBridge 146:22da6e220af6 136 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */
AnnaBridge 146:22da6e220af6 137 uint32_t SamplingTime; /*!< Sampling time value to be set for the selected channel.
AnnaBridge 146:22da6e220af6 138 Unit: ADC clock cycles
AnnaBridge 146:22da6e220af6 139 Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits).
AnnaBridge 146:22da6e220af6 140 This parameter can be a value of @ref ADC_sampling_times
AnnaBridge 146:22da6e220af6 141 Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
AnnaBridge 146:22da6e220af6 142 If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
AnnaBridge 146:22da6e220af6 143 Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
AnnaBridge 146:22da6e220af6 144 sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
AnnaBridge 146:22da6e220af6 145 Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */
AnnaBridge 146:22da6e220af6 146 uint32_t Offset; /*!< Reserved for future use, can be set to 0 */
AnnaBridge 146:22da6e220af6 147 }ADC_ChannelConfTypeDef;
AnnaBridge 146:22da6e220af6 148
AnnaBridge 146:22da6e220af6 149 /**
AnnaBridge 146:22da6e220af6 150 * @brief ADC Configuration multi-mode structure definition
AnnaBridge 146:22da6e220af6 151 */
AnnaBridge 146:22da6e220af6 152 typedef struct
AnnaBridge 146:22da6e220af6 153 {
AnnaBridge 146:22da6e220af6 154 uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode.
AnnaBridge 146:22da6e220af6 155 This parameter can be a value of @ref ADC_analog_watchdog_selection */
AnnaBridge 146:22da6e220af6 156 uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
AnnaBridge 146:22da6e220af6 157 This parameter must be a 12-bit value. */
AnnaBridge 146:22da6e220af6 158 uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
AnnaBridge 146:22da6e220af6 159 This parameter must be a 12-bit value. */
AnnaBridge 146:22da6e220af6 160 uint32_t Channel; /*!< Configures ADC channel for the analog watchdog.
AnnaBridge 146:22da6e220af6 161 This parameter has an effect only if watchdog mode is configured on single channel
AnnaBridge 146:22da6e220af6 162 This parameter can be a value of @ref ADC_channels */
AnnaBridge 146:22da6e220af6 163 uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured
AnnaBridge 146:22da6e220af6 164 is interrupt mode or in polling mode.
AnnaBridge 146:22da6e220af6 165 This parameter can be set to ENABLE or DISABLE */
AnnaBridge 146:22da6e220af6 166 uint32_t WatchdogNumber; /*!< Reserved for future use, can be set to 0 */
AnnaBridge 146:22da6e220af6 167 }ADC_AnalogWDGConfTypeDef;
AnnaBridge 146:22da6e220af6 168
AnnaBridge 146:22da6e220af6 169 /**
AnnaBridge 146:22da6e220af6 170 * @brief HAL ADC state machine: ADC states definition (bitfields)
AnnaBridge 146:22da6e220af6 171 */
AnnaBridge 146:22da6e220af6 172 /* States of ADC global scope */
AnnaBridge 146:22da6e220af6 173 #define HAL_ADC_STATE_RESET 0x00000000U /*!< ADC not yet initialized or disabled */
AnnaBridge 146:22da6e220af6 174 #define HAL_ADC_STATE_READY 0x00000001U /*!< ADC peripheral ready for use */
AnnaBridge 146:22da6e220af6 175 #define HAL_ADC_STATE_BUSY_INTERNAL 0x00000002U /*!< ADC is busy to internal process (initialization, calibration) */
AnnaBridge 146:22da6e220af6 176 #define HAL_ADC_STATE_TIMEOUT 0x00000004U /*!< TimeOut occurrence */
AnnaBridge 146:22da6e220af6 177
AnnaBridge 146:22da6e220af6 178 /* States of ADC errors */
AnnaBridge 146:22da6e220af6 179 #define HAL_ADC_STATE_ERROR_INTERNAL 0x00000010U /*!< Internal error occurrence */
AnnaBridge 146:22da6e220af6 180 #define HAL_ADC_STATE_ERROR_CONFIG 0x00000020U /*!< Configuration error occurrence */
AnnaBridge 146:22da6e220af6 181 #define HAL_ADC_STATE_ERROR_DMA 0x00000040U /*!< DMA error occurrence */
AnnaBridge 146:22da6e220af6 182
AnnaBridge 146:22da6e220af6 183 /* States of ADC group regular */
AnnaBridge 146:22da6e220af6 184 #define HAL_ADC_STATE_REG_BUSY 0x00000100U /*!< A conversion on group regular is ongoing or can occur (either by continuous mode,
AnnaBridge 146:22da6e220af6 185 external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
AnnaBridge 146:22da6e220af6 186 #define HAL_ADC_STATE_REG_EOC 0x00000200U /*!< Conversion data available on group regular */
AnnaBridge 146:22da6e220af6 187 #define HAL_ADC_STATE_REG_OVR 0x00000400U /*!< Overrun occurrence */
AnnaBridge 146:22da6e220af6 188
AnnaBridge 146:22da6e220af6 189 /* States of ADC group injected */
AnnaBridge 146:22da6e220af6 190 #define HAL_ADC_STATE_INJ_BUSY 0x00001000U /*!< A conversion on group injected is ongoing or can occur (either by auto-injection mode,
AnnaBridge 146:22da6e220af6 191 external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
AnnaBridge 146:22da6e220af6 192 #define HAL_ADC_STATE_INJ_EOC 0x00002000U /*!< Conversion data available on group injected */
AnnaBridge 146:22da6e220af6 193
AnnaBridge 146:22da6e220af6 194 /* States of ADC analog watchdogs */
AnnaBridge 146:22da6e220af6 195 #define HAL_ADC_STATE_AWD1 0x00010000U /*!< Out-of-window occurrence of analog watchdog 1 */
AnnaBridge 146:22da6e220af6 196 #define HAL_ADC_STATE_AWD2 0x00020000U /*!< Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 2 */
AnnaBridge 146:22da6e220af6 197 #define HAL_ADC_STATE_AWD3 0x00040000U /*!< Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 3 */
AnnaBridge 146:22da6e220af6 198
AnnaBridge 146:22da6e220af6 199 /* States of ADC multi-mode */
AnnaBridge 146:22da6e220af6 200 #define HAL_ADC_STATE_MULTIMODE_SLAVE 0x00100000U /*!< Not available on STM32F4 device: ADC in multimode slave state, controlled by another ADC master ( */
AnnaBridge 146:22da6e220af6 201
AnnaBridge 146:22da6e220af6 202
AnnaBridge 146:22da6e220af6 203 /**
AnnaBridge 146:22da6e220af6 204 * @brief ADC handle Structure definition
AnnaBridge 146:22da6e220af6 205 */
AnnaBridge 146:22da6e220af6 206 typedef struct
AnnaBridge 146:22da6e220af6 207 {
AnnaBridge 146:22da6e220af6 208 ADC_TypeDef *Instance; /*!< Register base address */
AnnaBridge 146:22da6e220af6 209
AnnaBridge 146:22da6e220af6 210 ADC_InitTypeDef Init; /*!< ADC required parameters */
AnnaBridge 146:22da6e220af6 211
AnnaBridge 146:22da6e220af6 212 __IO uint32_t NbrOfCurrentConversionRank; /*!< ADC number of current conversion rank */
AnnaBridge 146:22da6e220af6 213
AnnaBridge 146:22da6e220af6 214 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */
AnnaBridge 146:22da6e220af6 215
AnnaBridge 146:22da6e220af6 216 HAL_LockTypeDef Lock; /*!< ADC locking object */
AnnaBridge 146:22da6e220af6 217
AnnaBridge 146:22da6e220af6 218 __IO uint32_t State; /*!< ADC communication state */
AnnaBridge 146:22da6e220af6 219
AnnaBridge 146:22da6e220af6 220 __IO uint32_t ErrorCode; /*!< ADC Error code */
AnnaBridge 146:22da6e220af6 221 }ADC_HandleTypeDef;
AnnaBridge 146:22da6e220af6 222 /**
AnnaBridge 146:22da6e220af6 223 * @}
AnnaBridge 146:22da6e220af6 224 */
AnnaBridge 146:22da6e220af6 225
AnnaBridge 146:22da6e220af6 226 /* Exported constants --------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 227 /** @defgroup ADC_Exported_Constants ADC Exported Constants
AnnaBridge 146:22da6e220af6 228 * @{
AnnaBridge 146:22da6e220af6 229 */
AnnaBridge 146:22da6e220af6 230
AnnaBridge 146:22da6e220af6 231 /** @defgroup ADC_Error_Code ADC Error Code
AnnaBridge 146:22da6e220af6 232 * @{
AnnaBridge 146:22da6e220af6 233 */
AnnaBridge 146:22da6e220af6 234 #define HAL_ADC_ERROR_NONE 0x00U /*!< No error */
AnnaBridge 146:22da6e220af6 235 #define HAL_ADC_ERROR_INTERNAL 0x01U /*!< ADC IP internal error: if problem of clocking,
AnnaBridge 146:22da6e220af6 236 enable/disable, erroneous state */
AnnaBridge 146:22da6e220af6 237 #define HAL_ADC_ERROR_OVR 0x02U /*!< Overrun error */
AnnaBridge 146:22da6e220af6 238 #define HAL_ADC_ERROR_DMA 0x04U /*!< DMA transfer error */
AnnaBridge 146:22da6e220af6 239 /**
AnnaBridge 146:22da6e220af6 240 * @}
AnnaBridge 146:22da6e220af6 241 */
AnnaBridge 146:22da6e220af6 242
AnnaBridge 146:22da6e220af6 243
AnnaBridge 146:22da6e220af6 244 /** @defgroup ADC_ClockPrescaler ADC Clock Prescaler
AnnaBridge 146:22da6e220af6 245 * @{
AnnaBridge 146:22da6e220af6 246 */
AnnaBridge 146:22da6e220af6 247 #define ADC_CLOCK_SYNC_PCLK_DIV2 0x00000000U
AnnaBridge 146:22da6e220af6 248 #define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CCR_ADCPRE_0)
AnnaBridge 146:22da6e220af6 249 #define ADC_CLOCK_SYNC_PCLK_DIV6 ((uint32_t)ADC_CCR_ADCPRE_1)
AnnaBridge 146:22da6e220af6 250 #define ADC_CLOCK_SYNC_PCLK_DIV8 ((uint32_t)ADC_CCR_ADCPRE)
AnnaBridge 146:22da6e220af6 251 /**
AnnaBridge 146:22da6e220af6 252 * @}
AnnaBridge 146:22da6e220af6 253 */
AnnaBridge 146:22da6e220af6 254
AnnaBridge 146:22da6e220af6 255 /** @defgroup ADC_delay_between_2_sampling_phases ADC Delay Between 2 Sampling Phases
AnnaBridge 146:22da6e220af6 256 * @{
AnnaBridge 146:22da6e220af6 257 */
AnnaBridge 146:22da6e220af6 258 #define ADC_TWOSAMPLINGDELAY_5CYCLES 0x00000000U
AnnaBridge 146:22da6e220af6 259 #define ADC_TWOSAMPLINGDELAY_6CYCLES ((uint32_t)ADC_CCR_DELAY_0)
AnnaBridge 146:22da6e220af6 260 #define ADC_TWOSAMPLINGDELAY_7CYCLES ((uint32_t)ADC_CCR_DELAY_1)
AnnaBridge 146:22da6e220af6 261 #define ADC_TWOSAMPLINGDELAY_8CYCLES ((uint32_t)(ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
AnnaBridge 146:22da6e220af6 262 #define ADC_TWOSAMPLINGDELAY_9CYCLES ((uint32_t)ADC_CCR_DELAY_2)
AnnaBridge 146:22da6e220af6 263 #define ADC_TWOSAMPLINGDELAY_10CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0))
AnnaBridge 146:22da6e220af6 264 #define ADC_TWOSAMPLINGDELAY_11CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1))
AnnaBridge 146:22da6e220af6 265 #define ADC_TWOSAMPLINGDELAY_12CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
AnnaBridge 146:22da6e220af6 266 #define ADC_TWOSAMPLINGDELAY_13CYCLES ((uint32_t)ADC_CCR_DELAY_3)
AnnaBridge 146:22da6e220af6 267 #define ADC_TWOSAMPLINGDELAY_14CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_0))
AnnaBridge 146:22da6e220af6 268 #define ADC_TWOSAMPLINGDELAY_15CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1))
AnnaBridge 146:22da6e220af6 269 #define ADC_TWOSAMPLINGDELAY_16CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
AnnaBridge 146:22da6e220af6 270 #define ADC_TWOSAMPLINGDELAY_17CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2))
AnnaBridge 146:22da6e220af6 271 #define ADC_TWOSAMPLINGDELAY_18CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0))
AnnaBridge 146:22da6e220af6 272 #define ADC_TWOSAMPLINGDELAY_19CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1))
AnnaBridge 146:22da6e220af6 273 #define ADC_TWOSAMPLINGDELAY_20CYCLES ((uint32_t)ADC_CCR_DELAY)
AnnaBridge 146:22da6e220af6 274 /**
AnnaBridge 146:22da6e220af6 275 * @}
AnnaBridge 146:22da6e220af6 276 */
AnnaBridge 146:22da6e220af6 277
AnnaBridge 146:22da6e220af6 278 /** @defgroup ADC_Resolution ADC Resolution
AnnaBridge 146:22da6e220af6 279 * @{
AnnaBridge 146:22da6e220af6 280 */
AnnaBridge 146:22da6e220af6 281 #define ADC_RESOLUTION_12B 0x00000000U
AnnaBridge 146:22da6e220af6 282 #define ADC_RESOLUTION_10B ((uint32_t)ADC_CR1_RES_0)
AnnaBridge 146:22da6e220af6 283 #define ADC_RESOLUTION_8B ((uint32_t)ADC_CR1_RES_1)
AnnaBridge 146:22da6e220af6 284 #define ADC_RESOLUTION_6B ((uint32_t)ADC_CR1_RES)
AnnaBridge 146:22da6e220af6 285 /**
AnnaBridge 146:22da6e220af6 286 * @}
AnnaBridge 146:22da6e220af6 287 */
AnnaBridge 146:22da6e220af6 288
AnnaBridge 146:22da6e220af6 289 /** @defgroup ADC_External_trigger_edge_Regular ADC External Trigger Edge Regular
AnnaBridge 146:22da6e220af6 290 * @{
AnnaBridge 146:22da6e220af6 291 */
AnnaBridge 146:22da6e220af6 292 #define ADC_EXTERNALTRIGCONVEDGE_NONE 0x00000000U
AnnaBridge 146:22da6e220af6 293 #define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CR2_EXTEN_0)
AnnaBridge 146:22da6e220af6 294 #define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CR2_EXTEN_1)
AnnaBridge 146:22da6e220af6 295 #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_EXTEN)
AnnaBridge 146:22da6e220af6 296 /**
AnnaBridge 146:22da6e220af6 297 * @}
AnnaBridge 146:22da6e220af6 298 */
AnnaBridge 146:22da6e220af6 299
AnnaBridge 146:22da6e220af6 300 /** @defgroup ADC_External_trigger_Source_Regular ADC External Trigger Source Regular
AnnaBridge 146:22da6e220af6 301 * @{
AnnaBridge 146:22da6e220af6 302 */
AnnaBridge 146:22da6e220af6 303 /* Note: Parameter ADC_SOFTWARE_START is a software parameter used for */
AnnaBridge 146:22da6e220af6 304 /* compatibility with other STM32 devices. */
AnnaBridge 146:22da6e220af6 305 #define ADC_EXTERNALTRIGCONV_T1_CC1 0x00000000U
AnnaBridge 146:22da6e220af6 306 #define ADC_EXTERNALTRIGCONV_T1_CC2 ((uint32_t)ADC_CR2_EXTSEL_0)
AnnaBridge 146:22da6e220af6 307 #define ADC_EXTERNALTRIGCONV_T1_CC3 ((uint32_t)ADC_CR2_EXTSEL_1)
AnnaBridge 146:22da6e220af6 308 #define ADC_EXTERNALTRIGCONV_T2_CC2 ((uint32_t)(ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
AnnaBridge 146:22da6e220af6 309 #define ADC_EXTERNALTRIGCONV_T2_CC3 ((uint32_t)ADC_CR2_EXTSEL_2)
AnnaBridge 146:22da6e220af6 310 #define ADC_EXTERNALTRIGCONV_T2_CC4 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0))
AnnaBridge 146:22da6e220af6 311 #define ADC_EXTERNALTRIGCONV_T2_TRGO ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1))
AnnaBridge 146:22da6e220af6 312 #define ADC_EXTERNALTRIGCONV_T3_CC1 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
AnnaBridge 146:22da6e220af6 313 #define ADC_EXTERNALTRIGCONV_T3_TRGO ((uint32_t)ADC_CR2_EXTSEL_3)
AnnaBridge 146:22da6e220af6 314 #define ADC_EXTERNALTRIGCONV_T4_CC4 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_0))
AnnaBridge 146:22da6e220af6 315 #define ADC_EXTERNALTRIGCONV_T5_CC1 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_1))
AnnaBridge 146:22da6e220af6 316 #define ADC_EXTERNALTRIGCONV_T5_CC2 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
AnnaBridge 146:22da6e220af6 317 #define ADC_EXTERNALTRIGCONV_T5_CC3 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_2))
AnnaBridge 146:22da6e220af6 318 #define ADC_EXTERNALTRIGCONV_T8_CC1 ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0))
AnnaBridge 146:22da6e220af6 319 #define ADC_EXTERNALTRIGCONV_T8_TRGO ((uint32_t)(ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1))
AnnaBridge 146:22da6e220af6 320 #define ADC_EXTERNALTRIGCONV_Ext_IT11 ((uint32_t)ADC_CR2_EXTSEL)
AnnaBridge 146:22da6e220af6 321 #define ADC_SOFTWARE_START ((uint32_t)ADC_CR2_EXTSEL + 1U)
AnnaBridge 146:22da6e220af6 322 /**
AnnaBridge 146:22da6e220af6 323 * @}
AnnaBridge 146:22da6e220af6 324 */
AnnaBridge 146:22da6e220af6 325
AnnaBridge 146:22da6e220af6 326 /** @defgroup ADC_Data_align ADC Data Align
AnnaBridge 146:22da6e220af6 327 * @{
AnnaBridge 146:22da6e220af6 328 */
AnnaBridge 146:22da6e220af6 329 #define ADC_DATAALIGN_RIGHT 0x00000000U
AnnaBridge 146:22da6e220af6 330 #define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CR2_ALIGN)
AnnaBridge 146:22da6e220af6 331 /**
AnnaBridge 146:22da6e220af6 332 * @}
AnnaBridge 146:22da6e220af6 333 */
AnnaBridge 146:22da6e220af6 334
AnnaBridge 146:22da6e220af6 335 /** @defgroup ADC_channels ADC Common Channels
AnnaBridge 146:22da6e220af6 336 * @{
AnnaBridge 146:22da6e220af6 337 */
AnnaBridge 146:22da6e220af6 338 #define ADC_CHANNEL_0 0x00000000U
AnnaBridge 146:22da6e220af6 339 #define ADC_CHANNEL_1 ((uint32_t)ADC_CR1_AWDCH_0)
AnnaBridge 146:22da6e220af6 340 #define ADC_CHANNEL_2 ((uint32_t)ADC_CR1_AWDCH_1)
AnnaBridge 146:22da6e220af6 341 #define ADC_CHANNEL_3 ((uint32_t)(ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
AnnaBridge 146:22da6e220af6 342 #define ADC_CHANNEL_4 ((uint32_t)ADC_CR1_AWDCH_2)
AnnaBridge 146:22da6e220af6 343 #define ADC_CHANNEL_5 ((uint32_t)(ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_0))
AnnaBridge 146:22da6e220af6 344 #define ADC_CHANNEL_6 ((uint32_t)(ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1))
AnnaBridge 146:22da6e220af6 345 #define ADC_CHANNEL_7 ((uint32_t)(ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
AnnaBridge 146:22da6e220af6 346 #define ADC_CHANNEL_8 ((uint32_t)ADC_CR1_AWDCH_3)
AnnaBridge 146:22da6e220af6 347 #define ADC_CHANNEL_9 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_0))
AnnaBridge 146:22da6e220af6 348 #define ADC_CHANNEL_10 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_1))
AnnaBridge 146:22da6e220af6 349 #define ADC_CHANNEL_11 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
AnnaBridge 146:22da6e220af6 350 #define ADC_CHANNEL_12 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2))
AnnaBridge 146:22da6e220af6 351 #define ADC_CHANNEL_13 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_0))
AnnaBridge 146:22da6e220af6 352 #define ADC_CHANNEL_14 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1))
AnnaBridge 146:22da6e220af6 353 #define ADC_CHANNEL_15 ((uint32_t)(ADC_CR1_AWDCH_3 | ADC_CR1_AWDCH_2 | ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
AnnaBridge 146:22da6e220af6 354 #define ADC_CHANNEL_16 ((uint32_t)ADC_CR1_AWDCH_4)
AnnaBridge 146:22da6e220af6 355 #define ADC_CHANNEL_17 ((uint32_t)(ADC_CR1_AWDCH_4 | ADC_CR1_AWDCH_0))
AnnaBridge 146:22da6e220af6 356 #define ADC_CHANNEL_18 ((uint32_t)(ADC_CR1_AWDCH_4 | ADC_CR1_AWDCH_1))
AnnaBridge 146:22da6e220af6 357
AnnaBridge 146:22da6e220af6 358 #define ADC_CHANNEL_VREFINT ((uint32_t)ADC_CHANNEL_17)
AnnaBridge 146:22da6e220af6 359 #define ADC_CHANNEL_VBAT ((uint32_t)ADC_CHANNEL_18)
AnnaBridge 146:22da6e220af6 360 /**
AnnaBridge 146:22da6e220af6 361 * @}
AnnaBridge 146:22da6e220af6 362 */
AnnaBridge 146:22da6e220af6 363
AnnaBridge 146:22da6e220af6 364 /** @defgroup ADC_sampling_times ADC Sampling Times
AnnaBridge 146:22da6e220af6 365 * @{
AnnaBridge 146:22da6e220af6 366 */
AnnaBridge 146:22da6e220af6 367 #define ADC_SAMPLETIME_3CYCLES 0x00000000U
AnnaBridge 146:22da6e220af6 368 #define ADC_SAMPLETIME_15CYCLES ((uint32_t)ADC_SMPR1_SMP10_0)
AnnaBridge 146:22da6e220af6 369 #define ADC_SAMPLETIME_28CYCLES ((uint32_t)ADC_SMPR1_SMP10_1)
AnnaBridge 146:22da6e220af6 370 #define ADC_SAMPLETIME_56CYCLES ((uint32_t)(ADC_SMPR1_SMP10_1 | ADC_SMPR1_SMP10_0))
AnnaBridge 146:22da6e220af6 371 #define ADC_SAMPLETIME_84CYCLES ((uint32_t)ADC_SMPR1_SMP10_2)
AnnaBridge 146:22da6e220af6 372 #define ADC_SAMPLETIME_112CYCLES ((uint32_t)(ADC_SMPR1_SMP10_2 | ADC_SMPR1_SMP10_0))
AnnaBridge 146:22da6e220af6 373 #define ADC_SAMPLETIME_144CYCLES ((uint32_t)(ADC_SMPR1_SMP10_2 | ADC_SMPR1_SMP10_1))
AnnaBridge 146:22da6e220af6 374 #define ADC_SAMPLETIME_480CYCLES ((uint32_t)ADC_SMPR1_SMP10)
AnnaBridge 146:22da6e220af6 375 /**
AnnaBridge 146:22da6e220af6 376 * @}
AnnaBridge 146:22da6e220af6 377 */
AnnaBridge 146:22da6e220af6 378
AnnaBridge 146:22da6e220af6 379 /** @defgroup ADC_EOCSelection ADC EOC Selection
AnnaBridge 146:22da6e220af6 380 * @{
AnnaBridge 146:22da6e220af6 381 */
AnnaBridge 146:22da6e220af6 382 #define ADC_EOC_SEQ_CONV 0x00000000U
AnnaBridge 146:22da6e220af6 383 #define ADC_EOC_SINGLE_CONV 0x00000001U
AnnaBridge 146:22da6e220af6 384 #define ADC_EOC_SINGLE_SEQ_CONV 0x00000002U /*!< reserved for future use */
AnnaBridge 146:22da6e220af6 385 /**
AnnaBridge 146:22da6e220af6 386 * @}
AnnaBridge 146:22da6e220af6 387 */
AnnaBridge 146:22da6e220af6 388
AnnaBridge 146:22da6e220af6 389 /** @defgroup ADC_Event_type ADC Event Type
AnnaBridge 146:22da6e220af6 390 * @{
AnnaBridge 146:22da6e220af6 391 */
AnnaBridge 146:22da6e220af6 392 #define ADC_AWD_EVENT ((uint32_t)ADC_FLAG_AWD)
AnnaBridge 146:22da6e220af6 393 #define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR)
AnnaBridge 146:22da6e220af6 394 /**
AnnaBridge 146:22da6e220af6 395 * @}
AnnaBridge 146:22da6e220af6 396 */
AnnaBridge 146:22da6e220af6 397
AnnaBridge 146:22da6e220af6 398 /** @defgroup ADC_analog_watchdog_selection ADC Analog Watchdog Selection
AnnaBridge 146:22da6e220af6 399 * @{
AnnaBridge 146:22da6e220af6 400 */
AnnaBridge 146:22da6e220af6 401 #define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_AWDEN))
AnnaBridge 146:22da6e220af6 402 #define ADC_ANALOGWATCHDOG_SINGLE_INJEC ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_JAWDEN))
AnnaBridge 146:22da6e220af6 403 #define ADC_ANALOGWATCHDOG_SINGLE_REGINJEC ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_AWDEN | ADC_CR1_JAWDEN))
AnnaBridge 146:22da6e220af6 404 #define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t)ADC_CR1_AWDEN)
AnnaBridge 146:22da6e220af6 405 #define ADC_ANALOGWATCHDOG_ALL_INJEC ((uint32_t)ADC_CR1_JAWDEN)
AnnaBridge 146:22da6e220af6 406 #define ADC_ANALOGWATCHDOG_ALL_REGINJEC ((uint32_t)(ADC_CR1_AWDEN | ADC_CR1_JAWDEN))
AnnaBridge 146:22da6e220af6 407 #define ADC_ANALOGWATCHDOG_NONE 0x00000000U
AnnaBridge 146:22da6e220af6 408 /**
AnnaBridge 146:22da6e220af6 409 * @}
AnnaBridge 146:22da6e220af6 410 */
AnnaBridge 146:22da6e220af6 411
AnnaBridge 146:22da6e220af6 412 /** @defgroup ADC_interrupts_definition ADC Interrupts Definition
AnnaBridge 146:22da6e220af6 413 * @{
AnnaBridge 146:22da6e220af6 414 */
AnnaBridge 146:22da6e220af6 415 #define ADC_IT_EOC ((uint32_t)ADC_CR1_EOCIE)
AnnaBridge 146:22da6e220af6 416 #define ADC_IT_AWD ((uint32_t)ADC_CR1_AWDIE)
AnnaBridge 146:22da6e220af6 417 #define ADC_IT_JEOC ((uint32_t)ADC_CR1_JEOCIE)
AnnaBridge 146:22da6e220af6 418 #define ADC_IT_OVR ((uint32_t)ADC_CR1_OVRIE)
AnnaBridge 146:22da6e220af6 419 /**
AnnaBridge 146:22da6e220af6 420 * @}
AnnaBridge 146:22da6e220af6 421 */
AnnaBridge 146:22da6e220af6 422
AnnaBridge 146:22da6e220af6 423 /** @defgroup ADC_flags_definition ADC Flags Definition
AnnaBridge 146:22da6e220af6 424 * @{
AnnaBridge 146:22da6e220af6 425 */
AnnaBridge 146:22da6e220af6 426 #define ADC_FLAG_AWD ((uint32_t)ADC_SR_AWD)
AnnaBridge 146:22da6e220af6 427 #define ADC_FLAG_EOC ((uint32_t)ADC_SR_EOC)
AnnaBridge 146:22da6e220af6 428 #define ADC_FLAG_JEOC ((uint32_t)ADC_SR_JEOC)
AnnaBridge 146:22da6e220af6 429 #define ADC_FLAG_JSTRT ((uint32_t)ADC_SR_JSTRT)
AnnaBridge 146:22da6e220af6 430 #define ADC_FLAG_STRT ((uint32_t)ADC_SR_STRT)
AnnaBridge 146:22da6e220af6 431 #define ADC_FLAG_OVR ((uint32_t)ADC_SR_OVR)
AnnaBridge 146:22da6e220af6 432 /**
AnnaBridge 146:22da6e220af6 433 * @}
AnnaBridge 146:22da6e220af6 434 */
AnnaBridge 146:22da6e220af6 435
AnnaBridge 146:22da6e220af6 436 /** @defgroup ADC_channels_type ADC Channels Type
AnnaBridge 146:22da6e220af6 437 * @{
AnnaBridge 146:22da6e220af6 438 */
AnnaBridge 146:22da6e220af6 439 #define ADC_ALL_CHANNELS 0x00000001U
AnnaBridge 146:22da6e220af6 440 #define ADC_REGULAR_CHANNELS 0x00000002U /*!< reserved for future use */
AnnaBridge 146:22da6e220af6 441 #define ADC_INJECTED_CHANNELS 0x00000003U /*!< reserved for future use */
AnnaBridge 146:22da6e220af6 442 /**
AnnaBridge 146:22da6e220af6 443 * @}
AnnaBridge 146:22da6e220af6 444 */
AnnaBridge 146:22da6e220af6 445
AnnaBridge 146:22da6e220af6 446 /**
AnnaBridge 146:22da6e220af6 447 * @}
AnnaBridge 146:22da6e220af6 448 */
AnnaBridge 146:22da6e220af6 449
AnnaBridge 146:22da6e220af6 450 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 451 /** @defgroup ADC_Exported_Macros ADC Exported Macros
AnnaBridge 146:22da6e220af6 452 * @{
AnnaBridge 146:22da6e220af6 453 */
AnnaBridge 146:22da6e220af6 454
AnnaBridge 146:22da6e220af6 455 /** @brief Reset ADC handle state
AnnaBridge 163:e59c8e839560 456 * @param __HANDLE__ ADC handle
AnnaBridge 146:22da6e220af6 457 * @retval None
AnnaBridge 146:22da6e220af6 458 */
AnnaBridge 146:22da6e220af6 459 #define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
AnnaBridge 146:22da6e220af6 460
AnnaBridge 146:22da6e220af6 461 /**
AnnaBridge 146:22da6e220af6 462 * @brief Enable the ADC peripheral.
AnnaBridge 163:e59c8e839560 463 * @param __HANDLE__ ADC handle
AnnaBridge 146:22da6e220af6 464 * @retval None
AnnaBridge 146:22da6e220af6 465 */
AnnaBridge 146:22da6e220af6 466 #define __HAL_ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR2 |= ADC_CR2_ADON)
AnnaBridge 146:22da6e220af6 467
AnnaBridge 146:22da6e220af6 468 /**
AnnaBridge 146:22da6e220af6 469 * @brief Disable the ADC peripheral.
AnnaBridge 163:e59c8e839560 470 * @param __HANDLE__ ADC handle
AnnaBridge 146:22da6e220af6 471 * @retval None
AnnaBridge 146:22da6e220af6 472 */
AnnaBridge 146:22da6e220af6 473 #define __HAL_ADC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= ~ADC_CR2_ADON)
AnnaBridge 146:22da6e220af6 474
AnnaBridge 146:22da6e220af6 475 /**
AnnaBridge 146:22da6e220af6 476 * @brief Enable the ADC end of conversion interrupt.
AnnaBridge 163:e59c8e839560 477 * @param __HANDLE__ specifies the ADC Handle.
AnnaBridge 163:e59c8e839560 478 * @param __INTERRUPT__ ADC Interrupt.
AnnaBridge 146:22da6e220af6 479 * @retval None
AnnaBridge 146:22da6e220af6 480 */
AnnaBridge 146:22da6e220af6 481 #define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1) |= (__INTERRUPT__))
AnnaBridge 146:22da6e220af6 482
AnnaBridge 146:22da6e220af6 483 /**
AnnaBridge 146:22da6e220af6 484 * @brief Disable the ADC end of conversion interrupt.
AnnaBridge 163:e59c8e839560 485 * @param __HANDLE__ specifies the ADC Handle.
AnnaBridge 163:e59c8e839560 486 * @param __INTERRUPT__ ADC interrupt.
AnnaBridge 146:22da6e220af6 487 * @retval None
AnnaBridge 146:22da6e220af6 488 */
AnnaBridge 146:22da6e220af6 489 #define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1) &= ~(__INTERRUPT__))
AnnaBridge 146:22da6e220af6 490
AnnaBridge 146:22da6e220af6 491 /** @brief Check if the specified ADC interrupt source is enabled or disabled.
AnnaBridge 163:e59c8e839560 492 * @param __HANDLE__ specifies the ADC Handle.
AnnaBridge 163:e59c8e839560 493 * @param __INTERRUPT__ specifies the ADC interrupt source to check.
AnnaBridge 146:22da6e220af6 494 * @retval The new state of __IT__ (TRUE or FALSE).
AnnaBridge 146:22da6e220af6 495 */
AnnaBridge 146:22da6e220af6 496 #define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__))
AnnaBridge 146:22da6e220af6 497
AnnaBridge 146:22da6e220af6 498 /**
AnnaBridge 146:22da6e220af6 499 * @brief Clear the ADC's pending flags.
AnnaBridge 163:e59c8e839560 500 * @param __HANDLE__ specifies the ADC Handle.
AnnaBridge 163:e59c8e839560 501 * @param __FLAG__ ADC flag.
AnnaBridge 146:22da6e220af6 502 * @retval None
AnnaBridge 146:22da6e220af6 503 */
AnnaBridge 146:22da6e220af6 504 #define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = ~(__FLAG__))
AnnaBridge 146:22da6e220af6 505
AnnaBridge 146:22da6e220af6 506 /**
AnnaBridge 146:22da6e220af6 507 * @brief Get the selected ADC's flag status.
AnnaBridge 163:e59c8e839560 508 * @param __HANDLE__ specifies the ADC Handle.
AnnaBridge 163:e59c8e839560 509 * @param __FLAG__ ADC flag.
AnnaBridge 146:22da6e220af6 510 * @retval None
AnnaBridge 146:22da6e220af6 511 */
AnnaBridge 146:22da6e220af6 512 #define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
AnnaBridge 146:22da6e220af6 513
AnnaBridge 146:22da6e220af6 514 /**
AnnaBridge 146:22da6e220af6 515 * @}
AnnaBridge 146:22da6e220af6 516 */
AnnaBridge 146:22da6e220af6 517
AnnaBridge 146:22da6e220af6 518 /* Include ADC HAL Extension module */
AnnaBridge 146:22da6e220af6 519 #include "stm32f4xx_hal_adc_ex.h"
AnnaBridge 146:22da6e220af6 520
AnnaBridge 146:22da6e220af6 521 /* Exported functions --------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 522 /** @addtogroup ADC_Exported_Functions
AnnaBridge 146:22da6e220af6 523 * @{
AnnaBridge 146:22da6e220af6 524 */
AnnaBridge 146:22da6e220af6 525
AnnaBridge 146:22da6e220af6 526 /** @addtogroup ADC_Exported_Functions_Group1
AnnaBridge 146:22da6e220af6 527 * @{
AnnaBridge 146:22da6e220af6 528 */
AnnaBridge 146:22da6e220af6 529 /* Initialization/de-initialization functions ***********************************/
AnnaBridge 146:22da6e220af6 530 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 531 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
AnnaBridge 146:22da6e220af6 532 void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 533 void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 534 /**
AnnaBridge 146:22da6e220af6 535 * @}
AnnaBridge 146:22da6e220af6 536 */
AnnaBridge 146:22da6e220af6 537
AnnaBridge 146:22da6e220af6 538 /** @addtogroup ADC_Exported_Functions_Group2
AnnaBridge 146:22da6e220af6 539 * @{
AnnaBridge 146:22da6e220af6 540 */
AnnaBridge 146:22da6e220af6 541 /* I/O operation functions ******************************************************/
AnnaBridge 146:22da6e220af6 542 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 543 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 544 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
AnnaBridge 146:22da6e220af6 545
AnnaBridge 146:22da6e220af6 546 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
AnnaBridge 146:22da6e220af6 547
AnnaBridge 146:22da6e220af6 548 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 549 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 550
AnnaBridge 146:22da6e220af6 551 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 552
AnnaBridge 146:22da6e220af6 553 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
AnnaBridge 146:22da6e220af6 554 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 555
AnnaBridge 146:22da6e220af6 556 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 557
AnnaBridge 146:22da6e220af6 558 void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 559 void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 560 void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 561 void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
AnnaBridge 146:22da6e220af6 562 /**
AnnaBridge 146:22da6e220af6 563 * @}
AnnaBridge 146:22da6e220af6 564 */
AnnaBridge 146:22da6e220af6 565
AnnaBridge 146:22da6e220af6 566 /** @addtogroup ADC_Exported_Functions_Group3
AnnaBridge 146:22da6e220af6 567 * @{
AnnaBridge 146:22da6e220af6 568 */
AnnaBridge 146:22da6e220af6 569 /* Peripheral Control functions *************************************************/
AnnaBridge 146:22da6e220af6 570 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
AnnaBridge 146:22da6e220af6 571 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
AnnaBridge 146:22da6e220af6 572 /**
AnnaBridge 146:22da6e220af6 573 * @}
AnnaBridge 146:22da6e220af6 574 */
AnnaBridge 146:22da6e220af6 575
AnnaBridge 146:22da6e220af6 576 /** @addtogroup ADC_Exported_Functions_Group4
AnnaBridge 146:22da6e220af6 577 * @{
AnnaBridge 146:22da6e220af6 578 */
AnnaBridge 146:22da6e220af6 579 /* Peripheral State functions ***************************************************/
AnnaBridge 146:22da6e220af6 580 uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
AnnaBridge 146:22da6e220af6 581 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
AnnaBridge 146:22da6e220af6 582 /**
AnnaBridge 146:22da6e220af6 583 * @}
AnnaBridge 146:22da6e220af6 584 */
AnnaBridge 146:22da6e220af6 585
AnnaBridge 146:22da6e220af6 586 /**
AnnaBridge 146:22da6e220af6 587 * @}
AnnaBridge 146:22da6e220af6 588 */
AnnaBridge 146:22da6e220af6 589 /* Private types -------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 590 /* Private variables ---------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 591 /* Private constants ---------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 592 /** @defgroup ADC_Private_Constants ADC Private Constants
AnnaBridge 146:22da6e220af6 593 * @{
AnnaBridge 146:22da6e220af6 594 */
AnnaBridge 146:22da6e220af6 595 /* Delay for ADC stabilization time. */
AnnaBridge 146:22da6e220af6 596 /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */
AnnaBridge 146:22da6e220af6 597 /* Unit: us */
AnnaBridge 146:22da6e220af6 598 #define ADC_STAB_DELAY_US 3U
AnnaBridge 146:22da6e220af6 599 /* Delay for temperature sensor stabilization time. */
AnnaBridge 146:22da6e220af6 600 /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
AnnaBridge 146:22da6e220af6 601 /* Unit: us */
AnnaBridge 146:22da6e220af6 602 #define ADC_TEMPSENSOR_DELAY_US 10U
AnnaBridge 146:22da6e220af6 603 /**
AnnaBridge 146:22da6e220af6 604 * @}
AnnaBridge 146:22da6e220af6 605 */
AnnaBridge 146:22da6e220af6 606
AnnaBridge 146:22da6e220af6 607 /* Private macro ------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 608
AnnaBridge 146:22da6e220af6 609 /** @defgroup ADC_Private_Macros ADC Private Macros
AnnaBridge 146:22da6e220af6 610 * @{
AnnaBridge 146:22da6e220af6 611 */
AnnaBridge 146:22da6e220af6 612 /* Macro reserved for internal HAL driver usage, not intended to be used in
AnnaBridge 146:22da6e220af6 613 code of final user */
AnnaBridge 146:22da6e220af6 614
AnnaBridge 146:22da6e220af6 615 /**
AnnaBridge 146:22da6e220af6 616 * @brief Verification of ADC state: enabled or disabled
AnnaBridge 163:e59c8e839560 617 * @param __HANDLE__ ADC handle
AnnaBridge 146:22da6e220af6 618 * @retval SET (ADC enabled) or RESET (ADC disabled)
AnnaBridge 146:22da6e220af6 619 */
AnnaBridge 146:22da6e220af6 620 #define ADC_IS_ENABLE(__HANDLE__) \
AnnaBridge 146:22da6e220af6 621 ((( ((__HANDLE__)->Instance->SR & ADC_SR_ADONS) == ADC_SR_ADONS ) \
AnnaBridge 146:22da6e220af6 622 ) ? SET : RESET)
AnnaBridge 146:22da6e220af6 623
AnnaBridge 146:22da6e220af6 624 /**
AnnaBridge 146:22da6e220af6 625 * @brief Test if conversion trigger of regular group is software start
AnnaBridge 146:22da6e220af6 626 * or external trigger.
AnnaBridge 163:e59c8e839560 627 * @param __HANDLE__ ADC handle
AnnaBridge 146:22da6e220af6 628 * @retval SET (software start) or RESET (external trigger)
AnnaBridge 146:22da6e220af6 629 */
AnnaBridge 146:22da6e220af6 630 #define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \
AnnaBridge 146:22da6e220af6 631 (((__HANDLE__)->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
AnnaBridge 146:22da6e220af6 632
AnnaBridge 146:22da6e220af6 633 /**
AnnaBridge 146:22da6e220af6 634 * @brief Test if conversion trigger of injected group is software start
AnnaBridge 146:22da6e220af6 635 * or external trigger.
AnnaBridge 163:e59c8e839560 636 * @param __HANDLE__ ADC handle
AnnaBridge 146:22da6e220af6 637 * @retval SET (software start) or RESET (external trigger)
AnnaBridge 146:22da6e220af6 638 */
AnnaBridge 146:22da6e220af6 639 #define ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__) \
AnnaBridge 146:22da6e220af6 640 (((__HANDLE__)->Instance->CR2 & ADC_CR2_JEXTEN) == RESET)
AnnaBridge 146:22da6e220af6 641
AnnaBridge 146:22da6e220af6 642 /**
AnnaBridge 146:22da6e220af6 643 * @brief Simultaneously clears and sets specific bits of the handle State
AnnaBridge 146:22da6e220af6 644 * @note: ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(),
AnnaBridge 146:22da6e220af6 645 * the first parameter is the ADC handle State, the second parameter is the
AnnaBridge 146:22da6e220af6 646 * bit field to clear, the third and last parameter is the bit field to set.
AnnaBridge 146:22da6e220af6 647 * @retval None
AnnaBridge 146:22da6e220af6 648 */
AnnaBridge 146:22da6e220af6 649 #define ADC_STATE_CLR_SET MODIFY_REG
AnnaBridge 146:22da6e220af6 650
AnnaBridge 146:22da6e220af6 651 /**
AnnaBridge 146:22da6e220af6 652 * @brief Clear ADC error code (set it to error code: "no error")
AnnaBridge 163:e59c8e839560 653 * @param __HANDLE__ ADC handle
AnnaBridge 146:22da6e220af6 654 * @retval None
AnnaBridge 146:22da6e220af6 655 */
AnnaBridge 146:22da6e220af6 656 #define ADC_CLEAR_ERRORCODE(__HANDLE__) \
AnnaBridge 146:22da6e220af6 657 ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)
AnnaBridge 146:22da6e220af6 658
AnnaBridge 146:22da6e220af6 659
AnnaBridge 146:22da6e220af6 660 #define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) || \
AnnaBridge 146:22da6e220af6 661 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) || \
AnnaBridge 146:22da6e220af6 662 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV6) || \
AnnaBridge 146:22da6e220af6 663 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV8))
AnnaBridge 146:22da6e220af6 664 #define IS_ADC_SAMPLING_DELAY(DELAY) (((DELAY) == ADC_TWOSAMPLINGDELAY_5CYCLES) || \
AnnaBridge 146:22da6e220af6 665 ((DELAY) == ADC_TWOSAMPLINGDELAY_6CYCLES) || \
AnnaBridge 146:22da6e220af6 666 ((DELAY) == ADC_TWOSAMPLINGDELAY_7CYCLES) || \
AnnaBridge 146:22da6e220af6 667 ((DELAY) == ADC_TWOSAMPLINGDELAY_8CYCLES) || \
AnnaBridge 146:22da6e220af6 668 ((DELAY) == ADC_TWOSAMPLINGDELAY_9CYCLES) || \
AnnaBridge 146:22da6e220af6 669 ((DELAY) == ADC_TWOSAMPLINGDELAY_10CYCLES) || \
AnnaBridge 146:22da6e220af6 670 ((DELAY) == ADC_TWOSAMPLINGDELAY_11CYCLES) || \
AnnaBridge 146:22da6e220af6 671 ((DELAY) == ADC_TWOSAMPLINGDELAY_12CYCLES) || \
AnnaBridge 146:22da6e220af6 672 ((DELAY) == ADC_TWOSAMPLINGDELAY_13CYCLES) || \
AnnaBridge 146:22da6e220af6 673 ((DELAY) == ADC_TWOSAMPLINGDELAY_14CYCLES) || \
AnnaBridge 146:22da6e220af6 674 ((DELAY) == ADC_TWOSAMPLINGDELAY_15CYCLES) || \
AnnaBridge 146:22da6e220af6 675 ((DELAY) == ADC_TWOSAMPLINGDELAY_16CYCLES) || \
AnnaBridge 146:22da6e220af6 676 ((DELAY) == ADC_TWOSAMPLINGDELAY_17CYCLES) || \
AnnaBridge 146:22da6e220af6 677 ((DELAY) == ADC_TWOSAMPLINGDELAY_18CYCLES) || \
AnnaBridge 146:22da6e220af6 678 ((DELAY) == ADC_TWOSAMPLINGDELAY_19CYCLES) || \
AnnaBridge 146:22da6e220af6 679 ((DELAY) == ADC_TWOSAMPLINGDELAY_20CYCLES))
AnnaBridge 146:22da6e220af6 680 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_12B) || \
AnnaBridge 146:22da6e220af6 681 ((RESOLUTION) == ADC_RESOLUTION_10B) || \
AnnaBridge 146:22da6e220af6 682 ((RESOLUTION) == ADC_RESOLUTION_8B) || \
AnnaBridge 146:22da6e220af6 683 ((RESOLUTION) == ADC_RESOLUTION_6B))
AnnaBridge 146:22da6e220af6 684 #define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \
AnnaBridge 146:22da6e220af6 685 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \
AnnaBridge 146:22da6e220af6 686 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \
AnnaBridge 146:22da6e220af6 687 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING))
AnnaBridge 146:22da6e220af6 688 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
AnnaBridge 146:22da6e220af6 689 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
AnnaBridge 146:22da6e220af6 690 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3) || \
AnnaBridge 146:22da6e220af6 691 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
AnnaBridge 146:22da6e220af6 692 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) || \
AnnaBridge 146:22da6e220af6 693 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC4) || \
AnnaBridge 146:22da6e220af6 694 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_TRGO) || \
AnnaBridge 146:22da6e220af6 695 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) || \
AnnaBridge 146:22da6e220af6 696 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
AnnaBridge 146:22da6e220af6 697 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
AnnaBridge 146:22da6e220af6 698 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1) || \
AnnaBridge 146:22da6e220af6 699 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC2) || \
AnnaBridge 146:22da6e220af6 700 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3) || \
AnnaBridge 146:22da6e220af6 701 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1) || \
AnnaBridge 146:22da6e220af6 702 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
AnnaBridge 146:22da6e220af6 703 ((REGTRIG) == ADC_EXTERNALTRIGCONV_Ext_IT11)|| \
AnnaBridge 146:22da6e220af6 704 ((REGTRIG) == ADC_SOFTWARE_START))
AnnaBridge 146:22da6e220af6 705 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
AnnaBridge 146:22da6e220af6 706 ((ALIGN) == ADC_DATAALIGN_LEFT))
AnnaBridge 146:22da6e220af6 707 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_3CYCLES) || \
AnnaBridge 146:22da6e220af6 708 ((TIME) == ADC_SAMPLETIME_15CYCLES) || \
AnnaBridge 146:22da6e220af6 709 ((TIME) == ADC_SAMPLETIME_28CYCLES) || \
AnnaBridge 146:22da6e220af6 710 ((TIME) == ADC_SAMPLETIME_56CYCLES) || \
AnnaBridge 146:22da6e220af6 711 ((TIME) == ADC_SAMPLETIME_84CYCLES) || \
AnnaBridge 146:22da6e220af6 712 ((TIME) == ADC_SAMPLETIME_112CYCLES) || \
AnnaBridge 146:22da6e220af6 713 ((TIME) == ADC_SAMPLETIME_144CYCLES) || \
AnnaBridge 146:22da6e220af6 714 ((TIME) == ADC_SAMPLETIME_480CYCLES))
AnnaBridge 146:22da6e220af6 715 #define IS_ADC_EOCSelection(EOCSelection) (((EOCSelection) == ADC_EOC_SINGLE_CONV) || \
AnnaBridge 146:22da6e220af6 716 ((EOCSelection) == ADC_EOC_SEQ_CONV) || \
AnnaBridge 146:22da6e220af6 717 ((EOCSelection) == ADC_EOC_SINGLE_SEQ_CONV))
AnnaBridge 146:22da6e220af6 718 #define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == ADC_AWD_EVENT) || \
AnnaBridge 146:22da6e220af6 719 ((EVENT) == ADC_OVR_EVENT))
AnnaBridge 146:22da6e220af6 720 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \
AnnaBridge 146:22da6e220af6 721 ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_INJEC) || \
AnnaBridge 146:22da6e220af6 722 ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC) || \
AnnaBridge 146:22da6e220af6 723 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG) || \
AnnaBridge 146:22da6e220af6 724 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_INJEC) || \
AnnaBridge 146:22da6e220af6 725 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REGINJEC) || \
AnnaBridge 146:22da6e220af6 726 ((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE))
AnnaBridge 146:22da6e220af6 727 #define IS_ADC_CHANNELS_TYPE(CHANNEL_TYPE) (((CHANNEL_TYPE) == ADC_ALL_CHANNELS) || \
AnnaBridge 146:22da6e220af6 728 ((CHANNEL_TYPE) == ADC_REGULAR_CHANNELS) || \
AnnaBridge 146:22da6e220af6 729 ((CHANNEL_TYPE) == ADC_INJECTED_CHANNELS))
AnnaBridge 146:22da6e220af6 730 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFFU)
AnnaBridge 146:22da6e220af6 731
AnnaBridge 146:22da6e220af6 732 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 16U))
AnnaBridge 146:22da6e220af6 733 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 1U) && ((RANK) <= (16U)))
AnnaBridge 146:22da6e220af6 734 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 1U) && ((NUMBER) <= 8U))
AnnaBridge 146:22da6e220af6 735 #define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \
AnnaBridge 146:22da6e220af6 736 ((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= 0x0FFFU)) || \
AnnaBridge 146:22da6e220af6 737 (((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= 0x03FFU)) || \
AnnaBridge 146:22da6e220af6 738 (((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= 0x00FFU)) || \
AnnaBridge 146:22da6e220af6 739 (((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= 0x003FU)))
AnnaBridge 146:22da6e220af6 740
AnnaBridge 146:22da6e220af6 741 /**
AnnaBridge 146:22da6e220af6 742 * @brief Set ADC Regular channel sequence length.
AnnaBridge 163:e59c8e839560 743 * @param _NbrOfConversion_ Regular channel sequence length.
AnnaBridge 146:22da6e220af6 744 * @retval None
AnnaBridge 146:22da6e220af6 745 */
AnnaBridge 146:22da6e220af6 746 #define ADC_SQR1(_NbrOfConversion_) (((_NbrOfConversion_) - (uint8_t)1U) << 20U)
AnnaBridge 146:22da6e220af6 747
AnnaBridge 146:22da6e220af6 748 /**
AnnaBridge 146:22da6e220af6 749 * @brief Set the ADC's sample time for channel numbers between 10 and 18.
AnnaBridge 163:e59c8e839560 750 * @param _SAMPLETIME_ Sample time parameter.
AnnaBridge 163:e59c8e839560 751 * @param _CHANNELNB_ Channel number.
AnnaBridge 146:22da6e220af6 752 * @retval None
AnnaBridge 146:22da6e220af6 753 */
AnnaBridge 146:22da6e220af6 754 #define ADC_SMPR1(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3U * (((uint32_t)((uint16_t)(_CHANNELNB_))) - 10U)))
AnnaBridge 146:22da6e220af6 755
AnnaBridge 146:22da6e220af6 756 /**
AnnaBridge 146:22da6e220af6 757 * @brief Set the ADC's sample time for channel numbers between 0 and 9.
AnnaBridge 163:e59c8e839560 758 * @param _SAMPLETIME_ Sample time parameter.
AnnaBridge 163:e59c8e839560 759 * @param _CHANNELNB_ Channel number.
AnnaBridge 146:22da6e220af6 760 * @retval None
AnnaBridge 146:22da6e220af6 761 */
AnnaBridge 146:22da6e220af6 762 #define ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3U * ((uint32_t)((uint16_t)(_CHANNELNB_)))))
AnnaBridge 146:22da6e220af6 763
AnnaBridge 146:22da6e220af6 764 /**
AnnaBridge 146:22da6e220af6 765 * @brief Set the selected regular channel rank for rank between 1 and 6.
AnnaBridge 163:e59c8e839560 766 * @param _CHANNELNB_ Channel number.
AnnaBridge 163:e59c8e839560 767 * @param _RANKNB_ Rank number.
AnnaBridge 146:22da6e220af6 768 * @retval None
AnnaBridge 146:22da6e220af6 769 */
AnnaBridge 146:22da6e220af6 770 #define ADC_SQR3_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 1U)))
AnnaBridge 146:22da6e220af6 771
AnnaBridge 146:22da6e220af6 772 /**
AnnaBridge 146:22da6e220af6 773 * @brief Set the selected regular channel rank for rank between 7 and 12.
AnnaBridge 163:e59c8e839560 774 * @param _CHANNELNB_ Channel number.
AnnaBridge 163:e59c8e839560 775 * @param _RANKNB_ Rank number.
AnnaBridge 146:22da6e220af6 776 * @retval None
AnnaBridge 146:22da6e220af6 777 */
AnnaBridge 146:22da6e220af6 778 #define ADC_SQR2_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 7U)))
AnnaBridge 146:22da6e220af6 779
AnnaBridge 146:22da6e220af6 780 /**
AnnaBridge 146:22da6e220af6 781 * @brief Set the selected regular channel rank for rank between 13 and 16.
AnnaBridge 163:e59c8e839560 782 * @param _CHANNELNB_ Channel number.
AnnaBridge 163:e59c8e839560 783 * @param _RANKNB_ Rank number.
AnnaBridge 146:22da6e220af6 784 * @retval None
AnnaBridge 146:22da6e220af6 785 */
AnnaBridge 146:22da6e220af6 786 #define ADC_SQR1_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 13U)))
AnnaBridge 146:22da6e220af6 787
AnnaBridge 146:22da6e220af6 788 /**
AnnaBridge 146:22da6e220af6 789 * @brief Enable ADC continuous conversion mode.
AnnaBridge 163:e59c8e839560 790 * @param _CONTINUOUS_MODE_ Continuous mode.
AnnaBridge 146:22da6e220af6 791 * @retval None
AnnaBridge 146:22da6e220af6 792 */
AnnaBridge 146:22da6e220af6 793 #define ADC_CR2_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << 1U)
AnnaBridge 146:22da6e220af6 794
AnnaBridge 146:22da6e220af6 795 /**
AnnaBridge 146:22da6e220af6 796 * @brief Configures the number of discontinuous conversions for the regular group channels.
AnnaBridge 163:e59c8e839560 797 * @param _NBR_DISCONTINUOUSCONV_ Number of discontinuous conversions.
AnnaBridge 146:22da6e220af6 798 * @retval None
AnnaBridge 146:22da6e220af6 799 */
AnnaBridge 163:e59c8e839560 800 #define ADC_CR1_DISCONTINUOUS(_NBR_DISCONTINUOUSCONV_) (((_NBR_DISCONTINUOUSCONV_) - 1U) << ADC_CR1_DISCNUM_Pos)
AnnaBridge 146:22da6e220af6 801
AnnaBridge 146:22da6e220af6 802 /**
AnnaBridge 146:22da6e220af6 803 * @brief Enable ADC scan mode.
AnnaBridge 163:e59c8e839560 804 * @param _SCANCONV_MODE_ Scan conversion mode.
AnnaBridge 146:22da6e220af6 805 * @retval None
AnnaBridge 146:22da6e220af6 806 */
AnnaBridge 146:22da6e220af6 807 #define ADC_CR1_SCANCONV(_SCANCONV_MODE_) ((_SCANCONV_MODE_) << 8U)
AnnaBridge 146:22da6e220af6 808
AnnaBridge 146:22da6e220af6 809 /**
AnnaBridge 146:22da6e220af6 810 * @brief Enable the ADC end of conversion selection.
AnnaBridge 163:e59c8e839560 811 * @param _EOCSelection_MODE_ End of conversion selection mode.
AnnaBridge 146:22da6e220af6 812 * @retval None
AnnaBridge 146:22da6e220af6 813 */
AnnaBridge 146:22da6e220af6 814 #define ADC_CR2_EOCSelection(_EOCSelection_MODE_) ((_EOCSelection_MODE_) << 10U)
AnnaBridge 146:22da6e220af6 815
AnnaBridge 146:22da6e220af6 816 /**
AnnaBridge 146:22da6e220af6 817 * @brief Enable the ADC DMA continuous request.
AnnaBridge 163:e59c8e839560 818 * @param _DMAContReq_MODE_ DMA continuous request mode.
AnnaBridge 146:22da6e220af6 819 * @retval None
AnnaBridge 146:22da6e220af6 820 */
AnnaBridge 146:22da6e220af6 821 #define ADC_CR2_DMAContReq(_DMAContReq_MODE_) ((_DMAContReq_MODE_) << 9U)
AnnaBridge 146:22da6e220af6 822
AnnaBridge 146:22da6e220af6 823 /**
AnnaBridge 146:22da6e220af6 824 * @brief Return resolution bits in CR1 register.
AnnaBridge 163:e59c8e839560 825 * @param __HANDLE__ ADC handle
AnnaBridge 146:22da6e220af6 826 * @retval None
AnnaBridge 146:22da6e220af6 827 */
AnnaBridge 146:22da6e220af6 828 #define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CR1) & ADC_CR1_RES)
AnnaBridge 146:22da6e220af6 829
AnnaBridge 146:22da6e220af6 830 /**
AnnaBridge 146:22da6e220af6 831 * @}
AnnaBridge 146:22da6e220af6 832 */
AnnaBridge 146:22da6e220af6 833
AnnaBridge 146:22da6e220af6 834 /* Private functions ---------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 835 /** @defgroup ADC_Private_Functions ADC Private Functions
AnnaBridge 146:22da6e220af6 836 * @{
AnnaBridge 146:22da6e220af6 837 */
AnnaBridge 146:22da6e220af6 838
AnnaBridge 146:22da6e220af6 839 /**
AnnaBridge 146:22da6e220af6 840 * @}
AnnaBridge 146:22da6e220af6 841 */
AnnaBridge 146:22da6e220af6 842
AnnaBridge 146:22da6e220af6 843 /**
AnnaBridge 146:22da6e220af6 844 * @}
AnnaBridge 146:22da6e220af6 845 */
AnnaBridge 146:22da6e220af6 846
AnnaBridge 146:22da6e220af6 847 /**
AnnaBridge 146:22da6e220af6 848 * @}
AnnaBridge 146:22da6e220af6 849 */
AnnaBridge 146:22da6e220af6 850
AnnaBridge 146:22da6e220af6 851 #ifdef __cplusplus
AnnaBridge 146:22da6e220af6 852 }
AnnaBridge 146:22da6e220af6 853 #endif
AnnaBridge 146:22da6e220af6 854
AnnaBridge 146:22da6e220af6 855 #endif /*__STM32F4xx_ADC_H */
AnnaBridge 146:22da6e220af6 856
AnnaBridge 146:22da6e220af6 857
AnnaBridge 146:22da6e220af6 858 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/