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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_ARCH_MAX/stm32f4xx_hal_pwr_ex.h@99:dbbf35b96557, 2015-05-13 (annotated)

Committer:
Kojto
Date:
Wed May 13 08:08:21 2015 +0200
Revision:
99:dbbf35b96557
Parent:
92:4fc01daae5a5
Child:
106:ba1f97679dad
Release 99 of the mbed library



Changes:

 - new targets - MAXWSNENV, DISCO_L053C8

 - STM32F4xx - ST Cube driver

 - KSDK mcu - SPI timing fix

 - Nordic - update to softdevice s130

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 89:552587b429a1 1 /**
bogdanm 89:552587b429a1 2 ******************************************************************************
bogdanm 89:552587b429a1 3 * @file stm32f4xx_hal_pwr_ex.h
bogdanm 89:552587b429a1 4 * @author MCD Application Team
Kojto 99:dbbf35b96557 5 * @version V1.3.0
Kojto 99:dbbf35b96557 6 * @date 09-March-2015
bogdanm 89:552587b429a1 7 * @brief Header file of PWR HAL Extension module.
bogdanm 89:552587b429a1 8 ******************************************************************************
bogdanm 89:552587b429a1 9 * @attention
bogdanm 89:552587b429a1 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 89:552587b429a1 12 *
bogdanm 89:552587b429a1 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 89:552587b429a1 14 * are permitted provided that the following conditions are met:
bogdanm 89:552587b429a1 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 89:552587b429a1 16 * this list of conditions and the following disclaimer.
bogdanm 89:552587b429a1 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 89:552587b429a1 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 89:552587b429a1 19 * and/or other materials provided with the distribution.
bogdanm 89:552587b429a1 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 89:552587b429a1 21 * may be used to endorse or promote products derived from this software
bogdanm 89:552587b429a1 22 * without specific prior written permission.
bogdanm 89:552587b429a1 23 *
bogdanm 89:552587b429a1 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 89:552587b429a1 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 89:552587b429a1 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 89:552587b429a1 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 89:552587b429a1 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 89:552587b429a1 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 89:552587b429a1 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 89:552587b429a1 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 89:552587b429a1 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 89:552587b429a1 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 89:552587b429a1 34 *
bogdanm 89:552587b429a1 35 ******************************************************************************
bogdanm 89:552587b429a1 36 */
bogdanm 89:552587b429a1 37
bogdanm 89:552587b429a1 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 89:552587b429a1 39 #ifndef __STM32F4xx_HAL_PWR_EX_H
bogdanm 89:552587b429a1 40 #define __STM32F4xx_HAL_PWR_EX_H
bogdanm 89:552587b429a1 41
bogdanm 89:552587b429a1 42 #ifdef __cplusplus
bogdanm 89:552587b429a1 43 extern "C" {
bogdanm 89:552587b429a1 44 #endif
bogdanm 89:552587b429a1 45
bogdanm 89:552587b429a1 46 /* Includes ------------------------------------------------------------------*/
bogdanm 89:552587b429a1 47 #include "stm32f4xx_hal_def.h"
bogdanm 89:552587b429a1 48
bogdanm 89:552587b429a1 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 89:552587b429a1 50 * @{
bogdanm 89:552587b429a1 51 */
bogdanm 89:552587b429a1 52
bogdanm 89:552587b429a1 53 /** @addtogroup PWREx
bogdanm 89:552587b429a1 54 * @{
bogdanm 89:552587b429a1 55 */
bogdanm 89:552587b429a1 56
bogdanm 89:552587b429a1 57 /* Exported types ------------------------------------------------------------*/
bogdanm 89:552587b429a1 58 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 59 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
Kojto 99:dbbf35b96557 60 * @{
Kojto 99:dbbf35b96557 61 */
bogdanm 89:552587b429a1 62
Kojto 99:dbbf35b96557 63 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx)
bogdanm 92:4fc01daae5a5 64
Kojto 99:dbbf35b96557 65 /** @defgroup PWREx_Regulator_state_in_UnderDrive_mode PWREx Regulator state in UnderDrive mode
bogdanm 92:4fc01daae5a5 66 * @{
bogdanm 92:4fc01daae5a5 67 */
bogdanm 92:4fc01daae5a5 68 #define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR_MRUDS
bogdanm 92:4fc01daae5a5 69 #define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
bogdanm 92:4fc01daae5a5 70 /**
bogdanm 92:4fc01daae5a5 71 * @}
bogdanm 92:4fc01daae5a5 72 */
bogdanm 92:4fc01daae5a5 73
Kojto 99:dbbf35b96557 74 /** @defgroup PWREx_Over_Under_Drive_Flag PWREx Over Under Drive Flag
bogdanm 89:552587b429a1 75 * @{
bogdanm 89:552587b429a1 76 */
bogdanm 89:552587b429a1 77 #define PWR_FLAG_ODRDY PWR_CSR_ODRDY
bogdanm 89:552587b429a1 78 #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
bogdanm 89:552587b429a1 79 #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
bogdanm 89:552587b429a1 80 /**
bogdanm 89:552587b429a1 81 * @}
bogdanm 89:552587b429a1 82 */
Kojto 99:dbbf35b96557 83 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
Kojto 99:dbbf35b96557 84
Kojto 99:dbbf35b96557 85 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
Kojto 99:dbbf35b96557 86 * @{
Kojto 99:dbbf35b96557 87 */
Kojto 99:dbbf35b96557 88 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F17xx)
Kojto 99:dbbf35b96557 89 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */
Kojto 99:dbbf35b96557 90 #define PWR_REGULATOR_VOLTAGE_SCALE2 ((uint32_t)0x00000000) /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */
Kojto 99:dbbf35b96557 91 #else
Kojto 99:dbbf35b96557 92 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
Kojto 99:dbbf35b96557 93 180 MHz by activating the over-drive mode. */
Kojto 99:dbbf35b96557 94 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
Kojto 99:dbbf35b96557 95 168 MHz by activating the over-drive mode. */
Kojto 99:dbbf35b96557 96 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
Kojto 99:dbbf35b96557 97 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
Kojto 99:dbbf35b96557 98 /**
Kojto 99:dbbf35b96557 99 * @}
Kojto 99:dbbf35b96557 100 */
Kojto 99:dbbf35b96557 101
bogdanm 89:552587b429a1 102 /**
bogdanm 89:552587b429a1 103 * @}
bogdanm 89:552587b429a1 104 */
bogdanm 89:552587b429a1 105
bogdanm 89:552587b429a1 106 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 107 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
Kojto 99:dbbf35b96557 108 * @{
Kojto 99:dbbf35b96557 109 */
Kojto 99:dbbf35b96557 110 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx)
bogdanm 89:552587b429a1 111 /** @brief Macros to enable or disable the Over drive mode.
bogdanm 89:552587b429a1 112 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
bogdanm 89:552587b429a1 113 */
bogdanm 89:552587b429a1 114 #define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
bogdanm 89:552587b429a1 115 #define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
bogdanm 89:552587b429a1 116
bogdanm 89:552587b429a1 117 /** @brief Macros to enable or disable the Over drive switching.
bogdanm 89:552587b429a1 118 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
bogdanm 89:552587b429a1 119 */
bogdanm 89:552587b429a1 120 #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
bogdanm 89:552587b429a1 121 #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
bogdanm 89:552587b429a1 122
bogdanm 89:552587b429a1 123 /** @brief Macros to enable or disable the Under drive mode.
bogdanm 89:552587b429a1 124 * @note This mode is enabled only with STOP low power mode.
bogdanm 89:552587b429a1 125 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
bogdanm 89:552587b429a1 126 * mode is only available when the main regulator or the low power regulator
bogdanm 89:552587b429a1 127 * is in low voltage mode.
bogdanm 89:552587b429a1 128 * @note If the Under-drive mode was enabled, it is automatically disabled after
bogdanm 89:552587b429a1 129 * exiting Stop mode.
bogdanm 89:552587b429a1 130 * When the voltage regulator operates in Under-drive mode, an additional
bogdanm 89:552587b429a1 131 * startup delay is induced when waking up from Stop mode.
bogdanm 89:552587b429a1 132 */
bogdanm 89:552587b429a1 133 #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
bogdanm 89:552587b429a1 134 #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
bogdanm 89:552587b429a1 135
bogdanm 89:552587b429a1 136 /** @brief Check PWR flag is set or not.
bogdanm 89:552587b429a1 137 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
bogdanm 89:552587b429a1 138 * @param __FLAG__: specifies the flag to check.
bogdanm 89:552587b429a1 139 * This parameter can be one of the following values:
bogdanm 89:552587b429a1 140 * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
bogdanm 89:552587b429a1 141 * is ready
bogdanm 89:552587b429a1 142 * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
bogdanm 89:552587b429a1 143 * switching is ready
bogdanm 89:552587b429a1 144 * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
bogdanm 89:552587b429a1 145 * is enabled in Stop mode
bogdanm 89:552587b429a1 146 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 89:552587b429a1 147 */
bogdanm 89:552587b429a1 148 #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
bogdanm 89:552587b429a1 149
bogdanm 89:552587b429a1 150 /** @brief Clear the Under-Drive Ready flag.
bogdanm 89:552587b429a1 151 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
bogdanm 89:552587b429a1 152 */
bogdanm 89:552587b429a1 153 #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
bogdanm 89:552587b429a1 154
Kojto 99:dbbf35b96557 155 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
Kojto 99:dbbf35b96557 156 /**
Kojto 99:dbbf35b96557 157 * @}
Kojto 99:dbbf35b96557 158 */
bogdanm 89:552587b429a1 159
bogdanm 89:552587b429a1 160 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 161 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
Kojto 99:dbbf35b96557 162 * @{
Kojto 99:dbbf35b96557 163 */
Kojto 99:dbbf35b96557 164
Kojto 99:dbbf35b96557 165 /** @addtogroup PWREx_Exported_Functions_Group1
Kojto 99:dbbf35b96557 166 * @{
Kojto 99:dbbf35b96557 167 */
Kojto 99:dbbf35b96557 168 void HAL_PWREx_EnableFlashPowerDown(void);
Kojto 99:dbbf35b96557 169 void HAL_PWREx_DisableFlashPowerDown(void);
bogdanm 89:552587b429a1 170 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
bogdanm 89:552587b429a1 171 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
Kojto 99:dbbf35b96557 172 uint32_t HAL_PWREx_GetVoltageRange(void);
Kojto 99:dbbf35b96557 173 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
bogdanm 89:552587b429a1 174
bogdanm 92:4fc01daae5a5 175 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
bogdanm 92:4fc01daae5a5 176 void HAL_PWREx_EnableMainRegulatorLowVoltage(void);
bogdanm 92:4fc01daae5a5 177 void HAL_PWREx_DisableMainRegulatorLowVoltage(void);
bogdanm 92:4fc01daae5a5 178 void HAL_PWREx_EnableLowRegulatorLowVoltage(void);
bogdanm 92:4fc01daae5a5 179 void HAL_PWREx_DisableLowRegulatorLowVoltage(void);
bogdanm 92:4fc01daae5a5 180 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
bogdanm 92:4fc01daae5a5 181
Kojto 99:dbbf35b96557 182 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx)
Kojto 99:dbbf35b96557 183 HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void);
Kojto 99:dbbf35b96557 184 HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void);
bogdanm 92:4fc01daae5a5 185 HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
Kojto 99:dbbf35b96557 186 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
Kojto 99:dbbf35b96557 187
Kojto 99:dbbf35b96557 188 /**
Kojto 99:dbbf35b96557 189 * @}
Kojto 99:dbbf35b96557 190 */
Kojto 99:dbbf35b96557 191
Kojto 99:dbbf35b96557 192 /**
Kojto 99:dbbf35b96557 193 * @}
Kojto 99:dbbf35b96557 194 */
Kojto 99:dbbf35b96557 195 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 196 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 197 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 198 /** @defgroup PWREx_Private_Constants PWREx Private Constants
Kojto 99:dbbf35b96557 199 * @{
Kojto 99:dbbf35b96557 200 */
Kojto 99:dbbf35b96557 201
Kojto 99:dbbf35b96557 202 /** @defgroup PWREx_register_alias_address PWREx Register alias address
Kojto 99:dbbf35b96557 203 * @{
Kojto 99:dbbf35b96557 204 */
Kojto 99:dbbf35b96557 205 /* ------------- PWR registers bit address in the alias region ---------------*/
Kojto 99:dbbf35b96557 206 /* --- CR Register ---*/
Kojto 99:dbbf35b96557 207 /* Alias word address of FPDS bit */
Kojto 99:dbbf35b96557 208 #define FPDS_BIT_NUMBER POSITION_VAL(PWR_CR_FPDS)
Kojto 99:dbbf35b96557 209 #define CR_FPDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FPDS_BIT_NUMBER * 4))
Kojto 99:dbbf35b96557 210
Kojto 99:dbbf35b96557 211 /* Alias word address of ODEN bit */
Kojto 99:dbbf35b96557 212 #define ODEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODEN)
Kojto 99:dbbf35b96557 213 #define CR_ODEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ODEN_BIT_NUMBER * 4))
Kojto 99:dbbf35b96557 214
Kojto 99:dbbf35b96557 215 /* Alias word address of ODSWEN bit */
Kojto 99:dbbf35b96557 216 #define ODSWEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODSWEN)
Kojto 99:dbbf35b96557 217 #define CR_ODSWEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ODSWEN_BIT_NUMBER * 4))
Kojto 99:dbbf35b96557 218
Kojto 99:dbbf35b96557 219 /* Alias word address of MRLVDS bit */
Kojto 99:dbbf35b96557 220 #define MRLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_MRLVDS)
Kojto 99:dbbf35b96557 221 #define CR_MRLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (MRLVDS_BIT_NUMBER * 4))
Kojto 99:dbbf35b96557 222
Kojto 99:dbbf35b96557 223 /* Alias word address of LPLVDS bit */
Kojto 99:dbbf35b96557 224 #define LPLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_LPLVDS)
Kojto 99:dbbf35b96557 225 #define CR_LPLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPLVDS_BIT_NUMBER * 4))
Kojto 99:dbbf35b96557 226
Kojto 99:dbbf35b96557 227 /**
Kojto 99:dbbf35b96557 228 * @}
Kojto 99:dbbf35b96557 229 */
Kojto 99:dbbf35b96557 230
Kojto 99:dbbf35b96557 231 /** @defgroup PWREx_CSR_register_alias PWRx CSR Register alias address
Kojto 99:dbbf35b96557 232 * @{
Kojto 99:dbbf35b96557 233 */
Kojto 99:dbbf35b96557 234 /* --- CSR Register ---*/
Kojto 99:dbbf35b96557 235 /* Alias word address of BRE bit */
Kojto 99:dbbf35b96557 236 #define BRE_BIT_NUMBER POSITION_VAL(PWR_CSR_BRE)
Kojto 99:dbbf35b96557 237 #define CSR_BRE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (BRE_BIT_NUMBER * 4))
Kojto 99:dbbf35b96557 238 /**
Kojto 99:dbbf35b96557 239 * @}
Kojto 99:dbbf35b96557 240 */
Kojto 99:dbbf35b96557 241
Kojto 99:dbbf35b96557 242 /**
Kojto 99:dbbf35b96557 243 * @}
Kojto 99:dbbf35b96557 244 */
Kojto 99:dbbf35b96557 245
Kojto 99:dbbf35b96557 246 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 247 /** @defgroup PWREx_Private_Macros PWREx Private Macros
Kojto 99:dbbf35b96557 248 * @{
Kojto 99:dbbf35b96557 249 */
Kojto 99:dbbf35b96557 250
Kojto 99:dbbf35b96557 251 /** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters
Kojto 99:dbbf35b96557 252 * @{
Kojto 99:dbbf35b96557 253 */
Kojto 99:dbbf35b96557 254 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx)
Kojto 99:dbbf35b96557 255 #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \
Kojto 99:dbbf35b96557 256 ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
Kojto 99:dbbf35b96557 257 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
Kojto 99:dbbf35b96557 258
Kojto 99:dbbf35b96557 259 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F17xx)
Kojto 99:dbbf35b96557 260 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
Kojto 99:dbbf35b96557 261 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
Kojto 99:dbbf35b96557 262 #else
Kojto 99:dbbf35b96557 263 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
Kojto 99:dbbf35b96557 264 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
Kojto 99:dbbf35b96557 265 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
Kojto 99:dbbf35b96557 266 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
Kojto 99:dbbf35b96557 267
Kojto 99:dbbf35b96557 268 /**
Kojto 99:dbbf35b96557 269 * @}
Kojto 99:dbbf35b96557 270 */
Kojto 99:dbbf35b96557 271
Kojto 99:dbbf35b96557 272 /**
Kojto 99:dbbf35b96557 273 * @}
Kojto 99:dbbf35b96557 274 */
bogdanm 89:552587b429a1 275
bogdanm 89:552587b429a1 276 /**
bogdanm 89:552587b429a1 277 * @}
bogdanm 89:552587b429a1 278 */
bogdanm 89:552587b429a1 279
bogdanm 89:552587b429a1 280 /**
bogdanm 89:552587b429a1 281 * @}
bogdanm 89:552587b429a1 282 */
bogdanm 89:552587b429a1 283
bogdanm 89:552587b429a1 284 #ifdef __cplusplus
bogdanm 89:552587b429a1 285 }
bogdanm 89:552587b429a1 286 #endif
bogdanm 89:552587b429a1 287
bogdanm 89:552587b429a1 288
bogdanm 89:552587b429a1 289 #endif /* __STM32F4xx_HAL_PWR_EX_H */
bogdanm 89:552587b429a1 290
bogdanm 89:552587b429a1 291 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/