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TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_usbdcd.h@104:b9ad9a133dc7, 2015-08-05 (annotated)
- Committer:
- Kojto
- Date:
- Wed Aug 05 13:16:35 2015 +0100
- Revision:
- 104:b9ad9a133dc7
- Parent:
- 90:cb3d968589d8
Release 104 of the mbed library:
Changes:
- new platforms: nrf51 microbit
- MAXxxx - fix pwm array search
- LPC8xx - usart enable fix
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Kojto | 90:cb3d968589d8 | 1 | /* |
Kojto | 90:cb3d968589d8 | 2 | ** ################################################################### |
Kojto | 90:cb3d968589d8 | 3 | ** Compilers: Keil ARM C/C++ Compiler |
Kojto | 90:cb3d968589d8 | 4 | ** Freescale C/C++ for Embedded ARM |
Kojto | 90:cb3d968589d8 | 5 | ** GNU C Compiler |
Kojto | 90:cb3d968589d8 | 6 | ** IAR ANSI C/C++ Compiler for ARM |
Kojto | 90:cb3d968589d8 | 7 | ** |
Kojto | 90:cb3d968589d8 | 8 | ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014 |
Kojto | 90:cb3d968589d8 | 9 | ** Version: rev. 2.5, 2014-02-10 |
Kojto | 90:cb3d968589d8 | 10 | ** Build: b140604 |
Kojto | 90:cb3d968589d8 | 11 | ** |
Kojto | 90:cb3d968589d8 | 12 | ** Abstract: |
Kojto | 90:cb3d968589d8 | 13 | ** Extension to the CMSIS register access layer header. |
Kojto | 90:cb3d968589d8 | 14 | ** |
Kojto | 90:cb3d968589d8 | 15 | ** Copyright (c) 2014 Freescale Semiconductor, Inc. |
Kojto | 90:cb3d968589d8 | 16 | ** All rights reserved. |
Kojto | 90:cb3d968589d8 | 17 | ** |
Kojto | 90:cb3d968589d8 | 18 | ** Redistribution and use in source and binary forms, with or without modification, |
Kojto | 90:cb3d968589d8 | 19 | ** are permitted provided that the following conditions are met: |
Kojto | 90:cb3d968589d8 | 20 | ** |
Kojto | 90:cb3d968589d8 | 21 | ** o Redistributions of source code must retain the above copyright notice, this list |
Kojto | 90:cb3d968589d8 | 22 | ** of conditions and the following disclaimer. |
Kojto | 90:cb3d968589d8 | 23 | ** |
Kojto | 90:cb3d968589d8 | 24 | ** o Redistributions in binary form must reproduce the above copyright notice, this |
Kojto | 90:cb3d968589d8 | 25 | ** list of conditions and the following disclaimer in the documentation and/or |
Kojto | 90:cb3d968589d8 | 26 | ** other materials provided with the distribution. |
Kojto | 90:cb3d968589d8 | 27 | ** |
Kojto | 90:cb3d968589d8 | 28 | ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
Kojto | 90:cb3d968589d8 | 29 | ** contributors may be used to endorse or promote products derived from this |
Kojto | 90:cb3d968589d8 | 30 | ** software without specific prior written permission. |
Kojto | 90:cb3d968589d8 | 31 | ** |
Kojto | 90:cb3d968589d8 | 32 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
Kojto | 90:cb3d968589d8 | 33 | ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
Kojto | 90:cb3d968589d8 | 34 | ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 90:cb3d968589d8 | 35 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
Kojto | 90:cb3d968589d8 | 36 | ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
Kojto | 90:cb3d968589d8 | 37 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
Kojto | 90:cb3d968589d8 | 38 | ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
Kojto | 90:cb3d968589d8 | 39 | ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
Kojto | 90:cb3d968589d8 | 40 | ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
Kojto | 90:cb3d968589d8 | 41 | ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 90:cb3d968589d8 | 42 | ** |
Kojto | 90:cb3d968589d8 | 43 | ** http: www.freescale.com |
Kojto | 90:cb3d968589d8 | 44 | ** mail: support@freescale.com |
Kojto | 90:cb3d968589d8 | 45 | ** |
Kojto | 90:cb3d968589d8 | 46 | ** Revisions: |
Kojto | 90:cb3d968589d8 | 47 | ** - rev. 1.0 (2013-08-12) |
Kojto | 90:cb3d968589d8 | 48 | ** Initial version. |
Kojto | 90:cb3d968589d8 | 49 | ** - rev. 2.0 (2013-10-29) |
Kojto | 90:cb3d968589d8 | 50 | ** Register accessor macros added to the memory map. |
Kojto | 90:cb3d968589d8 | 51 | ** Symbols for Processor Expert memory map compatibility added to the memory map. |
Kojto | 90:cb3d968589d8 | 52 | ** Startup file for gcc has been updated according to CMSIS 3.2. |
Kojto | 90:cb3d968589d8 | 53 | ** System initialization updated. |
Kojto | 90:cb3d968589d8 | 54 | ** MCG - registers updated. |
Kojto | 90:cb3d968589d8 | 55 | ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed. |
Kojto | 90:cb3d968589d8 | 56 | ** - rev. 2.1 (2013-10-30) |
Kojto | 90:cb3d968589d8 | 57 | ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled. |
Kojto | 90:cb3d968589d8 | 58 | ** - rev. 2.2 (2013-12-09) |
Kojto | 90:cb3d968589d8 | 59 | ** DMA - EARS register removed. |
Kojto | 90:cb3d968589d8 | 60 | ** AIPS0, AIPS1 - MPRA register updated. |
Kojto | 90:cb3d968589d8 | 61 | ** - rev. 2.3 (2014-01-24) |
Kojto | 90:cb3d968589d8 | 62 | ** Update according to reference manual rev. 2 |
Kojto | 90:cb3d968589d8 | 63 | ** ENET, MCG, MCM, SIM, USB - registers updated |
Kojto | 90:cb3d968589d8 | 64 | ** - rev. 2.4 (2014-02-10) |
Kojto | 90:cb3d968589d8 | 65 | ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h |
Kojto | 90:cb3d968589d8 | 66 | ** Update of SystemInit() and SystemCoreClockUpdate() functions. |
Kojto | 90:cb3d968589d8 | 67 | ** - rev. 2.5 (2014-02-10) |
Kojto | 90:cb3d968589d8 | 68 | ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h |
Kojto | 90:cb3d968589d8 | 69 | ** Update of SystemInit() and SystemCoreClockUpdate() functions. |
Kojto | 90:cb3d968589d8 | 70 | ** Module access macro module_BASES replaced by module_BASE_PTRS. |
Kojto | 90:cb3d968589d8 | 71 | ** |
Kojto | 90:cb3d968589d8 | 72 | ** ################################################################### |
Kojto | 90:cb3d968589d8 | 73 | */ |
Kojto | 90:cb3d968589d8 | 74 | |
Kojto | 90:cb3d968589d8 | 75 | /* |
Kojto | 90:cb3d968589d8 | 76 | * WARNING! DO NOT EDIT THIS FILE DIRECTLY! |
Kojto | 90:cb3d968589d8 | 77 | * |
Kojto | 90:cb3d968589d8 | 78 | * This file was generated automatically and any changes may be lost. |
Kojto | 90:cb3d968589d8 | 79 | */ |
Kojto | 90:cb3d968589d8 | 80 | #ifndef __HW_USBDCD_REGISTERS_H__ |
Kojto | 90:cb3d968589d8 | 81 | #define __HW_USBDCD_REGISTERS_H__ |
Kojto | 90:cb3d968589d8 | 82 | |
Kojto | 90:cb3d968589d8 | 83 | #include "MK64F12.h" |
Kojto | 90:cb3d968589d8 | 84 | #include "fsl_bitaccess.h" |
Kojto | 90:cb3d968589d8 | 85 | |
Kojto | 90:cb3d968589d8 | 86 | /* |
Kojto | 90:cb3d968589d8 | 87 | * MK64F12 USBDCD |
Kojto | 90:cb3d968589d8 | 88 | * |
Kojto | 90:cb3d968589d8 | 89 | * USB Device Charger Detection module |
Kojto | 90:cb3d968589d8 | 90 | * |
Kojto | 90:cb3d968589d8 | 91 | * Registers defined in this header file: |
Kojto | 90:cb3d968589d8 | 92 | * - HW_USBDCD_CONTROL - Control register |
Kojto | 90:cb3d968589d8 | 93 | * - HW_USBDCD_CLOCK - Clock register |
Kojto | 90:cb3d968589d8 | 94 | * - HW_USBDCD_STATUS - Status register |
Kojto | 90:cb3d968589d8 | 95 | * - HW_USBDCD_TIMER0 - TIMER0 register |
Kojto | 90:cb3d968589d8 | 96 | * - HW_USBDCD_TIMER1 - TIMER1 register |
Kojto | 90:cb3d968589d8 | 97 | * - HW_USBDCD_TIMER2_BC11 - TIMER2_BC11 register |
Kojto | 90:cb3d968589d8 | 98 | * - HW_USBDCD_TIMER2_BC12 - TIMER2_BC12 register |
Kojto | 90:cb3d968589d8 | 99 | * |
Kojto | 90:cb3d968589d8 | 100 | * - hw_usbdcd_t - Struct containing all module registers. |
Kojto | 90:cb3d968589d8 | 101 | */ |
Kojto | 90:cb3d968589d8 | 102 | |
Kojto | 90:cb3d968589d8 | 103 | #define HW_USBDCD_INSTANCE_COUNT (1U) /*!< Number of instances of the USBDCD module. */ |
Kojto | 90:cb3d968589d8 | 104 | |
Kojto | 90:cb3d968589d8 | 105 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 106 | * HW_USBDCD_CONTROL - Control register |
Kojto | 90:cb3d968589d8 | 107 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 108 | |
Kojto | 90:cb3d968589d8 | 109 | /*! |
Kojto | 90:cb3d968589d8 | 110 | * @brief HW_USBDCD_CONTROL - Control register (RW) |
Kojto | 90:cb3d968589d8 | 111 | * |
Kojto | 90:cb3d968589d8 | 112 | * Reset value: 0x00010000U |
Kojto | 90:cb3d968589d8 | 113 | * |
Kojto | 90:cb3d968589d8 | 114 | * Contains the control and interrupt bit fields. |
Kojto | 90:cb3d968589d8 | 115 | */ |
Kojto | 90:cb3d968589d8 | 116 | typedef union _hw_usbdcd_control |
Kojto | 90:cb3d968589d8 | 117 | { |
Kojto | 90:cb3d968589d8 | 118 | uint32_t U; |
Kojto | 90:cb3d968589d8 | 119 | struct _hw_usbdcd_control_bitfields |
Kojto | 90:cb3d968589d8 | 120 | { |
Kojto | 90:cb3d968589d8 | 121 | uint32_t IACK : 1; /*!< [0] Interrupt Acknowledge */ |
Kojto | 90:cb3d968589d8 | 122 | uint32_t RESERVED0 : 7; /*!< [7:1] */ |
Kojto | 90:cb3d968589d8 | 123 | uint32_t IF : 1; /*!< [8] Interrupt Flag */ |
Kojto | 90:cb3d968589d8 | 124 | uint32_t RESERVED1 : 7; /*!< [15:9] */ |
Kojto | 90:cb3d968589d8 | 125 | uint32_t IE : 1; /*!< [16] Interrupt Enable */ |
Kojto | 90:cb3d968589d8 | 126 | uint32_t BC12 : 1; /*!< [17] */ |
Kojto | 90:cb3d968589d8 | 127 | uint32_t RESERVED2 : 6; /*!< [23:18] */ |
Kojto | 90:cb3d968589d8 | 128 | uint32_t START : 1; /*!< [24] Start Change Detection Sequence */ |
Kojto | 90:cb3d968589d8 | 129 | uint32_t SR : 1; /*!< [25] Software Reset */ |
Kojto | 90:cb3d968589d8 | 130 | uint32_t RESERVED3 : 6; /*!< [31:26] */ |
Kojto | 90:cb3d968589d8 | 131 | } B; |
Kojto | 90:cb3d968589d8 | 132 | } hw_usbdcd_control_t; |
Kojto | 90:cb3d968589d8 | 133 | |
Kojto | 90:cb3d968589d8 | 134 | /*! |
Kojto | 90:cb3d968589d8 | 135 | * @name Constants and macros for entire USBDCD_CONTROL register |
Kojto | 90:cb3d968589d8 | 136 | */ |
Kojto | 90:cb3d968589d8 | 137 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 138 | #define HW_USBDCD_CONTROL_ADDR(x) ((x) + 0x0U) |
Kojto | 90:cb3d968589d8 | 139 | |
Kojto | 90:cb3d968589d8 | 140 | #define HW_USBDCD_CONTROL(x) (*(__IO hw_usbdcd_control_t *) HW_USBDCD_CONTROL_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 141 | #define HW_USBDCD_CONTROL_RD(x) (HW_USBDCD_CONTROL(x).U) |
Kojto | 90:cb3d968589d8 | 142 | #define HW_USBDCD_CONTROL_WR(x, v) (HW_USBDCD_CONTROL(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 143 | #define HW_USBDCD_CONTROL_SET(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 144 | #define HW_USBDCD_CONTROL_CLR(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 145 | #define HW_USBDCD_CONTROL_TOG(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 146 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 147 | |
Kojto | 90:cb3d968589d8 | 148 | /* |
Kojto | 90:cb3d968589d8 | 149 | * Constants & macros for individual USBDCD_CONTROL bitfields |
Kojto | 90:cb3d968589d8 | 150 | */ |
Kojto | 90:cb3d968589d8 | 151 | |
Kojto | 90:cb3d968589d8 | 152 | /*! |
Kojto | 90:cb3d968589d8 | 153 | * @name Register USBDCD_CONTROL, field IACK[0] (WORZ) |
Kojto | 90:cb3d968589d8 | 154 | * |
Kojto | 90:cb3d968589d8 | 155 | * Determines whether the interrupt is cleared. |
Kojto | 90:cb3d968589d8 | 156 | * |
Kojto | 90:cb3d968589d8 | 157 | * Values: |
Kojto | 90:cb3d968589d8 | 158 | * - 0 - Do not clear the interrupt. |
Kojto | 90:cb3d968589d8 | 159 | * - 1 - Clear the IF bit (interrupt flag). |
Kojto | 90:cb3d968589d8 | 160 | */ |
Kojto | 90:cb3d968589d8 | 161 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 162 | #define BP_USBDCD_CONTROL_IACK (0U) /*!< Bit position for USBDCD_CONTROL_IACK. */ |
Kojto | 90:cb3d968589d8 | 163 | #define BM_USBDCD_CONTROL_IACK (0x00000001U) /*!< Bit mask for USBDCD_CONTROL_IACK. */ |
Kojto | 90:cb3d968589d8 | 164 | #define BS_USBDCD_CONTROL_IACK (1U) /*!< Bit field size in bits for USBDCD_CONTROL_IACK. */ |
Kojto | 90:cb3d968589d8 | 165 | |
Kojto | 90:cb3d968589d8 | 166 | /*! @brief Format value for bitfield USBDCD_CONTROL_IACK. */ |
Kojto | 90:cb3d968589d8 | 167 | #define BF_USBDCD_CONTROL_IACK(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_IACK) & BM_USBDCD_CONTROL_IACK) |
Kojto | 90:cb3d968589d8 | 168 | |
Kojto | 90:cb3d968589d8 | 169 | /*! @brief Set the IACK field to a new value. */ |
Kojto | 90:cb3d968589d8 | 170 | #define BW_USBDCD_CONTROL_IACK(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IACK) = (v)) |
Kojto | 90:cb3d968589d8 | 171 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 172 | |
Kojto | 90:cb3d968589d8 | 173 | /*! |
Kojto | 90:cb3d968589d8 | 174 | * @name Register USBDCD_CONTROL, field IF[8] (RO) |
Kojto | 90:cb3d968589d8 | 175 | * |
Kojto | 90:cb3d968589d8 | 176 | * Determines whether an interrupt is pending. |
Kojto | 90:cb3d968589d8 | 177 | * |
Kojto | 90:cb3d968589d8 | 178 | * Values: |
Kojto | 90:cb3d968589d8 | 179 | * - 0 - No interrupt is pending. |
Kojto | 90:cb3d968589d8 | 180 | * - 1 - An interrupt is pending. |
Kojto | 90:cb3d968589d8 | 181 | */ |
Kojto | 90:cb3d968589d8 | 182 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 183 | #define BP_USBDCD_CONTROL_IF (8U) /*!< Bit position for USBDCD_CONTROL_IF. */ |
Kojto | 90:cb3d968589d8 | 184 | #define BM_USBDCD_CONTROL_IF (0x00000100U) /*!< Bit mask for USBDCD_CONTROL_IF. */ |
Kojto | 90:cb3d968589d8 | 185 | #define BS_USBDCD_CONTROL_IF (1U) /*!< Bit field size in bits for USBDCD_CONTROL_IF. */ |
Kojto | 90:cb3d968589d8 | 186 | |
Kojto | 90:cb3d968589d8 | 187 | /*! @brief Read current value of the USBDCD_CONTROL_IF field. */ |
Kojto | 90:cb3d968589d8 | 188 | #define BR_USBDCD_CONTROL_IF(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IF)) |
Kojto | 90:cb3d968589d8 | 189 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 190 | |
Kojto | 90:cb3d968589d8 | 191 | /*! |
Kojto | 90:cb3d968589d8 | 192 | * @name Register USBDCD_CONTROL, field IE[16] (RW) |
Kojto | 90:cb3d968589d8 | 193 | * |
Kojto | 90:cb3d968589d8 | 194 | * Enables/disables interrupts to the system. |
Kojto | 90:cb3d968589d8 | 195 | * |
Kojto | 90:cb3d968589d8 | 196 | * Values: |
Kojto | 90:cb3d968589d8 | 197 | * - 0 - Disable interrupts to the system. |
Kojto | 90:cb3d968589d8 | 198 | * - 1 - Enable interrupts to the system. |
Kojto | 90:cb3d968589d8 | 199 | */ |
Kojto | 90:cb3d968589d8 | 200 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 201 | #define BP_USBDCD_CONTROL_IE (16U) /*!< Bit position for USBDCD_CONTROL_IE. */ |
Kojto | 90:cb3d968589d8 | 202 | #define BM_USBDCD_CONTROL_IE (0x00010000U) /*!< Bit mask for USBDCD_CONTROL_IE. */ |
Kojto | 90:cb3d968589d8 | 203 | #define BS_USBDCD_CONTROL_IE (1U) /*!< Bit field size in bits for USBDCD_CONTROL_IE. */ |
Kojto | 90:cb3d968589d8 | 204 | |
Kojto | 90:cb3d968589d8 | 205 | /*! @brief Read current value of the USBDCD_CONTROL_IE field. */ |
Kojto | 90:cb3d968589d8 | 206 | #define BR_USBDCD_CONTROL_IE(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE)) |
Kojto | 90:cb3d968589d8 | 207 | |
Kojto | 90:cb3d968589d8 | 208 | /*! @brief Format value for bitfield USBDCD_CONTROL_IE. */ |
Kojto | 90:cb3d968589d8 | 209 | #define BF_USBDCD_CONTROL_IE(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_IE) & BM_USBDCD_CONTROL_IE) |
Kojto | 90:cb3d968589d8 | 210 | |
Kojto | 90:cb3d968589d8 | 211 | /*! @brief Set the IE field to a new value. */ |
Kojto | 90:cb3d968589d8 | 212 | #define BW_USBDCD_CONTROL_IE(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE) = (v)) |
Kojto | 90:cb3d968589d8 | 213 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 214 | |
Kojto | 90:cb3d968589d8 | 215 | /*! |
Kojto | 90:cb3d968589d8 | 216 | * @name Register USBDCD_CONTROL, field BC12[17] (RW) |
Kojto | 90:cb3d968589d8 | 217 | * |
Kojto | 90:cb3d968589d8 | 218 | * BC1.2 compatibility. This bit cannot be changed after start detection. |
Kojto | 90:cb3d968589d8 | 219 | * |
Kojto | 90:cb3d968589d8 | 220 | * Values: |
Kojto | 90:cb3d968589d8 | 221 | * - 0 - Compatible with BC1.1 (default) |
Kojto | 90:cb3d968589d8 | 222 | * - 1 - Compatible with BC1.2 |
Kojto | 90:cb3d968589d8 | 223 | */ |
Kojto | 90:cb3d968589d8 | 224 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 225 | #define BP_USBDCD_CONTROL_BC12 (17U) /*!< Bit position for USBDCD_CONTROL_BC12. */ |
Kojto | 90:cb3d968589d8 | 226 | #define BM_USBDCD_CONTROL_BC12 (0x00020000U) /*!< Bit mask for USBDCD_CONTROL_BC12. */ |
Kojto | 90:cb3d968589d8 | 227 | #define BS_USBDCD_CONTROL_BC12 (1U) /*!< Bit field size in bits for USBDCD_CONTROL_BC12. */ |
Kojto | 90:cb3d968589d8 | 228 | |
Kojto | 90:cb3d968589d8 | 229 | /*! @brief Read current value of the USBDCD_CONTROL_BC12 field. */ |
Kojto | 90:cb3d968589d8 | 230 | #define BR_USBDCD_CONTROL_BC12(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12)) |
Kojto | 90:cb3d968589d8 | 231 | |
Kojto | 90:cb3d968589d8 | 232 | /*! @brief Format value for bitfield USBDCD_CONTROL_BC12. */ |
Kojto | 90:cb3d968589d8 | 233 | #define BF_USBDCD_CONTROL_BC12(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_BC12) & BM_USBDCD_CONTROL_BC12) |
Kojto | 90:cb3d968589d8 | 234 | |
Kojto | 90:cb3d968589d8 | 235 | /*! @brief Set the BC12 field to a new value. */ |
Kojto | 90:cb3d968589d8 | 236 | #define BW_USBDCD_CONTROL_BC12(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12) = (v)) |
Kojto | 90:cb3d968589d8 | 237 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 238 | |
Kojto | 90:cb3d968589d8 | 239 | /*! |
Kojto | 90:cb3d968589d8 | 240 | * @name Register USBDCD_CONTROL, field START[24] (WORZ) |
Kojto | 90:cb3d968589d8 | 241 | * |
Kojto | 90:cb3d968589d8 | 242 | * Determines whether the charger detection sequence is initiated. |
Kojto | 90:cb3d968589d8 | 243 | * |
Kojto | 90:cb3d968589d8 | 244 | * Values: |
Kojto | 90:cb3d968589d8 | 245 | * - 0 - Do not start the sequence. Writes of this value have no effect. |
Kojto | 90:cb3d968589d8 | 246 | * - 1 - Initiate the charger detection sequence. If the sequence is already |
Kojto | 90:cb3d968589d8 | 247 | * running, writes of this value have no effect. |
Kojto | 90:cb3d968589d8 | 248 | */ |
Kojto | 90:cb3d968589d8 | 249 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 250 | #define BP_USBDCD_CONTROL_START (24U) /*!< Bit position for USBDCD_CONTROL_START. */ |
Kojto | 90:cb3d968589d8 | 251 | #define BM_USBDCD_CONTROL_START (0x01000000U) /*!< Bit mask for USBDCD_CONTROL_START. */ |
Kojto | 90:cb3d968589d8 | 252 | #define BS_USBDCD_CONTROL_START (1U) /*!< Bit field size in bits for USBDCD_CONTROL_START. */ |
Kojto | 90:cb3d968589d8 | 253 | |
Kojto | 90:cb3d968589d8 | 254 | /*! @brief Format value for bitfield USBDCD_CONTROL_START. */ |
Kojto | 90:cb3d968589d8 | 255 | #define BF_USBDCD_CONTROL_START(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_START) & BM_USBDCD_CONTROL_START) |
Kojto | 90:cb3d968589d8 | 256 | |
Kojto | 90:cb3d968589d8 | 257 | /*! @brief Set the START field to a new value. */ |
Kojto | 90:cb3d968589d8 | 258 | #define BW_USBDCD_CONTROL_START(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_START) = (v)) |
Kojto | 90:cb3d968589d8 | 259 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 260 | |
Kojto | 90:cb3d968589d8 | 261 | /*! |
Kojto | 90:cb3d968589d8 | 262 | * @name Register USBDCD_CONTROL, field SR[25] (WORZ) |
Kojto | 90:cb3d968589d8 | 263 | * |
Kojto | 90:cb3d968589d8 | 264 | * Determines whether a software reset is performed. |
Kojto | 90:cb3d968589d8 | 265 | * |
Kojto | 90:cb3d968589d8 | 266 | * Values: |
Kojto | 90:cb3d968589d8 | 267 | * - 0 - Do not perform a software reset. |
Kojto | 90:cb3d968589d8 | 268 | * - 1 - Perform a software reset. |
Kojto | 90:cb3d968589d8 | 269 | */ |
Kojto | 90:cb3d968589d8 | 270 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 271 | #define BP_USBDCD_CONTROL_SR (25U) /*!< Bit position for USBDCD_CONTROL_SR. */ |
Kojto | 90:cb3d968589d8 | 272 | #define BM_USBDCD_CONTROL_SR (0x02000000U) /*!< Bit mask for USBDCD_CONTROL_SR. */ |
Kojto | 90:cb3d968589d8 | 273 | #define BS_USBDCD_CONTROL_SR (1U) /*!< Bit field size in bits for USBDCD_CONTROL_SR. */ |
Kojto | 90:cb3d968589d8 | 274 | |
Kojto | 90:cb3d968589d8 | 275 | /*! @brief Format value for bitfield USBDCD_CONTROL_SR. */ |
Kojto | 90:cb3d968589d8 | 276 | #define BF_USBDCD_CONTROL_SR(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_SR) & BM_USBDCD_CONTROL_SR) |
Kojto | 90:cb3d968589d8 | 277 | |
Kojto | 90:cb3d968589d8 | 278 | /*! @brief Set the SR field to a new value. */ |
Kojto | 90:cb3d968589d8 | 279 | #define BW_USBDCD_CONTROL_SR(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_SR) = (v)) |
Kojto | 90:cb3d968589d8 | 280 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 281 | |
Kojto | 90:cb3d968589d8 | 282 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 283 | * HW_USBDCD_CLOCK - Clock register |
Kojto | 90:cb3d968589d8 | 284 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 285 | |
Kojto | 90:cb3d968589d8 | 286 | /*! |
Kojto | 90:cb3d968589d8 | 287 | * @brief HW_USBDCD_CLOCK - Clock register (RW) |
Kojto | 90:cb3d968589d8 | 288 | * |
Kojto | 90:cb3d968589d8 | 289 | * Reset value: 0x000000C1U |
Kojto | 90:cb3d968589d8 | 290 | */ |
Kojto | 90:cb3d968589d8 | 291 | typedef union _hw_usbdcd_clock |
Kojto | 90:cb3d968589d8 | 292 | { |
Kojto | 90:cb3d968589d8 | 293 | uint32_t U; |
Kojto | 90:cb3d968589d8 | 294 | struct _hw_usbdcd_clock_bitfields |
Kojto | 90:cb3d968589d8 | 295 | { |
Kojto | 90:cb3d968589d8 | 296 | uint32_t CLOCK_UNIT : 1; /*!< [0] Unit of Measurement Encoding for |
Kojto | 90:cb3d968589d8 | 297 | * Clock Speed */ |
Kojto | 90:cb3d968589d8 | 298 | uint32_t RESERVED0 : 1; /*!< [1] */ |
Kojto | 90:cb3d968589d8 | 299 | uint32_t CLOCK_SPEED : 10; /*!< [11:2] Numerical Value of Clock Speed |
Kojto | 90:cb3d968589d8 | 300 | * in Binary */ |
Kojto | 90:cb3d968589d8 | 301 | uint32_t RESERVED1 : 20; /*!< [31:12] */ |
Kojto | 90:cb3d968589d8 | 302 | } B; |
Kojto | 90:cb3d968589d8 | 303 | } hw_usbdcd_clock_t; |
Kojto | 90:cb3d968589d8 | 304 | |
Kojto | 90:cb3d968589d8 | 305 | /*! |
Kojto | 90:cb3d968589d8 | 306 | * @name Constants and macros for entire USBDCD_CLOCK register |
Kojto | 90:cb3d968589d8 | 307 | */ |
Kojto | 90:cb3d968589d8 | 308 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 309 | #define HW_USBDCD_CLOCK_ADDR(x) ((x) + 0x4U) |
Kojto | 90:cb3d968589d8 | 310 | |
Kojto | 90:cb3d968589d8 | 311 | #define HW_USBDCD_CLOCK(x) (*(__IO hw_usbdcd_clock_t *) HW_USBDCD_CLOCK_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 312 | #define HW_USBDCD_CLOCK_RD(x) (HW_USBDCD_CLOCK(x).U) |
Kojto | 90:cb3d968589d8 | 313 | #define HW_USBDCD_CLOCK_WR(x, v) (HW_USBDCD_CLOCK(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 314 | #define HW_USBDCD_CLOCK_SET(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 315 | #define HW_USBDCD_CLOCK_CLR(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 316 | #define HW_USBDCD_CLOCK_TOG(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 317 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 318 | |
Kojto | 90:cb3d968589d8 | 319 | /* |
Kojto | 90:cb3d968589d8 | 320 | * Constants & macros for individual USBDCD_CLOCK bitfields |
Kojto | 90:cb3d968589d8 | 321 | */ |
Kojto | 90:cb3d968589d8 | 322 | |
Kojto | 90:cb3d968589d8 | 323 | /*! |
Kojto | 90:cb3d968589d8 | 324 | * @name Register USBDCD_CLOCK, field CLOCK_UNIT[0] (RW) |
Kojto | 90:cb3d968589d8 | 325 | * |
Kojto | 90:cb3d968589d8 | 326 | * Specifies the unit of measure for the clock speed. |
Kojto | 90:cb3d968589d8 | 327 | * |
Kojto | 90:cb3d968589d8 | 328 | * Values: |
Kojto | 90:cb3d968589d8 | 329 | * - 0 - kHz Speed (between 1 kHz and 1023 kHz) |
Kojto | 90:cb3d968589d8 | 330 | * - 1 - MHz Speed (between 1 MHz and 1023 MHz) |
Kojto | 90:cb3d968589d8 | 331 | */ |
Kojto | 90:cb3d968589d8 | 332 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 333 | #define BP_USBDCD_CLOCK_CLOCK_UNIT (0U) /*!< Bit position for USBDCD_CLOCK_CLOCK_UNIT. */ |
Kojto | 90:cb3d968589d8 | 334 | #define BM_USBDCD_CLOCK_CLOCK_UNIT (0x00000001U) /*!< Bit mask for USBDCD_CLOCK_CLOCK_UNIT. */ |
Kojto | 90:cb3d968589d8 | 335 | #define BS_USBDCD_CLOCK_CLOCK_UNIT (1U) /*!< Bit field size in bits for USBDCD_CLOCK_CLOCK_UNIT. */ |
Kojto | 90:cb3d968589d8 | 336 | |
Kojto | 90:cb3d968589d8 | 337 | /*! @brief Read current value of the USBDCD_CLOCK_CLOCK_UNIT field. */ |
Kojto | 90:cb3d968589d8 | 338 | #define BR_USBDCD_CLOCK_CLOCK_UNIT(x) (BITBAND_ACCESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT)) |
Kojto | 90:cb3d968589d8 | 339 | |
Kojto | 90:cb3d968589d8 | 340 | /*! @brief Format value for bitfield USBDCD_CLOCK_CLOCK_UNIT. */ |
Kojto | 90:cb3d968589d8 | 341 | #define BF_USBDCD_CLOCK_CLOCK_UNIT(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CLOCK_CLOCK_UNIT) & BM_USBDCD_CLOCK_CLOCK_UNIT) |
Kojto | 90:cb3d968589d8 | 342 | |
Kojto | 90:cb3d968589d8 | 343 | /*! @brief Set the CLOCK_UNIT field to a new value. */ |
Kojto | 90:cb3d968589d8 | 344 | #define BW_USBDCD_CLOCK_CLOCK_UNIT(x, v) (BITBAND_ACCESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT) = (v)) |
Kojto | 90:cb3d968589d8 | 345 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 346 | |
Kojto | 90:cb3d968589d8 | 347 | /*! |
Kojto | 90:cb3d968589d8 | 348 | * @name Register USBDCD_CLOCK, field CLOCK_SPEED[11:2] (RW) |
Kojto | 90:cb3d968589d8 | 349 | * |
Kojto | 90:cb3d968589d8 | 350 | * The unit of measure is programmed in CLOCK_UNIT. The valid range is from 1 to |
Kojto | 90:cb3d968589d8 | 351 | * 1023 when clock unit is MHz and 4 to 1023 when clock unit is kHz. Examples |
Kojto | 90:cb3d968589d8 | 352 | * with CLOCK_UNIT = 1: For 48 MHz: 0b00_0011_0000 (48) (Default) For 24 MHz: |
Kojto | 90:cb3d968589d8 | 353 | * 0b00_0001_1000 (24) Examples with CLOCK_UNIT = 0: For 100 kHz: 0b00_0110_0100 (100) |
Kojto | 90:cb3d968589d8 | 354 | * For 500 kHz: 0b01_1111_0100 (500) |
Kojto | 90:cb3d968589d8 | 355 | */ |
Kojto | 90:cb3d968589d8 | 356 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 357 | #define BP_USBDCD_CLOCK_CLOCK_SPEED (2U) /*!< Bit position for USBDCD_CLOCK_CLOCK_SPEED. */ |
Kojto | 90:cb3d968589d8 | 358 | #define BM_USBDCD_CLOCK_CLOCK_SPEED (0x00000FFCU) /*!< Bit mask for USBDCD_CLOCK_CLOCK_SPEED. */ |
Kojto | 90:cb3d968589d8 | 359 | #define BS_USBDCD_CLOCK_CLOCK_SPEED (10U) /*!< Bit field size in bits for USBDCD_CLOCK_CLOCK_SPEED. */ |
Kojto | 90:cb3d968589d8 | 360 | |
Kojto | 90:cb3d968589d8 | 361 | /*! @brief Read current value of the USBDCD_CLOCK_CLOCK_SPEED field. */ |
Kojto | 90:cb3d968589d8 | 362 | #define BR_USBDCD_CLOCK_CLOCK_SPEED(x) (HW_USBDCD_CLOCK(x).B.CLOCK_SPEED) |
Kojto | 90:cb3d968589d8 | 363 | |
Kojto | 90:cb3d968589d8 | 364 | /*! @brief Format value for bitfield USBDCD_CLOCK_CLOCK_SPEED. */ |
Kojto | 90:cb3d968589d8 | 365 | #define BF_USBDCD_CLOCK_CLOCK_SPEED(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CLOCK_CLOCK_SPEED) & BM_USBDCD_CLOCK_CLOCK_SPEED) |
Kojto | 90:cb3d968589d8 | 366 | |
Kojto | 90:cb3d968589d8 | 367 | /*! @brief Set the CLOCK_SPEED field to a new value. */ |
Kojto | 90:cb3d968589d8 | 368 | #define BW_USBDCD_CLOCK_CLOCK_SPEED(x, v) (HW_USBDCD_CLOCK_WR(x, (HW_USBDCD_CLOCK_RD(x) & ~BM_USBDCD_CLOCK_CLOCK_SPEED) | BF_USBDCD_CLOCK_CLOCK_SPEED(v))) |
Kojto | 90:cb3d968589d8 | 369 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 370 | |
Kojto | 90:cb3d968589d8 | 371 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 372 | * HW_USBDCD_STATUS - Status register |
Kojto | 90:cb3d968589d8 | 373 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 374 | |
Kojto | 90:cb3d968589d8 | 375 | /*! |
Kojto | 90:cb3d968589d8 | 376 | * @brief HW_USBDCD_STATUS - Status register (RO) |
Kojto | 90:cb3d968589d8 | 377 | * |
Kojto | 90:cb3d968589d8 | 378 | * Reset value: 0x00000000U |
Kojto | 90:cb3d968589d8 | 379 | * |
Kojto | 90:cb3d968589d8 | 380 | * Provides the current state of the module for system software monitoring. |
Kojto | 90:cb3d968589d8 | 381 | */ |
Kojto | 90:cb3d968589d8 | 382 | typedef union _hw_usbdcd_status |
Kojto | 90:cb3d968589d8 | 383 | { |
Kojto | 90:cb3d968589d8 | 384 | uint32_t U; |
Kojto | 90:cb3d968589d8 | 385 | struct _hw_usbdcd_status_bitfields |
Kojto | 90:cb3d968589d8 | 386 | { |
Kojto | 90:cb3d968589d8 | 387 | uint32_t RESERVED0 : 16; /*!< [15:0] */ |
Kojto | 90:cb3d968589d8 | 388 | uint32_t SEQ_RES : 2; /*!< [17:16] Charger Detection Sequence Results |
Kojto | 90:cb3d968589d8 | 389 | * */ |
Kojto | 90:cb3d968589d8 | 390 | uint32_t SEQ_STAT : 2; /*!< [19:18] Charger Detection Sequence Status |
Kojto | 90:cb3d968589d8 | 391 | * */ |
Kojto | 90:cb3d968589d8 | 392 | uint32_t ERR : 1; /*!< [20] Error Flag */ |
Kojto | 90:cb3d968589d8 | 393 | uint32_t TO : 1; /*!< [21] Timeout Flag */ |
Kojto | 90:cb3d968589d8 | 394 | uint32_t ACTIVE : 1; /*!< [22] Active Status Indicator */ |
Kojto | 90:cb3d968589d8 | 395 | uint32_t RESERVED1 : 9; /*!< [31:23] */ |
Kojto | 90:cb3d968589d8 | 396 | } B; |
Kojto | 90:cb3d968589d8 | 397 | } hw_usbdcd_status_t; |
Kojto | 90:cb3d968589d8 | 398 | |
Kojto | 90:cb3d968589d8 | 399 | /*! |
Kojto | 90:cb3d968589d8 | 400 | * @name Constants and macros for entire USBDCD_STATUS register |
Kojto | 90:cb3d968589d8 | 401 | */ |
Kojto | 90:cb3d968589d8 | 402 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 403 | #define HW_USBDCD_STATUS_ADDR(x) ((x) + 0x8U) |
Kojto | 90:cb3d968589d8 | 404 | |
Kojto | 90:cb3d968589d8 | 405 | #define HW_USBDCD_STATUS(x) (*(__I hw_usbdcd_status_t *) HW_USBDCD_STATUS_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 406 | #define HW_USBDCD_STATUS_RD(x) (HW_USBDCD_STATUS(x).U) |
Kojto | 90:cb3d968589d8 | 407 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 408 | |
Kojto | 90:cb3d968589d8 | 409 | /* |
Kojto | 90:cb3d968589d8 | 410 | * Constants & macros for individual USBDCD_STATUS bitfields |
Kojto | 90:cb3d968589d8 | 411 | */ |
Kojto | 90:cb3d968589d8 | 412 | |
Kojto | 90:cb3d968589d8 | 413 | /*! |
Kojto | 90:cb3d968589d8 | 414 | * @name Register USBDCD_STATUS, field SEQ_RES[17:16] (RO) |
Kojto | 90:cb3d968589d8 | 415 | * |
Kojto | 90:cb3d968589d8 | 416 | * Reports how the charger detection is attached. |
Kojto | 90:cb3d968589d8 | 417 | * |
Kojto | 90:cb3d968589d8 | 418 | * Values: |
Kojto | 90:cb3d968589d8 | 419 | * - 00 - No results to report. |
Kojto | 90:cb3d968589d8 | 420 | * - 01 - Attached to a standard host. Must comply with USB 2.0 by drawing only |
Kojto | 90:cb3d968589d8 | 421 | * 2.5 mA (max) until connected. |
Kojto | 90:cb3d968589d8 | 422 | * - 10 - Attached to a charging port. The exact meaning depends on bit 18: 0: |
Kojto | 90:cb3d968589d8 | 423 | * Attached to either a charging host or a dedicated charger. The charger type |
Kojto | 90:cb3d968589d8 | 424 | * detection has not completed. 1: Attached to a charging host. The charger |
Kojto | 90:cb3d968589d8 | 425 | * type detection has completed. |
Kojto | 90:cb3d968589d8 | 426 | * - 11 - Attached to a dedicated charger. |
Kojto | 90:cb3d968589d8 | 427 | */ |
Kojto | 90:cb3d968589d8 | 428 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 429 | #define BP_USBDCD_STATUS_SEQ_RES (16U) /*!< Bit position for USBDCD_STATUS_SEQ_RES. */ |
Kojto | 90:cb3d968589d8 | 430 | #define BM_USBDCD_STATUS_SEQ_RES (0x00030000U) /*!< Bit mask for USBDCD_STATUS_SEQ_RES. */ |
Kojto | 90:cb3d968589d8 | 431 | #define BS_USBDCD_STATUS_SEQ_RES (2U) /*!< Bit field size in bits for USBDCD_STATUS_SEQ_RES. */ |
Kojto | 90:cb3d968589d8 | 432 | |
Kojto | 90:cb3d968589d8 | 433 | /*! @brief Read current value of the USBDCD_STATUS_SEQ_RES field. */ |
Kojto | 90:cb3d968589d8 | 434 | #define BR_USBDCD_STATUS_SEQ_RES(x) (HW_USBDCD_STATUS(x).B.SEQ_RES) |
Kojto | 90:cb3d968589d8 | 435 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 436 | |
Kojto | 90:cb3d968589d8 | 437 | /*! |
Kojto | 90:cb3d968589d8 | 438 | * @name Register USBDCD_STATUS, field SEQ_STAT[19:18] (RO) |
Kojto | 90:cb3d968589d8 | 439 | * |
Kojto | 90:cb3d968589d8 | 440 | * Indicates the status of the charger detection sequence. |
Kojto | 90:cb3d968589d8 | 441 | * |
Kojto | 90:cb3d968589d8 | 442 | * Values: |
Kojto | 90:cb3d968589d8 | 443 | * - 00 - The module is either not enabled, or the module is enabled but the |
Kojto | 90:cb3d968589d8 | 444 | * data pins have not yet been detected. |
Kojto | 90:cb3d968589d8 | 445 | * - 01 - Data pin contact detection is complete. |
Kojto | 90:cb3d968589d8 | 446 | * - 10 - Charging port detection is complete. |
Kojto | 90:cb3d968589d8 | 447 | * - 11 - Charger type detection is complete. |
Kojto | 90:cb3d968589d8 | 448 | */ |
Kojto | 90:cb3d968589d8 | 449 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 450 | #define BP_USBDCD_STATUS_SEQ_STAT (18U) /*!< Bit position for USBDCD_STATUS_SEQ_STAT. */ |
Kojto | 90:cb3d968589d8 | 451 | #define BM_USBDCD_STATUS_SEQ_STAT (0x000C0000U) /*!< Bit mask for USBDCD_STATUS_SEQ_STAT. */ |
Kojto | 90:cb3d968589d8 | 452 | #define BS_USBDCD_STATUS_SEQ_STAT (2U) /*!< Bit field size in bits for USBDCD_STATUS_SEQ_STAT. */ |
Kojto | 90:cb3d968589d8 | 453 | |
Kojto | 90:cb3d968589d8 | 454 | /*! @brief Read current value of the USBDCD_STATUS_SEQ_STAT field. */ |
Kojto | 90:cb3d968589d8 | 455 | #define BR_USBDCD_STATUS_SEQ_STAT(x) (HW_USBDCD_STATUS(x).B.SEQ_STAT) |
Kojto | 90:cb3d968589d8 | 456 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 457 | |
Kojto | 90:cb3d968589d8 | 458 | /*! |
Kojto | 90:cb3d968589d8 | 459 | * @name Register USBDCD_STATUS, field ERR[20] (RO) |
Kojto | 90:cb3d968589d8 | 460 | * |
Kojto | 90:cb3d968589d8 | 461 | * Indicates whether there is an error in the detection sequence. |
Kojto | 90:cb3d968589d8 | 462 | * |
Kojto | 90:cb3d968589d8 | 463 | * Values: |
Kojto | 90:cb3d968589d8 | 464 | * - 0 - No sequence errors. |
Kojto | 90:cb3d968589d8 | 465 | * - 1 - Error in the detection sequence. See the SEQ_STAT field to determine |
Kojto | 90:cb3d968589d8 | 466 | * the phase in which the error occurred. |
Kojto | 90:cb3d968589d8 | 467 | */ |
Kojto | 90:cb3d968589d8 | 468 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 469 | #define BP_USBDCD_STATUS_ERR (20U) /*!< Bit position for USBDCD_STATUS_ERR. */ |
Kojto | 90:cb3d968589d8 | 470 | #define BM_USBDCD_STATUS_ERR (0x00100000U) /*!< Bit mask for USBDCD_STATUS_ERR. */ |
Kojto | 90:cb3d968589d8 | 471 | #define BS_USBDCD_STATUS_ERR (1U) /*!< Bit field size in bits for USBDCD_STATUS_ERR. */ |
Kojto | 90:cb3d968589d8 | 472 | |
Kojto | 90:cb3d968589d8 | 473 | /*! @brief Read current value of the USBDCD_STATUS_ERR field. */ |
Kojto | 90:cb3d968589d8 | 474 | #define BR_USBDCD_STATUS_ERR(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ERR)) |
Kojto | 90:cb3d968589d8 | 475 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 476 | |
Kojto | 90:cb3d968589d8 | 477 | /*! |
Kojto | 90:cb3d968589d8 | 478 | * @name Register USBDCD_STATUS, field TO[21] (RO) |
Kojto | 90:cb3d968589d8 | 479 | * |
Kojto | 90:cb3d968589d8 | 480 | * Indicates whether the detection sequence has passed the timeout threshhold. |
Kojto | 90:cb3d968589d8 | 481 | * |
Kojto | 90:cb3d968589d8 | 482 | * Values: |
Kojto | 90:cb3d968589d8 | 483 | * - 0 - The detection sequence has not been running for over 1 s. |
Kojto | 90:cb3d968589d8 | 484 | * - 1 - It has been over 1 s since the data pin contact was detected and |
Kojto | 90:cb3d968589d8 | 485 | * debounced. |
Kojto | 90:cb3d968589d8 | 486 | */ |
Kojto | 90:cb3d968589d8 | 487 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 488 | #define BP_USBDCD_STATUS_TO (21U) /*!< Bit position for USBDCD_STATUS_TO. */ |
Kojto | 90:cb3d968589d8 | 489 | #define BM_USBDCD_STATUS_TO (0x00200000U) /*!< Bit mask for USBDCD_STATUS_TO. */ |
Kojto | 90:cb3d968589d8 | 490 | #define BS_USBDCD_STATUS_TO (1U) /*!< Bit field size in bits for USBDCD_STATUS_TO. */ |
Kojto | 90:cb3d968589d8 | 491 | |
Kojto | 90:cb3d968589d8 | 492 | /*! @brief Read current value of the USBDCD_STATUS_TO field. */ |
Kojto | 90:cb3d968589d8 | 493 | #define BR_USBDCD_STATUS_TO(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_TO)) |
Kojto | 90:cb3d968589d8 | 494 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 495 | |
Kojto | 90:cb3d968589d8 | 496 | /*! |
Kojto | 90:cb3d968589d8 | 497 | * @name Register USBDCD_STATUS, field ACTIVE[22] (RO) |
Kojto | 90:cb3d968589d8 | 498 | * |
Kojto | 90:cb3d968589d8 | 499 | * Indicates whether the sequence is running. |
Kojto | 90:cb3d968589d8 | 500 | * |
Kojto | 90:cb3d968589d8 | 501 | * Values: |
Kojto | 90:cb3d968589d8 | 502 | * - 0 - The sequence is not running. |
Kojto | 90:cb3d968589d8 | 503 | * - 1 - The sequence is running. |
Kojto | 90:cb3d968589d8 | 504 | */ |
Kojto | 90:cb3d968589d8 | 505 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 506 | #define BP_USBDCD_STATUS_ACTIVE (22U) /*!< Bit position for USBDCD_STATUS_ACTIVE. */ |
Kojto | 90:cb3d968589d8 | 507 | #define BM_USBDCD_STATUS_ACTIVE (0x00400000U) /*!< Bit mask for USBDCD_STATUS_ACTIVE. */ |
Kojto | 90:cb3d968589d8 | 508 | #define BS_USBDCD_STATUS_ACTIVE (1U) /*!< Bit field size in bits for USBDCD_STATUS_ACTIVE. */ |
Kojto | 90:cb3d968589d8 | 509 | |
Kojto | 90:cb3d968589d8 | 510 | /*! @brief Read current value of the USBDCD_STATUS_ACTIVE field. */ |
Kojto | 90:cb3d968589d8 | 511 | #define BR_USBDCD_STATUS_ACTIVE(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ACTIVE)) |
Kojto | 90:cb3d968589d8 | 512 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 513 | |
Kojto | 90:cb3d968589d8 | 514 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 515 | * HW_USBDCD_TIMER0 - TIMER0 register |
Kojto | 90:cb3d968589d8 | 516 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 517 | |
Kojto | 90:cb3d968589d8 | 518 | /*! |
Kojto | 90:cb3d968589d8 | 519 | * @brief HW_USBDCD_TIMER0 - TIMER0 register (RW) |
Kojto | 90:cb3d968589d8 | 520 | * |
Kojto | 90:cb3d968589d8 | 521 | * Reset value: 0x00100000U |
Kojto | 90:cb3d968589d8 | 522 | * |
Kojto | 90:cb3d968589d8 | 523 | * TIMER0 has an TSEQ_INIT field that represents the system latency in ms. |
Kojto | 90:cb3d968589d8 | 524 | * Latency is measured from the time when VBUS goes active until the time system |
Kojto | 90:cb3d968589d8 | 525 | * software initiates charger detection sequence in USBDCD module. When software sets |
Kojto | 90:cb3d968589d8 | 526 | * the CONTROL[START] bit, the Unit Connection Timer (TUNITCON) is initialized |
Kojto | 90:cb3d968589d8 | 527 | * with the value of TSEQ_INIT. Valid values are 0-1023, however the USB Battery |
Kojto | 90:cb3d968589d8 | 528 | * Charging Specification requires the entire sequence, including TSEQ_INIT, to be |
Kojto | 90:cb3d968589d8 | 529 | * completed in 1s or less. |
Kojto | 90:cb3d968589d8 | 530 | */ |
Kojto | 90:cb3d968589d8 | 531 | typedef union _hw_usbdcd_timer0 |
Kojto | 90:cb3d968589d8 | 532 | { |
Kojto | 90:cb3d968589d8 | 533 | uint32_t U; |
Kojto | 90:cb3d968589d8 | 534 | struct _hw_usbdcd_timer0_bitfields |
Kojto | 90:cb3d968589d8 | 535 | { |
Kojto | 90:cb3d968589d8 | 536 | uint32_t TUNITCON : 12; /*!< [11:0] Unit Connection Timer Elapse (in |
Kojto | 90:cb3d968589d8 | 537 | * ms) */ |
Kojto | 90:cb3d968589d8 | 538 | uint32_t RESERVED0 : 4; /*!< [15:12] */ |
Kojto | 90:cb3d968589d8 | 539 | uint32_t TSEQ_INIT : 10; /*!< [25:16] Sequence Initiation Time */ |
Kojto | 90:cb3d968589d8 | 540 | uint32_t RESERVED1 : 6; /*!< [31:26] */ |
Kojto | 90:cb3d968589d8 | 541 | } B; |
Kojto | 90:cb3d968589d8 | 542 | } hw_usbdcd_timer0_t; |
Kojto | 90:cb3d968589d8 | 543 | |
Kojto | 90:cb3d968589d8 | 544 | /*! |
Kojto | 90:cb3d968589d8 | 545 | * @name Constants and macros for entire USBDCD_TIMER0 register |
Kojto | 90:cb3d968589d8 | 546 | */ |
Kojto | 90:cb3d968589d8 | 547 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 548 | #define HW_USBDCD_TIMER0_ADDR(x) ((x) + 0x10U) |
Kojto | 90:cb3d968589d8 | 549 | |
Kojto | 90:cb3d968589d8 | 550 | #define HW_USBDCD_TIMER0(x) (*(__IO hw_usbdcd_timer0_t *) HW_USBDCD_TIMER0_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 551 | #define HW_USBDCD_TIMER0_RD(x) (HW_USBDCD_TIMER0(x).U) |
Kojto | 90:cb3d968589d8 | 552 | #define HW_USBDCD_TIMER0_WR(x, v) (HW_USBDCD_TIMER0(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 553 | #define HW_USBDCD_TIMER0_SET(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 554 | #define HW_USBDCD_TIMER0_CLR(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 555 | #define HW_USBDCD_TIMER0_TOG(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 556 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 557 | |
Kojto | 90:cb3d968589d8 | 558 | /* |
Kojto | 90:cb3d968589d8 | 559 | * Constants & macros for individual USBDCD_TIMER0 bitfields |
Kojto | 90:cb3d968589d8 | 560 | */ |
Kojto | 90:cb3d968589d8 | 561 | |
Kojto | 90:cb3d968589d8 | 562 | /*! |
Kojto | 90:cb3d968589d8 | 563 | * @name Register USBDCD_TIMER0, field TUNITCON[11:0] (RO) |
Kojto | 90:cb3d968589d8 | 564 | * |
Kojto | 90:cb3d968589d8 | 565 | * Displays the amount of elapsed time since the event of setting the START bit |
Kojto | 90:cb3d968589d8 | 566 | * plus the value of TSEQ_INIT. The timer is automatically initialized with the |
Kojto | 90:cb3d968589d8 | 567 | * value of TSEQ_INIT before starting to count. This timer enables compliance with |
Kojto | 90:cb3d968589d8 | 568 | * the maximum time allowed to connect T UNIT_CON under the USB Battery Charging |
Kojto | 90:cb3d968589d8 | 569 | * Specification. If the timer reaches the one second limit, the module triggers |
Kojto | 90:cb3d968589d8 | 570 | * an interrupt and sets the error flag STATUS[ERR]. The timer continues |
Kojto | 90:cb3d968589d8 | 571 | * counting throughout the charger detection sequence, even when control has been passed |
Kojto | 90:cb3d968589d8 | 572 | * to software. As long as the module is active, the timer continues to count |
Kojto | 90:cb3d968589d8 | 573 | * until it reaches the maximum value of 0xFFF (4095 ms). The timer does not |
Kojto | 90:cb3d968589d8 | 574 | * rollover to zero. A software reset clears the timer. |
Kojto | 90:cb3d968589d8 | 575 | */ |
Kojto | 90:cb3d968589d8 | 576 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 577 | #define BP_USBDCD_TIMER0_TUNITCON (0U) /*!< Bit position for USBDCD_TIMER0_TUNITCON. */ |
Kojto | 90:cb3d968589d8 | 578 | #define BM_USBDCD_TIMER0_TUNITCON (0x00000FFFU) /*!< Bit mask for USBDCD_TIMER0_TUNITCON. */ |
Kojto | 90:cb3d968589d8 | 579 | #define BS_USBDCD_TIMER0_TUNITCON (12U) /*!< Bit field size in bits for USBDCD_TIMER0_TUNITCON. */ |
Kojto | 90:cb3d968589d8 | 580 | |
Kojto | 90:cb3d968589d8 | 581 | /*! @brief Read current value of the USBDCD_TIMER0_TUNITCON field. */ |
Kojto | 90:cb3d968589d8 | 582 | #define BR_USBDCD_TIMER0_TUNITCON(x) (HW_USBDCD_TIMER0(x).B.TUNITCON) |
Kojto | 90:cb3d968589d8 | 583 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 584 | |
Kojto | 90:cb3d968589d8 | 585 | /*! |
Kojto | 90:cb3d968589d8 | 586 | * @name Register USBDCD_TIMER0, field TSEQ_INIT[25:16] (RW) |
Kojto | 90:cb3d968589d8 | 587 | * |
Kojto | 90:cb3d968589d8 | 588 | * TSEQ_INIT represents the system latency (in ms) measured from the time VBUS |
Kojto | 90:cb3d968589d8 | 589 | * goes active to the time system software initiates the charger detection |
Kojto | 90:cb3d968589d8 | 590 | * sequence in the USBDCD module. When software sets the CONTROL[START] bit, the Unit |
Kojto | 90:cb3d968589d8 | 591 | * Connection Timer (TUNITCON) is initialized with the value of TSEQ_INIT. Valid |
Kojto | 90:cb3d968589d8 | 592 | * values are 0-1023, but the USB Battery Charging Specification requires the |
Kojto | 90:cb3d968589d8 | 593 | * entire sequence, including TSEQ_INIT, to be completed in 1s or less. |
Kojto | 90:cb3d968589d8 | 594 | */ |
Kojto | 90:cb3d968589d8 | 595 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 596 | #define BP_USBDCD_TIMER0_TSEQ_INIT (16U) /*!< Bit position for USBDCD_TIMER0_TSEQ_INIT. */ |
Kojto | 90:cb3d968589d8 | 597 | #define BM_USBDCD_TIMER0_TSEQ_INIT (0x03FF0000U) /*!< Bit mask for USBDCD_TIMER0_TSEQ_INIT. */ |
Kojto | 90:cb3d968589d8 | 598 | #define BS_USBDCD_TIMER0_TSEQ_INIT (10U) /*!< Bit field size in bits for USBDCD_TIMER0_TSEQ_INIT. */ |
Kojto | 90:cb3d968589d8 | 599 | |
Kojto | 90:cb3d968589d8 | 600 | /*! @brief Read current value of the USBDCD_TIMER0_TSEQ_INIT field. */ |
Kojto | 90:cb3d968589d8 | 601 | #define BR_USBDCD_TIMER0_TSEQ_INIT(x) (HW_USBDCD_TIMER0(x).B.TSEQ_INIT) |
Kojto | 90:cb3d968589d8 | 602 | |
Kojto | 90:cb3d968589d8 | 603 | /*! @brief Format value for bitfield USBDCD_TIMER0_TSEQ_INIT. */ |
Kojto | 90:cb3d968589d8 | 604 | #define BF_USBDCD_TIMER0_TSEQ_INIT(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER0_TSEQ_INIT) & BM_USBDCD_TIMER0_TSEQ_INIT) |
Kojto | 90:cb3d968589d8 | 605 | |
Kojto | 90:cb3d968589d8 | 606 | /*! @brief Set the TSEQ_INIT field to a new value. */ |
Kojto | 90:cb3d968589d8 | 607 | #define BW_USBDCD_TIMER0_TSEQ_INIT(x, v) (HW_USBDCD_TIMER0_WR(x, (HW_USBDCD_TIMER0_RD(x) & ~BM_USBDCD_TIMER0_TSEQ_INIT) | BF_USBDCD_TIMER0_TSEQ_INIT(v))) |
Kojto | 90:cb3d968589d8 | 608 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 609 | |
Kojto | 90:cb3d968589d8 | 610 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 611 | * HW_USBDCD_TIMER1 - TIMER1 register |
Kojto | 90:cb3d968589d8 | 612 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 613 | |
Kojto | 90:cb3d968589d8 | 614 | /*! |
Kojto | 90:cb3d968589d8 | 615 | * @brief HW_USBDCD_TIMER1 - TIMER1 register (RW) |
Kojto | 90:cb3d968589d8 | 616 | * |
Kojto | 90:cb3d968589d8 | 617 | * Reset value: 0x000A0028U |
Kojto | 90:cb3d968589d8 | 618 | * |
Kojto | 90:cb3d968589d8 | 619 | * TIMER1 contains timing parameters. Note that register values can be written |
Kojto | 90:cb3d968589d8 | 620 | * that are not compliant with the USB Battery Charging Specification, so care |
Kojto | 90:cb3d968589d8 | 621 | * should be taken when overwriting the default values. |
Kojto | 90:cb3d968589d8 | 622 | */ |
Kojto | 90:cb3d968589d8 | 623 | typedef union _hw_usbdcd_timer1 |
Kojto | 90:cb3d968589d8 | 624 | { |
Kojto | 90:cb3d968589d8 | 625 | uint32_t U; |
Kojto | 90:cb3d968589d8 | 626 | struct _hw_usbdcd_timer1_bitfields |
Kojto | 90:cb3d968589d8 | 627 | { |
Kojto | 90:cb3d968589d8 | 628 | uint32_t TVDPSRC_ON : 10; /*!< [9:0] Time Period Comparator Enabled */ |
Kojto | 90:cb3d968589d8 | 629 | uint32_t RESERVED0 : 6; /*!< [15:10] */ |
Kojto | 90:cb3d968589d8 | 630 | uint32_t TDCD_DBNC : 10; /*!< [25:16] Time Period to Debounce D+ |
Kojto | 90:cb3d968589d8 | 631 | * Signal */ |
Kojto | 90:cb3d968589d8 | 632 | uint32_t RESERVED1 : 6; /*!< [31:26] */ |
Kojto | 90:cb3d968589d8 | 633 | } B; |
Kojto | 90:cb3d968589d8 | 634 | } hw_usbdcd_timer1_t; |
Kojto | 90:cb3d968589d8 | 635 | |
Kojto | 90:cb3d968589d8 | 636 | /*! |
Kojto | 90:cb3d968589d8 | 637 | * @name Constants and macros for entire USBDCD_TIMER1 register |
Kojto | 90:cb3d968589d8 | 638 | */ |
Kojto | 90:cb3d968589d8 | 639 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 640 | #define HW_USBDCD_TIMER1_ADDR(x) ((x) + 0x14U) |
Kojto | 90:cb3d968589d8 | 641 | |
Kojto | 90:cb3d968589d8 | 642 | #define HW_USBDCD_TIMER1(x) (*(__IO hw_usbdcd_timer1_t *) HW_USBDCD_TIMER1_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 643 | #define HW_USBDCD_TIMER1_RD(x) (HW_USBDCD_TIMER1(x).U) |
Kojto | 90:cb3d968589d8 | 644 | #define HW_USBDCD_TIMER1_WR(x, v) (HW_USBDCD_TIMER1(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 645 | #define HW_USBDCD_TIMER1_SET(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 646 | #define HW_USBDCD_TIMER1_CLR(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 647 | #define HW_USBDCD_TIMER1_TOG(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 648 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 649 | |
Kojto | 90:cb3d968589d8 | 650 | /* |
Kojto | 90:cb3d968589d8 | 651 | * Constants & macros for individual USBDCD_TIMER1 bitfields |
Kojto | 90:cb3d968589d8 | 652 | */ |
Kojto | 90:cb3d968589d8 | 653 | |
Kojto | 90:cb3d968589d8 | 654 | /*! |
Kojto | 90:cb3d968589d8 | 655 | * @name Register USBDCD_TIMER1, field TVDPSRC_ON[9:0] (RW) |
Kojto | 90:cb3d968589d8 | 656 | * |
Kojto | 90:cb3d968589d8 | 657 | * This timing parameter is used after detection of the data pin. See "Charging |
Kojto | 90:cb3d968589d8 | 658 | * Port Detection". Valid values are 1-1023, but the USB Battery Charging |
Kojto | 90:cb3d968589d8 | 659 | * Specification requires a minimum value of 40 ms. |
Kojto | 90:cb3d968589d8 | 660 | */ |
Kojto | 90:cb3d968589d8 | 661 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 662 | #define BP_USBDCD_TIMER1_TVDPSRC_ON (0U) /*!< Bit position for USBDCD_TIMER1_TVDPSRC_ON. */ |
Kojto | 90:cb3d968589d8 | 663 | #define BM_USBDCD_TIMER1_TVDPSRC_ON (0x000003FFU) /*!< Bit mask for USBDCD_TIMER1_TVDPSRC_ON. */ |
Kojto | 90:cb3d968589d8 | 664 | #define BS_USBDCD_TIMER1_TVDPSRC_ON (10U) /*!< Bit field size in bits for USBDCD_TIMER1_TVDPSRC_ON. */ |
Kojto | 90:cb3d968589d8 | 665 | |
Kojto | 90:cb3d968589d8 | 666 | /*! @brief Read current value of the USBDCD_TIMER1_TVDPSRC_ON field. */ |
Kojto | 90:cb3d968589d8 | 667 | #define BR_USBDCD_TIMER1_TVDPSRC_ON(x) (HW_USBDCD_TIMER1(x).B.TVDPSRC_ON) |
Kojto | 90:cb3d968589d8 | 668 | |
Kojto | 90:cb3d968589d8 | 669 | /*! @brief Format value for bitfield USBDCD_TIMER1_TVDPSRC_ON. */ |
Kojto | 90:cb3d968589d8 | 670 | #define BF_USBDCD_TIMER1_TVDPSRC_ON(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER1_TVDPSRC_ON) & BM_USBDCD_TIMER1_TVDPSRC_ON) |
Kojto | 90:cb3d968589d8 | 671 | |
Kojto | 90:cb3d968589d8 | 672 | /*! @brief Set the TVDPSRC_ON field to a new value. */ |
Kojto | 90:cb3d968589d8 | 673 | #define BW_USBDCD_TIMER1_TVDPSRC_ON(x, v) (HW_USBDCD_TIMER1_WR(x, (HW_USBDCD_TIMER1_RD(x) & ~BM_USBDCD_TIMER1_TVDPSRC_ON) | BF_USBDCD_TIMER1_TVDPSRC_ON(v))) |
Kojto | 90:cb3d968589d8 | 674 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 675 | |
Kojto | 90:cb3d968589d8 | 676 | /*! |
Kojto | 90:cb3d968589d8 | 677 | * @name Register USBDCD_TIMER1, field TDCD_DBNC[25:16] (RW) |
Kojto | 90:cb3d968589d8 | 678 | * |
Kojto | 90:cb3d968589d8 | 679 | * Sets the time period (ms) to debounce the D+ signal during the data pin |
Kojto | 90:cb3d968589d8 | 680 | * contact detection phase. See "Debouncing the data pin contact" Valid values are |
Kojto | 90:cb3d968589d8 | 681 | * 1-1023, but the USB Battery Charging Specification requires a minimum value of 10 |
Kojto | 90:cb3d968589d8 | 682 | * ms. |
Kojto | 90:cb3d968589d8 | 683 | */ |
Kojto | 90:cb3d968589d8 | 684 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 685 | #define BP_USBDCD_TIMER1_TDCD_DBNC (16U) /*!< Bit position for USBDCD_TIMER1_TDCD_DBNC. */ |
Kojto | 90:cb3d968589d8 | 686 | #define BM_USBDCD_TIMER1_TDCD_DBNC (0x03FF0000U) /*!< Bit mask for USBDCD_TIMER1_TDCD_DBNC. */ |
Kojto | 90:cb3d968589d8 | 687 | #define BS_USBDCD_TIMER1_TDCD_DBNC (10U) /*!< Bit field size in bits for USBDCD_TIMER1_TDCD_DBNC. */ |
Kojto | 90:cb3d968589d8 | 688 | |
Kojto | 90:cb3d968589d8 | 689 | /*! @brief Read current value of the USBDCD_TIMER1_TDCD_DBNC field. */ |
Kojto | 90:cb3d968589d8 | 690 | #define BR_USBDCD_TIMER1_TDCD_DBNC(x) (HW_USBDCD_TIMER1(x).B.TDCD_DBNC) |
Kojto | 90:cb3d968589d8 | 691 | |
Kojto | 90:cb3d968589d8 | 692 | /*! @brief Format value for bitfield USBDCD_TIMER1_TDCD_DBNC. */ |
Kojto | 90:cb3d968589d8 | 693 | #define BF_USBDCD_TIMER1_TDCD_DBNC(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER1_TDCD_DBNC) & BM_USBDCD_TIMER1_TDCD_DBNC) |
Kojto | 90:cb3d968589d8 | 694 | |
Kojto | 90:cb3d968589d8 | 695 | /*! @brief Set the TDCD_DBNC field to a new value. */ |
Kojto | 90:cb3d968589d8 | 696 | #define BW_USBDCD_TIMER1_TDCD_DBNC(x, v) (HW_USBDCD_TIMER1_WR(x, (HW_USBDCD_TIMER1_RD(x) & ~BM_USBDCD_TIMER1_TDCD_DBNC) | BF_USBDCD_TIMER1_TDCD_DBNC(v))) |
Kojto | 90:cb3d968589d8 | 697 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 698 | |
Kojto | 90:cb3d968589d8 | 699 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 700 | * HW_USBDCD_TIMER2_BC11 - TIMER2_BC11 register |
Kojto | 90:cb3d968589d8 | 701 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 702 | |
Kojto | 90:cb3d968589d8 | 703 | /*! |
Kojto | 90:cb3d968589d8 | 704 | * @brief HW_USBDCD_TIMER2_BC11 - TIMER2_BC11 register (RW) |
Kojto | 90:cb3d968589d8 | 705 | * |
Kojto | 90:cb3d968589d8 | 706 | * Reset value: 0x00280001U |
Kojto | 90:cb3d968589d8 | 707 | * |
Kojto | 90:cb3d968589d8 | 708 | * TIMER2_BC11 contains timing parameters for USB Battery Charging |
Kojto | 90:cb3d968589d8 | 709 | * Specification, v1.1. Register values can be written that are not compliant with the USB |
Kojto | 90:cb3d968589d8 | 710 | * Battery Charging Specification, so care should be taken when overwriting the |
Kojto | 90:cb3d968589d8 | 711 | * default values. |
Kojto | 90:cb3d968589d8 | 712 | */ |
Kojto | 90:cb3d968589d8 | 713 | typedef union _hw_usbdcd_timer2_bc11 |
Kojto | 90:cb3d968589d8 | 714 | { |
Kojto | 90:cb3d968589d8 | 715 | uint32_t U; |
Kojto | 90:cb3d968589d8 | 716 | struct _hw_usbdcd_timer2_bc11_bitfields |
Kojto | 90:cb3d968589d8 | 717 | { |
Kojto | 90:cb3d968589d8 | 718 | uint32_t CHECK_DM : 4; /*!< [3:0] Time Before Check of D- Line */ |
Kojto | 90:cb3d968589d8 | 719 | uint32_t RESERVED0 : 12; /*!< [15:4] */ |
Kojto | 90:cb3d968589d8 | 720 | uint32_t TVDPSRC_CON : 10; /*!< [25:16] Time Period Before Enabling |
Kojto | 90:cb3d968589d8 | 721 | * D+ Pullup */ |
Kojto | 90:cb3d968589d8 | 722 | uint32_t RESERVED1 : 6; /*!< [31:26] */ |
Kojto | 90:cb3d968589d8 | 723 | } B; |
Kojto | 90:cb3d968589d8 | 724 | } hw_usbdcd_timer2_bc11_t; |
Kojto | 90:cb3d968589d8 | 725 | |
Kojto | 90:cb3d968589d8 | 726 | /*! |
Kojto | 90:cb3d968589d8 | 727 | * @name Constants and macros for entire USBDCD_TIMER2_BC11 register |
Kojto | 90:cb3d968589d8 | 728 | */ |
Kojto | 90:cb3d968589d8 | 729 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 730 | #define HW_USBDCD_TIMER2_BC11_ADDR(x) ((x) + 0x18U) |
Kojto | 90:cb3d968589d8 | 731 | |
Kojto | 90:cb3d968589d8 | 732 | #define HW_USBDCD_TIMER2_BC11(x) (*(__IO hw_usbdcd_timer2_bc11_t *) HW_USBDCD_TIMER2_BC11_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 733 | #define HW_USBDCD_TIMER2_BC11_RD(x) (HW_USBDCD_TIMER2_BC11(x).U) |
Kojto | 90:cb3d968589d8 | 734 | #define HW_USBDCD_TIMER2_BC11_WR(x, v) (HW_USBDCD_TIMER2_BC11(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 735 | #define HW_USBDCD_TIMER2_BC11_SET(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 736 | #define HW_USBDCD_TIMER2_BC11_CLR(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 737 | #define HW_USBDCD_TIMER2_BC11_TOG(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 738 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 739 | |
Kojto | 90:cb3d968589d8 | 740 | /* |
Kojto | 90:cb3d968589d8 | 741 | * Constants & macros for individual USBDCD_TIMER2_BC11 bitfields |
Kojto | 90:cb3d968589d8 | 742 | */ |
Kojto | 90:cb3d968589d8 | 743 | |
Kojto | 90:cb3d968589d8 | 744 | /*! |
Kojto | 90:cb3d968589d8 | 745 | * @name Register USBDCD_TIMER2_BC11, field CHECK_DM[3:0] (RW) |
Kojto | 90:cb3d968589d8 | 746 | * |
Kojto | 90:cb3d968589d8 | 747 | * Sets the amount of time (in ms) that the module waits after the device |
Kojto | 90:cb3d968589d8 | 748 | * connects to the USB bus until checking the state of the D- line to determine the |
Kojto | 90:cb3d968589d8 | 749 | * type of charging port. See "Charger Type Detection." Valid values are 1-15ms. |
Kojto | 90:cb3d968589d8 | 750 | */ |
Kojto | 90:cb3d968589d8 | 751 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 752 | #define BP_USBDCD_TIMER2_BC11_CHECK_DM (0U) /*!< Bit position for USBDCD_TIMER2_BC11_CHECK_DM. */ |
Kojto | 90:cb3d968589d8 | 753 | #define BM_USBDCD_TIMER2_BC11_CHECK_DM (0x0000000FU) /*!< Bit mask for USBDCD_TIMER2_BC11_CHECK_DM. */ |
Kojto | 90:cb3d968589d8 | 754 | #define BS_USBDCD_TIMER2_BC11_CHECK_DM (4U) /*!< Bit field size in bits for USBDCD_TIMER2_BC11_CHECK_DM. */ |
Kojto | 90:cb3d968589d8 | 755 | |
Kojto | 90:cb3d968589d8 | 756 | /*! @brief Read current value of the USBDCD_TIMER2_BC11_CHECK_DM field. */ |
Kojto | 90:cb3d968589d8 | 757 | #define BR_USBDCD_TIMER2_BC11_CHECK_DM(x) (HW_USBDCD_TIMER2_BC11(x).B.CHECK_DM) |
Kojto | 90:cb3d968589d8 | 758 | |
Kojto | 90:cb3d968589d8 | 759 | /*! @brief Format value for bitfield USBDCD_TIMER2_BC11_CHECK_DM. */ |
Kojto | 90:cb3d968589d8 | 760 | #define BF_USBDCD_TIMER2_BC11_CHECK_DM(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC11_CHECK_DM) & BM_USBDCD_TIMER2_BC11_CHECK_DM) |
Kojto | 90:cb3d968589d8 | 761 | |
Kojto | 90:cb3d968589d8 | 762 | /*! @brief Set the CHECK_DM field to a new value. */ |
Kojto | 90:cb3d968589d8 | 763 | #define BW_USBDCD_TIMER2_BC11_CHECK_DM(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, (HW_USBDCD_TIMER2_BC11_RD(x) & ~BM_USBDCD_TIMER2_BC11_CHECK_DM) | BF_USBDCD_TIMER2_BC11_CHECK_DM(v))) |
Kojto | 90:cb3d968589d8 | 764 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 765 | |
Kojto | 90:cb3d968589d8 | 766 | /*! |
Kojto | 90:cb3d968589d8 | 767 | * @name Register USBDCD_TIMER2_BC11, field TVDPSRC_CON[25:16] (RW) |
Kojto | 90:cb3d968589d8 | 768 | * |
Kojto | 90:cb3d968589d8 | 769 | * Sets the time period (ms) that the module waits after charging port detection |
Kojto | 90:cb3d968589d8 | 770 | * before system software must enable the D+ pullup to connect to the USB host. |
Kojto | 90:cb3d968589d8 | 771 | * Valid values are 1-1023, but the USB Battery Charging Specification requires a |
Kojto | 90:cb3d968589d8 | 772 | * minimum value of 40 ms. |
Kojto | 90:cb3d968589d8 | 773 | */ |
Kojto | 90:cb3d968589d8 | 774 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 775 | #define BP_USBDCD_TIMER2_BC11_TVDPSRC_CON (16U) /*!< Bit position for USBDCD_TIMER2_BC11_TVDPSRC_CON. */ |
Kojto | 90:cb3d968589d8 | 776 | #define BM_USBDCD_TIMER2_BC11_TVDPSRC_CON (0x03FF0000U) /*!< Bit mask for USBDCD_TIMER2_BC11_TVDPSRC_CON. */ |
Kojto | 90:cb3d968589d8 | 777 | #define BS_USBDCD_TIMER2_BC11_TVDPSRC_CON (10U) /*!< Bit field size in bits for USBDCD_TIMER2_BC11_TVDPSRC_CON. */ |
Kojto | 90:cb3d968589d8 | 778 | |
Kojto | 90:cb3d968589d8 | 779 | /*! @brief Read current value of the USBDCD_TIMER2_BC11_TVDPSRC_CON field. */ |
Kojto | 90:cb3d968589d8 | 780 | #define BR_USBDCD_TIMER2_BC11_TVDPSRC_CON(x) (HW_USBDCD_TIMER2_BC11(x).B.TVDPSRC_CON) |
Kojto | 90:cb3d968589d8 | 781 | |
Kojto | 90:cb3d968589d8 | 782 | /*! @brief Format value for bitfield USBDCD_TIMER2_BC11_TVDPSRC_CON. */ |
Kojto | 90:cb3d968589d8 | 783 | #define BF_USBDCD_TIMER2_BC11_TVDPSRC_CON(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC11_TVDPSRC_CON) & BM_USBDCD_TIMER2_BC11_TVDPSRC_CON) |
Kojto | 90:cb3d968589d8 | 784 | |
Kojto | 90:cb3d968589d8 | 785 | /*! @brief Set the TVDPSRC_CON field to a new value. */ |
Kojto | 90:cb3d968589d8 | 786 | #define BW_USBDCD_TIMER2_BC11_TVDPSRC_CON(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, (HW_USBDCD_TIMER2_BC11_RD(x) & ~BM_USBDCD_TIMER2_BC11_TVDPSRC_CON) | BF_USBDCD_TIMER2_BC11_TVDPSRC_CON(v))) |
Kojto | 90:cb3d968589d8 | 787 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 788 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 789 | * HW_USBDCD_TIMER2_BC12 - TIMER2_BC12 register |
Kojto | 90:cb3d968589d8 | 790 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 791 | |
Kojto | 90:cb3d968589d8 | 792 | /*! |
Kojto | 90:cb3d968589d8 | 793 | * @brief HW_USBDCD_TIMER2_BC12 - TIMER2_BC12 register (RW) |
Kojto | 90:cb3d968589d8 | 794 | * |
Kojto | 90:cb3d968589d8 | 795 | * Reset value: 0x00010028U |
Kojto | 90:cb3d968589d8 | 796 | * |
Kojto | 90:cb3d968589d8 | 797 | * TIMER2_BC12 contains timing parameters for USB Battery Charging |
Kojto | 90:cb3d968589d8 | 798 | * Specification, v1.2. Register values can be written that are not compliant with the USB |
Kojto | 90:cb3d968589d8 | 799 | * Battery Charging Specification, so care should be taken when overwriting the |
Kojto | 90:cb3d968589d8 | 800 | * default values. |
Kojto | 90:cb3d968589d8 | 801 | */ |
Kojto | 90:cb3d968589d8 | 802 | typedef union _hw_usbdcd_timer2_bc12 |
Kojto | 90:cb3d968589d8 | 803 | { |
Kojto | 90:cb3d968589d8 | 804 | uint32_t U; |
Kojto | 90:cb3d968589d8 | 805 | struct _hw_usbdcd_timer2_bc12_bitfields |
Kojto | 90:cb3d968589d8 | 806 | { |
Kojto | 90:cb3d968589d8 | 807 | uint32_t TVDMSRC_ON : 10; /*!< [9:0] */ |
Kojto | 90:cb3d968589d8 | 808 | uint32_t RESERVED0 : 6; /*!< [15:10] */ |
Kojto | 90:cb3d968589d8 | 809 | uint32_t TWAIT_AFTER_PRD : 10; /*!< [25:16] */ |
Kojto | 90:cb3d968589d8 | 810 | uint32_t RESERVED1 : 6; /*!< [31:26] */ |
Kojto | 90:cb3d968589d8 | 811 | } B; |
Kojto | 90:cb3d968589d8 | 812 | } hw_usbdcd_timer2_bc12_t; |
Kojto | 90:cb3d968589d8 | 813 | |
Kojto | 90:cb3d968589d8 | 814 | /*! |
Kojto | 90:cb3d968589d8 | 815 | * @name Constants and macros for entire USBDCD_TIMER2_BC12 register |
Kojto | 90:cb3d968589d8 | 816 | */ |
Kojto | 90:cb3d968589d8 | 817 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 818 | #define HW_USBDCD_TIMER2_BC12_ADDR(x) ((x) + 0x18U) |
Kojto | 90:cb3d968589d8 | 819 | |
Kojto | 90:cb3d968589d8 | 820 | #define HW_USBDCD_TIMER2_BC12(x) (*(__IO hw_usbdcd_timer2_bc12_t *) HW_USBDCD_TIMER2_BC12_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 821 | #define HW_USBDCD_TIMER2_BC12_RD(x) (HW_USBDCD_TIMER2_BC12(x).U) |
Kojto | 90:cb3d968589d8 | 822 | #define HW_USBDCD_TIMER2_BC12_WR(x, v) (HW_USBDCD_TIMER2_BC12(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 823 | #define HW_USBDCD_TIMER2_BC12_SET(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 824 | #define HW_USBDCD_TIMER2_BC12_CLR(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 825 | #define HW_USBDCD_TIMER2_BC12_TOG(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 826 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 827 | |
Kojto | 90:cb3d968589d8 | 828 | /* |
Kojto | 90:cb3d968589d8 | 829 | * Constants & macros for individual USBDCD_TIMER2_BC12 bitfields |
Kojto | 90:cb3d968589d8 | 830 | */ |
Kojto | 90:cb3d968589d8 | 831 | |
Kojto | 90:cb3d968589d8 | 832 | /*! |
Kojto | 90:cb3d968589d8 | 833 | * @name Register USBDCD_TIMER2_BC12, field TVDMSRC_ON[9:0] (RW) |
Kojto | 90:cb3d968589d8 | 834 | * |
Kojto | 90:cb3d968589d8 | 835 | * Sets the amount of time (in ms) that the module enables the VDM_SRC. Valid |
Kojto | 90:cb3d968589d8 | 836 | * values are 0-40ms. |
Kojto | 90:cb3d968589d8 | 837 | */ |
Kojto | 90:cb3d968589d8 | 838 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 839 | #define BP_USBDCD_TIMER2_BC12_TVDMSRC_ON (0U) /*!< Bit position for USBDCD_TIMER2_BC12_TVDMSRC_ON. */ |
Kojto | 90:cb3d968589d8 | 840 | #define BM_USBDCD_TIMER2_BC12_TVDMSRC_ON (0x000003FFU) /*!< Bit mask for USBDCD_TIMER2_BC12_TVDMSRC_ON. */ |
Kojto | 90:cb3d968589d8 | 841 | #define BS_USBDCD_TIMER2_BC12_TVDMSRC_ON (10U) /*!< Bit field size in bits for USBDCD_TIMER2_BC12_TVDMSRC_ON. */ |
Kojto | 90:cb3d968589d8 | 842 | |
Kojto | 90:cb3d968589d8 | 843 | /*! @brief Read current value of the USBDCD_TIMER2_BC12_TVDMSRC_ON field. */ |
Kojto | 90:cb3d968589d8 | 844 | #define BR_USBDCD_TIMER2_BC12_TVDMSRC_ON(x) (HW_USBDCD_TIMER2_BC12(x).B.TVDMSRC_ON) |
Kojto | 90:cb3d968589d8 | 845 | |
Kojto | 90:cb3d968589d8 | 846 | /*! @brief Format value for bitfield USBDCD_TIMER2_BC12_TVDMSRC_ON. */ |
Kojto | 90:cb3d968589d8 | 847 | #define BF_USBDCD_TIMER2_BC12_TVDMSRC_ON(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC12_TVDMSRC_ON) & BM_USBDCD_TIMER2_BC12_TVDMSRC_ON) |
Kojto | 90:cb3d968589d8 | 848 | |
Kojto | 90:cb3d968589d8 | 849 | /*! @brief Set the TVDMSRC_ON field to a new value. */ |
Kojto | 90:cb3d968589d8 | 850 | #define BW_USBDCD_TIMER2_BC12_TVDMSRC_ON(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, (HW_USBDCD_TIMER2_BC12_RD(x) & ~BM_USBDCD_TIMER2_BC12_TVDMSRC_ON) | BF_USBDCD_TIMER2_BC12_TVDMSRC_ON(v))) |
Kojto | 90:cb3d968589d8 | 851 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 852 | |
Kojto | 90:cb3d968589d8 | 853 | /*! |
Kojto | 90:cb3d968589d8 | 854 | * @name Register USBDCD_TIMER2_BC12, field TWAIT_AFTER_PRD[25:16] (RW) |
Kojto | 90:cb3d968589d8 | 855 | * |
Kojto | 90:cb3d968589d8 | 856 | * Sets the amount of time (in ms) that the module waits after primary detection |
Kojto | 90:cb3d968589d8 | 857 | * before start to secondary detection. Valid values are 1-1023ms. Default is |
Kojto | 90:cb3d968589d8 | 858 | * 1ms. |
Kojto | 90:cb3d968589d8 | 859 | */ |
Kojto | 90:cb3d968589d8 | 860 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 861 | #define BP_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD (16U) /*!< Bit position for USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD. */ |
Kojto | 90:cb3d968589d8 | 862 | #define BM_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD (0x03FF0000U) /*!< Bit mask for USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD. */ |
Kojto | 90:cb3d968589d8 | 863 | #define BS_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD (10U) /*!< Bit field size in bits for USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD. */ |
Kojto | 90:cb3d968589d8 | 864 | |
Kojto | 90:cb3d968589d8 | 865 | /*! @brief Read current value of the USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD field. */ |
Kojto | 90:cb3d968589d8 | 866 | #define BR_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(x) (HW_USBDCD_TIMER2_BC12(x).B.TWAIT_AFTER_PRD) |
Kojto | 90:cb3d968589d8 | 867 | |
Kojto | 90:cb3d968589d8 | 868 | /*! @brief Format value for bitfield USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD. */ |
Kojto | 90:cb3d968589d8 | 869 | #define BF_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD) & BM_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD) |
Kojto | 90:cb3d968589d8 | 870 | |
Kojto | 90:cb3d968589d8 | 871 | /*! @brief Set the TWAIT_AFTER_PRD field to a new value. */ |
Kojto | 90:cb3d968589d8 | 872 | #define BW_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, (HW_USBDCD_TIMER2_BC12_RD(x) & ~BM_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD) | BF_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(v))) |
Kojto | 90:cb3d968589d8 | 873 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 874 | |
Kojto | 90:cb3d968589d8 | 875 | /* |
Kojto | 90:cb3d968589d8 | 876 | ** Start of section using anonymous unions |
Kojto | 90:cb3d968589d8 | 877 | */ |
Kojto | 90:cb3d968589d8 | 878 | |
Kojto | 90:cb3d968589d8 | 879 | #if defined(__ARMCC_VERSION) |
Kojto | 90:cb3d968589d8 | 880 | #pragma push |
Kojto | 90:cb3d968589d8 | 881 | #pragma anon_unions |
Kojto | 90:cb3d968589d8 | 882 | #elif defined(__CWCC__) |
Kojto | 90:cb3d968589d8 | 883 | #pragma push |
Kojto | 90:cb3d968589d8 | 884 | #pragma cpp_extensions on |
Kojto | 90:cb3d968589d8 | 885 | #elif defined(__GNUC__) |
Kojto | 90:cb3d968589d8 | 886 | /* anonymous unions are enabled by default */ |
Kojto | 90:cb3d968589d8 | 887 | #elif defined(__IAR_SYSTEMS_ICC__) |
Kojto | 90:cb3d968589d8 | 888 | #pragma language=extended |
Kojto | 90:cb3d968589d8 | 889 | #else |
Kojto | 90:cb3d968589d8 | 890 | #error Not supported compiler type |
Kojto | 90:cb3d968589d8 | 891 | #endif |
Kojto | 90:cb3d968589d8 | 892 | |
Kojto | 90:cb3d968589d8 | 893 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 894 | * hw_usbdcd_t - module struct |
Kojto | 90:cb3d968589d8 | 895 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 896 | /*! |
Kojto | 90:cb3d968589d8 | 897 | * @brief All USBDCD module registers. |
Kojto | 90:cb3d968589d8 | 898 | */ |
Kojto | 90:cb3d968589d8 | 899 | #pragma pack(1) |
Kojto | 90:cb3d968589d8 | 900 | typedef struct _hw_usbdcd |
Kojto | 90:cb3d968589d8 | 901 | { |
Kojto | 90:cb3d968589d8 | 902 | __IO hw_usbdcd_control_t CONTROL; /*!< [0x0] Control register */ |
Kojto | 90:cb3d968589d8 | 903 | __IO hw_usbdcd_clock_t CLOCK; /*!< [0x4] Clock register */ |
Kojto | 90:cb3d968589d8 | 904 | __I hw_usbdcd_status_t STATUS; /*!< [0x8] Status register */ |
Kojto | 90:cb3d968589d8 | 905 | uint8_t _reserved0[4]; |
Kojto | 90:cb3d968589d8 | 906 | __IO hw_usbdcd_timer0_t TIMER0; /*!< [0x10] TIMER0 register */ |
Kojto | 90:cb3d968589d8 | 907 | __IO hw_usbdcd_timer1_t TIMER1; /*!< [0x14] TIMER1 register */ |
Kojto | 90:cb3d968589d8 | 908 | union { |
Kojto | 90:cb3d968589d8 | 909 | __IO hw_usbdcd_timer2_bc11_t TIMER2_BC11; /*!< [0x18] TIMER2_BC11 register */ |
Kojto | 90:cb3d968589d8 | 910 | __IO hw_usbdcd_timer2_bc12_t TIMER2_BC12; /*!< [0x18] TIMER2_BC12 register */ |
Kojto | 90:cb3d968589d8 | 911 | }; |
Kojto | 90:cb3d968589d8 | 912 | } hw_usbdcd_t; |
Kojto | 90:cb3d968589d8 | 913 | #pragma pack() |
Kojto | 90:cb3d968589d8 | 914 | |
Kojto | 90:cb3d968589d8 | 915 | /*! @brief Macro to access all USBDCD registers. */ |
Kojto | 90:cb3d968589d8 | 916 | /*! @param x USBDCD module instance base address. */ |
Kojto | 90:cb3d968589d8 | 917 | /*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct, |
Kojto | 90:cb3d968589d8 | 918 | * use the '&' operator, like <code>&HW_USBDCD(USBDCD_BASE)</code>. */ |
Kojto | 90:cb3d968589d8 | 919 | #define HW_USBDCD(x) (*(hw_usbdcd_t *)(x)) |
Kojto | 90:cb3d968589d8 | 920 | |
Kojto | 90:cb3d968589d8 | 921 | /* |
Kojto | 90:cb3d968589d8 | 922 | ** End of section using anonymous unions |
Kojto | 90:cb3d968589d8 | 923 | */ |
Kojto | 90:cb3d968589d8 | 924 | |
Kojto | 90:cb3d968589d8 | 925 | #if defined(__ARMCC_VERSION) |
Kojto | 90:cb3d968589d8 | 926 | #pragma pop |
Kojto | 90:cb3d968589d8 | 927 | #elif defined(__CWCC__) |
Kojto | 90:cb3d968589d8 | 928 | #pragma pop |
Kojto | 90:cb3d968589d8 | 929 | #elif defined(__GNUC__) |
Kojto | 90:cb3d968589d8 | 930 | /* leave anonymous unions enabled */ |
Kojto | 90:cb3d968589d8 | 931 | #elif defined(__IAR_SYSTEMS_ICC__) |
Kojto | 90:cb3d968589d8 | 932 | #pragma language=default |
Kojto | 90:cb3d968589d8 | 933 | #else |
Kojto | 90:cb3d968589d8 | 934 | #error Not supported compiler type |
Kojto | 90:cb3d968589d8 | 935 | #endif |
Kojto | 90:cb3d968589d8 | 936 | |
Kojto | 90:cb3d968589d8 | 937 | #endif /* __HW_USBDCD_REGISTERS_H__ */ |
Kojto | 90:cb3d968589d8 | 938 | /* EOF */ |