mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_crc.h@104:b9ad9a133dc7, 2015-08-05 (annotated)

Committer:
Kojto
Date:
Wed Aug 05 13:16:35 2015 +0100
Revision:
104:b9ad9a133dc7
Parent:
90:cb3d968589d8 
Release 104 of the mbed library:



Changes:

- new platforms: nrf51 microbit

- MAXxxx - fix pwm array search

- LPC8xx - usart enable fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 90:cb3d968589d8 1 /*
Kojto 90:cb3d968589d8 2 ** ###################################################################
Kojto 90:cb3d968589d8 3 ** Compilers: Keil ARM C/C++ Compiler
Kojto 90:cb3d968589d8 4 ** Freescale C/C++ for Embedded ARM
Kojto 90:cb3d968589d8 5 ** GNU C Compiler
Kojto 90:cb3d968589d8 6 ** IAR ANSI C/C++ Compiler for ARM
Kojto 90:cb3d968589d8 7 **
Kojto 90:cb3d968589d8 8 ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
Kojto 90:cb3d968589d8 9 ** Version: rev. 2.5, 2014-02-10
Kojto 90:cb3d968589d8 10 ** Build: b140604
Kojto 90:cb3d968589d8 11 **
Kojto 90:cb3d968589d8 12 ** Abstract:
Kojto 90:cb3d968589d8 13 ** Extension to the CMSIS register access layer header.
Kojto 90:cb3d968589d8 14 **
Kojto 90:cb3d968589d8 15 ** Copyright (c) 2014 Freescale Semiconductor, Inc.
Kojto 90:cb3d968589d8 16 ** All rights reserved.
Kojto 90:cb3d968589d8 17 **
Kojto 90:cb3d968589d8 18 ** Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 19 ** are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 20 **
Kojto 90:cb3d968589d8 21 ** o Redistributions of source code must retain the above copyright notice, this list
Kojto 90:cb3d968589d8 22 ** of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 23 **
Kojto 90:cb3d968589d8 24 ** o Redistributions in binary form must reproduce the above copyright notice, this
Kojto 90:cb3d968589d8 25 ** list of conditions and the following disclaimer in the documentation and/or
Kojto 90:cb3d968589d8 26 ** other materials provided with the distribution.
Kojto 90:cb3d968589d8 27 **
Kojto 90:cb3d968589d8 28 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto 90:cb3d968589d8 29 ** contributors may be used to endorse or promote products derived from this
Kojto 90:cb3d968589d8 30 ** software without specific prior written permission.
Kojto 90:cb3d968589d8 31 **
Kojto 90:cb3d968589d8 32 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto 90:cb3d968589d8 33 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto 90:cb3d968589d8 34 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 35 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto 90:cb3d968589d8 36 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto 90:cb3d968589d8 37 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto 90:cb3d968589d8 38 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto 90:cb3d968589d8 39 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto 90:cb3d968589d8 40 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto 90:cb3d968589d8 41 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 42 **
Kojto 90:cb3d968589d8 43 ** http: www.freescale.com
Kojto 90:cb3d968589d8 44 ** mail: support@freescale.com
Kojto 90:cb3d968589d8 45 **
Kojto 90:cb3d968589d8 46 ** Revisions:
Kojto 90:cb3d968589d8 47 ** - rev. 1.0 (2013-08-12)
Kojto 90:cb3d968589d8 48 ** Initial version.
Kojto 90:cb3d968589d8 49 ** - rev. 2.0 (2013-10-29)
Kojto 90:cb3d968589d8 50 ** Register accessor macros added to the memory map.
Kojto 90:cb3d968589d8 51 ** Symbols for Processor Expert memory map compatibility added to the memory map.
Kojto 90:cb3d968589d8 52 ** Startup file for gcc has been updated according to CMSIS 3.2.
Kojto 90:cb3d968589d8 53 ** System initialization updated.
Kojto 90:cb3d968589d8 54 ** MCG - registers updated.
Kojto 90:cb3d968589d8 55 ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed.
Kojto 90:cb3d968589d8 56 ** - rev. 2.1 (2013-10-30)
Kojto 90:cb3d968589d8 57 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
Kojto 90:cb3d968589d8 58 ** - rev. 2.2 (2013-12-09)
Kojto 90:cb3d968589d8 59 ** DMA - EARS register removed.
Kojto 90:cb3d968589d8 60 ** AIPS0, AIPS1 - MPRA register updated.
Kojto 90:cb3d968589d8 61 ** - rev. 2.3 (2014-01-24)
Kojto 90:cb3d968589d8 62 ** Update according to reference manual rev. 2
Kojto 90:cb3d968589d8 63 ** ENET, MCG, MCM, SIM, USB - registers updated
Kojto 90:cb3d968589d8 64 ** - rev. 2.4 (2014-02-10)
Kojto 90:cb3d968589d8 65 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto 90:cb3d968589d8 66 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto 90:cb3d968589d8 67 ** - rev. 2.5 (2014-02-10)
Kojto 90:cb3d968589d8 68 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto 90:cb3d968589d8 69 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto 90:cb3d968589d8 70 ** Module access macro module_BASES replaced by module_BASE_PTRS.
Kojto 90:cb3d968589d8 71 **
Kojto 90:cb3d968589d8 72 ** ###################################################################
Kojto 90:cb3d968589d8 73 */
Kojto 90:cb3d968589d8 74
Kojto 90:cb3d968589d8 75 /*
Kojto 90:cb3d968589d8 76 * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
Kojto 90:cb3d968589d8 77 *
Kojto 90:cb3d968589d8 78 * This file was generated automatically and any changes may be lost.
Kojto 90:cb3d968589d8 79 */
Kojto 90:cb3d968589d8 80 #ifndef __HW_CRC_REGISTERS_H__
Kojto 90:cb3d968589d8 81 #define __HW_CRC_REGISTERS_H__
Kojto 90:cb3d968589d8 82
Kojto 90:cb3d968589d8 83 #include "MK64F12.h"
Kojto 90:cb3d968589d8 84 #include "fsl_bitaccess.h"
Kojto 90:cb3d968589d8 85
Kojto 90:cb3d968589d8 86 /*
Kojto 90:cb3d968589d8 87 * MK64F12 CRC
Kojto 90:cb3d968589d8 88 *
Kojto 90:cb3d968589d8 89 * Cyclic Redundancy Check
Kojto 90:cb3d968589d8 90 *
Kojto 90:cb3d968589d8 91 * Registers defined in this header file:
Kojto 90:cb3d968589d8 92 * - HW_CRC_DATAL - CRC_DATAL register.
Kojto 90:cb3d968589d8 93 * - HW_CRC_DATAH - CRC_DATAH register.
Kojto 90:cb3d968589d8 94 * - HW_CRC_DATALL - CRC_DATALL register.
Kojto 90:cb3d968589d8 95 * - HW_CRC_DATALU - CRC_DATALU register.
Kojto 90:cb3d968589d8 96 * - HW_CRC_DATAHL - CRC_DATAHL register.
Kojto 90:cb3d968589d8 97 * - HW_CRC_DATAHU - CRC_DATAHU register.
Kojto 90:cb3d968589d8 98 * - HW_CRC_DATA - CRC Data register
Kojto 90:cb3d968589d8 99 * - HW_CRC_GPOLY - CRC Polynomial register
Kojto 90:cb3d968589d8 100 * - HW_CRC_GPOLYL - CRC_GPOLYL register.
Kojto 90:cb3d968589d8 101 * - HW_CRC_GPOLYH - CRC_GPOLYH register.
Kojto 90:cb3d968589d8 102 * - HW_CRC_GPOLYLL - CRC_GPOLYLL register.
Kojto 90:cb3d968589d8 103 * - HW_CRC_GPOLYLU - CRC_GPOLYLU register.
Kojto 90:cb3d968589d8 104 * - HW_CRC_GPOLYHL - CRC_GPOLYHL register.
Kojto 90:cb3d968589d8 105 * - HW_CRC_GPOLYHU - CRC_GPOLYHU register.
Kojto 90:cb3d968589d8 106 * - HW_CRC_CTRL - CRC Control register
Kojto 90:cb3d968589d8 107 * - HW_CRC_CTRLHU - CRC_CTRLHU register.
Kojto 90:cb3d968589d8 108 *
Kojto 90:cb3d968589d8 109 * - hw_crc_t - Struct containing all module registers.
Kojto 90:cb3d968589d8 110 */
Kojto 90:cb3d968589d8 111
Kojto 90:cb3d968589d8 112 #define HW_CRC_INSTANCE_COUNT (1U) /*!< Number of instances of the CRC module. */
Kojto 90:cb3d968589d8 113
Kojto 90:cb3d968589d8 114 /*******************************************************************************
Kojto 90:cb3d968589d8 115 * HW_CRC_DATAL - CRC_DATAL register.
Kojto 90:cb3d968589d8 116 ******************************************************************************/
Kojto 90:cb3d968589d8 117
Kojto 90:cb3d968589d8 118 /*!
Kojto 90:cb3d968589d8 119 * @brief HW_CRC_DATAL - CRC_DATAL register. (RW)
Kojto 90:cb3d968589d8 120 *
Kojto 90:cb3d968589d8 121 * Reset value: 0xFFFFU
Kojto 90:cb3d968589d8 122 */
Kojto 90:cb3d968589d8 123 typedef union _hw_crc_datal
Kojto 90:cb3d968589d8 124 {
Kojto 90:cb3d968589d8 125 uint16_t U;
Kojto 90:cb3d968589d8 126 struct _hw_crc_datal_bitfields
Kojto 90:cb3d968589d8 127 {
Kojto 90:cb3d968589d8 128 uint16_t DATAL : 16; /*!< [15:0] DATAL stores the lower 16 bits of
Kojto 90:cb3d968589d8 129 * the 16/32 bit CRC */
Kojto 90:cb3d968589d8 130 } B;
Kojto 90:cb3d968589d8 131 } hw_crc_datal_t;
Kojto 90:cb3d968589d8 132
Kojto 90:cb3d968589d8 133 /*!
Kojto 90:cb3d968589d8 134 * @name Constants and macros for entire CRC_DATAL register
Kojto 90:cb3d968589d8 135 */
Kojto 90:cb3d968589d8 136 /*@{*/
Kojto 90:cb3d968589d8 137 #define HW_CRC_DATAL_ADDR(x) ((x) + 0x0U)
Kojto 90:cb3d968589d8 138
Kojto 90:cb3d968589d8 139 #define HW_CRC_DATAL(x) (*(__IO hw_crc_datal_t *) HW_CRC_DATAL_ADDR(x))
Kojto 90:cb3d968589d8 140 #define HW_CRC_DATAL_RD(x) (HW_CRC_DATAL(x).U)
Kojto 90:cb3d968589d8 141 #define HW_CRC_DATAL_WR(x, v) (HW_CRC_DATAL(x).U = (v))
Kojto 90:cb3d968589d8 142 #define HW_CRC_DATAL_SET(x, v) (HW_CRC_DATAL_WR(x, HW_CRC_DATAL_RD(x) | (v)))
Kojto 90:cb3d968589d8 143 #define HW_CRC_DATAL_CLR(x, v) (HW_CRC_DATAL_WR(x, HW_CRC_DATAL_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 144 #define HW_CRC_DATAL_TOG(x, v) (HW_CRC_DATAL_WR(x, HW_CRC_DATAL_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 145 /*@}*/
Kojto 90:cb3d968589d8 146
Kojto 90:cb3d968589d8 147 /*
Kojto 90:cb3d968589d8 148 * Constants & macros for individual CRC_DATAL bitfields
Kojto 90:cb3d968589d8 149 */
Kojto 90:cb3d968589d8 150
Kojto 90:cb3d968589d8 151 /*!
Kojto 90:cb3d968589d8 152 * @name Register CRC_DATAL, field DATAL[15:0] (RW)
Kojto 90:cb3d968589d8 153 */
Kojto 90:cb3d968589d8 154 /*@{*/
Kojto 90:cb3d968589d8 155 #define BP_CRC_DATAL_DATAL (0U) /*!< Bit position for CRC_DATAL_DATAL. */
Kojto 90:cb3d968589d8 156 #define BM_CRC_DATAL_DATAL (0xFFFFU) /*!< Bit mask for CRC_DATAL_DATAL. */
Kojto 90:cb3d968589d8 157 #define BS_CRC_DATAL_DATAL (16U) /*!< Bit field size in bits for CRC_DATAL_DATAL. */
Kojto 90:cb3d968589d8 158
Kojto 90:cb3d968589d8 159 /*! @brief Read current value of the CRC_DATAL_DATAL field. */
Kojto 90:cb3d968589d8 160 #define BR_CRC_DATAL_DATAL(x) (HW_CRC_DATAL(x).U)
Kojto 90:cb3d968589d8 161
Kojto 90:cb3d968589d8 162 /*! @brief Format value for bitfield CRC_DATAL_DATAL. */
Kojto 90:cb3d968589d8 163 #define BF_CRC_DATAL_DATAL(v) ((uint16_t)((uint16_t)(v) << BP_CRC_DATAL_DATAL) & BM_CRC_DATAL_DATAL)
Kojto 90:cb3d968589d8 164
Kojto 90:cb3d968589d8 165 /*! @brief Set the DATAL field to a new value. */
Kojto 90:cb3d968589d8 166 #define BW_CRC_DATAL_DATAL(x, v) (HW_CRC_DATAL_WR(x, v))
Kojto 90:cb3d968589d8 167 /*@}*/
Kojto 90:cb3d968589d8 168 /*******************************************************************************
Kojto 90:cb3d968589d8 169 * HW_CRC_DATAH - CRC_DATAH register.
Kojto 90:cb3d968589d8 170 ******************************************************************************/
Kojto 90:cb3d968589d8 171
Kojto 90:cb3d968589d8 172 /*!
Kojto 90:cb3d968589d8 173 * @brief HW_CRC_DATAH - CRC_DATAH register. (RW)
Kojto 90:cb3d968589d8 174 *
Kojto 90:cb3d968589d8 175 * Reset value: 0xFFFFU
Kojto 90:cb3d968589d8 176 */
Kojto 90:cb3d968589d8 177 typedef union _hw_crc_datah
Kojto 90:cb3d968589d8 178 {
Kojto 90:cb3d968589d8 179 uint16_t U;
Kojto 90:cb3d968589d8 180 struct _hw_crc_datah_bitfields
Kojto 90:cb3d968589d8 181 {
Kojto 90:cb3d968589d8 182 uint16_t DATAH : 16; /*!< [15:0] DATAH stores the high 16 bits of the
Kojto 90:cb3d968589d8 183 * 16/32 bit CRC */
Kojto 90:cb3d968589d8 184 } B;
Kojto 90:cb3d968589d8 185 } hw_crc_datah_t;
Kojto 90:cb3d968589d8 186
Kojto 90:cb3d968589d8 187 /*!
Kojto 90:cb3d968589d8 188 * @name Constants and macros for entire CRC_DATAH register
Kojto 90:cb3d968589d8 189 */
Kojto 90:cb3d968589d8 190 /*@{*/
Kojto 90:cb3d968589d8 191 #define HW_CRC_DATAH_ADDR(x) ((x) + 0x2U)
Kojto 90:cb3d968589d8 192
Kojto 90:cb3d968589d8 193 #define HW_CRC_DATAH(x) (*(__IO hw_crc_datah_t *) HW_CRC_DATAH_ADDR(x))
Kojto 90:cb3d968589d8 194 #define HW_CRC_DATAH_RD(x) (HW_CRC_DATAH(x).U)
Kojto 90:cb3d968589d8 195 #define HW_CRC_DATAH_WR(x, v) (HW_CRC_DATAH(x).U = (v))
Kojto 90:cb3d968589d8 196 #define HW_CRC_DATAH_SET(x, v) (HW_CRC_DATAH_WR(x, HW_CRC_DATAH_RD(x) | (v)))
Kojto 90:cb3d968589d8 197 #define HW_CRC_DATAH_CLR(x, v) (HW_CRC_DATAH_WR(x, HW_CRC_DATAH_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 198 #define HW_CRC_DATAH_TOG(x, v) (HW_CRC_DATAH_WR(x, HW_CRC_DATAH_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 199 /*@}*/
Kojto 90:cb3d968589d8 200
Kojto 90:cb3d968589d8 201 /*
Kojto 90:cb3d968589d8 202 * Constants & macros for individual CRC_DATAH bitfields
Kojto 90:cb3d968589d8 203 */
Kojto 90:cb3d968589d8 204
Kojto 90:cb3d968589d8 205 /*!
Kojto 90:cb3d968589d8 206 * @name Register CRC_DATAH, field DATAH[15:0] (RW)
Kojto 90:cb3d968589d8 207 */
Kojto 90:cb3d968589d8 208 /*@{*/
Kojto 90:cb3d968589d8 209 #define BP_CRC_DATAH_DATAH (0U) /*!< Bit position for CRC_DATAH_DATAH. */
Kojto 90:cb3d968589d8 210 #define BM_CRC_DATAH_DATAH (0xFFFFU) /*!< Bit mask for CRC_DATAH_DATAH. */
Kojto 90:cb3d968589d8 211 #define BS_CRC_DATAH_DATAH (16U) /*!< Bit field size in bits for CRC_DATAH_DATAH. */
Kojto 90:cb3d968589d8 212
Kojto 90:cb3d968589d8 213 /*! @brief Read current value of the CRC_DATAH_DATAH field. */
Kojto 90:cb3d968589d8 214 #define BR_CRC_DATAH_DATAH(x) (HW_CRC_DATAH(x).U)
Kojto 90:cb3d968589d8 215
Kojto 90:cb3d968589d8 216 /*! @brief Format value for bitfield CRC_DATAH_DATAH. */
Kojto 90:cb3d968589d8 217 #define BF_CRC_DATAH_DATAH(v) ((uint16_t)((uint16_t)(v) << BP_CRC_DATAH_DATAH) & BM_CRC_DATAH_DATAH)
Kojto 90:cb3d968589d8 218
Kojto 90:cb3d968589d8 219 /*! @brief Set the DATAH field to a new value. */
Kojto 90:cb3d968589d8 220 #define BW_CRC_DATAH_DATAH(x, v) (HW_CRC_DATAH_WR(x, v))
Kojto 90:cb3d968589d8 221 /*@}*/
Kojto 90:cb3d968589d8 222 /*******************************************************************************
Kojto 90:cb3d968589d8 223 * HW_CRC_DATALL - CRC_DATALL register.
Kojto 90:cb3d968589d8 224 ******************************************************************************/
Kojto 90:cb3d968589d8 225
Kojto 90:cb3d968589d8 226 /*!
Kojto 90:cb3d968589d8 227 * @brief HW_CRC_DATALL - CRC_DATALL register. (RW)
Kojto 90:cb3d968589d8 228 *
Kojto 90:cb3d968589d8 229 * Reset value: 0xFFU
Kojto 90:cb3d968589d8 230 */
Kojto 90:cb3d968589d8 231 typedef union _hw_crc_datall
Kojto 90:cb3d968589d8 232 {
Kojto 90:cb3d968589d8 233 uint8_t U;
Kojto 90:cb3d968589d8 234 struct _hw_crc_datall_bitfields
Kojto 90:cb3d968589d8 235 {
Kojto 90:cb3d968589d8 236 uint8_t DATALL : 8; /*!< [7:0] CRCLL stores the first 8 bits of the
Kojto 90:cb3d968589d8 237 * 32 bit DATA */
Kojto 90:cb3d968589d8 238 } B;
Kojto 90:cb3d968589d8 239 } hw_crc_datall_t;
Kojto 90:cb3d968589d8 240
Kojto 90:cb3d968589d8 241 /*!
Kojto 90:cb3d968589d8 242 * @name Constants and macros for entire CRC_DATALL register
Kojto 90:cb3d968589d8 243 */
Kojto 90:cb3d968589d8 244 /*@{*/
Kojto 90:cb3d968589d8 245 #define HW_CRC_DATALL_ADDR(x) ((x) + 0x0U)
Kojto 90:cb3d968589d8 246
Kojto 90:cb3d968589d8 247 #define HW_CRC_DATALL(x) (*(__IO hw_crc_datall_t *) HW_CRC_DATALL_ADDR(x))
Kojto 90:cb3d968589d8 248 #define HW_CRC_DATALL_RD(x) (HW_CRC_DATALL(x).U)
Kojto 90:cb3d968589d8 249 #define HW_CRC_DATALL_WR(x, v) (HW_CRC_DATALL(x).U = (v))
Kojto 90:cb3d968589d8 250 #define HW_CRC_DATALL_SET(x, v) (HW_CRC_DATALL_WR(x, HW_CRC_DATALL_RD(x) | (v)))
Kojto 90:cb3d968589d8 251 #define HW_CRC_DATALL_CLR(x, v) (HW_CRC_DATALL_WR(x, HW_CRC_DATALL_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 252 #define HW_CRC_DATALL_TOG(x, v) (HW_CRC_DATALL_WR(x, HW_CRC_DATALL_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 253 /*@}*/
Kojto 90:cb3d968589d8 254
Kojto 90:cb3d968589d8 255 /*
Kojto 90:cb3d968589d8 256 * Constants & macros for individual CRC_DATALL bitfields
Kojto 90:cb3d968589d8 257 */
Kojto 90:cb3d968589d8 258
Kojto 90:cb3d968589d8 259 /*!
Kojto 90:cb3d968589d8 260 * @name Register CRC_DATALL, field DATALL[7:0] (RW)
Kojto 90:cb3d968589d8 261 */
Kojto 90:cb3d968589d8 262 /*@{*/
Kojto 90:cb3d968589d8 263 #define BP_CRC_DATALL_DATALL (0U) /*!< Bit position for CRC_DATALL_DATALL. */
Kojto 90:cb3d968589d8 264 #define BM_CRC_DATALL_DATALL (0xFFU) /*!< Bit mask for CRC_DATALL_DATALL. */
Kojto 90:cb3d968589d8 265 #define BS_CRC_DATALL_DATALL (8U) /*!< Bit field size in bits for CRC_DATALL_DATALL. */
Kojto 90:cb3d968589d8 266
Kojto 90:cb3d968589d8 267 /*! @brief Read current value of the CRC_DATALL_DATALL field. */
Kojto 90:cb3d968589d8 268 #define BR_CRC_DATALL_DATALL(x) (HW_CRC_DATALL(x).U)
Kojto 90:cb3d968589d8 269
Kojto 90:cb3d968589d8 270 /*! @brief Format value for bitfield CRC_DATALL_DATALL. */
Kojto 90:cb3d968589d8 271 #define BF_CRC_DATALL_DATALL(v) ((uint8_t)((uint8_t)(v) << BP_CRC_DATALL_DATALL) & BM_CRC_DATALL_DATALL)
Kojto 90:cb3d968589d8 272
Kojto 90:cb3d968589d8 273 /*! @brief Set the DATALL field to a new value. */
Kojto 90:cb3d968589d8 274 #define BW_CRC_DATALL_DATALL(x, v) (HW_CRC_DATALL_WR(x, v))
Kojto 90:cb3d968589d8 275 /*@}*/
Kojto 90:cb3d968589d8 276 /*******************************************************************************
Kojto 90:cb3d968589d8 277 * HW_CRC_DATALU - CRC_DATALU register.
Kojto 90:cb3d968589d8 278 ******************************************************************************/
Kojto 90:cb3d968589d8 279
Kojto 90:cb3d968589d8 280 /*!
Kojto 90:cb3d968589d8 281 * @brief HW_CRC_DATALU - CRC_DATALU register. (RW)
Kojto 90:cb3d968589d8 282 *
Kojto 90:cb3d968589d8 283 * Reset value: 0xFFU
Kojto 90:cb3d968589d8 284 */
Kojto 90:cb3d968589d8 285 typedef union _hw_crc_datalu
Kojto 90:cb3d968589d8 286 {
Kojto 90:cb3d968589d8 287 uint8_t U;
Kojto 90:cb3d968589d8 288 struct _hw_crc_datalu_bitfields
Kojto 90:cb3d968589d8 289 {
Kojto 90:cb3d968589d8 290 uint8_t DATALU : 8; /*!< [7:0] DATALL stores the second 8 bits of the
Kojto 90:cb3d968589d8 291 * 32 bit CRC */
Kojto 90:cb3d968589d8 292 } B;
Kojto 90:cb3d968589d8 293 } hw_crc_datalu_t;
Kojto 90:cb3d968589d8 294
Kojto 90:cb3d968589d8 295 /*!
Kojto 90:cb3d968589d8 296 * @name Constants and macros for entire CRC_DATALU register
Kojto 90:cb3d968589d8 297 */
Kojto 90:cb3d968589d8 298 /*@{*/
Kojto 90:cb3d968589d8 299 #define HW_CRC_DATALU_ADDR(x) ((x) + 0x1U)
Kojto 90:cb3d968589d8 300
Kojto 90:cb3d968589d8 301 #define HW_CRC_DATALU(x) (*(__IO hw_crc_datalu_t *) HW_CRC_DATALU_ADDR(x))
Kojto 90:cb3d968589d8 302 #define HW_CRC_DATALU_RD(x) (HW_CRC_DATALU(x).U)
Kojto 90:cb3d968589d8 303 #define HW_CRC_DATALU_WR(x, v) (HW_CRC_DATALU(x).U = (v))
Kojto 90:cb3d968589d8 304 #define HW_CRC_DATALU_SET(x, v) (HW_CRC_DATALU_WR(x, HW_CRC_DATALU_RD(x) | (v)))
Kojto 90:cb3d968589d8 305 #define HW_CRC_DATALU_CLR(x, v) (HW_CRC_DATALU_WR(x, HW_CRC_DATALU_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 306 #define HW_CRC_DATALU_TOG(x, v) (HW_CRC_DATALU_WR(x, HW_CRC_DATALU_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 307 /*@}*/
Kojto 90:cb3d968589d8 308
Kojto 90:cb3d968589d8 309 /*
Kojto 90:cb3d968589d8 310 * Constants & macros for individual CRC_DATALU bitfields
Kojto 90:cb3d968589d8 311 */
Kojto 90:cb3d968589d8 312
Kojto 90:cb3d968589d8 313 /*!
Kojto 90:cb3d968589d8 314 * @name Register CRC_DATALU, field DATALU[7:0] (RW)
Kojto 90:cb3d968589d8 315 */
Kojto 90:cb3d968589d8 316 /*@{*/
Kojto 90:cb3d968589d8 317 #define BP_CRC_DATALU_DATALU (0U) /*!< Bit position for CRC_DATALU_DATALU. */
Kojto 90:cb3d968589d8 318 #define BM_CRC_DATALU_DATALU (0xFFU) /*!< Bit mask for CRC_DATALU_DATALU. */
Kojto 90:cb3d968589d8 319 #define BS_CRC_DATALU_DATALU (8U) /*!< Bit field size in bits for CRC_DATALU_DATALU. */
Kojto 90:cb3d968589d8 320
Kojto 90:cb3d968589d8 321 /*! @brief Read current value of the CRC_DATALU_DATALU field. */
Kojto 90:cb3d968589d8 322 #define BR_CRC_DATALU_DATALU(x) (HW_CRC_DATALU(x).U)
Kojto 90:cb3d968589d8 323
Kojto 90:cb3d968589d8 324 /*! @brief Format value for bitfield CRC_DATALU_DATALU. */
Kojto 90:cb3d968589d8 325 #define BF_CRC_DATALU_DATALU(v) ((uint8_t)((uint8_t)(v) << BP_CRC_DATALU_DATALU) & BM_CRC_DATALU_DATALU)
Kojto 90:cb3d968589d8 326
Kojto 90:cb3d968589d8 327 /*! @brief Set the DATALU field to a new value. */
Kojto 90:cb3d968589d8 328 #define BW_CRC_DATALU_DATALU(x, v) (HW_CRC_DATALU_WR(x, v))
Kojto 90:cb3d968589d8 329 /*@}*/
Kojto 90:cb3d968589d8 330 /*******************************************************************************
Kojto 90:cb3d968589d8 331 * HW_CRC_DATAHL - CRC_DATAHL register.
Kojto 90:cb3d968589d8 332 ******************************************************************************/
Kojto 90:cb3d968589d8 333
Kojto 90:cb3d968589d8 334 /*!
Kojto 90:cb3d968589d8 335 * @brief HW_CRC_DATAHL - CRC_DATAHL register. (RW)
Kojto 90:cb3d968589d8 336 *
Kojto 90:cb3d968589d8 337 * Reset value: 0xFFU
Kojto 90:cb3d968589d8 338 */
Kojto 90:cb3d968589d8 339 typedef union _hw_crc_datahl
Kojto 90:cb3d968589d8 340 {
Kojto 90:cb3d968589d8 341 uint8_t U;
Kojto 90:cb3d968589d8 342 struct _hw_crc_datahl_bitfields
Kojto 90:cb3d968589d8 343 {
Kojto 90:cb3d968589d8 344 uint8_t DATAHL : 8; /*!< [7:0] DATAHL stores the third 8 bits of the
Kojto 90:cb3d968589d8 345 * 32 bit CRC */
Kojto 90:cb3d968589d8 346 } B;
Kojto 90:cb3d968589d8 347 } hw_crc_datahl_t;
Kojto 90:cb3d968589d8 348
Kojto 90:cb3d968589d8 349 /*!
Kojto 90:cb3d968589d8 350 * @name Constants and macros for entire CRC_DATAHL register
Kojto 90:cb3d968589d8 351 */
Kojto 90:cb3d968589d8 352 /*@{*/
Kojto 90:cb3d968589d8 353 #define HW_CRC_DATAHL_ADDR(x) ((x) + 0x2U)
Kojto 90:cb3d968589d8 354
Kojto 90:cb3d968589d8 355 #define HW_CRC_DATAHL(x) (*(__IO hw_crc_datahl_t *) HW_CRC_DATAHL_ADDR(x))
Kojto 90:cb3d968589d8 356 #define HW_CRC_DATAHL_RD(x) (HW_CRC_DATAHL(x).U)
Kojto 90:cb3d968589d8 357 #define HW_CRC_DATAHL_WR(x, v) (HW_CRC_DATAHL(x).U = (v))
Kojto 90:cb3d968589d8 358 #define HW_CRC_DATAHL_SET(x, v) (HW_CRC_DATAHL_WR(x, HW_CRC_DATAHL_RD(x) | (v)))
Kojto 90:cb3d968589d8 359 #define HW_CRC_DATAHL_CLR(x, v) (HW_CRC_DATAHL_WR(x, HW_CRC_DATAHL_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 360 #define HW_CRC_DATAHL_TOG(x, v) (HW_CRC_DATAHL_WR(x, HW_CRC_DATAHL_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 361 /*@}*/
Kojto 90:cb3d968589d8 362
Kojto 90:cb3d968589d8 363 /*
Kojto 90:cb3d968589d8 364 * Constants & macros for individual CRC_DATAHL bitfields
Kojto 90:cb3d968589d8 365 */
Kojto 90:cb3d968589d8 366
Kojto 90:cb3d968589d8 367 /*!
Kojto 90:cb3d968589d8 368 * @name Register CRC_DATAHL, field DATAHL[7:0] (RW)
Kojto 90:cb3d968589d8 369 */
Kojto 90:cb3d968589d8 370 /*@{*/
Kojto 90:cb3d968589d8 371 #define BP_CRC_DATAHL_DATAHL (0U) /*!< Bit position for CRC_DATAHL_DATAHL. */
Kojto 90:cb3d968589d8 372 #define BM_CRC_DATAHL_DATAHL (0xFFU) /*!< Bit mask for CRC_DATAHL_DATAHL. */
Kojto 90:cb3d968589d8 373 #define BS_CRC_DATAHL_DATAHL (8U) /*!< Bit field size in bits for CRC_DATAHL_DATAHL. */
Kojto 90:cb3d968589d8 374
Kojto 90:cb3d968589d8 375 /*! @brief Read current value of the CRC_DATAHL_DATAHL field. */
Kojto 90:cb3d968589d8 376 #define BR_CRC_DATAHL_DATAHL(x) (HW_CRC_DATAHL(x).U)
Kojto 90:cb3d968589d8 377
Kojto 90:cb3d968589d8 378 /*! @brief Format value for bitfield CRC_DATAHL_DATAHL. */
Kojto 90:cb3d968589d8 379 #define BF_CRC_DATAHL_DATAHL(v) ((uint8_t)((uint8_t)(v) << BP_CRC_DATAHL_DATAHL) & BM_CRC_DATAHL_DATAHL)
Kojto 90:cb3d968589d8 380
Kojto 90:cb3d968589d8 381 /*! @brief Set the DATAHL field to a new value. */
Kojto 90:cb3d968589d8 382 #define BW_CRC_DATAHL_DATAHL(x, v) (HW_CRC_DATAHL_WR(x, v))
Kojto 90:cb3d968589d8 383 /*@}*/
Kojto 90:cb3d968589d8 384 /*******************************************************************************
Kojto 90:cb3d968589d8 385 * HW_CRC_DATAHU - CRC_DATAHU register.
Kojto 90:cb3d968589d8 386 ******************************************************************************/
Kojto 90:cb3d968589d8 387
Kojto 90:cb3d968589d8 388 /*!
Kojto 90:cb3d968589d8 389 * @brief HW_CRC_DATAHU - CRC_DATAHU register. (RW)
Kojto 90:cb3d968589d8 390 *
Kojto 90:cb3d968589d8 391 * Reset value: 0xFFU
Kojto 90:cb3d968589d8 392 */
Kojto 90:cb3d968589d8 393 typedef union _hw_crc_datahu
Kojto 90:cb3d968589d8 394 {
Kojto 90:cb3d968589d8 395 uint8_t U;
Kojto 90:cb3d968589d8 396 struct _hw_crc_datahu_bitfields
Kojto 90:cb3d968589d8 397 {
Kojto 90:cb3d968589d8 398 uint8_t DATAHU : 8; /*!< [7:0] DATAHU stores the fourth 8 bits of the
Kojto 90:cb3d968589d8 399 * 32 bit CRC */
Kojto 90:cb3d968589d8 400 } B;
Kojto 90:cb3d968589d8 401 } hw_crc_datahu_t;
Kojto 90:cb3d968589d8 402
Kojto 90:cb3d968589d8 403 /*!
Kojto 90:cb3d968589d8 404 * @name Constants and macros for entire CRC_DATAHU register
Kojto 90:cb3d968589d8 405 */
Kojto 90:cb3d968589d8 406 /*@{*/
Kojto 90:cb3d968589d8 407 #define HW_CRC_DATAHU_ADDR(x) ((x) + 0x3U)
Kojto 90:cb3d968589d8 408
Kojto 90:cb3d968589d8 409 #define HW_CRC_DATAHU(x) (*(__IO hw_crc_datahu_t *) HW_CRC_DATAHU_ADDR(x))
Kojto 90:cb3d968589d8 410 #define HW_CRC_DATAHU_RD(x) (HW_CRC_DATAHU(x).U)
Kojto 90:cb3d968589d8 411 #define HW_CRC_DATAHU_WR(x, v) (HW_CRC_DATAHU(x).U = (v))
Kojto 90:cb3d968589d8 412 #define HW_CRC_DATAHU_SET(x, v) (HW_CRC_DATAHU_WR(x, HW_CRC_DATAHU_RD(x) | (v)))
Kojto 90:cb3d968589d8 413 #define HW_CRC_DATAHU_CLR(x, v) (HW_CRC_DATAHU_WR(x, HW_CRC_DATAHU_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 414 #define HW_CRC_DATAHU_TOG(x, v) (HW_CRC_DATAHU_WR(x, HW_CRC_DATAHU_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 415 /*@}*/
Kojto 90:cb3d968589d8 416
Kojto 90:cb3d968589d8 417 /*
Kojto 90:cb3d968589d8 418 * Constants & macros for individual CRC_DATAHU bitfields
Kojto 90:cb3d968589d8 419 */
Kojto 90:cb3d968589d8 420
Kojto 90:cb3d968589d8 421 /*!
Kojto 90:cb3d968589d8 422 * @name Register CRC_DATAHU, field DATAHU[7:0] (RW)
Kojto 90:cb3d968589d8 423 */
Kojto 90:cb3d968589d8 424 /*@{*/
Kojto 90:cb3d968589d8 425 #define BP_CRC_DATAHU_DATAHU (0U) /*!< Bit position for CRC_DATAHU_DATAHU. */
Kojto 90:cb3d968589d8 426 #define BM_CRC_DATAHU_DATAHU (0xFFU) /*!< Bit mask for CRC_DATAHU_DATAHU. */
Kojto 90:cb3d968589d8 427 #define BS_CRC_DATAHU_DATAHU (8U) /*!< Bit field size in bits for CRC_DATAHU_DATAHU. */
Kojto 90:cb3d968589d8 428
Kojto 90:cb3d968589d8 429 /*! @brief Read current value of the CRC_DATAHU_DATAHU field. */
Kojto 90:cb3d968589d8 430 #define BR_CRC_DATAHU_DATAHU(x) (HW_CRC_DATAHU(x).U)
Kojto 90:cb3d968589d8 431
Kojto 90:cb3d968589d8 432 /*! @brief Format value for bitfield CRC_DATAHU_DATAHU. */
Kojto 90:cb3d968589d8 433 #define BF_CRC_DATAHU_DATAHU(v) ((uint8_t)((uint8_t)(v) << BP_CRC_DATAHU_DATAHU) & BM_CRC_DATAHU_DATAHU)
Kojto 90:cb3d968589d8 434
Kojto 90:cb3d968589d8 435 /*! @brief Set the DATAHU field to a new value. */
Kojto 90:cb3d968589d8 436 #define BW_CRC_DATAHU_DATAHU(x, v) (HW_CRC_DATAHU_WR(x, v))
Kojto 90:cb3d968589d8 437 /*@}*/
Kojto 90:cb3d968589d8 438 /*******************************************************************************
Kojto 90:cb3d968589d8 439 * HW_CRC_DATA - CRC Data register
Kojto 90:cb3d968589d8 440 ******************************************************************************/
Kojto 90:cb3d968589d8 441
Kojto 90:cb3d968589d8 442 /*!
Kojto 90:cb3d968589d8 443 * @brief HW_CRC_DATA - CRC Data register (RW)
Kojto 90:cb3d968589d8 444 *
Kojto 90:cb3d968589d8 445 * Reset value: 0xFFFFFFFFU
Kojto 90:cb3d968589d8 446 *
Kojto 90:cb3d968589d8 447 * The CRC Data register contains the value of the seed, data, and checksum.
Kojto 90:cb3d968589d8 448 * When CTRL[WAS] is set, any write to the data register is regarded as the seed
Kojto 90:cb3d968589d8 449 * value. When CTRL[WAS] is cleared, any write to the data register is regarded as
Kojto 90:cb3d968589d8 450 * data for general CRC computation. In 16-bit CRC mode, the HU and HL fields are
Kojto 90:cb3d968589d8 451 * not used for programming the seed value, and reads of these fields return an
Kojto 90:cb3d968589d8 452 * indeterminate value. In 32-bit CRC mode, all fields are used for programming
Kojto 90:cb3d968589d8 453 * the seed value. When programming data values, the values can be written 8 bits,
Kojto 90:cb3d968589d8 454 * 16 bits, or 32 bits at a time, provided all bytes are contiguous; with MSB of
Kojto 90:cb3d968589d8 455 * data value written first. After all data values are written, the CRC result
Kojto 90:cb3d968589d8 456 * can be read from this data register. In 16-bit CRC mode, the CRC result is
Kojto 90:cb3d968589d8 457 * available in the LU and LL fields. In 32-bit CRC mode, all fields contain the
Kojto 90:cb3d968589d8 458 * result. Reads of this register at any time return the intermediate CRC value,
Kojto 90:cb3d968589d8 459 * provided the CRC module is configured.
Kojto 90:cb3d968589d8 460 */
Kojto 90:cb3d968589d8 461 typedef union _hw_crc_data
Kojto 90:cb3d968589d8 462 {
Kojto 90:cb3d968589d8 463 uint32_t U;
Kojto 90:cb3d968589d8 464 struct _hw_crc_data_bitfields
Kojto 90:cb3d968589d8 465 {
Kojto 90:cb3d968589d8 466 uint32_t LL : 8; /*!< [7:0] CRC Low Lower Byte */
Kojto 90:cb3d968589d8 467 uint32_t LU : 8; /*!< [15:8] CRC Low Upper Byte */
Kojto 90:cb3d968589d8 468 uint32_t HL : 8; /*!< [23:16] CRC High Lower Byte */
Kojto 90:cb3d968589d8 469 uint32_t HU : 8; /*!< [31:24] CRC High Upper Byte */
Kojto 90:cb3d968589d8 470 } B;
Kojto 90:cb3d968589d8 471 } hw_crc_data_t;
Kojto 90:cb3d968589d8 472
Kojto 90:cb3d968589d8 473 /*!
Kojto 90:cb3d968589d8 474 * @name Constants and macros for entire CRC_DATA register
Kojto 90:cb3d968589d8 475 */
Kojto 90:cb3d968589d8 476 /*@{*/
Kojto 90:cb3d968589d8 477 #define HW_CRC_DATA_ADDR(x) ((x) + 0x0U)
Kojto 90:cb3d968589d8 478
Kojto 90:cb3d968589d8 479 #define HW_CRC_DATA(x) (*(__IO hw_crc_data_t *) HW_CRC_DATA_ADDR(x))
Kojto 90:cb3d968589d8 480 #define HW_CRC_DATA_RD(x) (HW_CRC_DATA(x).U)
Kojto 90:cb3d968589d8 481 #define HW_CRC_DATA_WR(x, v) (HW_CRC_DATA(x).U = (v))
Kojto 90:cb3d968589d8 482 #define HW_CRC_DATA_SET(x, v) (HW_CRC_DATA_WR(x, HW_CRC_DATA_RD(x) | (v)))
Kojto 90:cb3d968589d8 483 #define HW_CRC_DATA_CLR(x, v) (HW_CRC_DATA_WR(x, HW_CRC_DATA_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 484 #define HW_CRC_DATA_TOG(x, v) (HW_CRC_DATA_WR(x, HW_CRC_DATA_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 485 /*@}*/
Kojto 90:cb3d968589d8 486
Kojto 90:cb3d968589d8 487 /*
Kojto 90:cb3d968589d8 488 * Constants & macros for individual CRC_DATA bitfields
Kojto 90:cb3d968589d8 489 */
Kojto 90:cb3d968589d8 490
Kojto 90:cb3d968589d8 491 /*!
Kojto 90:cb3d968589d8 492 * @name Register CRC_DATA, field LL[7:0] (RW)
Kojto 90:cb3d968589d8 493 *
Kojto 90:cb3d968589d8 494 * When CTRL[WAS] is 1, values written to this field are part of the seed value.
Kojto 90:cb3d968589d8 495 * When CTRL[WAS] is 0, data written to this field is used for CRC checksum
Kojto 90:cb3d968589d8 496 * generation.
Kojto 90:cb3d968589d8 497 */
Kojto 90:cb3d968589d8 498 /*@{*/
Kojto 90:cb3d968589d8 499 #define BP_CRC_DATA_LL (0U) /*!< Bit position for CRC_DATA_LL. */
Kojto 90:cb3d968589d8 500 #define BM_CRC_DATA_LL (0x000000FFU) /*!< Bit mask for CRC_DATA_LL. */
Kojto 90:cb3d968589d8 501 #define BS_CRC_DATA_LL (8U) /*!< Bit field size in bits for CRC_DATA_LL. */
Kojto 90:cb3d968589d8 502
Kojto 90:cb3d968589d8 503 /*! @brief Read current value of the CRC_DATA_LL field. */
Kojto 90:cb3d968589d8 504 #define BR_CRC_DATA_LL(x) (HW_CRC_DATA(x).B.LL)
Kojto 90:cb3d968589d8 505
Kojto 90:cb3d968589d8 506 /*! @brief Format value for bitfield CRC_DATA_LL. */
Kojto 90:cb3d968589d8 507 #define BF_CRC_DATA_LL(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_LL) & BM_CRC_DATA_LL)
Kojto 90:cb3d968589d8 508
Kojto 90:cb3d968589d8 509 /*! @brief Set the LL field to a new value. */
Kojto 90:cb3d968589d8 510 #define BW_CRC_DATA_LL(x, v) (HW_CRC_DATA_WR(x, (HW_CRC_DATA_RD(x) & ~BM_CRC_DATA_LL) | BF_CRC_DATA_LL(v)))
Kojto 90:cb3d968589d8 511 /*@}*/
Kojto 90:cb3d968589d8 512
Kojto 90:cb3d968589d8 513 /*!
Kojto 90:cb3d968589d8 514 * @name Register CRC_DATA, field LU[15:8] (RW)
Kojto 90:cb3d968589d8 515 *
Kojto 90:cb3d968589d8 516 * When CTRL[WAS] is 1, values written to this field are part of the seed value.
Kojto 90:cb3d968589d8 517 * When CTRL[WAS] is 0, data written to this field is used for CRC checksum
Kojto 90:cb3d968589d8 518 * generation.
Kojto 90:cb3d968589d8 519 */
Kojto 90:cb3d968589d8 520 /*@{*/
Kojto 90:cb3d968589d8 521 #define BP_CRC_DATA_LU (8U) /*!< Bit position for CRC_DATA_LU. */
Kojto 90:cb3d968589d8 522 #define BM_CRC_DATA_LU (0x0000FF00U) /*!< Bit mask for CRC_DATA_LU. */
Kojto 90:cb3d968589d8 523 #define BS_CRC_DATA_LU (8U) /*!< Bit field size in bits for CRC_DATA_LU. */
Kojto 90:cb3d968589d8 524
Kojto 90:cb3d968589d8 525 /*! @brief Read current value of the CRC_DATA_LU field. */
Kojto 90:cb3d968589d8 526 #define BR_CRC_DATA_LU(x) (HW_CRC_DATA(x).B.LU)
Kojto 90:cb3d968589d8 527
Kojto 90:cb3d968589d8 528 /*! @brief Format value for bitfield CRC_DATA_LU. */
Kojto 90:cb3d968589d8 529 #define BF_CRC_DATA_LU(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_LU) & BM_CRC_DATA_LU)
Kojto 90:cb3d968589d8 530
Kojto 90:cb3d968589d8 531 /*! @brief Set the LU field to a new value. */
Kojto 90:cb3d968589d8 532 #define BW_CRC_DATA_LU(x, v) (HW_CRC_DATA_WR(x, (HW_CRC_DATA_RD(x) & ~BM_CRC_DATA_LU) | BF_CRC_DATA_LU(v)))
Kojto 90:cb3d968589d8 533 /*@}*/
Kojto 90:cb3d968589d8 534
Kojto 90:cb3d968589d8 535 /*!
Kojto 90:cb3d968589d8 536 * @name Register CRC_DATA, field HL[23:16] (RW)
Kojto 90:cb3d968589d8 537 *
Kojto 90:cb3d968589d8 538 * In 16-bit CRC mode (CTRL[TCRC] is 0), this field is not used for programming
Kojto 90:cb3d968589d8 539 * a seed value. In 32-bit CRC mode (CTRL[TCRC] is 1), values written to this
Kojto 90:cb3d968589d8 540 * field are part of the seed value when CTRL[WAS] is 1. When CTRL[WAS] is 0, data
Kojto 90:cb3d968589d8 541 * written to this field is used for CRC checksum generation in both 16-bit and
Kojto 90:cb3d968589d8 542 * 32-bit CRC modes.
Kojto 90:cb3d968589d8 543 */
Kojto 90:cb3d968589d8 544 /*@{*/
Kojto 90:cb3d968589d8 545 #define BP_CRC_DATA_HL (16U) /*!< Bit position for CRC_DATA_HL. */
Kojto 90:cb3d968589d8 546 #define BM_CRC_DATA_HL (0x00FF0000U) /*!< Bit mask for CRC_DATA_HL. */
Kojto 90:cb3d968589d8 547 #define BS_CRC_DATA_HL (8U) /*!< Bit field size in bits for CRC_DATA_HL. */
Kojto 90:cb3d968589d8 548
Kojto 90:cb3d968589d8 549 /*! @brief Read current value of the CRC_DATA_HL field. */
Kojto 90:cb3d968589d8 550 #define BR_CRC_DATA_HL(x) (HW_CRC_DATA(x).B.HL)
Kojto 90:cb3d968589d8 551
Kojto 90:cb3d968589d8 552 /*! @brief Format value for bitfield CRC_DATA_HL. */
Kojto 90:cb3d968589d8 553 #define BF_CRC_DATA_HL(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_HL) & BM_CRC_DATA_HL)
Kojto 90:cb3d968589d8 554
Kojto 90:cb3d968589d8 555 /*! @brief Set the HL field to a new value. */
Kojto 90:cb3d968589d8 556 #define BW_CRC_DATA_HL(x, v) (HW_CRC_DATA_WR(x, (HW_CRC_DATA_RD(x) & ~BM_CRC_DATA_HL) | BF_CRC_DATA_HL(v)))
Kojto 90:cb3d968589d8 557 /*@}*/
Kojto 90:cb3d968589d8 558
Kojto 90:cb3d968589d8 559 /*!
Kojto 90:cb3d968589d8 560 * @name Register CRC_DATA, field HU[31:24] (RW)
Kojto 90:cb3d968589d8 561 *
Kojto 90:cb3d968589d8 562 * In 16-bit CRC mode (CTRL[TCRC] is 0), this field is not used for programming
Kojto 90:cb3d968589d8 563 * a seed value. In 32-bit CRC mode (CTRL[TCRC] is 1), values written to this
Kojto 90:cb3d968589d8 564 * field are part of the seed value when CTRL[WAS] is 1. When CTRL[WAS] is 0, data
Kojto 90:cb3d968589d8 565 * written to this field is used for CRC checksum generation in both 16-bit and
Kojto 90:cb3d968589d8 566 * 32-bit CRC modes.
Kojto 90:cb3d968589d8 567 */
Kojto 90:cb3d968589d8 568 /*@{*/
Kojto 90:cb3d968589d8 569 #define BP_CRC_DATA_HU (24U) /*!< Bit position for CRC_DATA_HU. */
Kojto 90:cb3d968589d8 570 #define BM_CRC_DATA_HU (0xFF000000U) /*!< Bit mask for CRC_DATA_HU. */
Kojto 90:cb3d968589d8 571 #define BS_CRC_DATA_HU (8U) /*!< Bit field size in bits for CRC_DATA_HU. */
Kojto 90:cb3d968589d8 572
Kojto 90:cb3d968589d8 573 /*! @brief Read current value of the CRC_DATA_HU field. */
Kojto 90:cb3d968589d8 574 #define BR_CRC_DATA_HU(x) (HW_CRC_DATA(x).B.HU)
Kojto 90:cb3d968589d8 575
Kojto 90:cb3d968589d8 576 /*! @brief Format value for bitfield CRC_DATA_HU. */
Kojto 90:cb3d968589d8 577 #define BF_CRC_DATA_HU(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_HU) & BM_CRC_DATA_HU)
Kojto 90:cb3d968589d8 578
Kojto 90:cb3d968589d8 579 /*! @brief Set the HU field to a new value. */
Kojto 90:cb3d968589d8 580 #define BW_CRC_DATA_HU(x, v) (HW_CRC_DATA_WR(x, (HW_CRC_DATA_RD(x) & ~BM_CRC_DATA_HU) | BF_CRC_DATA_HU(v)))
Kojto 90:cb3d968589d8 581 /*@}*/
Kojto 90:cb3d968589d8 582
Kojto 90:cb3d968589d8 583 /*******************************************************************************
Kojto 90:cb3d968589d8 584 * HW_CRC_GPOLY - CRC Polynomial register
Kojto 90:cb3d968589d8 585 ******************************************************************************/
Kojto 90:cb3d968589d8 586
Kojto 90:cb3d968589d8 587 /*!
Kojto 90:cb3d968589d8 588 * @brief HW_CRC_GPOLY - CRC Polynomial register (RW)
Kojto 90:cb3d968589d8 589 *
Kojto 90:cb3d968589d8 590 * Reset value: 0x00001021U
Kojto 90:cb3d968589d8 591 *
Kojto 90:cb3d968589d8 592 * This register contains the value of the polynomial for the CRC calculation.
Kojto 90:cb3d968589d8 593 * The HIGH field contains the upper 16 bits of the CRC polynomial, which are used
Kojto 90:cb3d968589d8 594 * only in 32-bit CRC mode. Writes to the HIGH field are ignored in 16-bit CRC
Kojto 90:cb3d968589d8 595 * mode. The LOW field contains the lower 16 bits of the CRC polynomial, which are
Kojto 90:cb3d968589d8 596 * used in both 16- and 32-bit CRC modes.
Kojto 90:cb3d968589d8 597 */
Kojto 90:cb3d968589d8 598 typedef union _hw_crc_gpoly
Kojto 90:cb3d968589d8 599 {
Kojto 90:cb3d968589d8 600 uint32_t U;
Kojto 90:cb3d968589d8 601 struct _hw_crc_gpoly_bitfields
Kojto 90:cb3d968589d8 602 {
Kojto 90:cb3d968589d8 603 uint32_t LOW : 16; /*!< [15:0] Low Polynominal Half-word */
Kojto 90:cb3d968589d8 604 uint32_t HIGH : 16; /*!< [31:16] High Polynominal Half-word */
Kojto 90:cb3d968589d8 605 } B;
Kojto 90:cb3d968589d8 606 } hw_crc_gpoly_t;
Kojto 90:cb3d968589d8 607
Kojto 90:cb3d968589d8 608 /*!
Kojto 90:cb3d968589d8 609 * @name Constants and macros for entire CRC_GPOLY register
Kojto 90:cb3d968589d8 610 */
Kojto 90:cb3d968589d8 611 /*@{*/
Kojto 90:cb3d968589d8 612 #define HW_CRC_GPOLY_ADDR(x) ((x) + 0x4U)
Kojto 90:cb3d968589d8 613
Kojto 90:cb3d968589d8 614 #define HW_CRC_GPOLY(x) (*(__IO hw_crc_gpoly_t *) HW_CRC_GPOLY_ADDR(x))
Kojto 90:cb3d968589d8 615 #define HW_CRC_GPOLY_RD(x) (HW_CRC_GPOLY(x).U)
Kojto 90:cb3d968589d8 616 #define HW_CRC_GPOLY_WR(x, v) (HW_CRC_GPOLY(x).U = (v))
Kojto 90:cb3d968589d8 617 #define HW_CRC_GPOLY_SET(x, v) (HW_CRC_GPOLY_WR(x, HW_CRC_GPOLY_RD(x) | (v)))
Kojto 90:cb3d968589d8 618 #define HW_CRC_GPOLY_CLR(x, v) (HW_CRC_GPOLY_WR(x, HW_CRC_GPOLY_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 619 #define HW_CRC_GPOLY_TOG(x, v) (HW_CRC_GPOLY_WR(x, HW_CRC_GPOLY_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 620 /*@}*/
Kojto 90:cb3d968589d8 621
Kojto 90:cb3d968589d8 622 /*
Kojto 90:cb3d968589d8 623 * Constants & macros for individual CRC_GPOLY bitfields
Kojto 90:cb3d968589d8 624 */
Kojto 90:cb3d968589d8 625
Kojto 90:cb3d968589d8 626 /*!
Kojto 90:cb3d968589d8 627 * @name Register CRC_GPOLY, field LOW[15:0] (RW)
Kojto 90:cb3d968589d8 628 *
Kojto 90:cb3d968589d8 629 * Writable and readable in both 32-bit and 16-bit CRC modes.
Kojto 90:cb3d968589d8 630 */
Kojto 90:cb3d968589d8 631 /*@{*/
Kojto 90:cb3d968589d8 632 #define BP_CRC_GPOLY_LOW (0U) /*!< Bit position for CRC_GPOLY_LOW. */
Kojto 90:cb3d968589d8 633 #define BM_CRC_GPOLY_LOW (0x0000FFFFU) /*!< Bit mask for CRC_GPOLY_LOW. */
Kojto 90:cb3d968589d8 634 #define BS_CRC_GPOLY_LOW (16U) /*!< Bit field size in bits for CRC_GPOLY_LOW. */
Kojto 90:cb3d968589d8 635
Kojto 90:cb3d968589d8 636 /*! @brief Read current value of the CRC_GPOLY_LOW field. */
Kojto 90:cb3d968589d8 637 #define BR_CRC_GPOLY_LOW(x) (HW_CRC_GPOLY(x).B.LOW)
Kojto 90:cb3d968589d8 638
Kojto 90:cb3d968589d8 639 /*! @brief Format value for bitfield CRC_GPOLY_LOW. */
Kojto 90:cb3d968589d8 640 #define BF_CRC_GPOLY_LOW(v) ((uint32_t)((uint32_t)(v) << BP_CRC_GPOLY_LOW) & BM_CRC_GPOLY_LOW)
Kojto 90:cb3d968589d8 641
Kojto 90:cb3d968589d8 642 /*! @brief Set the LOW field to a new value. */
Kojto 90:cb3d968589d8 643 #define BW_CRC_GPOLY_LOW(x, v) (HW_CRC_GPOLY_WR(x, (HW_CRC_GPOLY_RD(x) & ~BM_CRC_GPOLY_LOW) | BF_CRC_GPOLY_LOW(v)))
Kojto 90:cb3d968589d8 644 /*@}*/
Kojto 90:cb3d968589d8 645
Kojto 90:cb3d968589d8 646 /*!
Kojto 90:cb3d968589d8 647 * @name Register CRC_GPOLY, field HIGH[31:16] (RW)
Kojto 90:cb3d968589d8 648 *
Kojto 90:cb3d968589d8 649 * Writable and readable in 32-bit CRC mode (CTRL[TCRC] is 1). This field is not
Kojto 90:cb3d968589d8 650 * writable in 16-bit CRC mode (CTRL[TCRC] is 0).
Kojto 90:cb3d968589d8 651 */
Kojto 90:cb3d968589d8 652 /*@{*/
Kojto 90:cb3d968589d8 653 #define BP_CRC_GPOLY_HIGH (16U) /*!< Bit position for CRC_GPOLY_HIGH. */
Kojto 90:cb3d968589d8 654 #define BM_CRC_GPOLY_HIGH (0xFFFF0000U) /*!< Bit mask for CRC_GPOLY_HIGH. */
Kojto 90:cb3d968589d8 655 #define BS_CRC_GPOLY_HIGH (16U) /*!< Bit field size in bits for CRC_GPOLY_HIGH. */
Kojto 90:cb3d968589d8 656
Kojto 90:cb3d968589d8 657 /*! @brief Read current value of the CRC_GPOLY_HIGH field. */
Kojto 90:cb3d968589d8 658 #define BR_CRC_GPOLY_HIGH(x) (HW_CRC_GPOLY(x).B.HIGH)
Kojto 90:cb3d968589d8 659
Kojto 90:cb3d968589d8 660 /*! @brief Format value for bitfield CRC_GPOLY_HIGH. */
Kojto 90:cb3d968589d8 661 #define BF_CRC_GPOLY_HIGH(v) ((uint32_t)((uint32_t)(v) << BP_CRC_GPOLY_HIGH) & BM_CRC_GPOLY_HIGH)
Kojto 90:cb3d968589d8 662
Kojto 90:cb3d968589d8 663 /*! @brief Set the HIGH field to a new value. */
Kojto 90:cb3d968589d8 664 #define BW_CRC_GPOLY_HIGH(x, v) (HW_CRC_GPOLY_WR(x, (HW_CRC_GPOLY_RD(x) & ~BM_CRC_GPOLY_HIGH) | BF_CRC_GPOLY_HIGH(v)))
Kojto 90:cb3d968589d8 665 /*@}*/
Kojto 90:cb3d968589d8 666 /*******************************************************************************
Kojto 90:cb3d968589d8 667 * HW_CRC_GPOLYL - CRC_GPOLYL register.
Kojto 90:cb3d968589d8 668 ******************************************************************************/
Kojto 90:cb3d968589d8 669
Kojto 90:cb3d968589d8 670 /*!
Kojto 90:cb3d968589d8 671 * @brief HW_CRC_GPOLYL - CRC_GPOLYL register. (RW)
Kojto 90:cb3d968589d8 672 *
Kojto 90:cb3d968589d8 673 * Reset value: 0xFFFFU
Kojto 90:cb3d968589d8 674 */
Kojto 90:cb3d968589d8 675 typedef union _hw_crc_gpolyl
Kojto 90:cb3d968589d8 676 {
Kojto 90:cb3d968589d8 677 uint16_t U;
Kojto 90:cb3d968589d8 678 struct _hw_crc_gpolyl_bitfields
Kojto 90:cb3d968589d8 679 {
Kojto 90:cb3d968589d8 680 uint16_t GPOLYL : 16; /*!< [15:0] POLYL stores the lower 16 bits of
Kojto 90:cb3d968589d8 681 * the 16/32 bit CRC polynomial value */
Kojto 90:cb3d968589d8 682 } B;
Kojto 90:cb3d968589d8 683 } hw_crc_gpolyl_t;
Kojto 90:cb3d968589d8 684
Kojto 90:cb3d968589d8 685 /*!
Kojto 90:cb3d968589d8 686 * @name Constants and macros for entire CRC_GPOLYL register
Kojto 90:cb3d968589d8 687 */
Kojto 90:cb3d968589d8 688 /*@{*/
Kojto 90:cb3d968589d8 689 #define HW_CRC_GPOLYL_ADDR(x) ((x) + 0x4U)
Kojto 90:cb3d968589d8 690
Kojto 90:cb3d968589d8 691 #define HW_CRC_GPOLYL(x) (*(__IO hw_crc_gpolyl_t *) HW_CRC_GPOLYL_ADDR(x))
Kojto 90:cb3d968589d8 692 #define HW_CRC_GPOLYL_RD(x) (HW_CRC_GPOLYL(x).U)
Kojto 90:cb3d968589d8 693 #define HW_CRC_GPOLYL_WR(x, v) (HW_CRC_GPOLYL(x).U = (v))
Kojto 90:cb3d968589d8 694 #define HW_CRC_GPOLYL_SET(x, v) (HW_CRC_GPOLYL_WR(x, HW_CRC_GPOLYL_RD(x) | (v)))
Kojto 90:cb3d968589d8 695 #define HW_CRC_GPOLYL_CLR(x, v) (HW_CRC_GPOLYL_WR(x, HW_CRC_GPOLYL_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 696 #define HW_CRC_GPOLYL_TOG(x, v) (HW_CRC_GPOLYL_WR(x, HW_CRC_GPOLYL_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 697 /*@}*/
Kojto 90:cb3d968589d8 698
Kojto 90:cb3d968589d8 699 /*
Kojto 90:cb3d968589d8 700 * Constants & macros for individual CRC_GPOLYL bitfields
Kojto 90:cb3d968589d8 701 */
Kojto 90:cb3d968589d8 702
Kojto 90:cb3d968589d8 703 /*!
Kojto 90:cb3d968589d8 704 * @name Register CRC_GPOLYL, field GPOLYL[15:0] (RW)
Kojto 90:cb3d968589d8 705 */
Kojto 90:cb3d968589d8 706 /*@{*/
Kojto 90:cb3d968589d8 707 #define BP_CRC_GPOLYL_GPOLYL (0U) /*!< Bit position for CRC_GPOLYL_GPOLYL. */
Kojto 90:cb3d968589d8 708 #define BM_CRC_GPOLYL_GPOLYL (0xFFFFU) /*!< Bit mask for CRC_GPOLYL_GPOLYL. */
Kojto 90:cb3d968589d8 709 #define BS_CRC_GPOLYL_GPOLYL (16U) /*!< Bit field size in bits for CRC_GPOLYL_GPOLYL. */
Kojto 90:cb3d968589d8 710
Kojto 90:cb3d968589d8 711 /*! @brief Read current value of the CRC_GPOLYL_GPOLYL field. */
Kojto 90:cb3d968589d8 712 #define BR_CRC_GPOLYL_GPOLYL(x) (HW_CRC_GPOLYL(x).U)
Kojto 90:cb3d968589d8 713
Kojto 90:cb3d968589d8 714 /*! @brief Format value for bitfield CRC_GPOLYL_GPOLYL. */
Kojto 90:cb3d968589d8 715 #define BF_CRC_GPOLYL_GPOLYL(v) ((uint16_t)((uint16_t)(v) << BP_CRC_GPOLYL_GPOLYL) & BM_CRC_GPOLYL_GPOLYL)
Kojto 90:cb3d968589d8 716
Kojto 90:cb3d968589d8 717 /*! @brief Set the GPOLYL field to a new value. */
Kojto 90:cb3d968589d8 718 #define BW_CRC_GPOLYL_GPOLYL(x, v) (HW_CRC_GPOLYL_WR(x, v))
Kojto 90:cb3d968589d8 719 /*@}*/
Kojto 90:cb3d968589d8 720 /*******************************************************************************
Kojto 90:cb3d968589d8 721 * HW_CRC_GPOLYH - CRC_GPOLYH register.
Kojto 90:cb3d968589d8 722 ******************************************************************************/
Kojto 90:cb3d968589d8 723
Kojto 90:cb3d968589d8 724 /*!
Kojto 90:cb3d968589d8 725 * @brief HW_CRC_GPOLYH - CRC_GPOLYH register. (RW)
Kojto 90:cb3d968589d8 726 *
Kojto 90:cb3d968589d8 727 * Reset value: 0xFFFFU
Kojto 90:cb3d968589d8 728 */
Kojto 90:cb3d968589d8 729 typedef union _hw_crc_gpolyh
Kojto 90:cb3d968589d8 730 {
Kojto 90:cb3d968589d8 731 uint16_t U;
Kojto 90:cb3d968589d8 732 struct _hw_crc_gpolyh_bitfields
Kojto 90:cb3d968589d8 733 {
Kojto 90:cb3d968589d8 734 uint16_t GPOLYH : 16; /*!< [15:0] POLYH stores the high 16 bits of
Kojto 90:cb3d968589d8 735 * the 16/32 bit CRC polynomial value */
Kojto 90:cb3d968589d8 736 } B;
Kojto 90:cb3d968589d8 737 } hw_crc_gpolyh_t;
Kojto 90:cb3d968589d8 738
Kojto 90:cb3d968589d8 739 /*!
Kojto 90:cb3d968589d8 740 * @name Constants and macros for entire CRC_GPOLYH register
Kojto 90:cb3d968589d8 741 */
Kojto 90:cb3d968589d8 742 /*@{*/
Kojto 90:cb3d968589d8 743 #define HW_CRC_GPOLYH_ADDR(x) ((x) + 0x6U)
Kojto 90:cb3d968589d8 744
Kojto 90:cb3d968589d8 745 #define HW_CRC_GPOLYH(x) (*(__IO hw_crc_gpolyh_t *) HW_CRC_GPOLYH_ADDR(x))
Kojto 90:cb3d968589d8 746 #define HW_CRC_GPOLYH_RD(x) (HW_CRC_GPOLYH(x).U)
Kojto 90:cb3d968589d8 747 #define HW_CRC_GPOLYH_WR(x, v) (HW_CRC_GPOLYH(x).U = (v))
Kojto 90:cb3d968589d8 748 #define HW_CRC_GPOLYH_SET(x, v) (HW_CRC_GPOLYH_WR(x, HW_CRC_GPOLYH_RD(x) | (v)))
Kojto 90:cb3d968589d8 749 #define HW_CRC_GPOLYH_CLR(x, v) (HW_CRC_GPOLYH_WR(x, HW_CRC_GPOLYH_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 750 #define HW_CRC_GPOLYH_TOG(x, v) (HW_CRC_GPOLYH_WR(x, HW_CRC_GPOLYH_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 751 /*@}*/
Kojto 90:cb3d968589d8 752
Kojto 90:cb3d968589d8 753 /*
Kojto 90:cb3d968589d8 754 * Constants & macros for individual CRC_GPOLYH bitfields
Kojto 90:cb3d968589d8 755 */
Kojto 90:cb3d968589d8 756
Kojto 90:cb3d968589d8 757 /*!
Kojto 90:cb3d968589d8 758 * @name Register CRC_GPOLYH, field GPOLYH[15:0] (RW)
Kojto 90:cb3d968589d8 759 */
Kojto 90:cb3d968589d8 760 /*@{*/
Kojto 90:cb3d968589d8 761 #define BP_CRC_GPOLYH_GPOLYH (0U) /*!< Bit position for CRC_GPOLYH_GPOLYH. */
Kojto 90:cb3d968589d8 762 #define BM_CRC_GPOLYH_GPOLYH (0xFFFFU) /*!< Bit mask for CRC_GPOLYH_GPOLYH. */
Kojto 90:cb3d968589d8 763 #define BS_CRC_GPOLYH_GPOLYH (16U) /*!< Bit field size in bits for CRC_GPOLYH_GPOLYH. */
Kojto 90:cb3d968589d8 764
Kojto 90:cb3d968589d8 765 /*! @brief Read current value of the CRC_GPOLYH_GPOLYH field. */
Kojto 90:cb3d968589d8 766 #define BR_CRC_GPOLYH_GPOLYH(x) (HW_CRC_GPOLYH(x).U)
Kojto 90:cb3d968589d8 767
Kojto 90:cb3d968589d8 768 /*! @brief Format value for bitfield CRC_GPOLYH_GPOLYH. */
Kojto 90:cb3d968589d8 769 #define BF_CRC_GPOLYH_GPOLYH(v) ((uint16_t)((uint16_t)(v) << BP_CRC_GPOLYH_GPOLYH) & BM_CRC_GPOLYH_GPOLYH)
Kojto 90:cb3d968589d8 770
Kojto 90:cb3d968589d8 771 /*! @brief Set the GPOLYH field to a new value. */
Kojto 90:cb3d968589d8 772 #define BW_CRC_GPOLYH_GPOLYH(x, v) (HW_CRC_GPOLYH_WR(x, v))
Kojto 90:cb3d968589d8 773 /*@}*/
Kojto 90:cb3d968589d8 774 /*******************************************************************************
Kojto 90:cb3d968589d8 775 * HW_CRC_GPOLYLL - CRC_GPOLYLL register.
Kojto 90:cb3d968589d8 776 ******************************************************************************/
Kojto 90:cb3d968589d8 777
Kojto 90:cb3d968589d8 778 /*!
Kojto 90:cb3d968589d8 779 * @brief HW_CRC_GPOLYLL - CRC_GPOLYLL register. (RW)
Kojto 90:cb3d968589d8 780 *
Kojto 90:cb3d968589d8 781 * Reset value: 0xFFU
Kojto 90:cb3d968589d8 782 */
Kojto 90:cb3d968589d8 783 typedef union _hw_crc_gpolyll
Kojto 90:cb3d968589d8 784 {
Kojto 90:cb3d968589d8 785 uint8_t U;
Kojto 90:cb3d968589d8 786 struct _hw_crc_gpolyll_bitfields
Kojto 90:cb3d968589d8 787 {
Kojto 90:cb3d968589d8 788 uint8_t GPOLYLL : 8; /*!< [7:0] POLYLL stores the first 8 bits of the
Kojto 90:cb3d968589d8 789 * 32 bit CRC */
Kojto 90:cb3d968589d8 790 } B;
Kojto 90:cb3d968589d8 791 } hw_crc_gpolyll_t;
Kojto 90:cb3d968589d8 792
Kojto 90:cb3d968589d8 793 /*!
Kojto 90:cb3d968589d8 794 * @name Constants and macros for entire CRC_GPOLYLL register
Kojto 90:cb3d968589d8 795 */
Kojto 90:cb3d968589d8 796 /*@{*/
Kojto 90:cb3d968589d8 797 #define HW_CRC_GPOLYLL_ADDR(x) ((x) + 0x4U)
Kojto 90:cb3d968589d8 798
Kojto 90:cb3d968589d8 799 #define HW_CRC_GPOLYLL(x) (*(__IO hw_crc_gpolyll_t *) HW_CRC_GPOLYLL_ADDR(x))
Kojto 90:cb3d968589d8 800 #define HW_CRC_GPOLYLL_RD(x) (HW_CRC_GPOLYLL(x).U)
Kojto 90:cb3d968589d8 801 #define HW_CRC_GPOLYLL_WR(x, v) (HW_CRC_GPOLYLL(x).U = (v))
Kojto 90:cb3d968589d8 802 #define HW_CRC_GPOLYLL_SET(x, v) (HW_CRC_GPOLYLL_WR(x, HW_CRC_GPOLYLL_RD(x) | (v)))
Kojto 90:cb3d968589d8 803 #define HW_CRC_GPOLYLL_CLR(x, v) (HW_CRC_GPOLYLL_WR(x, HW_CRC_GPOLYLL_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 804 #define HW_CRC_GPOLYLL_TOG(x, v) (HW_CRC_GPOLYLL_WR(x, HW_CRC_GPOLYLL_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 805 /*@}*/
Kojto 90:cb3d968589d8 806
Kojto 90:cb3d968589d8 807 /*
Kojto 90:cb3d968589d8 808 * Constants & macros for individual CRC_GPOLYLL bitfields
Kojto 90:cb3d968589d8 809 */
Kojto 90:cb3d968589d8 810
Kojto 90:cb3d968589d8 811 /*!
Kojto 90:cb3d968589d8 812 * @name Register CRC_GPOLYLL, field GPOLYLL[7:0] (RW)
Kojto 90:cb3d968589d8 813 */
Kojto 90:cb3d968589d8 814 /*@{*/
Kojto 90:cb3d968589d8 815 #define BP_CRC_GPOLYLL_GPOLYLL (0U) /*!< Bit position for CRC_GPOLYLL_GPOLYLL. */
Kojto 90:cb3d968589d8 816 #define BM_CRC_GPOLYLL_GPOLYLL (0xFFU) /*!< Bit mask for CRC_GPOLYLL_GPOLYLL. */
Kojto 90:cb3d968589d8 817 #define BS_CRC_GPOLYLL_GPOLYLL (8U) /*!< Bit field size in bits for CRC_GPOLYLL_GPOLYLL. */
Kojto 90:cb3d968589d8 818
Kojto 90:cb3d968589d8 819 /*! @brief Read current value of the CRC_GPOLYLL_GPOLYLL field. */
Kojto 90:cb3d968589d8 820 #define BR_CRC_GPOLYLL_GPOLYLL(x) (HW_CRC_GPOLYLL(x).U)
Kojto 90:cb3d968589d8 821
Kojto 90:cb3d968589d8 822 /*! @brief Format value for bitfield CRC_GPOLYLL_GPOLYLL. */
Kojto 90:cb3d968589d8 823 #define BF_CRC_GPOLYLL_GPOLYLL(v) ((uint8_t)((uint8_t)(v) << BP_CRC_GPOLYLL_GPOLYLL) & BM_CRC_GPOLYLL_GPOLYLL)
Kojto 90:cb3d968589d8 824
Kojto 90:cb3d968589d8 825 /*! @brief Set the GPOLYLL field to a new value. */
Kojto 90:cb3d968589d8 826 #define BW_CRC_GPOLYLL_GPOLYLL(x, v) (HW_CRC_GPOLYLL_WR(x, v))
Kojto 90:cb3d968589d8 827 /*@}*/
Kojto 90:cb3d968589d8 828 /*******************************************************************************
Kojto 90:cb3d968589d8 829 * HW_CRC_GPOLYLU - CRC_GPOLYLU register.
Kojto 90:cb3d968589d8 830 ******************************************************************************/
Kojto 90:cb3d968589d8 831
Kojto 90:cb3d968589d8 832 /*!
Kojto 90:cb3d968589d8 833 * @brief HW_CRC_GPOLYLU - CRC_GPOLYLU register. (RW)
Kojto 90:cb3d968589d8 834 *
Kojto 90:cb3d968589d8 835 * Reset value: 0xFFU
Kojto 90:cb3d968589d8 836 */
Kojto 90:cb3d968589d8 837 typedef union _hw_crc_gpolylu
Kojto 90:cb3d968589d8 838 {
Kojto 90:cb3d968589d8 839 uint8_t U;
Kojto 90:cb3d968589d8 840 struct _hw_crc_gpolylu_bitfields
Kojto 90:cb3d968589d8 841 {
Kojto 90:cb3d968589d8 842 uint8_t GPOLYLU : 8; /*!< [7:0] POLYLL stores the second 8 bits of
Kojto 90:cb3d968589d8 843 * the 32 bit CRC */
Kojto 90:cb3d968589d8 844 } B;
Kojto 90:cb3d968589d8 845 } hw_crc_gpolylu_t;
Kojto 90:cb3d968589d8 846
Kojto 90:cb3d968589d8 847 /*!
Kojto 90:cb3d968589d8 848 * @name Constants and macros for entire CRC_GPOLYLU register
Kojto 90:cb3d968589d8 849 */
Kojto 90:cb3d968589d8 850 /*@{*/
Kojto 90:cb3d968589d8 851 #define HW_CRC_GPOLYLU_ADDR(x) ((x) + 0x5U)
Kojto 90:cb3d968589d8 852
Kojto 90:cb3d968589d8 853 #define HW_CRC_GPOLYLU(x) (*(__IO hw_crc_gpolylu_t *) HW_CRC_GPOLYLU_ADDR(x))
Kojto 90:cb3d968589d8 854 #define HW_CRC_GPOLYLU_RD(x) (HW_CRC_GPOLYLU(x).U)
Kojto 90:cb3d968589d8 855 #define HW_CRC_GPOLYLU_WR(x, v) (HW_CRC_GPOLYLU(x).U = (v))
Kojto 90:cb3d968589d8 856 #define HW_CRC_GPOLYLU_SET(x, v) (HW_CRC_GPOLYLU_WR(x, HW_CRC_GPOLYLU_RD(x) | (v)))
Kojto 90:cb3d968589d8 857 #define HW_CRC_GPOLYLU_CLR(x, v) (HW_CRC_GPOLYLU_WR(x, HW_CRC_GPOLYLU_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 858 #define HW_CRC_GPOLYLU_TOG(x, v) (HW_CRC_GPOLYLU_WR(x, HW_CRC_GPOLYLU_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 859 /*@}*/
Kojto 90:cb3d968589d8 860
Kojto 90:cb3d968589d8 861 /*
Kojto 90:cb3d968589d8 862 * Constants & macros for individual CRC_GPOLYLU bitfields
Kojto 90:cb3d968589d8 863 */
Kojto 90:cb3d968589d8 864
Kojto 90:cb3d968589d8 865 /*!
Kojto 90:cb3d968589d8 866 * @name Register CRC_GPOLYLU, field GPOLYLU[7:0] (RW)
Kojto 90:cb3d968589d8 867 */
Kojto 90:cb3d968589d8 868 /*@{*/
Kojto 90:cb3d968589d8 869 #define BP_CRC_GPOLYLU_GPOLYLU (0U) /*!< Bit position for CRC_GPOLYLU_GPOLYLU. */
Kojto 90:cb3d968589d8 870 #define BM_CRC_GPOLYLU_GPOLYLU (0xFFU) /*!< Bit mask for CRC_GPOLYLU_GPOLYLU. */
Kojto 90:cb3d968589d8 871 #define BS_CRC_GPOLYLU_GPOLYLU (8U) /*!< Bit field size in bits for CRC_GPOLYLU_GPOLYLU. */
Kojto 90:cb3d968589d8 872
Kojto 90:cb3d968589d8 873 /*! @brief Read current value of the CRC_GPOLYLU_GPOLYLU field. */
Kojto 90:cb3d968589d8 874 #define BR_CRC_GPOLYLU_GPOLYLU(x) (HW_CRC_GPOLYLU(x).U)
Kojto 90:cb3d968589d8 875
Kojto 90:cb3d968589d8 876 /*! @brief Format value for bitfield CRC_GPOLYLU_GPOLYLU. */
Kojto 90:cb3d968589d8 877 #define BF_CRC_GPOLYLU_GPOLYLU(v) ((uint8_t)((uint8_t)(v) << BP_CRC_GPOLYLU_GPOLYLU) & BM_CRC_GPOLYLU_GPOLYLU)
Kojto 90:cb3d968589d8 878
Kojto 90:cb3d968589d8 879 /*! @brief Set the GPOLYLU field to a new value. */
Kojto 90:cb3d968589d8 880 #define BW_CRC_GPOLYLU_GPOLYLU(x, v) (HW_CRC_GPOLYLU_WR(x, v))
Kojto 90:cb3d968589d8 881 /*@}*/
Kojto 90:cb3d968589d8 882 /*******************************************************************************
Kojto 90:cb3d968589d8 883 * HW_CRC_GPOLYHL - CRC_GPOLYHL register.
Kojto 90:cb3d968589d8 884 ******************************************************************************/
Kojto 90:cb3d968589d8 885
Kojto 90:cb3d968589d8 886 /*!
Kojto 90:cb3d968589d8 887 * @brief HW_CRC_GPOLYHL - CRC_GPOLYHL register. (RW)
Kojto 90:cb3d968589d8 888 *
Kojto 90:cb3d968589d8 889 * Reset value: 0xFFU
Kojto 90:cb3d968589d8 890 */
Kojto 90:cb3d968589d8 891 typedef union _hw_crc_gpolyhl
Kojto 90:cb3d968589d8 892 {
Kojto 90:cb3d968589d8 893 uint8_t U;
Kojto 90:cb3d968589d8 894 struct _hw_crc_gpolyhl_bitfields
Kojto 90:cb3d968589d8 895 {
Kojto 90:cb3d968589d8 896 uint8_t GPOLYHL : 8; /*!< [7:0] POLYHL stores the third 8 bits of the
Kojto 90:cb3d968589d8 897 * 32 bit CRC */
Kojto 90:cb3d968589d8 898 } B;
Kojto 90:cb3d968589d8 899 } hw_crc_gpolyhl_t;
Kojto 90:cb3d968589d8 900
Kojto 90:cb3d968589d8 901 /*!
Kojto 90:cb3d968589d8 902 * @name Constants and macros for entire CRC_GPOLYHL register
Kojto 90:cb3d968589d8 903 */
Kojto 90:cb3d968589d8 904 /*@{*/
Kojto 90:cb3d968589d8 905 #define HW_CRC_GPOLYHL_ADDR(x) ((x) + 0x6U)
Kojto 90:cb3d968589d8 906
Kojto 90:cb3d968589d8 907 #define HW_CRC_GPOLYHL(x) (*(__IO hw_crc_gpolyhl_t *) HW_CRC_GPOLYHL_ADDR(x))
Kojto 90:cb3d968589d8 908 #define HW_CRC_GPOLYHL_RD(x) (HW_CRC_GPOLYHL(x).U)
Kojto 90:cb3d968589d8 909 #define HW_CRC_GPOLYHL_WR(x, v) (HW_CRC_GPOLYHL(x).U = (v))
Kojto 90:cb3d968589d8 910 #define HW_CRC_GPOLYHL_SET(x, v) (HW_CRC_GPOLYHL_WR(x, HW_CRC_GPOLYHL_RD(x) | (v)))
Kojto 90:cb3d968589d8 911 #define HW_CRC_GPOLYHL_CLR(x, v) (HW_CRC_GPOLYHL_WR(x, HW_CRC_GPOLYHL_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 912 #define HW_CRC_GPOLYHL_TOG(x, v) (HW_CRC_GPOLYHL_WR(x, HW_CRC_GPOLYHL_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 913 /*@}*/
Kojto 90:cb3d968589d8 914
Kojto 90:cb3d968589d8 915 /*
Kojto 90:cb3d968589d8 916 * Constants & macros for individual CRC_GPOLYHL bitfields
Kojto 90:cb3d968589d8 917 */
Kojto 90:cb3d968589d8 918
Kojto 90:cb3d968589d8 919 /*!
Kojto 90:cb3d968589d8 920 * @name Register CRC_GPOLYHL, field GPOLYHL[7:0] (RW)
Kojto 90:cb3d968589d8 921 */
Kojto 90:cb3d968589d8 922 /*@{*/
Kojto 90:cb3d968589d8 923 #define BP_CRC_GPOLYHL_GPOLYHL (0U) /*!< Bit position for CRC_GPOLYHL_GPOLYHL. */
Kojto 90:cb3d968589d8 924 #define BM_CRC_GPOLYHL_GPOLYHL (0xFFU) /*!< Bit mask for CRC_GPOLYHL_GPOLYHL. */
Kojto 90:cb3d968589d8 925 #define BS_CRC_GPOLYHL_GPOLYHL (8U) /*!< Bit field size in bits for CRC_GPOLYHL_GPOLYHL. */
Kojto 90:cb3d968589d8 926
Kojto 90:cb3d968589d8 927 /*! @brief Read current value of the CRC_GPOLYHL_GPOLYHL field. */
Kojto 90:cb3d968589d8 928 #define BR_CRC_GPOLYHL_GPOLYHL(x) (HW_CRC_GPOLYHL(x).U)
Kojto 90:cb3d968589d8 929
Kojto 90:cb3d968589d8 930 /*! @brief Format value for bitfield CRC_GPOLYHL_GPOLYHL. */
Kojto 90:cb3d968589d8 931 #define BF_CRC_GPOLYHL_GPOLYHL(v) ((uint8_t)((uint8_t)(v) << BP_CRC_GPOLYHL_GPOLYHL) & BM_CRC_GPOLYHL_GPOLYHL)
Kojto 90:cb3d968589d8 932
Kojto 90:cb3d968589d8 933 /*! @brief Set the GPOLYHL field to a new value. */
Kojto 90:cb3d968589d8 934 #define BW_CRC_GPOLYHL_GPOLYHL(x, v) (HW_CRC_GPOLYHL_WR(x, v))
Kojto 90:cb3d968589d8 935 /*@}*/
Kojto 90:cb3d968589d8 936 /*******************************************************************************
Kojto 90:cb3d968589d8 937 * HW_CRC_GPOLYHU - CRC_GPOLYHU register.
Kojto 90:cb3d968589d8 938 ******************************************************************************/
Kojto 90:cb3d968589d8 939
Kojto 90:cb3d968589d8 940 /*!
Kojto 90:cb3d968589d8 941 * @brief HW_CRC_GPOLYHU - CRC_GPOLYHU register. (RW)
Kojto 90:cb3d968589d8 942 *
Kojto 90:cb3d968589d8 943 * Reset value: 0xFFU
Kojto 90:cb3d968589d8 944 */
Kojto 90:cb3d968589d8 945 typedef union _hw_crc_gpolyhu
Kojto 90:cb3d968589d8 946 {
Kojto 90:cb3d968589d8 947 uint8_t U;
Kojto 90:cb3d968589d8 948 struct _hw_crc_gpolyhu_bitfields
Kojto 90:cb3d968589d8 949 {
Kojto 90:cb3d968589d8 950 uint8_t GPOLYHU : 8; /*!< [7:0] POLYHU stores the fourth 8 bits of
Kojto 90:cb3d968589d8 951 * the 32 bit CRC */
Kojto 90:cb3d968589d8 952 } B;
Kojto 90:cb3d968589d8 953 } hw_crc_gpolyhu_t;
Kojto 90:cb3d968589d8 954
Kojto 90:cb3d968589d8 955 /*!
Kojto 90:cb3d968589d8 956 * @name Constants and macros for entire CRC_GPOLYHU register
Kojto 90:cb3d968589d8 957 */
Kojto 90:cb3d968589d8 958 /*@{*/
Kojto 90:cb3d968589d8 959 #define HW_CRC_GPOLYHU_ADDR(x) ((x) + 0x7U)
Kojto 90:cb3d968589d8 960
Kojto 90:cb3d968589d8 961 #define HW_CRC_GPOLYHU(x) (*(__IO hw_crc_gpolyhu_t *) HW_CRC_GPOLYHU_ADDR(x))
Kojto 90:cb3d968589d8 962 #define HW_CRC_GPOLYHU_RD(x) (HW_CRC_GPOLYHU(x).U)
Kojto 90:cb3d968589d8 963 #define HW_CRC_GPOLYHU_WR(x, v) (HW_CRC_GPOLYHU(x).U = (v))
Kojto 90:cb3d968589d8 964 #define HW_CRC_GPOLYHU_SET(x, v) (HW_CRC_GPOLYHU_WR(x, HW_CRC_GPOLYHU_RD(x) | (v)))
Kojto 90:cb3d968589d8 965 #define HW_CRC_GPOLYHU_CLR(x, v) (HW_CRC_GPOLYHU_WR(x, HW_CRC_GPOLYHU_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 966 #define HW_CRC_GPOLYHU_TOG(x, v) (HW_CRC_GPOLYHU_WR(x, HW_CRC_GPOLYHU_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 967 /*@}*/
Kojto 90:cb3d968589d8 968
Kojto 90:cb3d968589d8 969 /*
Kojto 90:cb3d968589d8 970 * Constants & macros for individual CRC_GPOLYHU bitfields
Kojto 90:cb3d968589d8 971 */
Kojto 90:cb3d968589d8 972
Kojto 90:cb3d968589d8 973 /*!
Kojto 90:cb3d968589d8 974 * @name Register CRC_GPOLYHU, field GPOLYHU[7:0] (RW)
Kojto 90:cb3d968589d8 975 */
Kojto 90:cb3d968589d8 976 /*@{*/
Kojto 90:cb3d968589d8 977 #define BP_CRC_GPOLYHU_GPOLYHU (0U) /*!< Bit position for CRC_GPOLYHU_GPOLYHU. */
Kojto 90:cb3d968589d8 978 #define BM_CRC_GPOLYHU_GPOLYHU (0xFFU) /*!< Bit mask for CRC_GPOLYHU_GPOLYHU. */
Kojto 90:cb3d968589d8 979 #define BS_CRC_GPOLYHU_GPOLYHU (8U) /*!< Bit field size in bits for CRC_GPOLYHU_GPOLYHU. */
Kojto 90:cb3d968589d8 980
Kojto 90:cb3d968589d8 981 /*! @brief Read current value of the CRC_GPOLYHU_GPOLYHU field. */
Kojto 90:cb3d968589d8 982 #define BR_CRC_GPOLYHU_GPOLYHU(x) (HW_CRC_GPOLYHU(x).U)
Kojto 90:cb3d968589d8 983
Kojto 90:cb3d968589d8 984 /*! @brief Format value for bitfield CRC_GPOLYHU_GPOLYHU. */
Kojto 90:cb3d968589d8 985 #define BF_CRC_GPOLYHU_GPOLYHU(v) ((uint8_t)((uint8_t)(v) << BP_CRC_GPOLYHU_GPOLYHU) & BM_CRC_GPOLYHU_GPOLYHU)
Kojto 90:cb3d968589d8 986
Kojto 90:cb3d968589d8 987 /*! @brief Set the GPOLYHU field to a new value. */
Kojto 90:cb3d968589d8 988 #define BW_CRC_GPOLYHU_GPOLYHU(x, v) (HW_CRC_GPOLYHU_WR(x, v))
Kojto 90:cb3d968589d8 989 /*@}*/
Kojto 90:cb3d968589d8 990
Kojto 90:cb3d968589d8 991 /*******************************************************************************
Kojto 90:cb3d968589d8 992 * HW_CRC_CTRL - CRC Control register
Kojto 90:cb3d968589d8 993 ******************************************************************************/
Kojto 90:cb3d968589d8 994
Kojto 90:cb3d968589d8 995 /*!
Kojto 90:cb3d968589d8 996 * @brief HW_CRC_CTRL - CRC Control register (RW)
Kojto 90:cb3d968589d8 997 *
Kojto 90:cb3d968589d8 998 * Reset value: 0x00000000U
Kojto 90:cb3d968589d8 999 *
Kojto 90:cb3d968589d8 1000 * This register controls the configuration and working of the CRC module.
Kojto 90:cb3d968589d8 1001 * Appropriate bits must be set before starting a new CRC calculation. A new CRC
Kojto 90:cb3d968589d8 1002 * calculation is initialized by asserting CTRL[WAS] and then writing the seed into
Kojto 90:cb3d968589d8 1003 * the CRC data register.
Kojto 90:cb3d968589d8 1004 */
Kojto 90:cb3d968589d8 1005 typedef union _hw_crc_ctrl
Kojto 90:cb3d968589d8 1006 {
Kojto 90:cb3d968589d8 1007 uint32_t U;
Kojto 90:cb3d968589d8 1008 struct _hw_crc_ctrl_bitfields
Kojto 90:cb3d968589d8 1009 {
Kojto 90:cb3d968589d8 1010 uint32_t RESERVED0 : 24; /*!< [23:0] */
Kojto 90:cb3d968589d8 1011 uint32_t TCRC : 1; /*!< [24] */
Kojto 90:cb3d968589d8 1012 uint32_t WAS : 1; /*!< [25] Write CRC Data Register As Seed */
Kojto 90:cb3d968589d8 1013 uint32_t FXOR : 1; /*!< [26] Complement Read Of CRC Data Register */
Kojto 90:cb3d968589d8 1014 uint32_t RESERVED1 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 1015 uint32_t TOTR : 2; /*!< [29:28] Type Of Transpose For Read */
Kojto 90:cb3d968589d8 1016 uint32_t TOT : 2; /*!< [31:30] Type Of Transpose For Writes */
Kojto 90:cb3d968589d8 1017 } B;
Kojto 90:cb3d968589d8 1018 } hw_crc_ctrl_t;
Kojto 90:cb3d968589d8 1019
Kojto 90:cb3d968589d8 1020 /*!
Kojto 90:cb3d968589d8 1021 * @name Constants and macros for entire CRC_CTRL register
Kojto 90:cb3d968589d8 1022 */
Kojto 90:cb3d968589d8 1023 /*@{*/
Kojto 90:cb3d968589d8 1024 #define HW_CRC_CTRL_ADDR(x) ((x) + 0x8U)
Kojto 90:cb3d968589d8 1025
Kojto 90:cb3d968589d8 1026 #define HW_CRC_CTRL(x) (*(__IO hw_crc_ctrl_t *) HW_CRC_CTRL_ADDR(x))
Kojto 90:cb3d968589d8 1027 #define HW_CRC_CTRL_RD(x) (HW_CRC_CTRL(x).U)
Kojto 90:cb3d968589d8 1028 #define HW_CRC_CTRL_WR(x, v) (HW_CRC_CTRL(x).U = (v))
Kojto 90:cb3d968589d8 1029 #define HW_CRC_CTRL_SET(x, v) (HW_CRC_CTRL_WR(x, HW_CRC_CTRL_RD(x) | (v)))
Kojto 90:cb3d968589d8 1030 #define HW_CRC_CTRL_CLR(x, v) (HW_CRC_CTRL_WR(x, HW_CRC_CTRL_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 1031 #define HW_CRC_CTRL_TOG(x, v) (HW_CRC_CTRL_WR(x, HW_CRC_CTRL_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 1032 /*@}*/
Kojto 90:cb3d968589d8 1033
Kojto 90:cb3d968589d8 1034 /*
Kojto 90:cb3d968589d8 1035 * Constants & macros for individual CRC_CTRL bitfields
Kojto 90:cb3d968589d8 1036 */
Kojto 90:cb3d968589d8 1037
Kojto 90:cb3d968589d8 1038 /*!
Kojto 90:cb3d968589d8 1039 * @name Register CRC_CTRL, field TCRC[24] (RW)
Kojto 90:cb3d968589d8 1040 *
Kojto 90:cb3d968589d8 1041 * Width of CRC protocol.
Kojto 90:cb3d968589d8 1042 *
Kojto 90:cb3d968589d8 1043 * Values:
Kojto 90:cb3d968589d8 1044 * - 0 - 16-bit CRC protocol.
Kojto 90:cb3d968589d8 1045 * - 1 - 32-bit CRC protocol.
Kojto 90:cb3d968589d8 1046 */
Kojto 90:cb3d968589d8 1047 /*@{*/
Kojto 90:cb3d968589d8 1048 #define BP_CRC_CTRL_TCRC (24U) /*!< Bit position for CRC_CTRL_TCRC. */
Kojto 90:cb3d968589d8 1049 #define BM_CRC_CTRL_TCRC (0x01000000U) /*!< Bit mask for CRC_CTRL_TCRC. */
Kojto 90:cb3d968589d8 1050 #define BS_CRC_CTRL_TCRC (1U) /*!< Bit field size in bits for CRC_CTRL_TCRC. */
Kojto 90:cb3d968589d8 1051
Kojto 90:cb3d968589d8 1052 /*! @brief Read current value of the CRC_CTRL_TCRC field. */
Kojto 90:cb3d968589d8 1053 #define BR_CRC_CTRL_TCRC(x) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_TCRC))
Kojto 90:cb3d968589d8 1054
Kojto 90:cb3d968589d8 1055 /*! @brief Format value for bitfield CRC_CTRL_TCRC. */
Kojto 90:cb3d968589d8 1056 #define BF_CRC_CTRL_TCRC(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_TCRC) & BM_CRC_CTRL_TCRC)
Kojto 90:cb3d968589d8 1057
Kojto 90:cb3d968589d8 1058 /*! @brief Set the TCRC field to a new value. */
Kojto 90:cb3d968589d8 1059 #define BW_CRC_CTRL_TCRC(x, v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_TCRC) = (v))
Kojto 90:cb3d968589d8 1060 /*@}*/
Kojto 90:cb3d968589d8 1061
Kojto 90:cb3d968589d8 1062 /*!
Kojto 90:cb3d968589d8 1063 * @name Register CRC_CTRL, field WAS[25] (RW)
Kojto 90:cb3d968589d8 1064 *
Kojto 90:cb3d968589d8 1065 * When asserted, a value written to the CRC data register is considered a seed
Kojto 90:cb3d968589d8 1066 * value. When deasserted, a value written to the CRC data register is taken as
Kojto 90:cb3d968589d8 1067 * data for CRC computation.
Kojto 90:cb3d968589d8 1068 *
Kojto 90:cb3d968589d8 1069 * Values:
Kojto 90:cb3d968589d8 1070 * - 0 - Writes to the CRC data register are data values.
Kojto 90:cb3d968589d8 1071 * - 1 - Writes to the CRC data register are seed values.
Kojto 90:cb3d968589d8 1072 */
Kojto 90:cb3d968589d8 1073 /*@{*/
Kojto 90:cb3d968589d8 1074 #define BP_CRC_CTRL_WAS (25U) /*!< Bit position for CRC_CTRL_WAS. */
Kojto 90:cb3d968589d8 1075 #define BM_CRC_CTRL_WAS (0x02000000U) /*!< Bit mask for CRC_CTRL_WAS. */
Kojto 90:cb3d968589d8 1076 #define BS_CRC_CTRL_WAS (1U) /*!< Bit field size in bits for CRC_CTRL_WAS. */
Kojto 90:cb3d968589d8 1077
Kojto 90:cb3d968589d8 1078 /*! @brief Read current value of the CRC_CTRL_WAS field. */
Kojto 90:cb3d968589d8 1079 #define BR_CRC_CTRL_WAS(x) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_WAS))
Kojto 90:cb3d968589d8 1080
Kojto 90:cb3d968589d8 1081 /*! @brief Format value for bitfield CRC_CTRL_WAS. */
Kojto 90:cb3d968589d8 1082 #define BF_CRC_CTRL_WAS(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_WAS) & BM_CRC_CTRL_WAS)
Kojto 90:cb3d968589d8 1083
Kojto 90:cb3d968589d8 1084 /*! @brief Set the WAS field to a new value. */
Kojto 90:cb3d968589d8 1085 #define BW_CRC_CTRL_WAS(x, v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_WAS) = (v))
Kojto 90:cb3d968589d8 1086 /*@}*/
Kojto 90:cb3d968589d8 1087
Kojto 90:cb3d968589d8 1088 /*!
Kojto 90:cb3d968589d8 1089 * @name Register CRC_CTRL, field FXOR[26] (RW)
Kojto 90:cb3d968589d8 1090 *
Kojto 90:cb3d968589d8 1091 * Some CRC protocols require the final checksum to be XORed with 0xFFFFFFFF or
Kojto 90:cb3d968589d8 1092 * 0xFFFF. Asserting this bit enables on the fly complementing of read data.
Kojto 90:cb3d968589d8 1093 *
Kojto 90:cb3d968589d8 1094 * Values:
Kojto 90:cb3d968589d8 1095 * - 0 - No XOR on reading.
Kojto 90:cb3d968589d8 1096 * - 1 - Invert or complement the read value of the CRC Data register.
Kojto 90:cb3d968589d8 1097 */
Kojto 90:cb3d968589d8 1098 /*@{*/
Kojto 90:cb3d968589d8 1099 #define BP_CRC_CTRL_FXOR (26U) /*!< Bit position for CRC_CTRL_FXOR. */
Kojto 90:cb3d968589d8 1100 #define BM_CRC_CTRL_FXOR (0x04000000U) /*!< Bit mask for CRC_CTRL_FXOR. */
Kojto 90:cb3d968589d8 1101 #define BS_CRC_CTRL_FXOR (1U) /*!< Bit field size in bits for CRC_CTRL_FXOR. */
Kojto 90:cb3d968589d8 1102
Kojto 90:cb3d968589d8 1103 /*! @brief Read current value of the CRC_CTRL_FXOR field. */
Kojto 90:cb3d968589d8 1104 #define BR_CRC_CTRL_FXOR(x) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_FXOR))
Kojto 90:cb3d968589d8 1105
Kojto 90:cb3d968589d8 1106 /*! @brief Format value for bitfield CRC_CTRL_FXOR. */
Kojto 90:cb3d968589d8 1107 #define BF_CRC_CTRL_FXOR(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_FXOR) & BM_CRC_CTRL_FXOR)
Kojto 90:cb3d968589d8 1108
Kojto 90:cb3d968589d8 1109 /*! @brief Set the FXOR field to a new value. */
Kojto 90:cb3d968589d8 1110 #define BW_CRC_CTRL_FXOR(x, v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_FXOR) = (v))
Kojto 90:cb3d968589d8 1111 /*@}*/
Kojto 90:cb3d968589d8 1112
Kojto 90:cb3d968589d8 1113 /*!
Kojto 90:cb3d968589d8 1114 * @name Register CRC_CTRL, field TOTR[29:28] (RW)
Kojto 90:cb3d968589d8 1115 *
Kojto 90:cb3d968589d8 1116 * Identifies the transpose configuration of the value read from the CRC Data
Kojto 90:cb3d968589d8 1117 * register. See the description of the transpose feature for the available
Kojto 90:cb3d968589d8 1118 * transpose options.
Kojto 90:cb3d968589d8 1119 *
Kojto 90:cb3d968589d8 1120 * Values:
Kojto 90:cb3d968589d8 1121 * - 00 - No transposition.
Kojto 90:cb3d968589d8 1122 * - 01 - Bits in bytes are transposed; bytes are not transposed.
Kojto 90:cb3d968589d8 1123 * - 10 - Both bits in bytes and bytes are transposed.
Kojto 90:cb3d968589d8 1124 * - 11 - Only bytes are transposed; no bits in a byte are transposed.
Kojto 90:cb3d968589d8 1125 */
Kojto 90:cb3d968589d8 1126 /*@{*/
Kojto 90:cb3d968589d8 1127 #define BP_CRC_CTRL_TOTR (28U) /*!< Bit position for CRC_CTRL_TOTR. */
Kojto 90:cb3d968589d8 1128 #define BM_CRC_CTRL_TOTR (0x30000000U) /*!< Bit mask for CRC_CTRL_TOTR. */
Kojto 90:cb3d968589d8 1129 #define BS_CRC_CTRL_TOTR (2U) /*!< Bit field size in bits for CRC_CTRL_TOTR. */
Kojto 90:cb3d968589d8 1130
Kojto 90:cb3d968589d8 1131 /*! @brief Read current value of the CRC_CTRL_TOTR field. */
Kojto 90:cb3d968589d8 1132 #define BR_CRC_CTRL_TOTR(x) (HW_CRC_CTRL(x).B.TOTR)
Kojto 90:cb3d968589d8 1133
Kojto 90:cb3d968589d8 1134 /*! @brief Format value for bitfield CRC_CTRL_TOTR. */
Kojto 90:cb3d968589d8 1135 #define BF_CRC_CTRL_TOTR(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_TOTR) & BM_CRC_CTRL_TOTR)
Kojto 90:cb3d968589d8 1136
Kojto 90:cb3d968589d8 1137 /*! @brief Set the TOTR field to a new value. */
Kojto 90:cb3d968589d8 1138 #define BW_CRC_CTRL_TOTR(x, v) (HW_CRC_CTRL_WR(x, (HW_CRC_CTRL_RD(x) & ~BM_CRC_CTRL_TOTR) | BF_CRC_CTRL_TOTR(v)))
Kojto 90:cb3d968589d8 1139 /*@}*/
Kojto 90:cb3d968589d8 1140
Kojto 90:cb3d968589d8 1141 /*!
Kojto 90:cb3d968589d8 1142 * @name Register CRC_CTRL, field TOT[31:30] (RW)
Kojto 90:cb3d968589d8 1143 *
Kojto 90:cb3d968589d8 1144 * Defines the transpose configuration of the data written to the CRC data
Kojto 90:cb3d968589d8 1145 * register. See the description of the transpose feature for the available transpose
Kojto 90:cb3d968589d8 1146 * options.
Kojto 90:cb3d968589d8 1147 *
Kojto 90:cb3d968589d8 1148 * Values:
Kojto 90:cb3d968589d8 1149 * - 00 - No transposition.
Kojto 90:cb3d968589d8 1150 * - 01 - Bits in bytes are transposed; bytes are not transposed.
Kojto 90:cb3d968589d8 1151 * - 10 - Both bits in bytes and bytes are transposed.
Kojto 90:cb3d968589d8 1152 * - 11 - Only bytes are transposed; no bits in a byte are transposed.
Kojto 90:cb3d968589d8 1153 */
Kojto 90:cb3d968589d8 1154 /*@{*/
Kojto 90:cb3d968589d8 1155 #define BP_CRC_CTRL_TOT (30U) /*!< Bit position for CRC_CTRL_TOT. */
Kojto 90:cb3d968589d8 1156 #define BM_CRC_CTRL_TOT (0xC0000000U) /*!< Bit mask for CRC_CTRL_TOT. */
Kojto 90:cb3d968589d8 1157 #define BS_CRC_CTRL_TOT (2U) /*!< Bit field size in bits for CRC_CTRL_TOT. */
Kojto 90:cb3d968589d8 1158
Kojto 90:cb3d968589d8 1159 /*! @brief Read current value of the CRC_CTRL_TOT field. */
Kojto 90:cb3d968589d8 1160 #define BR_CRC_CTRL_TOT(x) (HW_CRC_CTRL(x).B.TOT)
Kojto 90:cb3d968589d8 1161
Kojto 90:cb3d968589d8 1162 /*! @brief Format value for bitfield CRC_CTRL_TOT. */
Kojto 90:cb3d968589d8 1163 #define BF_CRC_CTRL_TOT(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_TOT) & BM_CRC_CTRL_TOT)
Kojto 90:cb3d968589d8 1164
Kojto 90:cb3d968589d8 1165 /*! @brief Set the TOT field to a new value. */
Kojto 90:cb3d968589d8 1166 #define BW_CRC_CTRL_TOT(x, v) (HW_CRC_CTRL_WR(x, (HW_CRC_CTRL_RD(x) & ~BM_CRC_CTRL_TOT) | BF_CRC_CTRL_TOT(v)))
Kojto 90:cb3d968589d8 1167 /*@}*/
Kojto 90:cb3d968589d8 1168 /*******************************************************************************
Kojto 90:cb3d968589d8 1169 * HW_CRC_CTRLHU - CRC_CTRLHU register.
Kojto 90:cb3d968589d8 1170 ******************************************************************************/
Kojto 90:cb3d968589d8 1171
Kojto 90:cb3d968589d8 1172 /*!
Kojto 90:cb3d968589d8 1173 * @brief HW_CRC_CTRLHU - CRC_CTRLHU register. (RW)
Kojto 90:cb3d968589d8 1174 *
Kojto 90:cb3d968589d8 1175 * Reset value: 0x00U
Kojto 90:cb3d968589d8 1176 */
Kojto 90:cb3d968589d8 1177 typedef union _hw_crc_ctrlhu
Kojto 90:cb3d968589d8 1178 {
Kojto 90:cb3d968589d8 1179 uint8_t U;
Kojto 90:cb3d968589d8 1180 struct _hw_crc_ctrlhu_bitfields
Kojto 90:cb3d968589d8 1181 {
Kojto 90:cb3d968589d8 1182 uint8_t TCRC : 1; /*!< [0] */
Kojto 90:cb3d968589d8 1183 uint8_t WAS : 1; /*!< [1] */
Kojto 90:cb3d968589d8 1184 uint8_t FXOR : 1; /*!< [2] */
Kojto 90:cb3d968589d8 1185 uint8_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 1186 uint8_t TOTR : 2; /*!< [5:4] */
Kojto 90:cb3d968589d8 1187 uint8_t TOT : 2; /*!< [7:6] */
Kojto 90:cb3d968589d8 1188 } B;
Kojto 90:cb3d968589d8 1189 } hw_crc_ctrlhu_t;
Kojto 90:cb3d968589d8 1190
Kojto 90:cb3d968589d8 1191 /*!
Kojto 90:cb3d968589d8 1192 * @name Constants and macros for entire CRC_CTRLHU register
Kojto 90:cb3d968589d8 1193 */
Kojto 90:cb3d968589d8 1194 /*@{*/
Kojto 90:cb3d968589d8 1195 #define HW_CRC_CTRLHU_ADDR(x) ((x) + 0xBU)
Kojto 90:cb3d968589d8 1196
Kojto 90:cb3d968589d8 1197 #define HW_CRC_CTRLHU(x) (*(__IO hw_crc_ctrlhu_t *) HW_CRC_CTRLHU_ADDR(x))
Kojto 90:cb3d968589d8 1198 #define HW_CRC_CTRLHU_RD(x) (HW_CRC_CTRLHU(x).U)
Kojto 90:cb3d968589d8 1199 #define HW_CRC_CTRLHU_WR(x, v) (HW_CRC_CTRLHU(x).U = (v))
Kojto 90:cb3d968589d8 1200 #define HW_CRC_CTRLHU_SET(x, v) (HW_CRC_CTRLHU_WR(x, HW_CRC_CTRLHU_RD(x) | (v)))
Kojto 90:cb3d968589d8 1201 #define HW_CRC_CTRLHU_CLR(x, v) (HW_CRC_CTRLHU_WR(x, HW_CRC_CTRLHU_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 1202 #define HW_CRC_CTRLHU_TOG(x, v) (HW_CRC_CTRLHU_WR(x, HW_CRC_CTRLHU_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 1203 /*@}*/
Kojto 90:cb3d968589d8 1204
Kojto 90:cb3d968589d8 1205 /*
Kojto 90:cb3d968589d8 1206 * Constants & macros for individual CRC_CTRLHU bitfields
Kojto 90:cb3d968589d8 1207 */
Kojto 90:cb3d968589d8 1208
Kojto 90:cb3d968589d8 1209 /*!
Kojto 90:cb3d968589d8 1210 * @name Register CRC_CTRLHU, field TCRC[0] (RW)
Kojto 90:cb3d968589d8 1211 *
Kojto 90:cb3d968589d8 1212 * Values:
Kojto 90:cb3d968589d8 1213 * - 0 - 16-bit CRC protocol.
Kojto 90:cb3d968589d8 1214 * - 1 - 32-bit CRC protocol.
Kojto 90:cb3d968589d8 1215 */
Kojto 90:cb3d968589d8 1216 /*@{*/
Kojto 90:cb3d968589d8 1217 #define BP_CRC_CTRLHU_TCRC (0U) /*!< Bit position for CRC_CTRLHU_TCRC. */
Kojto 90:cb3d968589d8 1218 #define BM_CRC_CTRLHU_TCRC (0x01U) /*!< Bit mask for CRC_CTRLHU_TCRC. */
Kojto 90:cb3d968589d8 1219 #define BS_CRC_CTRLHU_TCRC (1U) /*!< Bit field size in bits for CRC_CTRLHU_TCRC. */
Kojto 90:cb3d968589d8 1220
Kojto 90:cb3d968589d8 1221 /*! @brief Read current value of the CRC_CTRLHU_TCRC field. */
Kojto 90:cb3d968589d8 1222 #define BR_CRC_CTRLHU_TCRC(x) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_TCRC))
Kojto 90:cb3d968589d8 1223
Kojto 90:cb3d968589d8 1224 /*! @brief Format value for bitfield CRC_CTRLHU_TCRC. */
Kojto 90:cb3d968589d8 1225 #define BF_CRC_CTRLHU_TCRC(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_TCRC) & BM_CRC_CTRLHU_TCRC)
Kojto 90:cb3d968589d8 1226
Kojto 90:cb3d968589d8 1227 /*! @brief Set the TCRC field to a new value. */
Kojto 90:cb3d968589d8 1228 #define BW_CRC_CTRLHU_TCRC(x, v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_TCRC) = (v))
Kojto 90:cb3d968589d8 1229 /*@}*/
Kojto 90:cb3d968589d8 1230
Kojto 90:cb3d968589d8 1231 /*!
Kojto 90:cb3d968589d8 1232 * @name Register CRC_CTRLHU, field WAS[1] (RW)
Kojto 90:cb3d968589d8 1233 *
Kojto 90:cb3d968589d8 1234 * Values:
Kojto 90:cb3d968589d8 1235 * - 0 - Writes to CRC data register are data values.
Kojto 90:cb3d968589d8 1236 * - 1 - Writes to CRC data reguster are seed values.
Kojto 90:cb3d968589d8 1237 */
Kojto 90:cb3d968589d8 1238 /*@{*/
Kojto 90:cb3d968589d8 1239 #define BP_CRC_CTRLHU_WAS (1U) /*!< Bit position for CRC_CTRLHU_WAS. */
Kojto 90:cb3d968589d8 1240 #define BM_CRC_CTRLHU_WAS (0x02U) /*!< Bit mask for CRC_CTRLHU_WAS. */
Kojto 90:cb3d968589d8 1241 #define BS_CRC_CTRLHU_WAS (1U) /*!< Bit field size in bits for CRC_CTRLHU_WAS. */
Kojto 90:cb3d968589d8 1242
Kojto 90:cb3d968589d8 1243 /*! @brief Read current value of the CRC_CTRLHU_WAS field. */
Kojto 90:cb3d968589d8 1244 #define BR_CRC_CTRLHU_WAS(x) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_WAS))
Kojto 90:cb3d968589d8 1245
Kojto 90:cb3d968589d8 1246 /*! @brief Format value for bitfield CRC_CTRLHU_WAS. */
Kojto 90:cb3d968589d8 1247 #define BF_CRC_CTRLHU_WAS(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_WAS) & BM_CRC_CTRLHU_WAS)
Kojto 90:cb3d968589d8 1248
Kojto 90:cb3d968589d8 1249 /*! @brief Set the WAS field to a new value. */
Kojto 90:cb3d968589d8 1250 #define BW_CRC_CTRLHU_WAS(x, v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_WAS) = (v))
Kojto 90:cb3d968589d8 1251 /*@}*/
Kojto 90:cb3d968589d8 1252
Kojto 90:cb3d968589d8 1253 /*!
Kojto 90:cb3d968589d8 1254 * @name Register CRC_CTRLHU, field FXOR[2] (RW)
Kojto 90:cb3d968589d8 1255 *
Kojto 90:cb3d968589d8 1256 * Values:
Kojto 90:cb3d968589d8 1257 * - 0 - No XOR on reading.
Kojto 90:cb3d968589d8 1258 * - 1 - Invert or complement the read value of CRC data register.
Kojto 90:cb3d968589d8 1259 */
Kojto 90:cb3d968589d8 1260 /*@{*/
Kojto 90:cb3d968589d8 1261 #define BP_CRC_CTRLHU_FXOR (2U) /*!< Bit position for CRC_CTRLHU_FXOR. */
Kojto 90:cb3d968589d8 1262 #define BM_CRC_CTRLHU_FXOR (0x04U) /*!< Bit mask for CRC_CTRLHU_FXOR. */
Kojto 90:cb3d968589d8 1263 #define BS_CRC_CTRLHU_FXOR (1U) /*!< Bit field size in bits for CRC_CTRLHU_FXOR. */
Kojto 90:cb3d968589d8 1264
Kojto 90:cb3d968589d8 1265 /*! @brief Read current value of the CRC_CTRLHU_FXOR field. */
Kojto 90:cb3d968589d8 1266 #define BR_CRC_CTRLHU_FXOR(x) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_FXOR))
Kojto 90:cb3d968589d8 1267
Kojto 90:cb3d968589d8 1268 /*! @brief Format value for bitfield CRC_CTRLHU_FXOR. */
Kojto 90:cb3d968589d8 1269 #define BF_CRC_CTRLHU_FXOR(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_FXOR) & BM_CRC_CTRLHU_FXOR)
Kojto 90:cb3d968589d8 1270
Kojto 90:cb3d968589d8 1271 /*! @brief Set the FXOR field to a new value. */
Kojto 90:cb3d968589d8 1272 #define BW_CRC_CTRLHU_FXOR(x, v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_FXOR) = (v))
Kojto 90:cb3d968589d8 1273 /*@}*/
Kojto 90:cb3d968589d8 1274
Kojto 90:cb3d968589d8 1275 /*!
Kojto 90:cb3d968589d8 1276 * @name Register CRC_CTRLHU, field TOTR[5:4] (RW)
Kojto 90:cb3d968589d8 1277 *
Kojto 90:cb3d968589d8 1278 * Values:
Kojto 90:cb3d968589d8 1279 * - 00 - No Transposition.
Kojto 90:cb3d968589d8 1280 * - 01 - Bits in bytes are transposed, bytes are not transposed.
Kojto 90:cb3d968589d8 1281 * - 10 - Both bits in bytes and bytes are transposed.
Kojto 90:cb3d968589d8 1282 * - 11 - Only bytes are transposed; no bits in a byte are transposed.
Kojto 90:cb3d968589d8 1283 */
Kojto 90:cb3d968589d8 1284 /*@{*/
Kojto 90:cb3d968589d8 1285 #define BP_CRC_CTRLHU_TOTR (4U) /*!< Bit position for CRC_CTRLHU_TOTR. */
Kojto 90:cb3d968589d8 1286 #define BM_CRC_CTRLHU_TOTR (0x30U) /*!< Bit mask for CRC_CTRLHU_TOTR. */
Kojto 90:cb3d968589d8 1287 #define BS_CRC_CTRLHU_TOTR (2U) /*!< Bit field size in bits for CRC_CTRLHU_TOTR. */
Kojto 90:cb3d968589d8 1288
Kojto 90:cb3d968589d8 1289 /*! @brief Read current value of the CRC_CTRLHU_TOTR field. */
Kojto 90:cb3d968589d8 1290 #define BR_CRC_CTRLHU_TOTR(x) (HW_CRC_CTRLHU(x).B.TOTR)
Kojto 90:cb3d968589d8 1291
Kojto 90:cb3d968589d8 1292 /*! @brief Format value for bitfield CRC_CTRLHU_TOTR. */
Kojto 90:cb3d968589d8 1293 #define BF_CRC_CTRLHU_TOTR(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_TOTR) & BM_CRC_CTRLHU_TOTR)
Kojto 90:cb3d968589d8 1294
Kojto 90:cb3d968589d8 1295 /*! @brief Set the TOTR field to a new value. */
Kojto 90:cb3d968589d8 1296 #define BW_CRC_CTRLHU_TOTR(x, v) (HW_CRC_CTRLHU_WR(x, (HW_CRC_CTRLHU_RD(x) & ~BM_CRC_CTRLHU_TOTR) | BF_CRC_CTRLHU_TOTR(v)))
Kojto 90:cb3d968589d8 1297 /*@}*/
Kojto 90:cb3d968589d8 1298
Kojto 90:cb3d968589d8 1299 /*!
Kojto 90:cb3d968589d8 1300 * @name Register CRC_CTRLHU, field TOT[7:6] (RW)
Kojto 90:cb3d968589d8 1301 *
Kojto 90:cb3d968589d8 1302 * Values:
Kojto 90:cb3d968589d8 1303 * - 00 - No Transposition.
Kojto 90:cb3d968589d8 1304 * - 01 - Bits in bytes are transposed, bytes are not transposed.
Kojto 90:cb3d968589d8 1305 * - 10 - Both bits in bytes and bytes are transposed.
Kojto 90:cb3d968589d8 1306 * - 11 - Only bytes are transposed; no bits in a byte are transposed.
Kojto 90:cb3d968589d8 1307 */
Kojto 90:cb3d968589d8 1308 /*@{*/
Kojto 90:cb3d968589d8 1309 #define BP_CRC_CTRLHU_TOT (6U) /*!< Bit position for CRC_CTRLHU_TOT. */
Kojto 90:cb3d968589d8 1310 #define BM_CRC_CTRLHU_TOT (0xC0U) /*!< Bit mask for CRC_CTRLHU_TOT. */
Kojto 90:cb3d968589d8 1311 #define BS_CRC_CTRLHU_TOT (2U) /*!< Bit field size in bits for CRC_CTRLHU_TOT. */
Kojto 90:cb3d968589d8 1312
Kojto 90:cb3d968589d8 1313 /*! @brief Read current value of the CRC_CTRLHU_TOT field. */
Kojto 90:cb3d968589d8 1314 #define BR_CRC_CTRLHU_TOT(x) (HW_CRC_CTRLHU(x).B.TOT)
Kojto 90:cb3d968589d8 1315
Kojto 90:cb3d968589d8 1316 /*! @brief Format value for bitfield CRC_CTRLHU_TOT. */
Kojto 90:cb3d968589d8 1317 #define BF_CRC_CTRLHU_TOT(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_TOT) & BM_CRC_CTRLHU_TOT)
Kojto 90:cb3d968589d8 1318
Kojto 90:cb3d968589d8 1319 /*! @brief Set the TOT field to a new value. */
Kojto 90:cb3d968589d8 1320 #define BW_CRC_CTRLHU_TOT(x, v) (HW_CRC_CTRLHU_WR(x, (HW_CRC_CTRLHU_RD(x) & ~BM_CRC_CTRLHU_TOT) | BF_CRC_CTRLHU_TOT(v)))
Kojto 90:cb3d968589d8 1321 /*@}*/
Kojto 90:cb3d968589d8 1322
Kojto 90:cb3d968589d8 1323 /*
Kojto 90:cb3d968589d8 1324 ** Start of section using anonymous unions
Kojto 90:cb3d968589d8 1325 */
Kojto 90:cb3d968589d8 1326
Kojto 90:cb3d968589d8 1327 #if defined(__ARMCC_VERSION)
Kojto 90:cb3d968589d8 1328 #pragma push
Kojto 90:cb3d968589d8 1329 #pragma anon_unions
Kojto 90:cb3d968589d8 1330 #elif defined(__CWCC__)
Kojto 90:cb3d968589d8 1331 #pragma push
Kojto 90:cb3d968589d8 1332 #pragma cpp_extensions on
Kojto 90:cb3d968589d8 1333 #elif defined(__GNUC__)
Kojto 90:cb3d968589d8 1334 /* anonymous unions are enabled by default */
Kojto 90:cb3d968589d8 1335 #elif defined(__IAR_SYSTEMS_ICC__)
Kojto 90:cb3d968589d8 1336 #pragma language=extended
Kojto 90:cb3d968589d8 1337 #else
Kojto 90:cb3d968589d8 1338 #error Not supported compiler type
Kojto 90:cb3d968589d8 1339 #endif
Kojto 90:cb3d968589d8 1340
Kojto 90:cb3d968589d8 1341 /*******************************************************************************
Kojto 90:cb3d968589d8 1342 * hw_crc_t - module struct
Kojto 90:cb3d968589d8 1343 ******************************************************************************/
Kojto 90:cb3d968589d8 1344 /*!
Kojto 90:cb3d968589d8 1345 * @brief All CRC module registers.
Kojto 90:cb3d968589d8 1346 */
Kojto 90:cb3d968589d8 1347 #pragma pack(1)
Kojto 90:cb3d968589d8 1348 typedef struct _hw_crc
Kojto 90:cb3d968589d8 1349 {
Kojto 90:cb3d968589d8 1350 union {
Kojto 90:cb3d968589d8 1351 struct {
Kojto 90:cb3d968589d8 1352 __IO hw_crc_datal_t DATAL; /*!< [0x0] CRC_DATAL register. */
Kojto 90:cb3d968589d8 1353 __IO hw_crc_datah_t DATAH; /*!< [0x2] CRC_DATAH register. */
Kojto 90:cb3d968589d8 1354 } ACCESS16BIT;
Kojto 90:cb3d968589d8 1355 struct {
Kojto 90:cb3d968589d8 1356 __IO hw_crc_datall_t DATALL; /*!< [0x0] CRC_DATALL register. */
Kojto 90:cb3d968589d8 1357 __IO hw_crc_datalu_t DATALU; /*!< [0x1] CRC_DATALU register. */
Kojto 90:cb3d968589d8 1358 __IO hw_crc_datahl_t DATAHL; /*!< [0x2] CRC_DATAHL register. */
Kojto 90:cb3d968589d8 1359 __IO hw_crc_datahu_t DATAHU; /*!< [0x3] CRC_DATAHU register. */
Kojto 90:cb3d968589d8 1360 } ACCESS8BIT;
Kojto 90:cb3d968589d8 1361 __IO hw_crc_data_t DATA; /*!< [0x0] CRC Data register */
Kojto 90:cb3d968589d8 1362 };
Kojto 90:cb3d968589d8 1363 union {
Kojto 90:cb3d968589d8 1364 __IO hw_crc_gpoly_t GPOLY; /*!< [0x4] CRC Polynomial register */
Kojto 90:cb3d968589d8 1365 struct {
Kojto 90:cb3d968589d8 1366 __IO hw_crc_gpolyl_t GPOLYL; /*!< [0x4] CRC_GPOLYL register. */
Kojto 90:cb3d968589d8 1367 __IO hw_crc_gpolyh_t GPOLYH; /*!< [0x6] CRC_GPOLYH register. */
Kojto 90:cb3d968589d8 1368 } GPOLY_ACCESS16BIT;
Kojto 90:cb3d968589d8 1369 struct {
Kojto 90:cb3d968589d8 1370 __IO hw_crc_gpolyll_t GPOLYLL; /*!< [0x4] CRC_GPOLYLL register. */
Kojto 90:cb3d968589d8 1371 __IO hw_crc_gpolylu_t GPOLYLU; /*!< [0x5] CRC_GPOLYLU register. */
Kojto 90:cb3d968589d8 1372 __IO hw_crc_gpolyhl_t GPOLYHL; /*!< [0x6] CRC_GPOLYHL register. */
Kojto 90:cb3d968589d8 1373 __IO hw_crc_gpolyhu_t GPOLYHU; /*!< [0x7] CRC_GPOLYHU register. */
Kojto 90:cb3d968589d8 1374 } GPOLY_ACCESS8BIT;
Kojto 90:cb3d968589d8 1375 };
Kojto 90:cb3d968589d8 1376 union {
Kojto 90:cb3d968589d8 1377 __IO hw_crc_ctrl_t CTRL; /*!< [0x8] CRC Control register */
Kojto 90:cb3d968589d8 1378 struct {
Kojto 90:cb3d968589d8 1379 uint8_t _reserved0[3];
Kojto 90:cb3d968589d8 1380 __IO hw_crc_ctrlhu_t CTRLHU; /*!< [0xB] CRC_CTRLHU register. */
Kojto 90:cb3d968589d8 1381 } CTRL_ACCESS8BIT;
Kojto 90:cb3d968589d8 1382 };
Kojto 90:cb3d968589d8 1383 } hw_crc_t;
Kojto 90:cb3d968589d8 1384 #pragma pack()
Kojto 90:cb3d968589d8 1385
Kojto 90:cb3d968589d8 1386 /*! @brief Macro to access all CRC registers. */
Kojto 90:cb3d968589d8 1387 /*! @param x CRC module instance base address. */
Kojto 90:cb3d968589d8 1388 /*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
Kojto 90:cb3d968589d8 1389 * use the '&' operator, like <code>&HW_CRC(CRC_BASE)</code>. */
Kojto 90:cb3d968589d8 1390 #define HW_CRC(x) (*(hw_crc_t *)(x))
Kojto 90:cb3d968589d8 1391
Kojto 90:cb3d968589d8 1392 /*
Kojto 90:cb3d968589d8 1393 ** End of section using anonymous unions
Kojto 90:cb3d968589d8 1394 */
Kojto 90:cb3d968589d8 1395
Kojto 90:cb3d968589d8 1396 #if defined(__ARMCC_VERSION)
Kojto 90:cb3d968589d8 1397 #pragma pop
Kojto 90:cb3d968589d8 1398 #elif defined(__CWCC__)
Kojto 90:cb3d968589d8 1399 #pragma pop
Kojto 90:cb3d968589d8 1400 #elif defined(__GNUC__)
Kojto 90:cb3d968589d8 1401 /* leave anonymous unions enabled */
Kojto 90:cb3d968589d8 1402 #elif defined(__IAR_SYSTEMS_ICC__)
Kojto 90:cb3d968589d8 1403 #pragma language=default
Kojto 90:cb3d968589d8 1404 #else
Kojto 90:cb3d968589d8 1405 #error Not supported compiler type
Kojto 90:cb3d968589d8 1406 #endif
Kojto 90:cb3d968589d8 1407
Kojto 90:cb3d968589d8 1408 #endif /* __HW_CRC_REGISTERS_H__ */
Kojto 90:cb3d968589d8 1409 /* EOF */