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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F410RB/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_spi.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
128:9bcdf88f62b0
Child:
145:64910690c574
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_spi.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.0
Kojto 122:f9eeca106725 6 * @date 06-May-2016
bogdanm 92:4fc01daae5a5 7 * @brief Header file of SPI HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_SPI_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_SPI_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
Kojto 122:f9eeca106725 47 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 48
bogdanm 92:4fc01daae5a5 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 50 * @{
bogdanm 92:4fc01daae5a5 51 */
bogdanm 92:4fc01daae5a5 52
bogdanm 92:4fc01daae5a5 53 /** @addtogroup SPI
bogdanm 92:4fc01daae5a5 54 * @{
bogdanm 92:4fc01daae5a5 55 */
bogdanm 92:4fc01daae5a5 56
bogdanm 92:4fc01daae5a5 57 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 58 /** @defgroup SPI_Exported_Types SPI Exported Types
Kojto 99:dbbf35b96557 59 * @{
Kojto 99:dbbf35b96557 60 */
Kojto 122:f9eeca106725 61
Kojto 122:f9eeca106725 62 /**
Kojto 122:f9eeca106725 63 * @brief SPI Configuration Structure definition
bogdanm 92:4fc01daae5a5 64 */
bogdanm 92:4fc01daae5a5 65 typedef struct
bogdanm 92:4fc01daae5a5 66 {
bogdanm 92:4fc01daae5a5 67 uint32_t Mode; /*!< Specifies the SPI operating mode.
Kojto 122:f9eeca106725 68 This parameter can be a value of @ref SPI_Mode */
bogdanm 92:4fc01daae5a5 69
Kojto 122:f9eeca106725 70 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
Kojto 122:f9eeca106725 71 This parameter can be a value of @ref SPI_Direction */
bogdanm 92:4fc01daae5a5 72
bogdanm 92:4fc01daae5a5 73 uint32_t DataSize; /*!< Specifies the SPI data size.
Kojto 122:f9eeca106725 74 This parameter can be a value of @ref SPI_Data_Size */
bogdanm 92:4fc01daae5a5 75
bogdanm 92:4fc01daae5a5 76 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
bogdanm 92:4fc01daae5a5 77 This parameter can be a value of @ref SPI_Clock_Polarity */
bogdanm 92:4fc01daae5a5 78
bogdanm 92:4fc01daae5a5 79 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
bogdanm 92:4fc01daae5a5 80 This parameter can be a value of @ref SPI_Clock_Phase */
bogdanm 92:4fc01daae5a5 81
bogdanm 92:4fc01daae5a5 82 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
bogdanm 92:4fc01daae5a5 83 hardware (NSS pin) or by software using the SSI bit.
bogdanm 92:4fc01daae5a5 84 This parameter can be a value of @ref SPI_Slave_Select_management */
bogdanm 92:4fc01daae5a5 85
bogdanm 92:4fc01daae5a5 86 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
bogdanm 92:4fc01daae5a5 87 used to configure the transmit and receive SCK clock.
bogdanm 92:4fc01daae5a5 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler
bogdanm 92:4fc01daae5a5 89 @note The communication clock is derived from the master
Kojto 122:f9eeca106725 90 clock. The slave clock does not need to be set. */
bogdanm 92:4fc01daae5a5 91
bogdanm 92:4fc01daae5a5 92 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
bogdanm 92:4fc01daae5a5 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
bogdanm 92:4fc01daae5a5 94
bogdanm 92:4fc01daae5a5 95 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
bogdanm 92:4fc01daae5a5 96 This parameter can be a value of @ref SPI_TI_mode */
bogdanm 92:4fc01daae5a5 97
bogdanm 92:4fc01daae5a5 98 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
bogdanm 92:4fc01daae5a5 99 This parameter can be a value of @ref SPI_CRC_Calculation */
bogdanm 92:4fc01daae5a5 100
bogdanm 92:4fc01daae5a5 101 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
bogdanm 92:4fc01daae5a5 102 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
bogdanm 92:4fc01daae5a5 103 }SPI_InitTypeDef;
bogdanm 92:4fc01daae5a5 104
bogdanm 92:4fc01daae5a5 105 /**
bogdanm 92:4fc01daae5a5 106 * @brief HAL SPI State structure definition
bogdanm 92:4fc01daae5a5 107 */
bogdanm 92:4fc01daae5a5 108 typedef enum
bogdanm 92:4fc01daae5a5 109 {
Kojto 122:f9eeca106725 110 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */
Kojto 122:f9eeca106725 111 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
Kojto 122:f9eeca106725 112 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
Kojto 122:f9eeca106725 113 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
Kojto 122:f9eeca106725 114 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
Kojto 122:f9eeca106725 115 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
Kojto 122:f9eeca106725 116 HAL_SPI_STATE_ERROR = 0x06U /*!< SPI error state */
bogdanm 92:4fc01daae5a5 117 }HAL_SPI_StateTypeDef;
bogdanm 92:4fc01daae5a5 118
Kojto 122:f9eeca106725 119 /**
bogdanm 92:4fc01daae5a5 120 * @brief SPI handle Structure definition
bogdanm 92:4fc01daae5a5 121 */
bogdanm 92:4fc01daae5a5 122 typedef struct __SPI_HandleTypeDef
bogdanm 92:4fc01daae5a5 123 {
bogdanm 92:4fc01daae5a5 124 SPI_TypeDef *Instance; /* SPI registers base address */
bogdanm 92:4fc01daae5a5 125
bogdanm 92:4fc01daae5a5 126 SPI_InitTypeDef Init; /* SPI communication parameters */
bogdanm 92:4fc01daae5a5 127
bogdanm 92:4fc01daae5a5 128 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
bogdanm 92:4fc01daae5a5 129
Kojto 122:f9eeca106725 130 uint16_t TxXferSize; /* SPI Tx Transfer size */
Kojto 122:f9eeca106725 131
Kojto 122:f9eeca106725 132 __IO uint16_t TxXferCount; /* SPI Tx Transfer Counter */
bogdanm 92:4fc01daae5a5 133
bogdanm 92:4fc01daae5a5 134 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
bogdanm 92:4fc01daae5a5 135
Kojto 122:f9eeca106725 136 uint16_t RxXferSize; /* SPI Rx Transfer size */
bogdanm 92:4fc01daae5a5 137
Kojto 122:f9eeca106725 138 __IO uint16_t RxXferCount; /* SPI Rx Transfer Counter */
bogdanm 92:4fc01daae5a5 139
bogdanm 92:4fc01daae5a5 140 void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Rx ISR */
bogdanm 92:4fc01daae5a5 141
bogdanm 92:4fc01daae5a5 142 void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Tx ISR */
bogdanm 92:4fc01daae5a5 143
Kojto 122:f9eeca106725 144 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */
Kojto 122:f9eeca106725 145
Kojto 122:f9eeca106725 146 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */
Kojto 122:f9eeca106725 147
Kojto 122:f9eeca106725 148 HAL_LockTypeDef Lock; /* Locking object */
bogdanm 92:4fc01daae5a5 149
bogdanm 92:4fc01daae5a5 150 __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
bogdanm 92:4fc01daae5a5 151
Kojto 99:dbbf35b96557 152 __IO uint32_t ErrorCode; /* SPI Error code */
bogdanm 92:4fc01daae5a5 153
bogdanm 92:4fc01daae5a5 154 }SPI_HandleTypeDef;
Kojto 122:f9eeca106725 155
Kojto 99:dbbf35b96557 156 /**
Kojto 99:dbbf35b96557 157 * @}
Kojto 99:dbbf35b96557 158 */
bogdanm 92:4fc01daae5a5 159
bogdanm 92:4fc01daae5a5 160 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 161 /** @defgroup SPI_Exported_Constants SPI Exported Constants
bogdanm 92:4fc01daae5a5 162 * @{
bogdanm 92:4fc01daae5a5 163 */
bogdanm 92:4fc01daae5a5 164
Kojto 99:dbbf35b96557 165 /** @defgroup SPI_Error_Code SPI Error Code
Kojto 99:dbbf35b96557 166 * @{
Kojto 122:f9eeca106725 167 */
Kojto 122:f9eeca106725 168 #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
Kojto 122:f9eeca106725 169 #define HAL_SPI_ERROR_MODF ((uint32_t)0x00000001U) /*!< MODF error */
Kojto 122:f9eeca106725 170 #define HAL_SPI_ERROR_CRC ((uint32_t)0x00000002U) /*!< CRC error */
Kojto 122:f9eeca106725 171 #define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004U) /*!< OVR error */
Kojto 122:f9eeca106725 172 #define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008U) /*!< FRE error */
Kojto 122:f9eeca106725 173 #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
Kojto 122:f9eeca106725 174 #define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020U) /*!< Flag: RXNE,TXE, BSY */
Kojto 99:dbbf35b96557 175 /**
Kojto 99:dbbf35b96557 176 * @}
Kojto 99:dbbf35b96557 177 */
Kojto 99:dbbf35b96557 178
Kojto 122:f9eeca106725 179 /** @defgroup SPI_Mode SPI Mode
bogdanm 92:4fc01daae5a5 180 * @{
bogdanm 92:4fc01daae5a5 181 */
Kojto 122:f9eeca106725 182 #define SPI_MODE_SLAVE ((uint32_t)0x00000000U)
bogdanm 92:4fc01daae5a5 183 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
bogdanm 92:4fc01daae5a5 184 /**
bogdanm 92:4fc01daae5a5 185 * @}
bogdanm 92:4fc01daae5a5 186 */
bogdanm 92:4fc01daae5a5 187
Kojto 122:f9eeca106725 188 /** @defgroup SPI_Direction SPI Direction Mode
bogdanm 92:4fc01daae5a5 189 * @{
bogdanm 92:4fc01daae5a5 190 */
Kojto 122:f9eeca106725 191 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 192 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
Kojto 122:f9eeca106725 193 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
bogdanm 92:4fc01daae5a5 194 /**
bogdanm 92:4fc01daae5a5 195 * @}
bogdanm 92:4fc01daae5a5 196 */
bogdanm 92:4fc01daae5a5 197
Kojto 122:f9eeca106725 198 /** @defgroup SPI_Data_Size SPI Data Size
bogdanm 92:4fc01daae5a5 199 * @{
bogdanm 92:4fc01daae5a5 200 */
Kojto 122:f9eeca106725 201 #define SPI_DATASIZE_8BIT ((uint32_t)0x00000000U)
bogdanm 92:4fc01daae5a5 202 #define SPI_DATASIZE_16BIT SPI_CR1_DFF
bogdanm 92:4fc01daae5a5 203 /**
bogdanm 92:4fc01daae5a5 204 * @}
Kojto 122:f9eeca106725 205 */
bogdanm 92:4fc01daae5a5 206
Kojto 122:f9eeca106725 207 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
bogdanm 92:4fc01daae5a5 208 * @{
bogdanm 92:4fc01daae5a5 209 */
Kojto 122:f9eeca106725 210 #define SPI_POLARITY_LOW ((uint32_t)0x00000000U)
bogdanm 92:4fc01daae5a5 211 #define SPI_POLARITY_HIGH SPI_CR1_CPOL
bogdanm 92:4fc01daae5a5 212 /**
bogdanm 92:4fc01daae5a5 213 * @}
bogdanm 92:4fc01daae5a5 214 */
bogdanm 92:4fc01daae5a5 215
Kojto 99:dbbf35b96557 216 /** @defgroup SPI_Clock_Phase SPI Clock Phase
bogdanm 92:4fc01daae5a5 217 * @{
bogdanm 92:4fc01daae5a5 218 */
Kojto 122:f9eeca106725 219 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000U)
bogdanm 92:4fc01daae5a5 220 #define SPI_PHASE_2EDGE SPI_CR1_CPHA
bogdanm 92:4fc01daae5a5 221 /**
bogdanm 92:4fc01daae5a5 222 * @}
bogdanm 92:4fc01daae5a5 223 */
bogdanm 92:4fc01daae5a5 224
Kojto 99:dbbf35b96557 225 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management
bogdanm 92:4fc01daae5a5 226 * @{
bogdanm 92:4fc01daae5a5 227 */
bogdanm 92:4fc01daae5a5 228 #define SPI_NSS_SOFT SPI_CR1_SSM
Kojto 122:f9eeca106725 229 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 230 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000U)
bogdanm 92:4fc01daae5a5 231 /**
bogdanm 92:4fc01daae5a5 232 * @}
Kojto 122:f9eeca106725 233 */
bogdanm 92:4fc01daae5a5 234
Kojto 99:dbbf35b96557 235 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
bogdanm 92:4fc01daae5a5 236 * @{
bogdanm 92:4fc01daae5a5 237 */
Kojto 122:f9eeca106725 238 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 239 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008U)
Kojto 122:f9eeca106725 240 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010U)
Kojto 122:f9eeca106725 241 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018U)
Kojto 122:f9eeca106725 242 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020U)
Kojto 122:f9eeca106725 243 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028U)
Kojto 122:f9eeca106725 244 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030U)
Kojto 122:f9eeca106725 245 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038U)
bogdanm 92:4fc01daae5a5 246 /**
bogdanm 92:4fc01daae5a5 247 * @}
Kojto 122:f9eeca106725 248 */
bogdanm 92:4fc01daae5a5 249
Kojto 122:f9eeca106725 250 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission
bogdanm 92:4fc01daae5a5 251 * @{
bogdanm 92:4fc01daae5a5 252 */
Kojto 122:f9eeca106725 253 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000U)
bogdanm 92:4fc01daae5a5 254 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
bogdanm 92:4fc01daae5a5 255 /**
bogdanm 92:4fc01daae5a5 256 * @}
bogdanm 92:4fc01daae5a5 257 */
bogdanm 92:4fc01daae5a5 258
Kojto 99:dbbf35b96557 259 /** @defgroup SPI_TI_mode SPI TI Mode
bogdanm 92:4fc01daae5a5 260 * @{
bogdanm 92:4fc01daae5a5 261 */
Kojto 122:f9eeca106725 262 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000U)
Kojto 99:dbbf35b96557 263 #define SPI_TIMODE_ENABLE SPI_CR2_FRF
bogdanm 92:4fc01daae5a5 264 /**
bogdanm 92:4fc01daae5a5 265 * @}
bogdanm 92:4fc01daae5a5 266 */
bogdanm 92:4fc01daae5a5 267
Kojto 99:dbbf35b96557 268 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
bogdanm 92:4fc01daae5a5 269 * @{
bogdanm 92:4fc01daae5a5 270 */
Kojto 122:f9eeca106725 271 #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000U)
Kojto 99:dbbf35b96557 272 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
bogdanm 92:4fc01daae5a5 273 /**
bogdanm 92:4fc01daae5a5 274 * @}
bogdanm 92:4fc01daae5a5 275 */
bogdanm 92:4fc01daae5a5 276
Kojto 99:dbbf35b96557 277 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
bogdanm 92:4fc01daae5a5 278 * @{
bogdanm 92:4fc01daae5a5 279 */
bogdanm 92:4fc01daae5a5 280 #define SPI_IT_TXE SPI_CR2_TXEIE
bogdanm 92:4fc01daae5a5 281 #define SPI_IT_RXNE SPI_CR2_RXNEIE
bogdanm 92:4fc01daae5a5 282 #define SPI_IT_ERR SPI_CR2_ERRIE
bogdanm 92:4fc01daae5a5 283 /**
bogdanm 92:4fc01daae5a5 284 * @}
bogdanm 92:4fc01daae5a5 285 */
bogdanm 92:4fc01daae5a5 286
Kojto 122:f9eeca106725 287 /** @defgroup SPI_Flags_definition SPI Flags Definition
bogdanm 92:4fc01daae5a5 288 * @{
bogdanm 92:4fc01daae5a5 289 */
Kojto 122:f9eeca106725 290 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
Kojto 122:f9eeca106725 291 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
Kojto 122:f9eeca106725 292 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
Kojto 122:f9eeca106725 293 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
Kojto 122:f9eeca106725 294 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
Kojto 122:f9eeca106725 295 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
Kojto 122:f9eeca106725 296 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
bogdanm 92:4fc01daae5a5 297 /**
bogdanm 92:4fc01daae5a5 298 * @}
bogdanm 92:4fc01daae5a5 299 */
bogdanm 92:4fc01daae5a5 300
bogdanm 92:4fc01daae5a5 301 /**
bogdanm 92:4fc01daae5a5 302 * @}
bogdanm 92:4fc01daae5a5 303 */
bogdanm 92:4fc01daae5a5 304
bogdanm 92:4fc01daae5a5 305 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 306 /** @defgroup SPI_Exported_Macros SPI Exported Macros
Kojto 99:dbbf35b96557 307 * @{
Kojto 99:dbbf35b96557 308 */
Kojto 122:f9eeca106725 309
Kojto 122:f9eeca106725 310 /** @brief Reset SPI handle state.
Kojto 122:f9eeca106725 311 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 92:4fc01daae5a5 312 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 313 * @retval None
bogdanm 92:4fc01daae5a5 314 */
bogdanm 92:4fc01daae5a5 315 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
bogdanm 92:4fc01daae5a5 316
bogdanm 92:4fc01daae5a5 317 /** @brief Enable or disable the specified SPI interrupts.
Kojto 122:f9eeca106725 318 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 92:4fc01daae5a5 319 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 320 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
bogdanm 92:4fc01daae5a5 321 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 322 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
bogdanm 92:4fc01daae5a5 323 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 92:4fc01daae5a5 324 * @arg SPI_IT_ERR: Error interrupt enable
bogdanm 92:4fc01daae5a5 325 * @retval None
bogdanm 92:4fc01daae5a5 326 */
bogdanm 92:4fc01daae5a5 327 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 328 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
bogdanm 92:4fc01daae5a5 329
Kojto 122:f9eeca106725 330 /** @brief Check whether the specified SPI interrupt source is enabled or not.
Kojto 122:f9eeca106725 331 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 92:4fc01daae5a5 332 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 333 * @param __INTERRUPT__: specifies the SPI interrupt source to check.
bogdanm 92:4fc01daae5a5 334 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 335 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
bogdanm 92:4fc01daae5a5 336 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 92:4fc01daae5a5 337 * @arg SPI_IT_ERR: Error interrupt enable
bogdanm 92:4fc01daae5a5 338 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 339 */
bogdanm 92:4fc01daae5a5 340 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 92:4fc01daae5a5 341
bogdanm 92:4fc01daae5a5 342 /** @brief Check whether the specified SPI flag is set or not.
Kojto 122:f9eeca106725 343 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 92:4fc01daae5a5 344 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 345 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 346 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 347 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
bogdanm 92:4fc01daae5a5 348 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
bogdanm 92:4fc01daae5a5 349 * @arg SPI_FLAG_CRCERR: CRC error flag
bogdanm 92:4fc01daae5a5 350 * @arg SPI_FLAG_MODF: Mode fault flag
bogdanm 92:4fc01daae5a5 351 * @arg SPI_FLAG_OVR: Overrun flag
bogdanm 92:4fc01daae5a5 352 * @arg SPI_FLAG_BSY: Busy flag
Kojto 122:f9eeca106725 353 * @arg SPI_FLAG_FRE: Frame format error flag
bogdanm 92:4fc01daae5a5 354 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 355 */
bogdanm 92:4fc01daae5a5 356 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 92:4fc01daae5a5 357
bogdanm 92:4fc01daae5a5 358 /** @brief Clear the SPI CRCERR pending flag.
Kojto 122:f9eeca106725 359 * @param __HANDLE__: specifies the SPI Handle.
Kojto 122:f9eeca106725 360 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 361 * @retval None
Kojto 122:f9eeca106725 362 */
Kojto 122:f9eeca106725 363 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
Kojto 122:f9eeca106725 364
Kojto 122:f9eeca106725 365 /** @brief Clear the SPI MODF pending flag.
Kojto 122:f9eeca106725 366 * @param __HANDLE__: specifies the SPI Handle.
Kojto 122:f9eeca106725 367 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 368 * @retval None
Kojto 122:f9eeca106725 369 */
Kojto 122:f9eeca106725 370 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
Kojto 122:f9eeca106725 371 do{ \
Kojto 122:f9eeca106725 372 __IO uint32_t tmpreg_modf = 0x00U; \
Kojto 122:f9eeca106725 373 tmpreg_modf = (__HANDLE__)->Instance->SR; \
Kojto 122:f9eeca106725 374 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
Kojto 122:f9eeca106725 375 UNUSED(tmpreg_modf); \
Kojto 122:f9eeca106725 376 } while(0)
Kojto 122:f9eeca106725 377
Kojto 122:f9eeca106725 378 /** @brief Clear the SPI OVR pending flag.
Kojto 122:f9eeca106725 379 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 92:4fc01daae5a5 380 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 381 * @retval None
bogdanm 92:4fc01daae5a5 382 */
Kojto 122:f9eeca106725 383 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
Kojto 122:f9eeca106725 384 do{ \
Kojto 122:f9eeca106725 385 __IO uint32_t tmpreg_ovr = 0x00U; \
Kojto 122:f9eeca106725 386 tmpreg_ovr = (__HANDLE__)->Instance->DR; \
Kojto 122:f9eeca106725 387 tmpreg_ovr = (__HANDLE__)->Instance->SR; \
Kojto 122:f9eeca106725 388 UNUSED(tmpreg_ovr); \
Kojto 122:f9eeca106725 389 } while(0)
bogdanm 92:4fc01daae5a5 390
Kojto 122:f9eeca106725 391 /** @brief Clear the SPI FRE pending flag.
Kojto 122:f9eeca106725 392 * @param __HANDLE__: specifies the SPI Handle.
Kojto 122:f9eeca106725 393 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 394 * @retval None
bogdanm 92:4fc01daae5a5 395 */
Kojto 122:f9eeca106725 396 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
Kojto 122:f9eeca106725 397 do{ \
Kojto 122:f9eeca106725 398 __IO uint32_t tmpreg_fre = 0x00U; \
Kojto 122:f9eeca106725 399 tmpreg_fre = (__HANDLE__)->Instance->SR; \
Kojto 122:f9eeca106725 400 UNUSED(tmpreg_fre); \
Kojto 122:f9eeca106725 401 }while(0)
bogdanm 92:4fc01daae5a5 402
Kojto 122:f9eeca106725 403 /** @brief Enable the SPI peripheral.
Kojto 122:f9eeca106725 404 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 92:4fc01daae5a5 405 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 406 * @retval None
bogdanm 92:4fc01daae5a5 407 */
bogdanm 92:4fc01daae5a5 408 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
bogdanm 92:4fc01daae5a5 409
Kojto 122:f9eeca106725 410 /** @brief Disable the SPI peripheral.
Kojto 122:f9eeca106725 411 * @param __HANDLE__: specifies the SPI Handle.
Kojto 122:f9eeca106725 412 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 99:dbbf35b96557 413 * @retval None
Kojto 99:dbbf35b96557 414 */
Kojto 122:f9eeca106725 415 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
Kojto 99:dbbf35b96557 416 /**
Kojto 99:dbbf35b96557 417 * @}
Kojto 99:dbbf35b96557 418 */
Kojto 122:f9eeca106725 419
Kojto 99:dbbf35b96557 420 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 421 /** @addtogroup SPI_Exported_Functions
Kojto 99:dbbf35b96557 422 * @{
Kojto 99:dbbf35b96557 423 */
bogdanm 92:4fc01daae5a5 424
Kojto 99:dbbf35b96557 425 /** @addtogroup SPI_Exported_Functions_Group1
Kojto 99:dbbf35b96557 426 * @{
Kojto 99:dbbf35b96557 427 */
bogdanm 92:4fc01daae5a5 428 /* Initialization/de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 429 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 430 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 431 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 432 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
Kojto 99:dbbf35b96557 433 /**
Kojto 99:dbbf35b96557 434 * @}
Kojto 99:dbbf35b96557 435 */
bogdanm 92:4fc01daae5a5 436
Kojto 99:dbbf35b96557 437 /** @addtogroup SPI_Exported_Functions_Group2
Kojto 99:dbbf35b96557 438 * @{
Kojto 99:dbbf35b96557 439 */
bogdanm 92:4fc01daae5a5 440 /* I/O operation functions *****************************************************/
bogdanm 92:4fc01daae5a5 441 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 442 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 443 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 444 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 445 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 446 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 92:4fc01daae5a5 447 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 448 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 449 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 92:4fc01daae5a5 450 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 451 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 452 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 453
bogdanm 92:4fc01daae5a5 454 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 455 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 456 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 457 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 458 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 459 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 460 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 461 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
Kojto 99:dbbf35b96557 462 /**
Kojto 99:dbbf35b96557 463 * @}
Kojto 99:dbbf35b96557 464 */
Kojto 122:f9eeca106725 465
Kojto 99:dbbf35b96557 466 /** @addtogroup SPI_Exported_Functions_Group3
Kojto 99:dbbf35b96557 467 * @{
Kojto 99:dbbf35b96557 468 */
Kojto 122:f9eeca106725 469 /* Peripheral State and Error functions ***************************************/
bogdanm 92:4fc01daae5a5 470 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 471 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 472 /**
bogdanm 92:4fc01daae5a5 473 * @}
Kojto 122:f9eeca106725 474 */
bogdanm 92:4fc01daae5a5 475
bogdanm 92:4fc01daae5a5 476 /**
bogdanm 92:4fc01daae5a5 477 * @}
bogdanm 92:4fc01daae5a5 478 */
Kojto 122:f9eeca106725 479
Kojto 99:dbbf35b96557 480 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 481 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 482 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 483
Kojto 99:dbbf35b96557 484 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 485 /** @defgroup SPI_Private_Macros SPI Private Macros
Kojto 99:dbbf35b96557 486 * @{
Kojto 99:dbbf35b96557 487 */
Kojto 99:dbbf35b96557 488
Kojto 122:f9eeca106725 489 /** @brief Set the SPI transmit-only mode.
Kojto 122:f9eeca106725 490 * @param __HANDLE__: specifies the SPI Handle.
Kojto 122:f9eeca106725 491 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 492 * @retval None
Kojto 122:f9eeca106725 493 */
Kojto 122:f9eeca106725 494 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
Kojto 122:f9eeca106725 495
Kojto 122:f9eeca106725 496 /** @brief Set the SPI receive-only mode.
Kojto 122:f9eeca106725 497 * @param __HANDLE__: specifies the SPI Handle.
Kojto 122:f9eeca106725 498 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 499 * @retval None
Kojto 122:f9eeca106725 500 */
Kojto 122:f9eeca106725 501 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
Kojto 122:f9eeca106725 502
Kojto 122:f9eeca106725 503 /** @brief Reset the CRC calculation of the SPI.
Kojto 122:f9eeca106725 504 * @param __HANDLE__: specifies the SPI Handle.
Kojto 122:f9eeca106725 505 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 506 * @retval None
Kojto 122:f9eeca106725 507 */
Kojto 122:f9eeca106725 508 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
Kojto 122:f9eeca106725 509 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
Kojto 122:f9eeca106725 510
Kojto 99:dbbf35b96557 511 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
Kojto 99:dbbf35b96557 512 ((MODE) == SPI_MODE_MASTER))
Kojto 99:dbbf35b96557 513
Kojto 122:f9eeca106725 514 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
Kojto 122:f9eeca106725 515 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
Kojto 122:f9eeca106725 516 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 122:f9eeca106725 517
Kojto 122:f9eeca106725 518 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
Kojto 99:dbbf35b96557 519
Kojto 99:dbbf35b96557 520 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
Kojto 99:dbbf35b96557 521 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 99:dbbf35b96557 522
Kojto 99:dbbf35b96557 523 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
Kojto 99:dbbf35b96557 524 ((DATASIZE) == SPI_DATASIZE_8BIT))
Kojto 99:dbbf35b96557 525
Kojto 99:dbbf35b96557 526 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
Kojto 122:f9eeca106725 527 ((CPOL) == SPI_POLARITY_HIGH))
Kojto 99:dbbf35b96557 528
Kojto 99:dbbf35b96557 529 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
Kojto 99:dbbf35b96557 530 ((CPHA) == SPI_PHASE_2EDGE))
Kojto 99:dbbf35b96557 531
Kojto 99:dbbf35b96557 532 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
Kojto 99:dbbf35b96557 533 ((NSS) == SPI_NSS_HARD_INPUT) || \
Kojto 99:dbbf35b96557 534 ((NSS) == SPI_NSS_HARD_OUTPUT))
Kojto 99:dbbf35b96557 535
Kojto 99:dbbf35b96557 536 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
Kojto 99:dbbf35b96557 537 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
Kojto 99:dbbf35b96557 538 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
Kojto 99:dbbf35b96557 539 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
Kojto 99:dbbf35b96557 540 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
Kojto 99:dbbf35b96557 541 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
Kojto 99:dbbf35b96557 542 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
Kojto 99:dbbf35b96557 543 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
Kojto 99:dbbf35b96557 544
Kojto 99:dbbf35b96557 545 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
Kojto 99:dbbf35b96557 546 ((BIT) == SPI_FIRSTBIT_LSB))
Kojto 99:dbbf35b96557 547
Kojto 99:dbbf35b96557 548 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
Kojto 99:dbbf35b96557 549 ((MODE) == SPI_TIMODE_ENABLE))
Kojto 99:dbbf35b96557 550
Kojto 99:dbbf35b96557 551 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
Kojto 99:dbbf35b96557 552 ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
Kojto 99:dbbf35b96557 553
Kojto 122:f9eeca106725 554 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x01U) && ((POLYNOMIAL) <= 0xFFFFU))
Kojto 99:dbbf35b96557 555
Kojto 99:dbbf35b96557 556 /**
Kojto 99:dbbf35b96557 557 * @}
Kojto 99:dbbf35b96557 558 */
Kojto 99:dbbf35b96557 559
Kojto 99:dbbf35b96557 560 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 561 /** @defgroup SPI_Private_Functions SPI Private Functions
Kojto 99:dbbf35b96557 562 * @{
Kojto 99:dbbf35b96557 563 */
Kojto 99:dbbf35b96557 564
Kojto 99:dbbf35b96557 565 /**
Kojto 99:dbbf35b96557 566 * @}
Kojto 99:dbbf35b96557 567 */
Kojto 99:dbbf35b96557 568
Kojto 99:dbbf35b96557 569 /**
Kojto 99:dbbf35b96557 570 * @}
Kojto 122:f9eeca106725 571 */
Kojto 99:dbbf35b96557 572
Kojto 99:dbbf35b96557 573 /**
Kojto 99:dbbf35b96557 574 * @}
Kojto 99:dbbf35b96557 575 */
Kojto 99:dbbf35b96557 576
bogdanm 92:4fc01daae5a5 577 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 578 }
bogdanm 92:4fc01daae5a5 579 #endif
bogdanm 92:4fc01daae5a5 580
bogdanm 92:4fc01daae5a5 581 #endif /* __STM32F4xx_HAL_SPI_H */
bogdanm 92:4fc01daae5a5 582
bogdanm 92:4fc01daae5a5 583 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/