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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F410RB/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pwr_ex.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
128:9bcdf88f62b0
Child:
145:64910690c574
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 122:f9eeca106725 1 /**
Kojto 122:f9eeca106725 2 ******************************************************************************
Kojto 122:f9eeca106725 3 * @file stm32f4xx_hal_pwr_ex.h
Kojto 122:f9eeca106725 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.0
Kojto 122:f9eeca106725 6 * @date 06-May-2016
Kojto 122:f9eeca106725 7 * @brief Header file of PWR HAL Extension module.
Kojto 122:f9eeca106725 8 ******************************************************************************
Kojto 122:f9eeca106725 9 * @attention
Kojto 122:f9eeca106725 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 122:f9eeca106725 12 *
Kojto 122:f9eeca106725 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 122:f9eeca106725 14 * are permitted provided that the following conditions are met:
Kojto 122:f9eeca106725 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 122:f9eeca106725 16 * this list of conditions and the following disclaimer.
Kojto 122:f9eeca106725 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 122:f9eeca106725 18 * this list of conditions and the following disclaimer in the documentation
Kojto 122:f9eeca106725 19 * and/or other materials provided with the distribution.
Kojto 122:f9eeca106725 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 122:f9eeca106725 21 * may be used to endorse or promote products derived from this software
Kojto 122:f9eeca106725 22 * without specific prior written permission.
Kojto 122:f9eeca106725 23 *
Kojto 122:f9eeca106725 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 122:f9eeca106725 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 122:f9eeca106725 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 122:f9eeca106725 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 122:f9eeca106725 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 122:f9eeca106725 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 122:f9eeca106725 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 122:f9eeca106725 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 122:f9eeca106725 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 122:f9eeca106725 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 122:f9eeca106725 34 *
Kojto 122:f9eeca106725 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
Kojto 122:f9eeca106725 37
Kojto 122:f9eeca106725 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 122:f9eeca106725 39 #ifndef __STM32F4xx_HAL_PWR_EX_H
Kojto 122:f9eeca106725 40 #define __STM32F4xx_HAL_PWR_EX_H
Kojto 122:f9eeca106725 41
Kojto 122:f9eeca106725 42 #ifdef __cplusplus
Kojto 122:f9eeca106725 43 extern "C" {
Kojto 122:f9eeca106725 44 #endif
Kojto 122:f9eeca106725 45
Kojto 122:f9eeca106725 46 /* Includes ------------------------------------------------------------------*/
Kojto 122:f9eeca106725 47 #include "stm32f4xx_hal_def.h"
Kojto 122:f9eeca106725 48
Kojto 122:f9eeca106725 49 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 122:f9eeca106725 50 * @{
Kojto 122:f9eeca106725 51 */
Kojto 122:f9eeca106725 52
Kojto 122:f9eeca106725 53 /** @addtogroup PWREx
Kojto 122:f9eeca106725 54 * @{
Kojto 122:f9eeca106725 55 */
Kojto 122:f9eeca106725 56
Kojto 122:f9eeca106725 57 /* Exported types ------------------------------------------------------------*/
Kojto 122:f9eeca106725 58 /* Exported constants --------------------------------------------------------*/
Kojto 122:f9eeca106725 59 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
Kojto 122:f9eeca106725 60 * @{
Kojto 122:f9eeca106725 61 */
Kojto 122:f9eeca106725 62 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 122:f9eeca106725 63 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
Kojto 122:f9eeca106725 64
Kojto 122:f9eeca106725 65 /** @defgroup PWREx_Regulator_state_in_UnderDrive_mode PWREx Regulator state in UnderDrive mode
Kojto 122:f9eeca106725 66 * @{
Kojto 122:f9eeca106725 67 */
Kojto 122:f9eeca106725 68 #define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR_MRUDS
Kojto 122:f9eeca106725 69 #define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
Kojto 122:f9eeca106725 70 /**
Kojto 122:f9eeca106725 71 * @}
Kojto 122:f9eeca106725 72 */
Kojto 122:f9eeca106725 73
Kojto 122:f9eeca106725 74 /** @defgroup PWREx_Over_Under_Drive_Flag PWREx Over Under Drive Flag
Kojto 122:f9eeca106725 75 * @{
Kojto 122:f9eeca106725 76 */
Kojto 122:f9eeca106725 77 #define PWR_FLAG_ODRDY PWR_CSR_ODRDY
Kojto 122:f9eeca106725 78 #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
Kojto 122:f9eeca106725 79 #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
Kojto 122:f9eeca106725 80 /**
Kojto 122:f9eeca106725 81 * @}
Kojto 122:f9eeca106725 82 */
Kojto 122:f9eeca106725 83 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 122:f9eeca106725 84
Kojto 122:f9eeca106725 85 /** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale
Kojto 122:f9eeca106725 86 * @{
Kojto 122:f9eeca106725 87 */
Kojto 122:f9eeca106725 88 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
Kojto 122:f9eeca106725 89 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */
Kojto 122:f9eeca106725 90 #define PWR_REGULATOR_VOLTAGE_SCALE2 ((uint32_t)0x00000000U) /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */
Kojto 122:f9eeca106725 91 #else
Kojto 122:f9eeca106725 92 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
Kojto 122:f9eeca106725 93 180 MHz by activating the over-drive mode. */
Kojto 122:f9eeca106725 94 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
Kojto 122:f9eeca106725 95 168 MHz by activating the over-drive mode. */
Kojto 122:f9eeca106725 96 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
Kojto 122:f9eeca106725 97 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
Kojto 122:f9eeca106725 98 /**
Kojto 122:f9eeca106725 99 * @}
Kojto 122:f9eeca106725 100 */
Kojto 122:f9eeca106725 101 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
Kojto 122:f9eeca106725 102 defined(STM32F412Rx) || defined(STM32F412Cx)
Kojto 122:f9eeca106725 103 /** @defgroup PWREx_WakeUp_Pins PWREx WakeUp Pins
Kojto 122:f9eeca106725 104 * @{
Kojto 122:f9eeca106725 105 */
Kojto 122:f9eeca106725 106 #define PWR_WAKEUP_PIN2 ((uint32_t)0x00000080U)
Kojto 122:f9eeca106725 107 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
Kojto 122:f9eeca106725 108 defined(STM32F412Rx) || defined(STM32F412Cx)
Kojto 122:f9eeca106725 109 #define PWR_WAKEUP_PIN3 ((uint32_t)0x00000040U)
Kojto 122:f9eeca106725 110 #endif /* STM32F410xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Zx || STM32F412Vx || \
Kojto 122:f9eeca106725 111 STM32F412Rx || STM32F412Cx */
Kojto 122:f9eeca106725 112 /**
Kojto 122:f9eeca106725 113 * @}
Kojto 122:f9eeca106725 114 */
Kojto 122:f9eeca106725 115 #endif /* STM32F410xx || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
Kojto 122:f9eeca106725 116
Kojto 122:f9eeca106725 117 /**
Kojto 122:f9eeca106725 118 * @}
Kojto 122:f9eeca106725 119 */
Kojto 122:f9eeca106725 120
Kojto 122:f9eeca106725 121 /* Exported macro ------------------------------------------------------------*/
Kojto 122:f9eeca106725 122 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
Kojto 122:f9eeca106725 123 * @{
Kojto 122:f9eeca106725 124 */
Kojto 122:f9eeca106725 125
Kojto 122:f9eeca106725 126 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
Kojto 122:f9eeca106725 127 /** @brief macros configure the main internal regulator output voltage.
Kojto 122:f9eeca106725 128 * @param __REGULATOR__: specifies the regulator output voltage to achieve
Kojto 122:f9eeca106725 129 * a tradeoff between performance and power consumption when the device does
Kojto 122:f9eeca106725 130 * not operate at the maximum frequency (refer to the datasheets for more details).
Kojto 122:f9eeca106725 131 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 132 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
Kojto 122:f9eeca106725 133 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
Kojto 122:f9eeca106725 134 * @retval None
Kojto 122:f9eeca106725 135 */
Kojto 122:f9eeca106725 136 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
Kojto 122:f9eeca106725 137 __IO uint32_t tmpreg = 0x00U; \
Kojto 122:f9eeca106725 138 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
Kojto 122:f9eeca106725 139 /* Delay after an RCC peripheral clock enabling */ \
Kojto 122:f9eeca106725 140 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
Kojto 122:f9eeca106725 141 UNUSED(tmpreg); \
Kojto 122:f9eeca106725 142 } while(0)
Kojto 122:f9eeca106725 143 #else
Kojto 122:f9eeca106725 144 /** @brief macros configure the main internal regulator output voltage.
Kojto 122:f9eeca106725 145 * @param __REGULATOR__: specifies the regulator output voltage to achieve
Kojto 122:f9eeca106725 146 * a tradeoff between performance and power consumption when the device does
Kojto 122:f9eeca106725 147 * not operate at the maximum frequency (refer to the datasheets for more details).
Kojto 122:f9eeca106725 148 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 149 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
Kojto 122:f9eeca106725 150 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
Kojto 122:f9eeca106725 151 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
Kojto 122:f9eeca106725 152 * @retval None
Kojto 122:f9eeca106725 153 */
Kojto 122:f9eeca106725 154 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
Kojto 122:f9eeca106725 155 __IO uint32_t tmpreg = 0x00U; \
Kojto 122:f9eeca106725 156 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
Kojto 122:f9eeca106725 157 /* Delay after an RCC peripheral clock enabling */ \
Kojto 122:f9eeca106725 158 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
Kojto 122:f9eeca106725 159 UNUSED(tmpreg); \
Kojto 122:f9eeca106725 160 } while(0)
Kojto 122:f9eeca106725 161 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
Kojto 122:f9eeca106725 162
Kojto 122:f9eeca106725 163 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 122:f9eeca106725 164 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
Kojto 122:f9eeca106725 165 /** @brief Macros to enable or disable the Over drive mode.
Kojto 122:f9eeca106725 166 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
Kojto 122:f9eeca106725 167 */
Kojto 122:f9eeca106725 168 #define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
Kojto 122:f9eeca106725 169 #define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
Kojto 122:f9eeca106725 170
Kojto 122:f9eeca106725 171 /** @brief Macros to enable or disable the Over drive switching.
Kojto 122:f9eeca106725 172 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
Kojto 122:f9eeca106725 173 */
Kojto 122:f9eeca106725 174 #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
Kojto 122:f9eeca106725 175 #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
Kojto 122:f9eeca106725 176
Kojto 122:f9eeca106725 177 /** @brief Macros to enable or disable the Under drive mode.
Kojto 122:f9eeca106725 178 * @note This mode is enabled only with STOP low power mode.
Kojto 122:f9eeca106725 179 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
Kojto 122:f9eeca106725 180 * mode is only available when the main regulator or the low power regulator
Kojto 122:f9eeca106725 181 * is in low voltage mode.
Kojto 122:f9eeca106725 182 * @note If the Under-drive mode was enabled, it is automatically disabled after
Kojto 122:f9eeca106725 183 * exiting Stop mode.
Kojto 122:f9eeca106725 184 * When the voltage regulator operates in Under-drive mode, an additional
Kojto 122:f9eeca106725 185 * startup delay is induced when waking up from Stop mode.
Kojto 122:f9eeca106725 186 */
Kojto 122:f9eeca106725 187 #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
Kojto 122:f9eeca106725 188 #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
Kojto 122:f9eeca106725 189
Kojto 122:f9eeca106725 190 /** @brief Check PWR flag is set or not.
Kojto 122:f9eeca106725 191 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
Kojto 122:f9eeca106725 192 * @param __FLAG__: specifies the flag to check.
Kojto 122:f9eeca106725 193 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 194 * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
Kojto 122:f9eeca106725 195 * is ready
Kojto 122:f9eeca106725 196 * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
Kojto 122:f9eeca106725 197 * switching is ready
Kojto 122:f9eeca106725 198 * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
Kojto 122:f9eeca106725 199 * is enabled in Stop mode
Kojto 122:f9eeca106725 200 * @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto 122:f9eeca106725 201 */
Kojto 122:f9eeca106725 202 #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
Kojto 122:f9eeca106725 203
Kojto 122:f9eeca106725 204 /** @brief Clear the Under-Drive Ready flag.
Kojto 122:f9eeca106725 205 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
Kojto 122:f9eeca106725 206 */
Kojto 122:f9eeca106725 207 #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
Kojto 122:f9eeca106725 208
Kojto 122:f9eeca106725 209 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 122:f9eeca106725 210 /**
Kojto 122:f9eeca106725 211 * @}
Kojto 122:f9eeca106725 212 */
Kojto 122:f9eeca106725 213
Kojto 122:f9eeca106725 214 /* Exported functions --------------------------------------------------------*/
Kojto 122:f9eeca106725 215 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
Kojto 122:f9eeca106725 216 * @{
Kojto 122:f9eeca106725 217 */
Kojto 122:f9eeca106725 218
Kojto 122:f9eeca106725 219 /** @addtogroup PWREx_Exported_Functions_Group1
Kojto 122:f9eeca106725 220 * @{
Kojto 122:f9eeca106725 221 */
Kojto 122:f9eeca106725 222 void HAL_PWREx_EnableFlashPowerDown(void);
Kojto 122:f9eeca106725 223 void HAL_PWREx_DisableFlashPowerDown(void);
Kojto 122:f9eeca106725 224 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
Kojto 122:f9eeca106725 225 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
Kojto 122:f9eeca106725 226 uint32_t HAL_PWREx_GetVoltageRange(void);
Kojto 122:f9eeca106725 227 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
Kojto 122:f9eeca106725 228
Kojto 122:f9eeca106725 229 #if defined(STM32F469xx) || defined(STM32F479xx)
Kojto 122:f9eeca106725 230 void HAL_PWREx_EnableWakeUpPinPolarityRisingEdge(void);
Kojto 122:f9eeca106725 231 void HAL_PWREx_EnableWakeUpPinPolarityFallingEdge(void);
Kojto 122:f9eeca106725 232 #endif /* STM32F469xx || STM32F479xx */
Kojto 122:f9eeca106725 233
Kojto 122:f9eeca106725 234 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F401xC) ||\
Kojto 122:f9eeca106725 235 defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
Kojto 122:f9eeca106725 236 defined(STM32F412Rx) || defined(STM32F412Cx)
Kojto 122:f9eeca106725 237 void HAL_PWREx_EnableMainRegulatorLowVoltage(void);
Kojto 122:f9eeca106725 238 void HAL_PWREx_DisableMainRegulatorLowVoltage(void);
Kojto 122:f9eeca106725 239 void HAL_PWREx_EnableLowRegulatorLowVoltage(void);
Kojto 122:f9eeca106725 240 void HAL_PWREx_DisableLowRegulatorLowVoltage(void);
Kojto 122:f9eeca106725 241 #endif /* STM32F410xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F412Zx || STM32F412Vx ||\
Kojto 122:f9eeca106725 242 STM32F412Rx || STM32F412Cx */
Kojto 122:f9eeca106725 243
Kojto 122:f9eeca106725 244 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) ||\
Kojto 122:f9eeca106725 245 defined(STM32F469xx) || defined(STM32F479xx)
Kojto 122:f9eeca106725 246 HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void);
Kojto 122:f9eeca106725 247 HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void);
Kojto 122:f9eeca106725 248 HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
Kojto 122:f9eeca106725 249 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 122:f9eeca106725 250
Kojto 122:f9eeca106725 251 /**
Kojto 122:f9eeca106725 252 * @}
Kojto 122:f9eeca106725 253 */
Kojto 122:f9eeca106725 254
Kojto 122:f9eeca106725 255 /**
Kojto 122:f9eeca106725 256 * @}
Kojto 122:f9eeca106725 257 */
Kojto 122:f9eeca106725 258 /* Private types -------------------------------------------------------------*/
Kojto 122:f9eeca106725 259 /* Private variables ---------------------------------------------------------*/
Kojto 122:f9eeca106725 260 /* Private constants ---------------------------------------------------------*/
Kojto 122:f9eeca106725 261 /** @defgroup PWREx_Private_Constants PWREx Private Constants
Kojto 122:f9eeca106725 262 * @{
Kojto 122:f9eeca106725 263 */
Kojto 122:f9eeca106725 264
Kojto 122:f9eeca106725 265 /** @defgroup PWREx_register_alias_address PWREx Register alias address
Kojto 122:f9eeca106725 266 * @{
Kojto 122:f9eeca106725 267 */
Kojto 122:f9eeca106725 268 /* ------------- PWR registers bit address in the alias region ---------------*/
Kojto 122:f9eeca106725 269 /* --- CR Register ---*/
Kojto 122:f9eeca106725 270 /* Alias word address of FPDS bit */
Kojto 122:f9eeca106725 271 #define FPDS_BIT_NUMBER POSITION_VAL(PWR_CR_FPDS)
Kojto 122:f9eeca106725 272 #define CR_FPDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (FPDS_BIT_NUMBER * 4U))
Kojto 122:f9eeca106725 273
Kojto 122:f9eeca106725 274 /* Alias word address of ODEN bit */
Kojto 122:f9eeca106725 275 #define ODEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODEN)
Kojto 122:f9eeca106725 276 #define CR_ODEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODEN_BIT_NUMBER * 4U))
Kojto 122:f9eeca106725 277
Kojto 122:f9eeca106725 278 /* Alias word address of ODSWEN bit */
Kojto 122:f9eeca106725 279 #define ODSWEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODSWEN)
Kojto 122:f9eeca106725 280 #define CR_ODSWEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODSWEN_BIT_NUMBER * 4U))
Kojto 122:f9eeca106725 281
Kojto 122:f9eeca106725 282 /* Alias word address of MRLVDS bit */
Kojto 122:f9eeca106725 283 #define MRLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_MRLVDS)
Kojto 122:f9eeca106725 284 #define CR_MRLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (MRLVDS_BIT_NUMBER * 4U))
Kojto 122:f9eeca106725 285
Kojto 122:f9eeca106725 286 /* Alias word address of LPLVDS bit */
Kojto 122:f9eeca106725 287 #define LPLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_LPLVDS)
Kojto 122:f9eeca106725 288 #define CR_LPLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (LPLVDS_BIT_NUMBER * 4U))
Kojto 122:f9eeca106725 289
Kojto 122:f9eeca106725 290 /**
Kojto 122:f9eeca106725 291 * @}
Kojto 122:f9eeca106725 292 */
Kojto 122:f9eeca106725 293
Kojto 122:f9eeca106725 294 /** @defgroup PWREx_CSR_register_alias PWRx CSR Register alias address
Kojto 122:f9eeca106725 295 * @{
Kojto 122:f9eeca106725 296 */
Kojto 122:f9eeca106725 297 /* --- CSR Register ---*/
Kojto 122:f9eeca106725 298 /* Alias word address of BRE bit */
Kojto 122:f9eeca106725 299 #define BRE_BIT_NUMBER POSITION_VAL(PWR_CSR_BRE)
Kojto 122:f9eeca106725 300 #define CSR_BRE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (BRE_BIT_NUMBER * 4U))
Kojto 122:f9eeca106725 301
Kojto 122:f9eeca106725 302 #if defined(STM32F469xx) || defined(STM32F479xx)
Kojto 122:f9eeca106725 303 /* Alias word address of WUPP bit */
Kojto 122:f9eeca106725 304 #define WUPP_BIT_NUMBER POSITION_VAL(PWR_CSR_WUPP)
Kojto 122:f9eeca106725 305 #define CSR_WUPP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (WUPP_BIT_NUMBER * 4U))
Kojto 122:f9eeca106725 306 #endif /* STM32F469xx || STM32F479xx */
Kojto 122:f9eeca106725 307 /**
Kojto 122:f9eeca106725 308 * @}
Kojto 122:f9eeca106725 309 */
Kojto 122:f9eeca106725 310
Kojto 122:f9eeca106725 311 /**
Kojto 122:f9eeca106725 312 * @}
Kojto 122:f9eeca106725 313 */
Kojto 122:f9eeca106725 314
Kojto 122:f9eeca106725 315 /* Private macros ------------------------------------------------------------*/
Kojto 122:f9eeca106725 316 /** @defgroup PWREx_Private_Macros PWREx Private Macros
Kojto 122:f9eeca106725 317 * @{
Kojto 122:f9eeca106725 318 */
Kojto 122:f9eeca106725 319
Kojto 122:f9eeca106725 320 /** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters
Kojto 122:f9eeca106725 321 * @{
Kojto 122:f9eeca106725 322 */
Kojto 122:f9eeca106725 323 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 122:f9eeca106725 324 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
Kojto 122:f9eeca106725 325 #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \
Kojto 122:f9eeca106725 326 ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
Kojto 122:f9eeca106725 327 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 122:f9eeca106725 328
Kojto 122:f9eeca106725 329 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
Kojto 122:f9eeca106725 330 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
Kojto 122:f9eeca106725 331 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
Kojto 122:f9eeca106725 332 #else
Kojto 122:f9eeca106725 333 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
Kojto 122:f9eeca106725 334 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
Kojto 122:f9eeca106725 335 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
Kojto 122:f9eeca106725 336 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
Kojto 122:f9eeca106725 337
Kojto 122:f9eeca106725 338 #if defined(STM32F446xx)
Kojto 122:f9eeca106725 339 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2))
Kojto 122:f9eeca106725 340 #elif defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
Kojto 122:f9eeca106725 341 defined(STM32F412Rx) || defined(STM32F412Cx)
Kojto 122:f9eeca106725 342 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2) || \
Kojto 122:f9eeca106725 343 ((PIN) == PWR_WAKEUP_PIN3))
Kojto 122:f9eeca106725 344 #else
Kojto 122:f9eeca106725 345 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
Kojto 122:f9eeca106725 346 #endif /* STM32F446xx */
Kojto 122:f9eeca106725 347 /**
Kojto 122:f9eeca106725 348 * @}
Kojto 122:f9eeca106725 349 */
Kojto 122:f9eeca106725 350
Kojto 122:f9eeca106725 351 /**
Kojto 122:f9eeca106725 352 * @}
Kojto 122:f9eeca106725 353 */
Kojto 122:f9eeca106725 354
Kojto 122:f9eeca106725 355 /**
Kojto 122:f9eeca106725 356 * @}
Kojto 122:f9eeca106725 357 */
Kojto 122:f9eeca106725 358
Kojto 122:f9eeca106725 359 /**
Kojto 122:f9eeca106725 360 * @}
Kojto 122:f9eeca106725 361 */
Kojto 122:f9eeca106725 362
Kojto 122:f9eeca106725 363 #ifdef __cplusplus
Kojto 122:f9eeca106725 364 }
Kojto 122:f9eeca106725 365 #endif
Kojto 122:f9eeca106725 366
Kojto 122:f9eeca106725 367
Kojto 122:f9eeca106725 368 #endif /* __STM32F4xx_HAL_PWR_EX_H */
Kojto 122:f9eeca106725 369
Kojto 122:f9eeca106725 370 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/