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TARGET_MTB_MTS_DRAGONFLY/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim_ex.h@161:aa5281ff4a02, 2018-02-16 (annotated)

Committer:: AnnaBridge
Date:: Fri Feb 16 16:16:41 2018 +0000
Revision:: 161:aa5281ff4a02
Child:: 163:e59c8e839560

mbed library. Release version 159.

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	161:aa5281ff4a02	1	/**
AnnaBridge	161:aa5281ff4a02	2	******************************************************************************
AnnaBridge	161:aa5281ff4a02	3	* @file stm32f4xx_hal_tim_ex.h
AnnaBridge	161:aa5281ff4a02	4	* @author MCD Application Team
AnnaBridge	161:aa5281ff4a02	5	* @version V1.7.1
AnnaBridge	161:aa5281ff4a02	6	* @date 14-April-2017
AnnaBridge	161:aa5281ff4a02	7	* @brief Header file of TIM HAL Extension module.
AnnaBridge	161:aa5281ff4a02	8	******************************************************************************
AnnaBridge	161:aa5281ff4a02	9	* @attention
AnnaBridge	161:aa5281ff4a02	10	*
AnnaBridge	161:aa5281ff4a02	11	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	161:aa5281ff4a02	12	*
AnnaBridge	161:aa5281ff4a02	13	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	161:aa5281ff4a02	14	* are permitted provided that the following conditions are met:
AnnaBridge	161:aa5281ff4a02	15	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	161:aa5281ff4a02	16	* this list of conditions and the following disclaimer.
AnnaBridge	161:aa5281ff4a02	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	161:aa5281ff4a02	18	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	161:aa5281ff4a02	19	* and/or other materials provided with the distribution.
AnnaBridge	161:aa5281ff4a02	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	161:aa5281ff4a02	21	* may be used to endorse or promote products derived from this software
AnnaBridge	161:aa5281ff4a02	22	* without specific prior written permission.
AnnaBridge	161:aa5281ff4a02	23	*
AnnaBridge	161:aa5281ff4a02	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	161:aa5281ff4a02	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	161:aa5281ff4a02	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	161:aa5281ff4a02	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	161:aa5281ff4a02	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	161:aa5281ff4a02	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	161:aa5281ff4a02	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	161:aa5281ff4a02	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	161:aa5281ff4a02	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	161:aa5281ff4a02	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	161:aa5281ff4a02	34	*
AnnaBridge	161:aa5281ff4a02	35	******************************************************************************
AnnaBridge	161:aa5281ff4a02	36	*/
AnnaBridge	161:aa5281ff4a02	37
AnnaBridge	161:aa5281ff4a02	38	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	161:aa5281ff4a02	39	#ifndef __STM32F4xx_HAL_TIM_EX_H
AnnaBridge	161:aa5281ff4a02	40	#define __STM32F4xx_HAL_TIM_EX_H
AnnaBridge	161:aa5281ff4a02	41
AnnaBridge	161:aa5281ff4a02	42	#ifdef __cplusplus
AnnaBridge	161:aa5281ff4a02	43	extern "C" {
AnnaBridge	161:aa5281ff4a02	44	#endif
AnnaBridge	161:aa5281ff4a02	45
AnnaBridge	161:aa5281ff4a02	46	/* Includes ------------------------------------------------------------------*/
AnnaBridge	161:aa5281ff4a02	47	#include "stm32f4xx_hal_def.h"
AnnaBridge	161:aa5281ff4a02	48
AnnaBridge	161:aa5281ff4a02	49	/** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge	161:aa5281ff4a02	50	* @{
AnnaBridge	161:aa5281ff4a02	51	*/
AnnaBridge	161:aa5281ff4a02	52
AnnaBridge	161:aa5281ff4a02	53	/** @addtogroup TIMEx
AnnaBridge	161:aa5281ff4a02	54	* @{
AnnaBridge	161:aa5281ff4a02	55	*/
AnnaBridge	161:aa5281ff4a02	56
AnnaBridge	161:aa5281ff4a02	57	/* Exported types ------------------------------------------------------------*/
AnnaBridge	161:aa5281ff4a02	58	/** @defgroup TIMEx_Exported_Types TIM Exported Types
AnnaBridge	161:aa5281ff4a02	59	* @{
AnnaBridge	161:aa5281ff4a02	60	*/
AnnaBridge	161:aa5281ff4a02	61
AnnaBridge	161:aa5281ff4a02	62	/**
AnnaBridge	161:aa5281ff4a02	63	* @brief TIM Hall sensor Configuration Structure definition
AnnaBridge	161:aa5281ff4a02	64	*/
AnnaBridge	161:aa5281ff4a02	65
AnnaBridge	161:aa5281ff4a02	66	typedef struct
AnnaBridge	161:aa5281ff4a02	67	{
AnnaBridge	161:aa5281ff4a02	68
AnnaBridge	161:aa5281ff4a02	69	uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
AnnaBridge	161:aa5281ff4a02	70	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
AnnaBridge	161:aa5281ff4a02	71
AnnaBridge	161:aa5281ff4a02	72	uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
AnnaBridge	161:aa5281ff4a02	73	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
AnnaBridge	161:aa5281ff4a02	74
AnnaBridge	161:aa5281ff4a02	75	uint32_t IC1Filter; /*!< Specifies the input capture filter.
AnnaBridge	161:aa5281ff4a02	76	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
AnnaBridge	161:aa5281ff4a02	77
AnnaBridge	161:aa5281ff4a02	78	uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
AnnaBridge	161:aa5281ff4a02	79	This parameter can be a number between Min_Data = 0x0000U and Max_Data = 0xFFFFU */
AnnaBridge	161:aa5281ff4a02	80	} TIM_HallSensor_InitTypeDef;
AnnaBridge	161:aa5281ff4a02	81
AnnaBridge	161:aa5281ff4a02	82	/**
AnnaBridge	161:aa5281ff4a02	83	* @brief TIM Master configuration Structure definition
AnnaBridge	161:aa5281ff4a02	84	*/
AnnaBridge	161:aa5281ff4a02	85	typedef struct {
AnnaBridge	161:aa5281ff4a02	86	uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection.
AnnaBridge	161:aa5281ff4a02	87	This parameter can be a value of @ref TIM_Master_Mode_Selection */
AnnaBridge	161:aa5281ff4a02	88
AnnaBridge	161:aa5281ff4a02	89	uint32_t MasterSlaveMode; /*!< Master/slave mode selection.
AnnaBridge	161:aa5281ff4a02	90	This parameter can be a value of @ref TIM_Master_Slave_Mode */
AnnaBridge	161:aa5281ff4a02	91	}TIM_MasterConfigTypeDef;
AnnaBridge	161:aa5281ff4a02	92
AnnaBridge	161:aa5281ff4a02	93	/**
AnnaBridge	161:aa5281ff4a02	94	* @brief TIM Break and Dead time configuration Structure definition
AnnaBridge	161:aa5281ff4a02	95	*/
AnnaBridge	161:aa5281ff4a02	96	typedef struct
AnnaBridge	161:aa5281ff4a02	97	{
AnnaBridge	161:aa5281ff4a02	98	uint32_t OffStateRunMode; /*!< TIM off state in run mode.
AnnaBridge	161:aa5281ff4a02	99	This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
AnnaBridge	161:aa5281ff4a02	100	uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode.
AnnaBridge	161:aa5281ff4a02	101	This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
AnnaBridge	161:aa5281ff4a02	102	uint32_t LockLevel; /*!< TIM Lock level.
AnnaBridge	161:aa5281ff4a02	103	This parameter can be a value of @ref TIM_Lock_level */
AnnaBridge	161:aa5281ff4a02	104	uint32_t DeadTime; /*!< TIM dead Time.
AnnaBridge	161:aa5281ff4a02	105	This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
AnnaBridge	161:aa5281ff4a02	106	uint32_t BreakState; /*!< TIM Break State.
AnnaBridge	161:aa5281ff4a02	107	This parameter can be a value of @ref TIM_Break_Input_enable_disable */
AnnaBridge	161:aa5281ff4a02	108	uint32_t BreakPolarity; /*!< TIM Break input polarity.
AnnaBridge	161:aa5281ff4a02	109	This parameter can be a value of @ref TIM_Break_Polarity */
AnnaBridge	161:aa5281ff4a02	110	uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state.
AnnaBridge	161:aa5281ff4a02	111	This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
AnnaBridge	161:aa5281ff4a02	112	}TIM_BreakDeadTimeConfigTypeDef;
AnnaBridge	161:aa5281ff4a02	113	/**
AnnaBridge	161:aa5281ff4a02	114	* @}
AnnaBridge	161:aa5281ff4a02	115	*/
AnnaBridge	161:aa5281ff4a02	116
AnnaBridge	161:aa5281ff4a02	117	/* Exported constants --------------------------------------------------------*/
AnnaBridge	161:aa5281ff4a02	118	/** @defgroup TIMEx_Exported_Constants TIM Exported Constants
AnnaBridge	161:aa5281ff4a02	119	* @{
AnnaBridge	161:aa5281ff4a02	120	*/
AnnaBridge	161:aa5281ff4a02	121
AnnaBridge	161:aa5281ff4a02	122	/** @defgroup TIMEx_Remap TIM Remap
AnnaBridge	161:aa5281ff4a02	123	* @{
AnnaBridge	161:aa5281ff4a02	124	*/
AnnaBridge	161:aa5281ff4a02	125	#define TIM_TIM2_TIM8_TRGO 0x00000000U
AnnaBridge	161:aa5281ff4a02	126	#define TIM_TIM2_ETH_PTP 0x00000400U
AnnaBridge	161:aa5281ff4a02	127	#define TIM_TIM2_USBFS_SOF 0x00000800U
AnnaBridge	161:aa5281ff4a02	128	#define TIM_TIM2_USBHS_SOF 0x00000C00U
AnnaBridge	161:aa5281ff4a02	129	#define TIM_TIM5_GPIO 0x00000000U
AnnaBridge	161:aa5281ff4a02	130	#define TIM_TIM5_LSI 0x00000040U
AnnaBridge	161:aa5281ff4a02	131	#define TIM_TIM5_LSE 0x00000080U
AnnaBridge	161:aa5281ff4a02	132	#define TIM_TIM5_RTC 0x000000C0U
AnnaBridge	161:aa5281ff4a02	133	#define TIM_TIM11_GPIO 0x00000000U
AnnaBridge	161:aa5281ff4a02	134	#define TIM_TIM11_HSE 0x00000002U
AnnaBridge	161:aa5281ff4a02	135
AnnaBridge	161:aa5281ff4a02	136	#if defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	161:aa5281ff4a02	137	#define TIM_TIM9_TIM3_TRGO 0x10000000U
AnnaBridge	161:aa5281ff4a02	138	#define TIM_TIM9_LPTIM 0x10000010U
AnnaBridge	161:aa5281ff4a02	139	#define TIM_TIM5_TIM3_TRGO 0x10000000U
AnnaBridge	161:aa5281ff4a02	140	#define TIM_TIM5_LPTIM 0x10000008U
AnnaBridge	161:aa5281ff4a02	141	#define TIM_TIM1_TIM3_TRGO 0x10000000U
AnnaBridge	161:aa5281ff4a02	142	#define TIM_TIM1_LPTIM 0x10000004U
AnnaBridge	161:aa5281ff4a02	143	#endif /* STM32F413xx \| STM32F423xx */
AnnaBridge	161:aa5281ff4a02	144
AnnaBridge	161:aa5281ff4a02	145	#if defined (STM32F446xx)
AnnaBridge	161:aa5281ff4a02	146	#define TIM_TIM11_SPDIFRX 0x00000001U
AnnaBridge	161:aa5281ff4a02	147	#endif /* STM32F446xx */
AnnaBridge	161:aa5281ff4a02	148	/**
AnnaBridge	161:aa5281ff4a02	149	* @}
AnnaBridge	161:aa5281ff4a02	150	*/
AnnaBridge	161:aa5281ff4a02	151
AnnaBridge	161:aa5281ff4a02	152	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	161:aa5281ff4a02	153	/** @defgroup TIMEx_SystemBreakInput TIM System Break Input
AnnaBridge	161:aa5281ff4a02	154	* @{
AnnaBridge	161:aa5281ff4a02	155	*/
AnnaBridge	161:aa5281ff4a02	156	#define TIM_SYSTEMBREAKINPUT_HARDFAULT 0x00000001U /* Core Lockup lock output(Hardfault) is connected to Break Input of TIM1 and TIM8 */
AnnaBridge	161:aa5281ff4a02	157	#define TIM_SYSTEMBREAKINPUT_PVD 0x00000004U /* PVD Interrupt is connected to Break Input of TIM1 and TIM8 */
AnnaBridge	161:aa5281ff4a02	158	#define TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD 0x00000005U /* Core Lockup lock output(Hardfault) and PVD Interrupt are connected to Break Input of TIM1 and TIM8 */
AnnaBridge	161:aa5281ff4a02	159	/**
AnnaBridge	161:aa5281ff4a02	160	* @}
AnnaBridge	161:aa5281ff4a02	161	*/
AnnaBridge	161:aa5281ff4a02	162	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	161:aa5281ff4a02	163
AnnaBridge	161:aa5281ff4a02	164	/**
AnnaBridge	161:aa5281ff4a02	165	* @}
AnnaBridge	161:aa5281ff4a02	166	*/
AnnaBridge	161:aa5281ff4a02	167	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	161:aa5281ff4a02	168	/* Exported functions --------------------------------------------------------*/
AnnaBridge	161:aa5281ff4a02	169	/** @addtogroup TIMEx_Exported_Functions
AnnaBridge	161:aa5281ff4a02	170	* @{
AnnaBridge	161:aa5281ff4a02	171	*/
AnnaBridge	161:aa5281ff4a02	172
AnnaBridge	161:aa5281ff4a02	173	/** @addtogroup TIMEx_Exported_Functions_Group1
AnnaBridge	161:aa5281ff4a02	174	* @{
AnnaBridge	161:aa5281ff4a02	175	*/
AnnaBridge	161:aa5281ff4a02	176	/* Timer Hall Sensor functions **********************************************/
AnnaBridge	161:aa5281ff4a02	177	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);
AnnaBridge	161:aa5281ff4a02	178	HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);
AnnaBridge	161:aa5281ff4a02	179
AnnaBridge	161:aa5281ff4a02	180	void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);
AnnaBridge	161:aa5281ff4a02	181	void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);
AnnaBridge	161:aa5281ff4a02	182
AnnaBridge	161:aa5281ff4a02	183	/* Blocking mode: Polling */
AnnaBridge	161:aa5281ff4a02	184	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);
AnnaBridge	161:aa5281ff4a02	185	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);
AnnaBridge	161:aa5281ff4a02	186	/* Non-Blocking mode: Interrupt */
AnnaBridge	161:aa5281ff4a02	187	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);
AnnaBridge	161:aa5281ff4a02	188	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);
AnnaBridge	161:aa5281ff4a02	189	/* Non-Blocking mode: DMA */
AnnaBridge	161:aa5281ff4a02	190	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);
AnnaBridge	161:aa5281ff4a02	191	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);
AnnaBridge	161:aa5281ff4a02	192	/**
AnnaBridge	161:aa5281ff4a02	193	* @}
AnnaBridge	161:aa5281ff4a02	194	*/
AnnaBridge	161:aa5281ff4a02	195
AnnaBridge	161:aa5281ff4a02	196	/** @addtogroup TIMEx_Exported_Functions_Group2
AnnaBridge	161:aa5281ff4a02	197	* @{
AnnaBridge	161:aa5281ff4a02	198	*/
AnnaBridge	161:aa5281ff4a02	199	/* Timer Complementary Output Compare functions *****************************/
AnnaBridge	161:aa5281ff4a02	200	/* Blocking mode: Polling */
AnnaBridge	161:aa5281ff4a02	201	HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge	161:aa5281ff4a02	202	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge	161:aa5281ff4a02	203
AnnaBridge	161:aa5281ff4a02	204	/* Non-Blocking mode: Interrupt */
AnnaBridge	161:aa5281ff4a02	205	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge	161:aa5281ff4a02	206	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge	161:aa5281ff4a02	207
AnnaBridge	161:aa5281ff4a02	208	/* Non-Blocking mode: DMA */
AnnaBridge	161:aa5281ff4a02	209	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
AnnaBridge	161:aa5281ff4a02	210	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge	161:aa5281ff4a02	211	/**
AnnaBridge	161:aa5281ff4a02	212	* @}
AnnaBridge	161:aa5281ff4a02	213	*/
AnnaBridge	161:aa5281ff4a02	214
AnnaBridge	161:aa5281ff4a02	215	/** @addtogroup TIMEx_Exported_Functions_Group3
AnnaBridge	161:aa5281ff4a02	216	* @{
AnnaBridge	161:aa5281ff4a02	217	*/
AnnaBridge	161:aa5281ff4a02	218	/* Timer Complementary PWM functions ****************************************/
AnnaBridge	161:aa5281ff4a02	219	/* Blocking mode: Polling */
AnnaBridge	161:aa5281ff4a02	220	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge	161:aa5281ff4a02	221	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge	161:aa5281ff4a02	222
AnnaBridge	161:aa5281ff4a02	223	/* Non-Blocking mode: Interrupt */
AnnaBridge	161:aa5281ff4a02	224	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge	161:aa5281ff4a02	225	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge	161:aa5281ff4a02	226	/* Non-Blocking mode: DMA */
AnnaBridge	161:aa5281ff4a02	227	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
AnnaBridge	161:aa5281ff4a02	228	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge	161:aa5281ff4a02	229	/**
AnnaBridge	161:aa5281ff4a02	230	* @}
AnnaBridge	161:aa5281ff4a02	231	*/
AnnaBridge	161:aa5281ff4a02	232
AnnaBridge	161:aa5281ff4a02	233	/** @addtogroup TIMEx_Exported_Functions_Group4
AnnaBridge	161:aa5281ff4a02	234	* @{
AnnaBridge	161:aa5281ff4a02	235	*/
AnnaBridge	161:aa5281ff4a02	236	/* Timer Complementary One Pulse functions **********************************/
AnnaBridge	161:aa5281ff4a02	237	/* Blocking mode: Polling */
AnnaBridge	161:aa5281ff4a02	238	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
AnnaBridge	161:aa5281ff4a02	239	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
AnnaBridge	161:aa5281ff4a02	240
AnnaBridge	161:aa5281ff4a02	241	/* Non-Blocking mode: Interrupt */
AnnaBridge	161:aa5281ff4a02	242	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
AnnaBridge	161:aa5281ff4a02	243	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
AnnaBridge	161:aa5281ff4a02	244	/**
AnnaBridge	161:aa5281ff4a02	245	* @}
AnnaBridge	161:aa5281ff4a02	246	*/
AnnaBridge	161:aa5281ff4a02	247
AnnaBridge	161:aa5281ff4a02	248	/** @addtogroup TIMEx_Exported_Functions_Group5
AnnaBridge	161:aa5281ff4a02	249	* @{
AnnaBridge	161:aa5281ff4a02	250	*/
AnnaBridge	161:aa5281ff4a02	251	/* Extension Control functions ************************************************/
AnnaBridge	161:aa5281ff4a02	252	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge	161:aa5281ff4a02	253	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge	161:aa5281ff4a02	254	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge	161:aa5281ff4a02	255	HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);
AnnaBridge	161:aa5281ff4a02	256	HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
AnnaBridge	161:aa5281ff4a02	257	HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);
AnnaBridge	161:aa5281ff4a02	258	/**
AnnaBridge	161:aa5281ff4a02	259	* @}
AnnaBridge	161:aa5281ff4a02	260	*/
AnnaBridge	161:aa5281ff4a02	261
AnnaBridge	161:aa5281ff4a02	262	/** @addtogroup TIMEx_Exported_Functions_Group6
AnnaBridge	161:aa5281ff4a02	263	* @{
AnnaBridge	161:aa5281ff4a02	264	*/
AnnaBridge	161:aa5281ff4a02	265	/* Extension Callback *********************************************************/
AnnaBridge	161:aa5281ff4a02	266	void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);
AnnaBridge	161:aa5281ff4a02	267	void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);
AnnaBridge	161:aa5281ff4a02	268	void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
AnnaBridge	161:aa5281ff4a02	269	/**
AnnaBridge	161:aa5281ff4a02	270	* @}
AnnaBridge	161:aa5281ff4a02	271	*/
AnnaBridge	161:aa5281ff4a02	272
AnnaBridge	161:aa5281ff4a02	273	/** @addtogroup TIMEx_Exported_Functions_Group7
AnnaBridge	161:aa5281ff4a02	274	* @{
AnnaBridge	161:aa5281ff4a02	275	*/
AnnaBridge	161:aa5281ff4a02	276	/* Extension Peripheral State functions **************************************/
AnnaBridge	161:aa5281ff4a02	277	HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);
AnnaBridge	161:aa5281ff4a02	278	/**
AnnaBridge	161:aa5281ff4a02	279	* @}
AnnaBridge	161:aa5281ff4a02	280	*/
AnnaBridge	161:aa5281ff4a02	281
AnnaBridge	161:aa5281ff4a02	282	/**
AnnaBridge	161:aa5281ff4a02	283	* @}
AnnaBridge	161:aa5281ff4a02	284	*/
AnnaBridge	161:aa5281ff4a02	285
AnnaBridge	161:aa5281ff4a02	286	/* Private types -------------------------------------------------------------*/
AnnaBridge	161:aa5281ff4a02	287	/* Private variables ---------------------------------------------------------*/
AnnaBridge	161:aa5281ff4a02	288	/* Private constants ---------------------------------------------------------*/
AnnaBridge	161:aa5281ff4a02	289	/* Private macros ------------------------------------------------------------*/
AnnaBridge	161:aa5281ff4a02	290	/** @defgroup TIMEx_Private_Macros TIM Private Macros
AnnaBridge	161:aa5281ff4a02	291	* @{
AnnaBridge	161:aa5281ff4a02	292	*/
AnnaBridge	161:aa5281ff4a02	293	#if defined (STM32F446xx)
AnnaBridge	161:aa5281ff4a02	294	#define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)\|\|\
AnnaBridge	161:aa5281ff4a02	295	((TIM_REMAP) == TIM_TIM2_ETH_PTP)\|\|\
AnnaBridge	161:aa5281ff4a02	296	((TIM_REMAP) == TIM_TIM2_USBFS_SOF)\|\|\
AnnaBridge	161:aa5281ff4a02	297	((TIM_REMAP) == TIM_TIM2_USBHS_SOF)\|\|\
AnnaBridge	161:aa5281ff4a02	298	((TIM_REMAP) == TIM_TIM5_GPIO)\|\|\
AnnaBridge	161:aa5281ff4a02	299	((TIM_REMAP) == TIM_TIM5_LSI)\|\|\
AnnaBridge	161:aa5281ff4a02	300	((TIM_REMAP) == TIM_TIM5_LSE)\|\|\
AnnaBridge	161:aa5281ff4a02	301	((TIM_REMAP) == TIM_TIM5_RTC)\|\|\
AnnaBridge	161:aa5281ff4a02	302	((TIM_REMAP) == TIM_TIM11_GPIO)\|\|\
AnnaBridge	161:aa5281ff4a02	303	((TIM_REMAP) == TIM_TIM11_SPDIFRX)\|\|\
AnnaBridge	161:aa5281ff4a02	304	((TIM_REMAP) == TIM_TIM11_HSE))
AnnaBridge	161:aa5281ff4a02	305	#elif defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	161:aa5281ff4a02	306	#define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)\|\|\
AnnaBridge	161:aa5281ff4a02	307	((TIM_REMAP) == TIM_TIM2_ETH_PTP)\|\|\
AnnaBridge	161:aa5281ff4a02	308	((TIM_REMAP) == TIM_TIM2_USBFS_SOF)\|\|\
AnnaBridge	161:aa5281ff4a02	309	((TIM_REMAP) == TIM_TIM2_USBHS_SOF)\|\|\
AnnaBridge	161:aa5281ff4a02	310	((TIM_REMAP) == TIM_TIM5_GPIO)\|\|\
AnnaBridge	161:aa5281ff4a02	311	((TIM_REMAP) == TIM_TIM5_LSI)\|\|\
AnnaBridge	161:aa5281ff4a02	312	((TIM_REMAP) == TIM_TIM5_LSE)\|\|\
AnnaBridge	161:aa5281ff4a02	313	((TIM_REMAP) == TIM_TIM5_RTC)\|\|\
AnnaBridge	161:aa5281ff4a02	314	((TIM_REMAP) == TIM_TIM11_GPIO)\|\|\
AnnaBridge	161:aa5281ff4a02	315	((TIM_REMAP) == TIM_TIM11_HSE)\|\|\
AnnaBridge	161:aa5281ff4a02	316	((TIM_REMAP) == TIM_TIM9_TIM3_TRGO)\|\|\
AnnaBridge	161:aa5281ff4a02	317	((TIM_REMAP) == TIM_TIM9_LPTIM)\|\|\
AnnaBridge	161:aa5281ff4a02	318	((TIM_REMAP) == TIM_TIM5_TIM3_TRGO)\|\|\
AnnaBridge	161:aa5281ff4a02	319	((TIM_REMAP) == TIM_TIM5_LPTIM)\|\|\
AnnaBridge	161:aa5281ff4a02	320	((TIM_REMAP) == TIM_TIM1_TIM3_TRGO)\|\|\
AnnaBridge	161:aa5281ff4a02	321	((TIM_REMAP) == TIM_TIM1_LPTIM))
AnnaBridge	161:aa5281ff4a02	322	#else
AnnaBridge	161:aa5281ff4a02	323	#define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)\|\|\
AnnaBridge	161:aa5281ff4a02	324	((TIM_REMAP) == TIM_TIM2_ETH_PTP)\|\|\
AnnaBridge	161:aa5281ff4a02	325	((TIM_REMAP) == TIM_TIM2_USBFS_SOF)\|\|\
AnnaBridge	161:aa5281ff4a02	326	((TIM_REMAP) == TIM_TIM2_USBHS_SOF)\|\|\
AnnaBridge	161:aa5281ff4a02	327	((TIM_REMAP) == TIM_TIM5_GPIO)\|\|\
AnnaBridge	161:aa5281ff4a02	328	((TIM_REMAP) == TIM_TIM5_LSI)\|\|\
AnnaBridge	161:aa5281ff4a02	329	((TIM_REMAP) == TIM_TIM5_LSE)\|\|\
AnnaBridge	161:aa5281ff4a02	330	((TIM_REMAP) == TIM_TIM5_RTC)\|\|\
AnnaBridge	161:aa5281ff4a02	331	((TIM_REMAP) == TIM_TIM11_GPIO)\|\|\
AnnaBridge	161:aa5281ff4a02	332	((TIM_REMAP) == TIM_TIM11_HSE))
AnnaBridge	161:aa5281ff4a02	333	#endif /* STM32F446xx */
AnnaBridge	161:aa5281ff4a02	334
AnnaBridge	161:aa5281ff4a02	335	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	161:aa5281ff4a02	336	#define IS_TIM_SYSTEMBREAKINPUT(BREAKINPUT) (((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT)\|\|\
AnnaBridge	161:aa5281ff4a02	337	((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_PVD)\|\|\
AnnaBridge	161:aa5281ff4a02	338	((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD))
AnnaBridge	161:aa5281ff4a02	339
AnnaBridge	161:aa5281ff4a02	340	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	161:aa5281ff4a02	341
AnnaBridge	161:aa5281ff4a02	342	#define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU)
AnnaBridge	161:aa5281ff4a02	343	/**
AnnaBridge	161:aa5281ff4a02	344	* @}
AnnaBridge	161:aa5281ff4a02	345	*/
AnnaBridge	161:aa5281ff4a02	346
AnnaBridge	161:aa5281ff4a02	347	/* Private functions ---------------------------------------------------------*/
AnnaBridge	161:aa5281ff4a02	348	/** @defgroup TIMEx_Private_Functions TIM Private Functions
AnnaBridge	161:aa5281ff4a02	349	* @{
AnnaBridge	161:aa5281ff4a02	350	*/
AnnaBridge	161:aa5281ff4a02	351
AnnaBridge	161:aa5281ff4a02	352	/**
AnnaBridge	161:aa5281ff4a02	353	* @}
AnnaBridge	161:aa5281ff4a02	354	*/
AnnaBridge	161:aa5281ff4a02	355
AnnaBridge	161:aa5281ff4a02	356	/**
AnnaBridge	161:aa5281ff4a02	357	* @}
AnnaBridge	161:aa5281ff4a02	358	*/
AnnaBridge	161:aa5281ff4a02	359
AnnaBridge	161:aa5281ff4a02	360	/**
AnnaBridge	161:aa5281ff4a02	361	* @}
AnnaBridge	161:aa5281ff4a02	362	*/
AnnaBridge	161:aa5281ff4a02	363
AnnaBridge	161:aa5281ff4a02	364	#ifdef __cplusplus
AnnaBridge	161:aa5281ff4a02	365	}
AnnaBridge	161:aa5281ff4a02	366	#endif
AnnaBridge	161:aa5281ff4a02	367
AnnaBridge	161:aa5281ff4a02	368	#endif /* __STM32F4xx_HAL_TIM_EX_H */
AnnaBridge	161:aa5281ff4a02	369
AnnaBridge	161:aa5281ff4a02	370	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/