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TARGET_WIZWIKI_W7500ECO/TARGET_WIZNET/TARGET_W7500x/W7500x_Peripheral_Library/W7500x_crg.h@169:a7c7b631e539, 2018-06-22 (annotated)

Committer:
Anna Bridge
Date:
Fri Jun 22 15:38:59 2018 +0100
Revision:
169:a7c7b631e539
Parent:
109:9296ab0bfc11 
mbed library. Release version 162

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 109:9296ab0bfc11 1 /**
Kojto 109:9296ab0bfc11 2 ******************************************************************************
Kojto 109:9296ab0bfc11 3 * @file
Kojto 109:9296ab0bfc11 4 * @author
Kojto 109:9296ab0bfc11 5 * @version
Kojto 109:9296ab0bfc11 6 * @date
Kojto 109:9296ab0bfc11 7 * @brief This file contains all the functions prototypes for the Clock Reset Generator
Kojto 109:9296ab0bfc11 8 * firmware library.
Kojto 109:9296ab0bfc11 9 ******************************************************************************
Kojto 109:9296ab0bfc11 10 *
Kojto 109:9296ab0bfc11 11 ******************************************************************************
Kojto 109:9296ab0bfc11 12 */
Kojto 109:9296ab0bfc11 13
Kojto 109:9296ab0bfc11 14 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 109:9296ab0bfc11 15 #ifndef __W7500X_CRG_H
Kojto 109:9296ab0bfc11 16 #define __W7500X_CRG_H
Kojto 109:9296ab0bfc11 17
Kojto 109:9296ab0bfc11 18 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 19 extern "C" {
Kojto 109:9296ab0bfc11 20 #endif
Kojto 109:9296ab0bfc11 21
Kojto 109:9296ab0bfc11 22 /* Includes ------------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 23 #include "W7500x.h"
Kojto 109:9296ab0bfc11 24
Kojto 109:9296ab0bfc11 25 // It will be in W7500x_crg.h
Kojto 109:9296ab0bfc11 26 typedef enum { CRG_CLK_DIS = 0, CRG_MCLK, CRG_RCLK, CRG_OCLK } CRG_CLK_SOURCE;
Kojto 109:9296ab0bfc11 27 typedef enum { CRG_CLK_HIGH = 0, CRG_CLK_LOW } CRG_CLK_LOW_SOURCE;
Kojto 109:9296ab0bfc11 28 typedef enum { CRG_PREDIV1 = 0, CRG_PREDIV2, CRG_PREDIV4, CRG_PREDIV8, CRG_PREDIV16, \
Kojto 109:9296ab0bfc11 29 CRG_PREDIV32, CRG_PREDIV64, CRG_PREDIV128 } CRG_PREDIV;
Kojto 109:9296ab0bfc11 30 typedef enum { CRG_TIMER0 = 0, CRG_TIMER1 } CRG_TIMER;
Kojto 109:9296ab0bfc11 31 typedef enum { CRG_PWM0 = 0, CRG_PWM1, CRG_PWM2, CRG_PWM3, CRG_PWM4, CRG_PWM5, CRG_PWM6, CRG_PWM7 } CRG_PWM;
Kojto 109:9296ab0bfc11 32
Kojto 109:9296ab0bfc11 33
Kojto 109:9296ab0bfc11 34
Kojto 109:9296ab0bfc11 35 #define IS_CRG_PLL_SRC(SRC) (((SRC) == CRG_RCLK) || ((SRC) == CRG_OCLK))
Kojto 109:9296ab0bfc11 36 #define IS_CRG_FCLK_SRC(SRC) (((SRC) == CRG_MCLK) || ((SRC) == CRG_RCLK) || ((SRC) == CRG_OCLK))
Kojto 109:9296ab0bfc11 37
Kojto 109:9296ab0bfc11 38 #define CRG_CLK_SRC_DEFAULT(SRC) (((SRC) == CRG_CLK_DIS) || ((SRC) == CRG_MCLK) || \
Kojto 109:9296ab0bfc11 39 ((SRC) == CRG_RCLK) || ((SRC) == CRG_OCLK))
Kojto 109:9296ab0bfc11 40 #define CRG_CLK_SRC_LOW(SRC) (((SRC) == CRG_CLK_HIGH) || ((SRC) == CRG_CLK_LOW))
Kojto 109:9296ab0bfc11 41
Kojto 109:9296ab0bfc11 42 #define CRG_CLK_PREDIV_DEFAULT(DIV) (((DIV) == CRG_PREDIV1) || ((DIV) == CRG_PREDIV2) || \
Kojto 109:9296ab0bfc11 43 ((DIV) == CRG_PREDIV4) || ((DIV) == CRG_PREDIV8))
Kojto 109:9296ab0bfc11 44 #define CRG_CLK_PREDIV_ADVANCE(DIV) (((DIV) == CRG_PREDIV1) || ((DIV) == CRG_PREDIV2) || \
Kojto 109:9296ab0bfc11 45 ((DIV) == CRG_PREDIV4) || ((DIV) == CRG_PREDIV8) || \
Kojto 109:9296ab0bfc11 46 ((DIV) == CRG_PREDIV16) || ((DIV) == CRG_PREDIV32) || \
Kojto 109:9296ab0bfc11 47 ((DIV) == CRG_PREDIV64) || ((DIV) == CRG_PREDIV128))
Kojto 109:9296ab0bfc11 48
Kojto 109:9296ab0bfc11 49
Kojto 109:9296ab0bfc11 50 #define IS_CRG_FCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
Kojto 109:9296ab0bfc11 51
Kojto 109:9296ab0bfc11 52 #define IS_CRG_SSPCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 109:9296ab0bfc11 53 #define IS_CRG_SSPCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
Kojto 109:9296ab0bfc11 54
Kojto 109:9296ab0bfc11 55 #define IS_CRG_ADCCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
Kojto 109:9296ab0bfc11 56 #define IS_CRG_ADCCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 109:9296ab0bfc11 57
Kojto 109:9296ab0bfc11 58
Kojto 109:9296ab0bfc11 59
Kojto 109:9296ab0bfc11 60
Kojto 109:9296ab0bfc11 61
Kojto 109:9296ab0bfc11 62 #define IS_CRG_TIMERCLK_NUM(NUM) (((NUM) == CRG_TIMER0) || ((NUM) == CRG_TIMER1))
Kojto 109:9296ab0bfc11 63 #define IS_CRG_TIMERCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 109:9296ab0bfc11 64 #define IS_CRG_TIMERCLK_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
Kojto 109:9296ab0bfc11 65
Kojto 109:9296ab0bfc11 66 #define CRG_SET_TIMERCLK_SSR(NUM,VALUE) \
Kojto 109:9296ab0bfc11 67 (*((volatile uint32_t *)(CRG->TIMER0CLK_SSR) + (0x10ul * NUM)) = VALUE)
Kojto 109:9296ab0bfc11 68 #define CRG_SET_TIMERCLK_PREDIV(NUM,VALUE) \
Kojto 109:9296ab0bfc11 69 (*((volatile uint32_t *)(CRG->TIMER0CLK_PVSR) + (0x10ul * NUM)) = VALUE)
Kojto 109:9296ab0bfc11 70 //#define CRG_SET_TIMERCLK_SSR(num,value) CRG->TIMER##num##CLK_SSR = value
Kojto 109:9296ab0bfc11 71 //#define CRG_SET_TIMERCLK_PREDIV(num,value) CRG->TIMER##num##CLK_PVSR = value
Kojto 109:9296ab0bfc11 72
Kojto 109:9296ab0bfc11 73
Kojto 109:9296ab0bfc11 74 #define IS_CRG_PWMCLK_NUM(NUM) (((NUM) == CRG_PWM0) || ((NUM) == CRG_PWM1) || \
Kojto 109:9296ab0bfc11 75 ((NUM) == CRG_PWM2) || ((NUM) == CRG_PWM3) || \
Kojto 109:9296ab0bfc11 76 ((NUM) == CRG_PWM4) || ((NUM) == CRG_PWM5) || \
Kojto 109:9296ab0bfc11 77 ((NUM) == CRG_PWM6) || ((NUM) == CRG_PWM7) )
Kojto 109:9296ab0bfc11 78 #define IS_CRG_PWMCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 109:9296ab0bfc11 79 #define IS_CRG_PWMCLK_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
Kojto 109:9296ab0bfc11 80
Kojto 109:9296ab0bfc11 81 #define CRG_SET_PWMCLK_SSR(NUM,VALUE) \
Kojto 109:9296ab0bfc11 82 (*((volatile uint32_t *)(CRG->PWM0CLK_SSR) + (0x10ul * NUM)) = VALUE)
Kojto 109:9296ab0bfc11 83 #define CRG_SET_PWMCLK_PREDIV(NUM,VALUE) \
Kojto 109:9296ab0bfc11 84 (*((volatile uint32_t *)(CRG->PWM0CLK_PVSR) + (0x10ul * NUM)) = VALUE)
Kojto 109:9296ab0bfc11 85 //#define CRG_SET_PWMCLK_SSR(num,value) CRG->PWM##num##CLK_SSR = value
Kojto 109:9296ab0bfc11 86 //#define CRG_SET_PWMCLK_PREDIV(num,value) CRG->PWM##num##CLK_PVSR = value
Kojto 109:9296ab0bfc11 87
Kojto 109:9296ab0bfc11 88 #define IS_CRG_RTC_HS_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 109:9296ab0bfc11 89 #define IS_CRG_RTC_HS_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
Kojto 109:9296ab0bfc11 90 #define IS_CRG_RTC_LOW_SRC(SRC) CRG_CLK_SRC_LOW(SRC)
Kojto 109:9296ab0bfc11 91
Kojto 109:9296ab0bfc11 92 #define IS_CRG_WDOGCLK_HS_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 109:9296ab0bfc11 93 #define IS_CRG_WDOGCLK_HS_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
Kojto 109:9296ab0bfc11 94 #define IS_CRG_WDOGCLK_LOW_SRC(SRC) CRG_CLK_SRC_LOW(SRC)
Kojto 109:9296ab0bfc11 95
Kojto 109:9296ab0bfc11 96 #define IS_CRG_UARTCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 109:9296ab0bfc11 97 #define IS_CRG_UARTCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
Kojto 109:9296ab0bfc11 98
Kojto 109:9296ab0bfc11 99 #define IS_CRG_MONCLK_SSR(value) (((value) >= 0x00ul) || ((value) <= 0x13ul))
Kojto 109:9296ab0bfc11 100
Kojto 109:9296ab0bfc11 101 void CRG_DeInit(void);
Kojto 109:9296ab0bfc11 102 void CRG_OSC_PowerDownEnable (FunctionalState NewState);
Kojto 109:9296ab0bfc11 103 void CRG_PLL_PowerDownEnable (FunctionalState NewState);
Kojto 109:9296ab0bfc11 104 void CRG_PLL_OutputEnable (FunctionalState NewState);
Kojto 109:9296ab0bfc11 105 void CRG_PLL_BypassEnable (FunctionalState NewState);
Kojto 109:9296ab0bfc11 106 void CRG_PLL_InputFrequencySelect (CRG_CLK_SOURCE src);
Kojto 109:9296ab0bfc11 107
Kojto 109:9296ab0bfc11 108 void CRG_FCLK_SourceSelect (CRG_CLK_SOURCE src);
Kojto 109:9296ab0bfc11 109 void CRG_FCLK_SetPrescale (CRG_PREDIV prediv);
Kojto 109:9296ab0bfc11 110
Kojto 109:9296ab0bfc11 111 void CRG_SSPCLK_SourceSelect (CRG_CLK_SOURCE src);
Kojto 109:9296ab0bfc11 112 void CRG_SSPCLK_SetPrescale (CRG_PREDIV prediv);
Kojto 109:9296ab0bfc11 113
Kojto 109:9296ab0bfc11 114 void CRG_ADCCLK_SourceSelect (CRG_CLK_SOURCE src);
Kojto 109:9296ab0bfc11 115 void CRG_ADCCLK_SetPrescale (CRG_PREDIV prediv);
Kojto 109:9296ab0bfc11 116
Kojto 109:9296ab0bfc11 117 void CRG_TIMERCLK_SourceSelect (CRG_TIMER num, CRG_CLK_SOURCE src);
Kojto 109:9296ab0bfc11 118 void CRG_TIMERCLK_SetPrescale (CRG_TIMER num, CRG_PREDIV prediv);
Kojto 109:9296ab0bfc11 119
Kojto 109:9296ab0bfc11 120 void CRG_PWMCLK_SourceSelect (CRG_PWM num, CRG_CLK_SOURCE src);
Kojto 109:9296ab0bfc11 121 void CRG_PWMCLK_SetPrescale (CRG_PWM num, CRG_PREDIV prediv);
Kojto 109:9296ab0bfc11 122
Kojto 109:9296ab0bfc11 123 void CRG_RTC_HS_SourceSelect (CRG_CLK_SOURCE src);
Kojto 109:9296ab0bfc11 124 void CRG_RTC_HS_SetPrescale (CRG_PREDIV prediv);
Kojto 109:9296ab0bfc11 125 void CRG_RTC_SourceSelect (CRG_CLK_LOW_SOURCE src);
Kojto 109:9296ab0bfc11 126
Kojto 109:9296ab0bfc11 127 void CRG_WDOGCLK_HS_SourceSelect (CRG_CLK_SOURCE src);
Kojto 109:9296ab0bfc11 128 void CRG_WDOGCLK_HS_SetPrescale (CRG_PREDIV prediv);
Kojto 109:9296ab0bfc11 129 void CRG_WDOGCLK_SourceSelect (CRG_CLK_LOW_SOURCE src);
Kojto 109:9296ab0bfc11 130
Kojto 109:9296ab0bfc11 131 void CRG_UARTCLK_SourceSelect (CRG_CLK_SOURCE src);
Kojto 109:9296ab0bfc11 132 void CRG_UARTCLK_SetPrescale (CRG_PREDIV prediv);
Kojto 109:9296ab0bfc11 133
Kojto 109:9296ab0bfc11 134 void CRG_MII_Enable (FunctionalState rx_clk, FunctionalState tx_clk);
Kojto 109:9296ab0bfc11 135
Kojto 109:9296ab0bfc11 136 void CRG_SetMonitoringClock (uint32_t value);
Kojto 109:9296ab0bfc11 137 uint32_t CRG_GetMonitoringClock (void);
Kojto 109:9296ab0bfc11 138
Kojto 109:9296ab0bfc11 139
Kojto 109:9296ab0bfc11 140 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 141 }
Kojto 109:9296ab0bfc11 142 #endif
Kojto 109:9296ab0bfc11 143
Kojto 109:9296ab0bfc11 144 #endif
Kojto 109:9296ab0bfc11 145