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mbed 2

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TARGET_USI_WM_BN_BM_22/cmsis_iccarm.h@169:a7c7b631e539, 2018-06-22 (annotated)

Committer:
Anna Bridge
Date:
Fri Jun 22 15:38:59 2018 +0100
Revision:
169:a7c7b631e539
Parent:
167:84c0a372a020 
mbed library. Release version 162

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:84c0a372a020 1 /**************************************************************************//**
AnnaBridge 167:84c0a372a020 2 * @file cmsis_iccarm.h
Anna Bridge 169:a7c7b631e539 3 * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file
Anna Bridge 169:a7c7b631e539 4 * @version V5.0.5
Anna Bridge 169:a7c7b631e539 5 * @date 10. January 2018
AnnaBridge 167:84c0a372a020 6 ******************************************************************************/
AnnaBridge 167:84c0a372a020 7
AnnaBridge 167:84c0a372a020 8 //------------------------------------------------------------------------------
AnnaBridge 167:84c0a372a020 9 //
Anna Bridge 169:a7c7b631e539 10 // Copyright (c) 2017-2018 IAR Systems
AnnaBridge 167:84c0a372a020 11 //
AnnaBridge 167:84c0a372a020 12 // Licensed under the Apache License, Version 2.0 (the "License")
AnnaBridge 167:84c0a372a020 13 // you may not use this file except in compliance with the License.
AnnaBridge 167:84c0a372a020 14 // You may obtain a copy of the License at
AnnaBridge 167:84c0a372a020 15 // http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 167:84c0a372a020 16 //
AnnaBridge 167:84c0a372a020 17 // Unless required by applicable law or agreed to in writing, software
AnnaBridge 167:84c0a372a020 18 // distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 167:84c0a372a020 19 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 167:84c0a372a020 20 // See the License for the specific language governing permissions and
AnnaBridge 167:84c0a372a020 21 // limitations under the License.
AnnaBridge 167:84c0a372a020 22 //
AnnaBridge 167:84c0a372a020 23 //------------------------------------------------------------------------------
AnnaBridge 167:84c0a372a020 24
AnnaBridge 167:84c0a372a020 25
AnnaBridge 167:84c0a372a020 26 #ifndef __CMSIS_ICCARM_H__
AnnaBridge 167:84c0a372a020 27 #define __CMSIS_ICCARM_H__
AnnaBridge 167:84c0a372a020 28
AnnaBridge 167:84c0a372a020 29 #ifndef __ICCARM__
AnnaBridge 167:84c0a372a020 30 #error This file should only be compiled by ICCARM
AnnaBridge 167:84c0a372a020 31 #endif
AnnaBridge 167:84c0a372a020 32
AnnaBridge 167:84c0a372a020 33 #pragma system_include
AnnaBridge 167:84c0a372a020 34
AnnaBridge 167:84c0a372a020 35 #define __IAR_FT _Pragma("inline=forced") __intrinsic
AnnaBridge 167:84c0a372a020 36
AnnaBridge 167:84c0a372a020 37 #if (__VER__ >= 8000000)
AnnaBridge 167:84c0a372a020 38 #define __ICCARM_V8 1
AnnaBridge 167:84c0a372a020 39 #else
AnnaBridge 167:84c0a372a020 40 #define __ICCARM_V8 0
AnnaBridge 167:84c0a372a020 41 #endif
AnnaBridge 167:84c0a372a020 42
AnnaBridge 167:84c0a372a020 43 #ifndef __ALIGNED
AnnaBridge 167:84c0a372a020 44 #if __ICCARM_V8
AnnaBridge 167:84c0a372a020 45 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 167:84c0a372a020 46 #elif (__VER__ >= 7080000)
AnnaBridge 167:84c0a372a020 47 /* Needs IAR language extensions */
AnnaBridge 167:84c0a372a020 48 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 167:84c0a372a020 49 #else
AnnaBridge 167:84c0a372a020 50 #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
AnnaBridge 167:84c0a372a020 51 #define __ALIGNED(x)
AnnaBridge 167:84c0a372a020 52 #endif
AnnaBridge 167:84c0a372a020 53 #endif
AnnaBridge 167:84c0a372a020 54
AnnaBridge 167:84c0a372a020 55
AnnaBridge 167:84c0a372a020 56 /* Define compiler macros for CPU architecture, used in CMSIS 5.
AnnaBridge 167:84c0a372a020 57 */
AnnaBridge 167:84c0a372a020 58 #if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
AnnaBridge 167:84c0a372a020 59 /* Macros already defined */
AnnaBridge 167:84c0a372a020 60 #else
AnnaBridge 167:84c0a372a020 61 #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
AnnaBridge 167:84c0a372a020 62 #define __ARM_ARCH_8M_MAIN__ 1
AnnaBridge 167:84c0a372a020 63 #elif defined(__ARM8M_BASELINE__)
AnnaBridge 167:84c0a372a020 64 #define __ARM_ARCH_8M_BASE__ 1
AnnaBridge 167:84c0a372a020 65 #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
AnnaBridge 167:84c0a372a020 66 #if __ARM_ARCH == 6
AnnaBridge 167:84c0a372a020 67 #define __ARM_ARCH_6M__ 1
AnnaBridge 167:84c0a372a020 68 #elif __ARM_ARCH == 7
AnnaBridge 167:84c0a372a020 69 #if __ARM_FEATURE_DSP
AnnaBridge 167:84c0a372a020 70 #define __ARM_ARCH_7EM__ 1
AnnaBridge 167:84c0a372a020 71 #else
AnnaBridge 167:84c0a372a020 72 #define __ARM_ARCH_7M__ 1
AnnaBridge 167:84c0a372a020 73 #endif
AnnaBridge 167:84c0a372a020 74 #endif /* __ARM_ARCH */
AnnaBridge 167:84c0a372a020 75 #endif /* __ARM_ARCH_PROFILE == 'M' */
AnnaBridge 167:84c0a372a020 76 #endif
AnnaBridge 167:84c0a372a020 77
AnnaBridge 167:84c0a372a020 78 /* Alternativ core deduction for older ICCARM's */
AnnaBridge 167:84c0a372a020 79 #if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
AnnaBridge 167:84c0a372a020 80 !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
AnnaBridge 167:84c0a372a020 81 #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
AnnaBridge 167:84c0a372a020 82 #define __ARM_ARCH_6M__ 1
AnnaBridge 167:84c0a372a020 83 #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
AnnaBridge 167:84c0a372a020 84 #define __ARM_ARCH_7M__ 1
AnnaBridge 167:84c0a372a020 85 #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
AnnaBridge 167:84c0a372a020 86 #define __ARM_ARCH_7EM__ 1
AnnaBridge 167:84c0a372a020 87 #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
AnnaBridge 167:84c0a372a020 88 #define __ARM_ARCH_8M_BASE__ 1
AnnaBridge 167:84c0a372a020 89 #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
AnnaBridge 167:84c0a372a020 90 #define __ARM_ARCH_8M_MAIN__ 1
AnnaBridge 167:84c0a372a020 91 #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
AnnaBridge 167:84c0a372a020 92 #define __ARM_ARCH_8M_MAIN__ 1
AnnaBridge 167:84c0a372a020 93 #else
AnnaBridge 167:84c0a372a020 94 #error "Unknown target."
AnnaBridge 167:84c0a372a020 95 #endif
AnnaBridge 167:84c0a372a020 96 #endif
AnnaBridge 167:84c0a372a020 97
AnnaBridge 167:84c0a372a020 98
AnnaBridge 167:84c0a372a020 99
AnnaBridge 167:84c0a372a020 100 #if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
AnnaBridge 167:84c0a372a020 101 #define __IAR_M0_FAMILY 1
AnnaBridge 167:84c0a372a020 102 #elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
AnnaBridge 167:84c0a372a020 103 #define __IAR_M0_FAMILY 1
AnnaBridge 167:84c0a372a020 104 #else
AnnaBridge 167:84c0a372a020 105 #define __IAR_M0_FAMILY 0
AnnaBridge 167:84c0a372a020 106 #endif
AnnaBridge 167:84c0a372a020 107
AnnaBridge 167:84c0a372a020 108
AnnaBridge 167:84c0a372a020 109 #ifndef __ASM
AnnaBridge 167:84c0a372a020 110 #define __ASM __asm
AnnaBridge 167:84c0a372a020 111 #endif
AnnaBridge 167:84c0a372a020 112
AnnaBridge 167:84c0a372a020 113 #ifndef __INLINE
AnnaBridge 167:84c0a372a020 114 #define __INLINE inline
AnnaBridge 167:84c0a372a020 115 #endif
AnnaBridge 167:84c0a372a020 116
AnnaBridge 167:84c0a372a020 117 #ifndef __NO_RETURN
AnnaBridge 167:84c0a372a020 118 #if __ICCARM_V8
Anna Bridge 169:a7c7b631e539 119 #define __NO_RETURN __attribute__((__noreturn__))
AnnaBridge 167:84c0a372a020 120 #else
AnnaBridge 167:84c0a372a020 121 #define __NO_RETURN _Pragma("object_attribute=__noreturn")
AnnaBridge 167:84c0a372a020 122 #endif
AnnaBridge 167:84c0a372a020 123 #endif
AnnaBridge 167:84c0a372a020 124
AnnaBridge 167:84c0a372a020 125 #ifndef __PACKED
AnnaBridge 167:84c0a372a020 126 #if __ICCARM_V8
AnnaBridge 167:84c0a372a020 127 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 167:84c0a372a020 128 #else
AnnaBridge 167:84c0a372a020 129 /* Needs IAR language extensions */
AnnaBridge 167:84c0a372a020 130 #define __PACKED __packed
AnnaBridge 167:84c0a372a020 131 #endif
AnnaBridge 167:84c0a372a020 132 #endif
AnnaBridge 167:84c0a372a020 133
AnnaBridge 167:84c0a372a020 134 #ifndef __PACKED_STRUCT
AnnaBridge 167:84c0a372a020 135 #if __ICCARM_V8
AnnaBridge 167:84c0a372a020 136 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 167:84c0a372a020 137 #else
AnnaBridge 167:84c0a372a020 138 /* Needs IAR language extensions */
AnnaBridge 167:84c0a372a020 139 #define __PACKED_STRUCT __packed struct
AnnaBridge 167:84c0a372a020 140 #endif
AnnaBridge 167:84c0a372a020 141 #endif
AnnaBridge 167:84c0a372a020 142
AnnaBridge 167:84c0a372a020 143 #ifndef __PACKED_UNION
AnnaBridge 167:84c0a372a020 144 #if __ICCARM_V8
AnnaBridge 167:84c0a372a020 145 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
AnnaBridge 167:84c0a372a020 146 #else
AnnaBridge 167:84c0a372a020 147 /* Needs IAR language extensions */
AnnaBridge 167:84c0a372a020 148 #define __PACKED_UNION __packed union
AnnaBridge 167:84c0a372a020 149 #endif
AnnaBridge 167:84c0a372a020 150 #endif
AnnaBridge 167:84c0a372a020 151
AnnaBridge 167:84c0a372a020 152 #ifndef __RESTRICT
Anna Bridge 169:a7c7b631e539 153 #define __RESTRICT restrict
Anna Bridge 169:a7c7b631e539 154 #endif
Anna Bridge 169:a7c7b631e539 155
Anna Bridge 169:a7c7b631e539 156 #ifndef __STATIC_INLINE
Anna Bridge 169:a7c7b631e539 157 #define __STATIC_INLINE static inline
AnnaBridge 167:84c0a372a020 158 #endif
AnnaBridge 167:84c0a372a020 159
Anna Bridge 169:a7c7b631e539 160 #ifndef __FORCEINLINE
Anna Bridge 169:a7c7b631e539 161 #define __FORCEINLINE _Pragma("inline=forced")
Anna Bridge 169:a7c7b631e539 162 #endif
AnnaBridge 167:84c0a372a020 163
Anna Bridge 169:a7c7b631e539 164 #ifndef __STATIC_FORCEINLINE
Anna Bridge 169:a7c7b631e539 165 #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE
AnnaBridge 167:84c0a372a020 166 #endif
AnnaBridge 167:84c0a372a020 167
AnnaBridge 167:84c0a372a020 168 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 167:84c0a372a020 169 #pragma language=save
AnnaBridge 167:84c0a372a020 170 #pragma language=extended
Anna Bridge 169:a7c7b631e539 171 __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
Anna Bridge 169:a7c7b631e539 172 {
AnnaBridge 167:84c0a372a020 173 return *(__packed uint16_t*)(ptr);
AnnaBridge 167:84c0a372a020 174 }
AnnaBridge 167:84c0a372a020 175 #pragma language=restore
AnnaBridge 167:84c0a372a020 176 #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
AnnaBridge 167:84c0a372a020 177 #endif
AnnaBridge 167:84c0a372a020 178
AnnaBridge 167:84c0a372a020 179
AnnaBridge 167:84c0a372a020 180 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 167:84c0a372a020 181 #pragma language=save
AnnaBridge 167:84c0a372a020 182 #pragma language=extended
Anna Bridge 169:a7c7b631e539 183 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
Anna Bridge 169:a7c7b631e539 184 {
AnnaBridge 167:84c0a372a020 185 *(__packed uint16_t*)(ptr) = val;;
AnnaBridge 167:84c0a372a020 186 }
AnnaBridge 167:84c0a372a020 187 #pragma language=restore
AnnaBridge 167:84c0a372a020 188 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
AnnaBridge 167:84c0a372a020 189 #endif
AnnaBridge 167:84c0a372a020 190
AnnaBridge 167:84c0a372a020 191 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 167:84c0a372a020 192 #pragma language=save
AnnaBridge 167:84c0a372a020 193 #pragma language=extended
Anna Bridge 169:a7c7b631e539 194 __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
Anna Bridge 169:a7c7b631e539 195 {
AnnaBridge 167:84c0a372a020 196 return *(__packed uint32_t*)(ptr);
AnnaBridge 167:84c0a372a020 197 }
AnnaBridge 167:84c0a372a020 198 #pragma language=restore
AnnaBridge 167:84c0a372a020 199 #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
AnnaBridge 167:84c0a372a020 200 #endif
AnnaBridge 167:84c0a372a020 201
AnnaBridge 167:84c0a372a020 202 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 167:84c0a372a020 203 #pragma language=save
AnnaBridge 167:84c0a372a020 204 #pragma language=extended
Anna Bridge 169:a7c7b631e539 205 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
Anna Bridge 169:a7c7b631e539 206 {
AnnaBridge 167:84c0a372a020 207 *(__packed uint32_t*)(ptr) = val;;
AnnaBridge 167:84c0a372a020 208 }
AnnaBridge 167:84c0a372a020 209 #pragma language=restore
AnnaBridge 167:84c0a372a020 210 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
AnnaBridge 167:84c0a372a020 211 #endif
AnnaBridge 167:84c0a372a020 212
AnnaBridge 167:84c0a372a020 213 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 167:84c0a372a020 214 #pragma language=save
AnnaBridge 167:84c0a372a020 215 #pragma language=extended
AnnaBridge 167:84c0a372a020 216 __packed struct __iar_u32 { uint32_t v; };
AnnaBridge 167:84c0a372a020 217 #pragma language=restore
AnnaBridge 167:84c0a372a020 218 #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
AnnaBridge 167:84c0a372a020 219 #endif
AnnaBridge 167:84c0a372a020 220
AnnaBridge 167:84c0a372a020 221 #ifndef __USED
AnnaBridge 167:84c0a372a020 222 #if __ICCARM_V8
AnnaBridge 167:84c0a372a020 223 #define __USED __attribute__((used))
AnnaBridge 167:84c0a372a020 224 #else
AnnaBridge 167:84c0a372a020 225 #define __USED _Pragma("__root")
AnnaBridge 167:84c0a372a020 226 #endif
AnnaBridge 167:84c0a372a020 227 #endif
AnnaBridge 167:84c0a372a020 228
AnnaBridge 167:84c0a372a020 229 #ifndef __WEAK
AnnaBridge 167:84c0a372a020 230 #if __ICCARM_V8
AnnaBridge 167:84c0a372a020 231 #define __WEAK __attribute__((weak))
AnnaBridge 167:84c0a372a020 232 #else
AnnaBridge 167:84c0a372a020 233 #define __WEAK _Pragma("__weak")
AnnaBridge 167:84c0a372a020 234 #endif
AnnaBridge 167:84c0a372a020 235 #endif
AnnaBridge 167:84c0a372a020 236
AnnaBridge 167:84c0a372a020 237
AnnaBridge 167:84c0a372a020 238 #ifndef __ICCARM_INTRINSICS_VERSION__
AnnaBridge 167:84c0a372a020 239 #define __ICCARM_INTRINSICS_VERSION__ 0
AnnaBridge 167:84c0a372a020 240 #endif
AnnaBridge 167:84c0a372a020 241
AnnaBridge 167:84c0a372a020 242 #if __ICCARM_INTRINSICS_VERSION__ == 2
AnnaBridge 167:84c0a372a020 243
AnnaBridge 167:84c0a372a020 244 #if defined(__CLZ)
AnnaBridge 167:84c0a372a020 245 #undef __CLZ
AnnaBridge 167:84c0a372a020 246 #endif
AnnaBridge 167:84c0a372a020 247 #if defined(__REVSH)
AnnaBridge 167:84c0a372a020 248 #undef __REVSH
AnnaBridge 167:84c0a372a020 249 #endif
AnnaBridge 167:84c0a372a020 250 #if defined(__RBIT)
AnnaBridge 167:84c0a372a020 251 #undef __RBIT
AnnaBridge 167:84c0a372a020 252 #endif
AnnaBridge 167:84c0a372a020 253 #if defined(__SSAT)
AnnaBridge 167:84c0a372a020 254 #undef __SSAT
AnnaBridge 167:84c0a372a020 255 #endif
AnnaBridge 167:84c0a372a020 256 #if defined(__USAT)
AnnaBridge 167:84c0a372a020 257 #undef __USAT
AnnaBridge 167:84c0a372a020 258 #endif
AnnaBridge 167:84c0a372a020 259
AnnaBridge 167:84c0a372a020 260 #include "iccarm_builtin.h"
AnnaBridge 167:84c0a372a020 261
AnnaBridge 167:84c0a372a020 262 #define __disable_fault_irq __iar_builtin_disable_fiq
AnnaBridge 167:84c0a372a020 263 #define __disable_irq __iar_builtin_disable_interrupt
AnnaBridge 167:84c0a372a020 264 #define __enable_fault_irq __iar_builtin_enable_fiq
AnnaBridge 167:84c0a372a020 265 #define __enable_irq __iar_builtin_enable_interrupt
Anna Bridge 169:a7c7b631e539 266 #define __arm_rsr __iar_builtin_rsr
Anna Bridge 169:a7c7b631e539 267 #define __arm_wsr __iar_builtin_wsr
AnnaBridge 167:84c0a372a020 268
AnnaBridge 167:84c0a372a020 269
AnnaBridge 167:84c0a372a020 270 #define __get_APSR() (__arm_rsr("APSR"))
AnnaBridge 167:84c0a372a020 271 #define __get_BASEPRI() (__arm_rsr("BASEPRI"))
AnnaBridge 167:84c0a372a020 272 #define __get_CONTROL() (__arm_rsr("CONTROL"))
AnnaBridge 167:84c0a372a020 273 #define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
AnnaBridge 167:84c0a372a020 274
AnnaBridge 167:84c0a372a020 275 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 167:84c0a372a020 276 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 167:84c0a372a020 277 #define __get_FPSCR() (__arm_rsr("FPSCR"))
AnnaBridge 167:84c0a372a020 278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
AnnaBridge 167:84c0a372a020 279 #else
AnnaBridge 167:84c0a372a020 280 #define __get_FPSCR() ( 0 )
AnnaBridge 167:84c0a372a020 281 #define __set_FPSCR(VALUE) ((void)VALUE)
AnnaBridge 167:84c0a372a020 282 #endif
AnnaBridge 167:84c0a372a020 283
AnnaBridge 167:84c0a372a020 284 #define __get_IPSR() (__arm_rsr("IPSR"))
AnnaBridge 167:84c0a372a020 285 #define __get_MSP() (__arm_rsr("MSP"))
Anna Bridge 169:a7c7b631e539 286 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 287 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 288 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 289 #define __get_MSPLIM() (0U)
Anna Bridge 169:a7c7b631e539 290 #else
Anna Bridge 169:a7c7b631e539 291 #define __get_MSPLIM() (__arm_rsr("MSPLIM"))
Anna Bridge 169:a7c7b631e539 292 #endif
AnnaBridge 167:84c0a372a020 293 #define __get_PRIMASK() (__arm_rsr("PRIMASK"))
AnnaBridge 167:84c0a372a020 294 #define __get_PSP() (__arm_rsr("PSP"))
Anna Bridge 169:a7c7b631e539 295
Anna Bridge 169:a7c7b631e539 296 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 297 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 298 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 299 #define __get_PSPLIM() (0U)
Anna Bridge 169:a7c7b631e539 300 #else
Anna Bridge 169:a7c7b631e539 301 #define __get_PSPLIM() (__arm_rsr("PSPLIM"))
Anna Bridge 169:a7c7b631e539 302 #endif
Anna Bridge 169:a7c7b631e539 303
AnnaBridge 167:84c0a372a020 304 #define __get_xPSR() (__arm_rsr("xPSR"))
AnnaBridge 167:84c0a372a020 305
AnnaBridge 167:84c0a372a020 306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
AnnaBridge 167:84c0a372a020 307 #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
AnnaBridge 167:84c0a372a020 308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
AnnaBridge 167:84c0a372a020 309 #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE)))
AnnaBridge 167:84c0a372a020 310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
Anna Bridge 169:a7c7b631e539 311
Anna Bridge 169:a7c7b631e539 312 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 313 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 314 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 315 #define __set_MSPLIM(VALUE) ((void)(VALUE))
Anna Bridge 169:a7c7b631e539 316 #else
Anna Bridge 169:a7c7b631e539 317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
Anna Bridge 169:a7c7b631e539 318 #endif
AnnaBridge 167:84c0a372a020 319 #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
AnnaBridge 167:84c0a372a020 320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
Anna Bridge 169:a7c7b631e539 321 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 322 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 323 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 324 #define __set_PSPLIM(VALUE) ((void)(VALUE))
Anna Bridge 169:a7c7b631e539 325 #else
Anna Bridge 169:a7c7b631e539 326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
Anna Bridge 169:a7c7b631e539 327 #endif
AnnaBridge 167:84c0a372a020 328
AnnaBridge 167:84c0a372a020 329 #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS"))
AnnaBridge 167:84c0a372a020 330 #define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE)))
AnnaBridge 167:84c0a372a020 331 #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS"))
AnnaBridge 167:84c0a372a020 332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
AnnaBridge 167:84c0a372a020 333 #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS"))
AnnaBridge 167:84c0a372a020 334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
AnnaBridge 167:84c0a372a020 335 #define __TZ_get_SP_NS() (__arm_rsr("SP_NS"))
AnnaBridge 167:84c0a372a020 336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE)))
AnnaBridge 167:84c0a372a020 337 #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS"))
AnnaBridge 167:84c0a372a020 338 #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE)))
AnnaBridge 167:84c0a372a020 339 #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS"))
AnnaBridge 167:84c0a372a020 340 #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE)))
AnnaBridge 167:84c0a372a020 341 #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS"))
AnnaBridge 167:84c0a372a020 342 #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
AnnaBridge 167:84c0a372a020 343 #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS"))
AnnaBridge 167:84c0a372a020 344 #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
AnnaBridge 167:84c0a372a020 345 #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS"))
AnnaBridge 167:84c0a372a020 346 #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE)))
AnnaBridge 167:84c0a372a020 347
Anna Bridge 169:a7c7b631e539 348 #define __NOP __iar_builtin_no_operation
AnnaBridge 167:84c0a372a020 349
Anna Bridge 169:a7c7b631e539 350 #define __CLZ __iar_builtin_CLZ
Anna Bridge 169:a7c7b631e539 351 #define __CLREX __iar_builtin_CLREX
AnnaBridge 167:84c0a372a020 352
Anna Bridge 169:a7c7b631e539 353 #define __DMB __iar_builtin_DMB
Anna Bridge 169:a7c7b631e539 354 #define __DSB __iar_builtin_DSB
Anna Bridge 169:a7c7b631e539 355 #define __ISB __iar_builtin_ISB
AnnaBridge 167:84c0a372a020 356
AnnaBridge 167:84c0a372a020 357 #define __LDREXB __iar_builtin_LDREXB
AnnaBridge 167:84c0a372a020 358 #define __LDREXH __iar_builtin_LDREXH
AnnaBridge 167:84c0a372a020 359 #define __LDREXW __iar_builtin_LDREX
AnnaBridge 167:84c0a372a020 360
AnnaBridge 167:84c0a372a020 361 #define __RBIT __iar_builtin_RBIT
AnnaBridge 167:84c0a372a020 362 #define __REV __iar_builtin_REV
AnnaBridge 167:84c0a372a020 363 #define __REV16 __iar_builtin_REV16
AnnaBridge 167:84c0a372a020 364
Anna Bridge 169:a7c7b631e539 365 __IAR_FT int16_t __REVSH(int16_t val)
Anna Bridge 169:a7c7b631e539 366 {
Anna Bridge 169:a7c7b631e539 367 return (int16_t) __iar_builtin_REVSH(val);
AnnaBridge 167:84c0a372a020 368 }
AnnaBridge 167:84c0a372a020 369
AnnaBridge 167:84c0a372a020 370 #define __ROR __iar_builtin_ROR
AnnaBridge 167:84c0a372a020 371 #define __RRX __iar_builtin_RRX
AnnaBridge 167:84c0a372a020 372
AnnaBridge 167:84c0a372a020 373 #define __SEV __iar_builtin_SEV
AnnaBridge 167:84c0a372a020 374
AnnaBridge 167:84c0a372a020 375 #if !__IAR_M0_FAMILY
AnnaBridge 167:84c0a372a020 376 #define __SSAT __iar_builtin_SSAT
AnnaBridge 167:84c0a372a020 377 #endif
AnnaBridge 167:84c0a372a020 378
AnnaBridge 167:84c0a372a020 379 #define __STREXB __iar_builtin_STREXB
AnnaBridge 167:84c0a372a020 380 #define __STREXH __iar_builtin_STREXH
AnnaBridge 167:84c0a372a020 381 #define __STREXW __iar_builtin_STREX
AnnaBridge 167:84c0a372a020 382
AnnaBridge 167:84c0a372a020 383 #if !__IAR_M0_FAMILY
AnnaBridge 167:84c0a372a020 384 #define __USAT __iar_builtin_USAT
AnnaBridge 167:84c0a372a020 385 #endif
AnnaBridge 167:84c0a372a020 386
AnnaBridge 167:84c0a372a020 387 #define __WFE __iar_builtin_WFE
AnnaBridge 167:84c0a372a020 388 #define __WFI __iar_builtin_WFI
AnnaBridge 167:84c0a372a020 389
AnnaBridge 167:84c0a372a020 390 #if __ARM_MEDIA__
AnnaBridge 167:84c0a372a020 391 #define __SADD8 __iar_builtin_SADD8
AnnaBridge 167:84c0a372a020 392 #define __QADD8 __iar_builtin_QADD8
AnnaBridge 167:84c0a372a020 393 #define __SHADD8 __iar_builtin_SHADD8
AnnaBridge 167:84c0a372a020 394 #define __UADD8 __iar_builtin_UADD8
AnnaBridge 167:84c0a372a020 395 #define __UQADD8 __iar_builtin_UQADD8
AnnaBridge 167:84c0a372a020 396 #define __UHADD8 __iar_builtin_UHADD8
AnnaBridge 167:84c0a372a020 397 #define __SSUB8 __iar_builtin_SSUB8
AnnaBridge 167:84c0a372a020 398 #define __QSUB8 __iar_builtin_QSUB8
AnnaBridge 167:84c0a372a020 399 #define __SHSUB8 __iar_builtin_SHSUB8
AnnaBridge 167:84c0a372a020 400 #define __USUB8 __iar_builtin_USUB8
AnnaBridge 167:84c0a372a020 401 #define __UQSUB8 __iar_builtin_UQSUB8
AnnaBridge 167:84c0a372a020 402 #define __UHSUB8 __iar_builtin_UHSUB8
AnnaBridge 167:84c0a372a020 403 #define __SADD16 __iar_builtin_SADD16
AnnaBridge 167:84c0a372a020 404 #define __QADD16 __iar_builtin_QADD16
AnnaBridge 167:84c0a372a020 405 #define __SHADD16 __iar_builtin_SHADD16
AnnaBridge 167:84c0a372a020 406 #define __UADD16 __iar_builtin_UADD16
AnnaBridge 167:84c0a372a020 407 #define __UQADD16 __iar_builtin_UQADD16
AnnaBridge 167:84c0a372a020 408 #define __UHADD16 __iar_builtin_UHADD16
AnnaBridge 167:84c0a372a020 409 #define __SSUB16 __iar_builtin_SSUB16
AnnaBridge 167:84c0a372a020 410 #define __QSUB16 __iar_builtin_QSUB16
AnnaBridge 167:84c0a372a020 411 #define __SHSUB16 __iar_builtin_SHSUB16
AnnaBridge 167:84c0a372a020 412 #define __USUB16 __iar_builtin_USUB16
AnnaBridge 167:84c0a372a020 413 #define __UQSUB16 __iar_builtin_UQSUB16
AnnaBridge 167:84c0a372a020 414 #define __UHSUB16 __iar_builtin_UHSUB16
AnnaBridge 167:84c0a372a020 415 #define __SASX __iar_builtin_SASX
AnnaBridge 167:84c0a372a020 416 #define __QASX __iar_builtin_QASX
AnnaBridge 167:84c0a372a020 417 #define __SHASX __iar_builtin_SHASX
AnnaBridge 167:84c0a372a020 418 #define __UASX __iar_builtin_UASX
AnnaBridge 167:84c0a372a020 419 #define __UQASX __iar_builtin_UQASX
AnnaBridge 167:84c0a372a020 420 #define __UHASX __iar_builtin_UHASX
AnnaBridge 167:84c0a372a020 421 #define __SSAX __iar_builtin_SSAX
AnnaBridge 167:84c0a372a020 422 #define __QSAX __iar_builtin_QSAX
AnnaBridge 167:84c0a372a020 423 #define __SHSAX __iar_builtin_SHSAX
AnnaBridge 167:84c0a372a020 424 #define __USAX __iar_builtin_USAX
AnnaBridge 167:84c0a372a020 425 #define __UQSAX __iar_builtin_UQSAX
AnnaBridge 167:84c0a372a020 426 #define __UHSAX __iar_builtin_UHSAX
AnnaBridge 167:84c0a372a020 427 #define __USAD8 __iar_builtin_USAD8
AnnaBridge 167:84c0a372a020 428 #define __USADA8 __iar_builtin_USADA8
AnnaBridge 167:84c0a372a020 429 #define __SSAT16 __iar_builtin_SSAT16
AnnaBridge 167:84c0a372a020 430 #define __USAT16 __iar_builtin_USAT16
AnnaBridge 167:84c0a372a020 431 #define __UXTB16 __iar_builtin_UXTB16
AnnaBridge 167:84c0a372a020 432 #define __UXTAB16 __iar_builtin_UXTAB16
AnnaBridge 167:84c0a372a020 433 #define __SXTB16 __iar_builtin_SXTB16
AnnaBridge 167:84c0a372a020 434 #define __SXTAB16 __iar_builtin_SXTAB16
AnnaBridge 167:84c0a372a020 435 #define __SMUAD __iar_builtin_SMUAD
AnnaBridge 167:84c0a372a020 436 #define __SMUADX __iar_builtin_SMUADX
AnnaBridge 167:84c0a372a020 437 #define __SMMLA __iar_builtin_SMMLA
AnnaBridge 167:84c0a372a020 438 #define __SMLAD __iar_builtin_SMLAD
AnnaBridge 167:84c0a372a020 439 #define __SMLADX __iar_builtin_SMLADX
AnnaBridge 167:84c0a372a020 440 #define __SMLALD __iar_builtin_SMLALD
AnnaBridge 167:84c0a372a020 441 #define __SMLALDX __iar_builtin_SMLALDX
AnnaBridge 167:84c0a372a020 442 #define __SMUSD __iar_builtin_SMUSD
AnnaBridge 167:84c0a372a020 443 #define __SMUSDX __iar_builtin_SMUSDX
AnnaBridge 167:84c0a372a020 444 #define __SMLSD __iar_builtin_SMLSD
AnnaBridge 167:84c0a372a020 445 #define __SMLSDX __iar_builtin_SMLSDX
AnnaBridge 167:84c0a372a020 446 #define __SMLSLD __iar_builtin_SMLSLD
AnnaBridge 167:84c0a372a020 447 #define __SMLSLDX __iar_builtin_SMLSLDX
AnnaBridge 167:84c0a372a020 448 #define __SEL __iar_builtin_SEL
AnnaBridge 167:84c0a372a020 449 #define __QADD __iar_builtin_QADD
AnnaBridge 167:84c0a372a020 450 #define __QSUB __iar_builtin_QSUB
AnnaBridge 167:84c0a372a020 451 #define __PKHBT __iar_builtin_PKHBT
AnnaBridge 167:84c0a372a020 452 #define __PKHTB __iar_builtin_PKHTB
AnnaBridge 167:84c0a372a020 453 #endif
AnnaBridge 167:84c0a372a020 454
AnnaBridge 167:84c0a372a020 455 #else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
AnnaBridge 167:84c0a372a020 456
AnnaBridge 167:84c0a372a020 457 #if __IAR_M0_FAMILY
AnnaBridge 167:84c0a372a020 458 /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
AnnaBridge 167:84c0a372a020 459 #define __CLZ __cmsis_iar_clz_not_active
AnnaBridge 167:84c0a372a020 460 #define __SSAT __cmsis_iar_ssat_not_active
AnnaBridge 167:84c0a372a020 461 #define __USAT __cmsis_iar_usat_not_active
AnnaBridge 167:84c0a372a020 462 #define __RBIT __cmsis_iar_rbit_not_active
AnnaBridge 167:84c0a372a020 463 #define __get_APSR __cmsis_iar_get_APSR_not_active
AnnaBridge 167:84c0a372a020 464 #endif
AnnaBridge 167:84c0a372a020 465
AnnaBridge 167:84c0a372a020 466
AnnaBridge 167:84c0a372a020 467 #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 167:84c0a372a020 468 (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
AnnaBridge 167:84c0a372a020 469 #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
AnnaBridge 167:84c0a372a020 470 #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
AnnaBridge 167:84c0a372a020 471 #endif
AnnaBridge 167:84c0a372a020 472
Anna Bridge 169:a7c7b631e539 473 #ifdef __INTRINSICS_INCLUDED
Anna Bridge 169:a7c7b631e539 474 #error intrinsics.h is already included previously!
Anna Bridge 169:a7c7b631e539 475 #endif
Anna Bridge 169:a7c7b631e539 476
AnnaBridge 167:84c0a372a020 477 #include <intrinsics.h>
AnnaBridge 167:84c0a372a020 478
AnnaBridge 167:84c0a372a020 479 #if __IAR_M0_FAMILY
AnnaBridge 167:84c0a372a020 480 /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
AnnaBridge 167:84c0a372a020 481 #undef __CLZ
AnnaBridge 167:84c0a372a020 482 #undef __SSAT
AnnaBridge 167:84c0a372a020 483 #undef __USAT
AnnaBridge 167:84c0a372a020 484 #undef __RBIT
AnnaBridge 167:84c0a372a020 485 #undef __get_APSR
AnnaBridge 167:84c0a372a020 486
Anna Bridge 169:a7c7b631e539 487 __STATIC_INLINE uint8_t __CLZ(uint32_t data)
Anna Bridge 169:a7c7b631e539 488 {
Anna Bridge 169:a7c7b631e539 489 if (data == 0U) { return 32U; }
AnnaBridge 167:84c0a372a020 490
Anna Bridge 169:a7c7b631e539 491 uint32_t count = 0U;
Anna Bridge 169:a7c7b631e539 492 uint32_t mask = 0x80000000U;
AnnaBridge 167:84c0a372a020 493
Anna Bridge 169:a7c7b631e539 494 while ((data & mask) == 0U)
AnnaBridge 167:84c0a372a020 495 {
Anna Bridge 169:a7c7b631e539 496 count += 1U;
Anna Bridge 169:a7c7b631e539 497 mask = mask >> 1U;
AnnaBridge 167:84c0a372a020 498 }
Anna Bridge 169:a7c7b631e539 499 return count;
AnnaBridge 167:84c0a372a020 500 }
AnnaBridge 167:84c0a372a020 501
Anna Bridge 169:a7c7b631e539 502 __STATIC_INLINE uint32_t __RBIT(uint32_t v)
Anna Bridge 169:a7c7b631e539 503 {
Anna Bridge 169:a7c7b631e539 504 uint8_t sc = 31U;
AnnaBridge 167:84c0a372a020 505 uint32_t r = v;
AnnaBridge 167:84c0a372a020 506 for (v >>= 1U; v; v >>= 1U)
AnnaBridge 167:84c0a372a020 507 {
AnnaBridge 167:84c0a372a020 508 r <<= 1U;
AnnaBridge 167:84c0a372a020 509 r |= v & 1U;
AnnaBridge 167:84c0a372a020 510 sc--;
AnnaBridge 167:84c0a372a020 511 }
AnnaBridge 167:84c0a372a020 512 return (r << sc);
AnnaBridge 167:84c0a372a020 513 }
AnnaBridge 167:84c0a372a020 514
Anna Bridge 169:a7c7b631e539 515 __STATIC_INLINE uint32_t __get_APSR(void)
Anna Bridge 169:a7c7b631e539 516 {
AnnaBridge 167:84c0a372a020 517 uint32_t res;
AnnaBridge 167:84c0a372a020 518 __asm("MRS %0,APSR" : "=r" (res));
AnnaBridge 167:84c0a372a020 519 return res;
AnnaBridge 167:84c0a372a020 520 }
AnnaBridge 167:84c0a372a020 521
AnnaBridge 167:84c0a372a020 522 #endif
AnnaBridge 167:84c0a372a020 523
AnnaBridge 167:84c0a372a020 524 #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 167:84c0a372a020 525 (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
AnnaBridge 167:84c0a372a020 526 #undef __get_FPSCR
AnnaBridge 167:84c0a372a020 527 #undef __set_FPSCR
AnnaBridge 167:84c0a372a020 528 #define __get_FPSCR() (0)
AnnaBridge 167:84c0a372a020 529 #define __set_FPSCR(VALUE) ((void)VALUE)
AnnaBridge 167:84c0a372a020 530 #endif
AnnaBridge 167:84c0a372a020 531
AnnaBridge 167:84c0a372a020 532 #pragma diag_suppress=Pe940
AnnaBridge 167:84c0a372a020 533 #pragma diag_suppress=Pe177
AnnaBridge 167:84c0a372a020 534
AnnaBridge 167:84c0a372a020 535 #define __enable_irq __enable_interrupt
AnnaBridge 167:84c0a372a020 536 #define __disable_irq __disable_interrupt
AnnaBridge 167:84c0a372a020 537 #define __NOP __no_operation
AnnaBridge 167:84c0a372a020 538
AnnaBridge 167:84c0a372a020 539 #define __get_xPSR __get_PSR
AnnaBridge 167:84c0a372a020 540
AnnaBridge 167:84c0a372a020 541 #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
AnnaBridge 167:84c0a372a020 542
Anna Bridge 169:a7c7b631e539 543 __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
Anna Bridge 169:a7c7b631e539 544 {
AnnaBridge 167:84c0a372a020 545 return __LDREX((unsigned long *)ptr);
AnnaBridge 167:84c0a372a020 546 }
AnnaBridge 167:84c0a372a020 547
Anna Bridge 169:a7c7b631e539 548 __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
Anna Bridge 169:a7c7b631e539 549 {
AnnaBridge 167:84c0a372a020 550 return __STREX(value, (unsigned long *)ptr);
AnnaBridge 167:84c0a372a020 551 }
AnnaBridge 167:84c0a372a020 552 #endif
AnnaBridge 167:84c0a372a020 553
AnnaBridge 167:84c0a372a020 554
AnnaBridge 167:84c0a372a020 555 /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
AnnaBridge 167:84c0a372a020 556 #if (__CORTEX_M >= 0x03)
AnnaBridge 167:84c0a372a020 557
Anna Bridge 169:a7c7b631e539 558 __IAR_FT uint32_t __RRX(uint32_t value)
Anna Bridge 169:a7c7b631e539 559 {
AnnaBridge 167:84c0a372a020 560 uint32_t result;
AnnaBridge 167:84c0a372a020 561 __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
AnnaBridge 167:84c0a372a020 562 return(result);
AnnaBridge 167:84c0a372a020 563 }
AnnaBridge 167:84c0a372a020 564
Anna Bridge 169:a7c7b631e539 565 __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
Anna Bridge 169:a7c7b631e539 566 {
AnnaBridge 167:84c0a372a020 567 __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value));
AnnaBridge 167:84c0a372a020 568 }
AnnaBridge 167:84c0a372a020 569
AnnaBridge 167:84c0a372a020 570
Anna Bridge 169:a7c7b631e539 571 #define __enable_fault_irq __enable_fiq
AnnaBridge 167:84c0a372a020 572 #define __disable_fault_irq __disable_fiq
AnnaBridge 167:84c0a372a020 573
AnnaBridge 167:84c0a372a020 574
AnnaBridge 167:84c0a372a020 575 #endif /* (__CORTEX_M >= 0x03) */
AnnaBridge 167:84c0a372a020 576
Anna Bridge 169:a7c7b631e539 577 __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
Anna Bridge 169:a7c7b631e539 578 {
AnnaBridge 167:84c0a372a020 579 return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
AnnaBridge 167:84c0a372a020 580 }
AnnaBridge 167:84c0a372a020 581
AnnaBridge 167:84c0a372a020 582 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 167:84c0a372a020 583 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 167:84c0a372a020 584
Anna Bridge 169:a7c7b631e539 585 __IAR_FT uint32_t __get_MSPLIM(void)
Anna Bridge 169:a7c7b631e539 586 {
Anna Bridge 169:a7c7b631e539 587 uint32_t res;
Anna Bridge 169:a7c7b631e539 588 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 589 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 590 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 591 res = 0U;
Anna Bridge 169:a7c7b631e539 592 #else
Anna Bridge 169:a7c7b631e539 593 __asm volatile("MRS %0,MSPLIM" : "=r" (res));
Anna Bridge 169:a7c7b631e539 594 #endif
Anna Bridge 169:a7c7b631e539 595 return res;
Anna Bridge 169:a7c7b631e539 596 }
Anna Bridge 169:a7c7b631e539 597
Anna Bridge 169:a7c7b631e539 598 __IAR_FT void __set_MSPLIM(uint32_t value)
Anna Bridge 169:a7c7b631e539 599 {
Anna Bridge 169:a7c7b631e539 600 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 601 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 602 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 603 (void)value;
Anna Bridge 169:a7c7b631e539 604 #else
Anna Bridge 169:a7c7b631e539 605 __asm volatile("MSR MSPLIM,%0" :: "r" (value));
Anna Bridge 169:a7c7b631e539 606 #endif
Anna Bridge 169:a7c7b631e539 607 }
Anna Bridge 169:a7c7b631e539 608
Anna Bridge 169:a7c7b631e539 609 __IAR_FT uint32_t __get_PSPLIM(void)
Anna Bridge 169:a7c7b631e539 610 {
Anna Bridge 169:a7c7b631e539 611 uint32_t res;
Anna Bridge 169:a7c7b631e539 612 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 613 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 614 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 615 res = 0U;
Anna Bridge 169:a7c7b631e539 616 #else
Anna Bridge 169:a7c7b631e539 617 __asm volatile("MRS %0,PSPLIM" : "=r" (res));
Anna Bridge 169:a7c7b631e539 618 #endif
Anna Bridge 169:a7c7b631e539 619 return res;
Anna Bridge 169:a7c7b631e539 620 }
Anna Bridge 169:a7c7b631e539 621
Anna Bridge 169:a7c7b631e539 622 __IAR_FT void __set_PSPLIM(uint32_t value)
Anna Bridge 169:a7c7b631e539 623 {
Anna Bridge 169:a7c7b631e539 624 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 625 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 626 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 627 (void)value;
Anna Bridge 169:a7c7b631e539 628 #else
Anna Bridge 169:a7c7b631e539 629 __asm volatile("MSR PSPLIM,%0" :: "r" (value));
Anna Bridge 169:a7c7b631e539 630 #endif
Anna Bridge 169:a7c7b631e539 631 }
Anna Bridge 169:a7c7b631e539 632
Anna Bridge 169:a7c7b631e539 633 __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
Anna Bridge 169:a7c7b631e539 634 {
AnnaBridge 167:84c0a372a020 635 uint32_t res;
AnnaBridge 167:84c0a372a020 636 __asm volatile("MRS %0,CONTROL_NS" : "=r" (res));
AnnaBridge 167:84c0a372a020 637 return res;
AnnaBridge 167:84c0a372a020 638 }
AnnaBridge 167:84c0a372a020 639
Anna Bridge 169:a7c7b631e539 640 __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
Anna Bridge 169:a7c7b631e539 641 {
AnnaBridge 167:84c0a372a020 642 __asm volatile("MSR CONTROL_NS,%0" :: "r" (value));
AnnaBridge 167:84c0a372a020 643 }
AnnaBridge 167:84c0a372a020 644
Anna Bridge 169:a7c7b631e539 645 __IAR_FT uint32_t __TZ_get_PSP_NS(void)
Anna Bridge 169:a7c7b631e539 646 {
AnnaBridge 167:84c0a372a020 647 uint32_t res;
AnnaBridge 167:84c0a372a020 648 __asm volatile("MRS %0,PSP_NS" : "=r" (res));
AnnaBridge 167:84c0a372a020 649 return res;
AnnaBridge 167:84c0a372a020 650 }
AnnaBridge 167:84c0a372a020 651
Anna Bridge 169:a7c7b631e539 652 __IAR_FT void __TZ_set_PSP_NS(uint32_t value)
Anna Bridge 169:a7c7b631e539 653 {
AnnaBridge 167:84c0a372a020 654 __asm volatile("MSR PSP_NS,%0" :: "r" (value));
AnnaBridge 167:84c0a372a020 655 }
AnnaBridge 167:84c0a372a020 656
Anna Bridge 169:a7c7b631e539 657 __IAR_FT uint32_t __TZ_get_MSP_NS(void)
Anna Bridge 169:a7c7b631e539 658 {
AnnaBridge 167:84c0a372a020 659 uint32_t res;
AnnaBridge 167:84c0a372a020 660 __asm volatile("MRS %0,MSP_NS" : "=r" (res));
AnnaBridge 167:84c0a372a020 661 return res;
AnnaBridge 167:84c0a372a020 662 }
AnnaBridge 167:84c0a372a020 663
Anna Bridge 169:a7c7b631e539 664 __IAR_FT void __TZ_set_MSP_NS(uint32_t value)
Anna Bridge 169:a7c7b631e539 665 {
AnnaBridge 167:84c0a372a020 666 __asm volatile("MSR MSP_NS,%0" :: "r" (value));
AnnaBridge 167:84c0a372a020 667 }
AnnaBridge 167:84c0a372a020 668
Anna Bridge 169:a7c7b631e539 669 __IAR_FT uint32_t __TZ_get_SP_NS(void)
Anna Bridge 169:a7c7b631e539 670 {
AnnaBridge 167:84c0a372a020 671 uint32_t res;
AnnaBridge 167:84c0a372a020 672 __asm volatile("MRS %0,SP_NS" : "=r" (res));
AnnaBridge 167:84c0a372a020 673 return res;
AnnaBridge 167:84c0a372a020 674 }
Anna Bridge 169:a7c7b631e539 675 __IAR_FT void __TZ_set_SP_NS(uint32_t value)
Anna Bridge 169:a7c7b631e539 676 {
AnnaBridge 167:84c0a372a020 677 __asm volatile("MSR SP_NS,%0" :: "r" (value));
AnnaBridge 167:84c0a372a020 678 }
AnnaBridge 167:84c0a372a020 679
Anna Bridge 169:a7c7b631e539 680 __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
Anna Bridge 169:a7c7b631e539 681 {
AnnaBridge 167:84c0a372a020 682 uint32_t res;
AnnaBridge 167:84c0a372a020 683 __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res));
AnnaBridge 167:84c0a372a020 684 return res;
AnnaBridge 167:84c0a372a020 685 }
AnnaBridge 167:84c0a372a020 686
Anna Bridge 169:a7c7b631e539 687 __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
Anna Bridge 169:a7c7b631e539 688 {
AnnaBridge 167:84c0a372a020 689 __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value));
AnnaBridge 167:84c0a372a020 690 }
AnnaBridge 167:84c0a372a020 691
Anna Bridge 169:a7c7b631e539 692 __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
Anna Bridge 169:a7c7b631e539 693 {
AnnaBridge 167:84c0a372a020 694 uint32_t res;
AnnaBridge 167:84c0a372a020 695 __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res));
AnnaBridge 167:84c0a372a020 696 return res;
AnnaBridge 167:84c0a372a020 697 }
AnnaBridge 167:84c0a372a020 698
Anna Bridge 169:a7c7b631e539 699 __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
Anna Bridge 169:a7c7b631e539 700 {
AnnaBridge 167:84c0a372a020 701 __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value));
AnnaBridge 167:84c0a372a020 702 }
AnnaBridge 167:84c0a372a020 703
Anna Bridge 169:a7c7b631e539 704 __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
Anna Bridge 169:a7c7b631e539 705 {
AnnaBridge 167:84c0a372a020 706 uint32_t res;
AnnaBridge 167:84c0a372a020 707 __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res));
AnnaBridge 167:84c0a372a020 708 return res;
AnnaBridge 167:84c0a372a020 709 }
AnnaBridge 167:84c0a372a020 710
Anna Bridge 169:a7c7b631e539 711 __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
Anna Bridge 169:a7c7b631e539 712 {
AnnaBridge 167:84c0a372a020 713 __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value));
AnnaBridge 167:84c0a372a020 714 }
AnnaBridge 167:84c0a372a020 715
Anna Bridge 169:a7c7b631e539 716 __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
Anna Bridge 169:a7c7b631e539 717 {
AnnaBridge 167:84c0a372a020 718 uint32_t res;
AnnaBridge 167:84c0a372a020 719 __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res));
AnnaBridge 167:84c0a372a020 720 return res;
AnnaBridge 167:84c0a372a020 721 }
Anna Bridge 169:a7c7b631e539 722 __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
Anna Bridge 169:a7c7b631e539 723 {
AnnaBridge 167:84c0a372a020 724 __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value));
AnnaBridge 167:84c0a372a020 725 }
AnnaBridge 167:84c0a372a020 726
Anna Bridge 169:a7c7b631e539 727 __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
Anna Bridge 169:a7c7b631e539 728 {
AnnaBridge 167:84c0a372a020 729 uint32_t res;
AnnaBridge 167:84c0a372a020 730 __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res));
AnnaBridge 167:84c0a372a020 731 return res;
AnnaBridge 167:84c0a372a020 732 }
AnnaBridge 167:84c0a372a020 733
Anna Bridge 169:a7c7b631e539 734 __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
Anna Bridge 169:a7c7b631e539 735 {
AnnaBridge 167:84c0a372a020 736 __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value));
AnnaBridge 167:84c0a372a020 737 }
AnnaBridge 167:84c0a372a020 738
AnnaBridge 167:84c0a372a020 739 #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
AnnaBridge 167:84c0a372a020 740
AnnaBridge 167:84c0a372a020 741 #endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
AnnaBridge 167:84c0a372a020 742
AnnaBridge 167:84c0a372a020 743 #define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
AnnaBridge 167:84c0a372a020 744
AnnaBridge 167:84c0a372a020 745 #if __IAR_M0_FAMILY
Anna Bridge 169:a7c7b631e539 746 __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
Anna Bridge 169:a7c7b631e539 747 {
Anna Bridge 169:a7c7b631e539 748 if ((sat >= 1U) && (sat <= 32U))
Anna Bridge 169:a7c7b631e539 749 {
AnnaBridge 167:84c0a372a020 750 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
AnnaBridge 167:84c0a372a020 751 const int32_t min = -1 - max ;
Anna Bridge 169:a7c7b631e539 752 if (val > max)
Anna Bridge 169:a7c7b631e539 753 {
AnnaBridge 167:84c0a372a020 754 return max;
Anna Bridge 169:a7c7b631e539 755 }
Anna Bridge 169:a7c7b631e539 756 else if (val < min)
Anna Bridge 169:a7c7b631e539 757 {
AnnaBridge 167:84c0a372a020 758 return min;
AnnaBridge 167:84c0a372a020 759 }
AnnaBridge 167:84c0a372a020 760 }
AnnaBridge 167:84c0a372a020 761 return val;
AnnaBridge 167:84c0a372a020 762 }
AnnaBridge 167:84c0a372a020 763
Anna Bridge 169:a7c7b631e539 764 __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
Anna Bridge 169:a7c7b631e539 765 {
Anna Bridge 169:a7c7b631e539 766 if (sat <= 31U)
Anna Bridge 169:a7c7b631e539 767 {
AnnaBridge 167:84c0a372a020 768 const uint32_t max = ((1U << sat) - 1U);
Anna Bridge 169:a7c7b631e539 769 if (val > (int32_t)max)
Anna Bridge 169:a7c7b631e539 770 {
AnnaBridge 167:84c0a372a020 771 return max;
Anna Bridge 169:a7c7b631e539 772 }
Anna Bridge 169:a7c7b631e539 773 else if (val < 0)
Anna Bridge 169:a7c7b631e539 774 {
AnnaBridge 167:84c0a372a020 775 return 0U;
AnnaBridge 167:84c0a372a020 776 }
AnnaBridge 167:84c0a372a020 777 }
AnnaBridge 167:84c0a372a020 778 return (uint32_t)val;
AnnaBridge 167:84c0a372a020 779 }
AnnaBridge 167:84c0a372a020 780 #endif
AnnaBridge 167:84c0a372a020 781
AnnaBridge 167:84c0a372a020 782 #if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
AnnaBridge 167:84c0a372a020 783
Anna Bridge 169:a7c7b631e539 784 __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
Anna Bridge 169:a7c7b631e539 785 {
AnnaBridge 167:84c0a372a020 786 uint32_t res;
AnnaBridge 167:84c0a372a020 787 __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
AnnaBridge 167:84c0a372a020 788 return ((uint8_t)res);
AnnaBridge 167:84c0a372a020 789 }
AnnaBridge 167:84c0a372a020 790
Anna Bridge 169:a7c7b631e539 791 __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
Anna Bridge 169:a7c7b631e539 792 {
AnnaBridge 167:84c0a372a020 793 uint32_t res;
AnnaBridge 167:84c0a372a020 794 __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
AnnaBridge 167:84c0a372a020 795 return ((uint16_t)res);
AnnaBridge 167:84c0a372a020 796 }
AnnaBridge 167:84c0a372a020 797
Anna Bridge 169:a7c7b631e539 798 __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
Anna Bridge 169:a7c7b631e539 799 {
AnnaBridge 167:84c0a372a020 800 uint32_t res;
AnnaBridge 167:84c0a372a020 801 __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
AnnaBridge 167:84c0a372a020 802 return res;
AnnaBridge 167:84c0a372a020 803 }
AnnaBridge 167:84c0a372a020 804
Anna Bridge 169:a7c7b631e539 805 __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
Anna Bridge 169:a7c7b631e539 806 {
AnnaBridge 167:84c0a372a020 807 __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
AnnaBridge 167:84c0a372a020 808 }
AnnaBridge 167:84c0a372a020 809
Anna Bridge 169:a7c7b631e539 810 __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
Anna Bridge 169:a7c7b631e539 811 {
AnnaBridge 167:84c0a372a020 812 __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
AnnaBridge 167:84c0a372a020 813 }
AnnaBridge 167:84c0a372a020 814
Anna Bridge 169:a7c7b631e539 815 __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
Anna Bridge 169:a7c7b631e539 816 {
AnnaBridge 167:84c0a372a020 817 __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
AnnaBridge 167:84c0a372a020 818 }
AnnaBridge 167:84c0a372a020 819
AnnaBridge 167:84c0a372a020 820 #endif /* (__CORTEX_M >= 0x03) */
AnnaBridge 167:84c0a372a020 821
AnnaBridge 167:84c0a372a020 822 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 167:84c0a372a020 823 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 167:84c0a372a020 824
AnnaBridge 167:84c0a372a020 825
Anna Bridge 169:a7c7b631e539 826 __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
Anna Bridge 169:a7c7b631e539 827 {
AnnaBridge 167:84c0a372a020 828 uint32_t res;
AnnaBridge 167:84c0a372a020 829 __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 167:84c0a372a020 830 return ((uint8_t)res);
AnnaBridge 167:84c0a372a020 831 }
AnnaBridge 167:84c0a372a020 832
Anna Bridge 169:a7c7b631e539 833 __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
Anna Bridge 169:a7c7b631e539 834 {
AnnaBridge 167:84c0a372a020 835 uint32_t res;
AnnaBridge 167:84c0a372a020 836 __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 167:84c0a372a020 837 return ((uint16_t)res);
AnnaBridge 167:84c0a372a020 838 }
AnnaBridge 167:84c0a372a020 839
Anna Bridge 169:a7c7b631e539 840 __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
Anna Bridge 169:a7c7b631e539 841 {
AnnaBridge 167:84c0a372a020 842 uint32_t res;
AnnaBridge 167:84c0a372a020 843 __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 167:84c0a372a020 844 return res;
AnnaBridge 167:84c0a372a020 845 }
AnnaBridge 167:84c0a372a020 846
Anna Bridge 169:a7c7b631e539 847 __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
Anna Bridge 169:a7c7b631e539 848 {
AnnaBridge 167:84c0a372a020 849 __ASM volatile ("STLB %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
AnnaBridge 167:84c0a372a020 850 }
AnnaBridge 167:84c0a372a020 851
Anna Bridge 169:a7c7b631e539 852 __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
Anna Bridge 169:a7c7b631e539 853 {
AnnaBridge 167:84c0a372a020 854 __ASM volatile ("STLH %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
AnnaBridge 167:84c0a372a020 855 }
AnnaBridge 167:84c0a372a020 856
Anna Bridge 169:a7c7b631e539 857 __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
Anna Bridge 169:a7c7b631e539 858 {
AnnaBridge 167:84c0a372a020 859 __ASM volatile ("STL %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
AnnaBridge 167:84c0a372a020 860 }
AnnaBridge 167:84c0a372a020 861
Anna Bridge 169:a7c7b631e539 862 __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
Anna Bridge 169:a7c7b631e539 863 {
AnnaBridge 167:84c0a372a020 864 uint32_t res;
AnnaBridge 167:84c0a372a020 865 __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 167:84c0a372a020 866 return ((uint8_t)res);
AnnaBridge 167:84c0a372a020 867 }
AnnaBridge 167:84c0a372a020 868
Anna Bridge 169:a7c7b631e539 869 __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
Anna Bridge 169:a7c7b631e539 870 {
AnnaBridge 167:84c0a372a020 871 uint32_t res;
AnnaBridge 167:84c0a372a020 872 __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 167:84c0a372a020 873 return ((uint16_t)res);
AnnaBridge 167:84c0a372a020 874 }
AnnaBridge 167:84c0a372a020 875
Anna Bridge 169:a7c7b631e539 876 __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
Anna Bridge 169:a7c7b631e539 877 {
AnnaBridge 167:84c0a372a020 878 uint32_t res;
AnnaBridge 167:84c0a372a020 879 __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
AnnaBridge 167:84c0a372a020 880 return res;
AnnaBridge 167:84c0a372a020 881 }
AnnaBridge 167:84c0a372a020 882
Anna Bridge 169:a7c7b631e539 883 __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
Anna Bridge 169:a7c7b631e539 884 {
AnnaBridge 167:84c0a372a020 885 uint32_t res;
AnnaBridge 167:84c0a372a020 886 __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
AnnaBridge 167:84c0a372a020 887 return res;
AnnaBridge 167:84c0a372a020 888 }
AnnaBridge 167:84c0a372a020 889
Anna Bridge 169:a7c7b631e539 890 __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
Anna Bridge 169:a7c7b631e539 891 {
AnnaBridge 167:84c0a372a020 892 uint32_t res;
AnnaBridge 167:84c0a372a020 893 __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
AnnaBridge 167:84c0a372a020 894 return res;
AnnaBridge 167:84c0a372a020 895 }
AnnaBridge 167:84c0a372a020 896
Anna Bridge 169:a7c7b631e539 897 __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
Anna Bridge 169:a7c7b631e539 898 {
AnnaBridge 167:84c0a372a020 899 uint32_t res;
AnnaBridge 167:84c0a372a020 900 __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
AnnaBridge 167:84c0a372a020 901 return res;
AnnaBridge 167:84c0a372a020 902 }
AnnaBridge 167:84c0a372a020 903
AnnaBridge 167:84c0a372a020 904 #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
AnnaBridge 167:84c0a372a020 905
AnnaBridge 167:84c0a372a020 906 #undef __IAR_FT
AnnaBridge 167:84c0a372a020 907 #undef __IAR_M0_FAMILY
AnnaBridge 167:84c0a372a020 908 #undef __ICCARM_V8
AnnaBridge 167:84c0a372a020 909
AnnaBridge 167:84c0a372a020 910 #pragma diag_default=Pe940
AnnaBridge 167:84c0a372a020 911 #pragma diag_default=Pe177
AnnaBridge 167:84c0a372a020 912
AnnaBridge 167:84c0a372a020 913 #endif /* __CMSIS_ICCARM_H__ */