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TARGET_B96B_F446VE/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_flash_ex.h@169:a7c7b631e539, 2018-06-22 (annotated)

Committer:: Anna Bridge
Date:: Fri Jun 22 15:38:59 2018 +0100
Revision:: 169:a7c7b631e539
Parent:: 163:e59c8e839560

mbed library. Release version 162

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	156:ff21514d8981	1	/**
AnnaBridge	156:ff21514d8981	2	******************************************************************************
AnnaBridge	156:ff21514d8981	3	* @file stm32f4xx_hal_flash_ex.h
AnnaBridge	156:ff21514d8981	4	* @author MCD Application Team
AnnaBridge	156:ff21514d8981	5	* @brief Header file of FLASH HAL Extension module.
AnnaBridge	156:ff21514d8981	6	******************************************************************************
AnnaBridge	156:ff21514d8981	7	* @attention
AnnaBridge	156:ff21514d8981	8	*
AnnaBridge	156:ff21514d8981	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	156:ff21514d8981	10	*
AnnaBridge	156:ff21514d8981	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	156:ff21514d8981	12	* are permitted provided that the following conditions are met:
AnnaBridge	156:ff21514d8981	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	156:ff21514d8981	14	* this list of conditions and the following disclaimer.
AnnaBridge	156:ff21514d8981	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	156:ff21514d8981	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	156:ff21514d8981	17	* and/or other materials provided with the distribution.
AnnaBridge	156:ff21514d8981	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	156:ff21514d8981	19	* may be used to endorse or promote products derived from this software
AnnaBridge	156:ff21514d8981	20	* without specific prior written permission.
AnnaBridge	156:ff21514d8981	21	*
AnnaBridge	156:ff21514d8981	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	156:ff21514d8981	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	156:ff21514d8981	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	156:ff21514d8981	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	156:ff21514d8981	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	156:ff21514d8981	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	156:ff21514d8981	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	156:ff21514d8981	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	156:ff21514d8981	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	156:ff21514d8981	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	156:ff21514d8981	32	*
AnnaBridge	156:ff21514d8981	33	******************************************************************************
AnnaBridge	156:ff21514d8981	34	*/
AnnaBridge	156:ff21514d8981	35
AnnaBridge	156:ff21514d8981	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	156:ff21514d8981	37	#ifndef __STM32F4xx_HAL_FLASH_EX_H
AnnaBridge	156:ff21514d8981	38	#define __STM32F4xx_HAL_FLASH_EX_H
AnnaBridge	156:ff21514d8981	39
AnnaBridge	156:ff21514d8981	40	#ifdef __cplusplus
AnnaBridge	156:ff21514d8981	41	extern "C" {
AnnaBridge	156:ff21514d8981	42	#endif
AnnaBridge	156:ff21514d8981	43
AnnaBridge	156:ff21514d8981	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	45	#include "stm32f4xx_hal_def.h"
AnnaBridge	156:ff21514d8981	46
AnnaBridge	156:ff21514d8981	47	/** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge	156:ff21514d8981	48	* @{
AnnaBridge	156:ff21514d8981	49	*/
AnnaBridge	156:ff21514d8981	50
AnnaBridge	156:ff21514d8981	51	/** @addtogroup FLASHEx
AnnaBridge	156:ff21514d8981	52	* @{
AnnaBridge	156:ff21514d8981	53	*/
AnnaBridge	156:ff21514d8981	54
AnnaBridge	156:ff21514d8981	55	/* Exported types ------------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	56	/** @defgroup FLASHEx_Exported_Types FLASH Exported Types
AnnaBridge	156:ff21514d8981	57	* @{
AnnaBridge	156:ff21514d8981	58	*/
AnnaBridge	156:ff21514d8981	59
AnnaBridge	156:ff21514d8981	60	/**
AnnaBridge	156:ff21514d8981	61	* @brief FLASH Erase structure definition
AnnaBridge	156:ff21514d8981	62	*/
AnnaBridge	156:ff21514d8981	63	typedef struct
AnnaBridge	156:ff21514d8981	64	{
AnnaBridge	156:ff21514d8981	65	uint32_t TypeErase; /*!< Mass erase or sector Erase.
AnnaBridge	156:ff21514d8981	66	This parameter can be a value of @ref FLASHEx_Type_Erase */
AnnaBridge	156:ff21514d8981	67
AnnaBridge	156:ff21514d8981	68	uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
AnnaBridge	156:ff21514d8981	69	This parameter must be a value of @ref FLASHEx_Banks */
AnnaBridge	156:ff21514d8981	70
AnnaBridge	156:ff21514d8981	71	uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled
AnnaBridge	156:ff21514d8981	72	This parameter must be a value of @ref FLASHEx_Sectors */
AnnaBridge	156:ff21514d8981	73
AnnaBridge	156:ff21514d8981	74	uint32_t NbSectors; /*!< Number of sectors to be erased.
AnnaBridge	156:ff21514d8981	75	This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/
AnnaBridge	156:ff21514d8981	76
AnnaBridge	156:ff21514d8981	77	uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism
AnnaBridge	156:ff21514d8981	78	This parameter must be a value of @ref FLASHEx_Voltage_Range */
AnnaBridge	156:ff21514d8981	79
AnnaBridge	156:ff21514d8981	80	} FLASH_EraseInitTypeDef;
AnnaBridge	156:ff21514d8981	81
AnnaBridge	156:ff21514d8981	82	/**
AnnaBridge	156:ff21514d8981	83	* @brief FLASH Option Bytes Program structure definition
AnnaBridge	156:ff21514d8981	84	*/
AnnaBridge	156:ff21514d8981	85	typedef struct
AnnaBridge	156:ff21514d8981	86	{
AnnaBridge	156:ff21514d8981	87	uint32_t OptionType; /*!< Option byte to be configured.
AnnaBridge	156:ff21514d8981	88	This parameter can be a value of @ref FLASHEx_Option_Type */
AnnaBridge	156:ff21514d8981	89
AnnaBridge	156:ff21514d8981	90	uint32_t WRPState; /*!< Write protection activation or deactivation.
AnnaBridge	156:ff21514d8981	91	This parameter can be a value of @ref FLASHEx_WRP_State */
AnnaBridge	156:ff21514d8981	92
AnnaBridge	156:ff21514d8981	93	uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected.
AnnaBridge	156:ff21514d8981	94	The value of this parameter depend on device used within the same series */
AnnaBridge	156:ff21514d8981	95
AnnaBridge	156:ff21514d8981	96	uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
AnnaBridge	156:ff21514d8981	97	This parameter must be a value of @ref FLASHEx_Banks */
AnnaBridge	156:ff21514d8981	98
AnnaBridge	156:ff21514d8981	99	uint32_t RDPLevel; /*!< Set the read protection level.
AnnaBridge	156:ff21514d8981	100	This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
AnnaBridge	156:ff21514d8981	101
AnnaBridge	156:ff21514d8981	102	uint32_t BORLevel; /*!< Set the BOR Level.
AnnaBridge	156:ff21514d8981	103	This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */
AnnaBridge	156:ff21514d8981	104
AnnaBridge	156:ff21514d8981	105	uint8_t USERConfig; /!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. /
AnnaBridge	156:ff21514d8981	106
AnnaBridge	156:ff21514d8981	107	} FLASH_OBProgramInitTypeDef;
AnnaBridge	156:ff21514d8981	108
AnnaBridge	156:ff21514d8981	109	/**
AnnaBridge	156:ff21514d8981	110	* @brief FLASH Advanced Option Bytes Program structure definition
AnnaBridge	156:ff21514d8981	111	*/
AnnaBridge	156:ff21514d8981	112	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	113	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	114	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
AnnaBridge	156:ff21514d8981	115	defined(STM32F479xx) \|\| defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\|\
AnnaBridge	156:ff21514d8981	116	defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	117	typedef struct
AnnaBridge	156:ff21514d8981	118	{
AnnaBridge	156:ff21514d8981	119	uint32_t OptionType; /*!< Option byte to be configured for extension.
AnnaBridge	156:ff21514d8981	120	This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */
AnnaBridge	156:ff21514d8981	121
AnnaBridge	156:ff21514d8981	122	uint32_t PCROPState; /*!< PCROP activation or deactivation.
AnnaBridge	156:ff21514d8981	123	This parameter can be a value of @ref FLASHEx_PCROP_State */
AnnaBridge	156:ff21514d8981	124
AnnaBridge	156:ff21514d8981	125	#if defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F412Zx) \|\|\
AnnaBridge	156:ff21514d8981	126	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	127	uint16_t Sectors; /*!< specifies the sector(s) set for PCROP.
AnnaBridge	156:ff21514d8981	128	This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
AnnaBridge	156:ff21514d8981	129	#endif /* STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\|\
AnnaBridge	156:ff21514d8981	130	STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	131
AnnaBridge	156:ff21514d8981	132	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	133	uint32_t Banks; /*!< Select banks for PCROP activation/deactivation of all sectors.
AnnaBridge	156:ff21514d8981	134	This parameter must be a value of @ref FLASHEx_Banks */
AnnaBridge	156:ff21514d8981	135
AnnaBridge	156:ff21514d8981	136	uint16_t SectorsBank1; /*!< Specifies the sector(s) set for PCROP for Bank1.
AnnaBridge	156:ff21514d8981	137	This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
AnnaBridge	156:ff21514d8981	138
AnnaBridge	156:ff21514d8981	139	uint16_t SectorsBank2; /*!< Specifies the sector(s) set for PCROP for Bank2.
AnnaBridge	156:ff21514d8981	140	This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
AnnaBridge	156:ff21514d8981	141
AnnaBridge	156:ff21514d8981	142	uint8_t BootConfig; /*!< Specifies Option bytes for boot config.
AnnaBridge	156:ff21514d8981	143	This parameter can be a value of @ref FLASHEx_Dual_Boot */
AnnaBridge	156:ff21514d8981	144
AnnaBridge	156:ff21514d8981	145	#endif /STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx /
AnnaBridge	156:ff21514d8981	146	}FLASH_AdvOBProgramInitTypeDef;
AnnaBridge	156:ff21514d8981	147	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\|
AnnaBridge	156:ff21514d8981	148	STM32F469xx \|\| STM32F479xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	149	/**
AnnaBridge	156:ff21514d8981	150	* @}
AnnaBridge	156:ff21514d8981	151	*/
AnnaBridge	156:ff21514d8981	152
AnnaBridge	156:ff21514d8981	153	/* Exported constants --------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	154
AnnaBridge	156:ff21514d8981	155	/** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants
AnnaBridge	156:ff21514d8981	156	* @{
AnnaBridge	156:ff21514d8981	157	*/
AnnaBridge	156:ff21514d8981	158
AnnaBridge	156:ff21514d8981	159	/** @defgroup FLASHEx_Type_Erase FLASH Type Erase
AnnaBridge	156:ff21514d8981	160	* @{
AnnaBridge	156:ff21514d8981	161	*/
AnnaBridge	156:ff21514d8981	162	#define FLASH_TYPEERASE_SECTORS 0x00000000U /!< Sectors erase only /
AnnaBridge	156:ff21514d8981	163	#define FLASH_TYPEERASE_MASSERASE 0x00000001U /!< Flash Mass erase activation /
AnnaBridge	156:ff21514d8981	164	/**
AnnaBridge	156:ff21514d8981	165	* @}
AnnaBridge	156:ff21514d8981	166	*/
AnnaBridge	156:ff21514d8981	167
AnnaBridge	156:ff21514d8981	168	/** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range
AnnaBridge	156:ff21514d8981	169	* @{
AnnaBridge	156:ff21514d8981	170	*/
AnnaBridge	156:ff21514d8981	171	#define FLASH_VOLTAGE_RANGE_1 0x00000000U /!< Device operating range: 1.8V to 2.1V /
AnnaBridge	156:ff21514d8981	172	#define FLASH_VOLTAGE_RANGE_2 0x00000001U /!< Device operating range: 2.1V to 2.7V /
AnnaBridge	156:ff21514d8981	173	#define FLASH_VOLTAGE_RANGE_3 0x00000002U /!< Device operating range: 2.7V to 3.6V /
AnnaBridge	156:ff21514d8981	174	#define FLASH_VOLTAGE_RANGE_4 0x00000003U /!< Device operating range: 2.7V to 3.6V + External Vpp /
AnnaBridge	156:ff21514d8981	175	/**
AnnaBridge	156:ff21514d8981	176	* @}
AnnaBridge	156:ff21514d8981	177	*/
AnnaBridge	156:ff21514d8981	178
AnnaBridge	156:ff21514d8981	179	/** @defgroup FLASHEx_WRP_State FLASH WRP State
AnnaBridge	156:ff21514d8981	180	* @{
AnnaBridge	156:ff21514d8981	181	*/
AnnaBridge	156:ff21514d8981	182	#define OB_WRPSTATE_DISABLE 0x00000000U /!< Disable the write protection of the desired bank 1 sectors /
AnnaBridge	156:ff21514d8981	183	#define OB_WRPSTATE_ENABLE 0x00000001U /!< Enable the write protection of the desired bank 1 sectors /
AnnaBridge	156:ff21514d8981	184	/**
AnnaBridge	156:ff21514d8981	185	* @}
AnnaBridge	156:ff21514d8981	186	*/
AnnaBridge	156:ff21514d8981	187
AnnaBridge	156:ff21514d8981	188	/** @defgroup FLASHEx_Option_Type FLASH Option Type
AnnaBridge	156:ff21514d8981	189	* @{
AnnaBridge	156:ff21514d8981	190	*/
AnnaBridge	156:ff21514d8981	191	#define OPTIONBYTE_WRP 0x00000001U /!< WRP option byte configuration /
AnnaBridge	156:ff21514d8981	192	#define OPTIONBYTE_RDP 0x00000002U /!< RDP option byte configuration /
AnnaBridge	156:ff21514d8981	193	#define OPTIONBYTE_USER 0x00000004U /!< USER option byte configuration /
AnnaBridge	156:ff21514d8981	194	#define OPTIONBYTE_BOR 0x00000008U /!< BOR option byte configuration /
AnnaBridge	156:ff21514d8981	195	/**
AnnaBridge	156:ff21514d8981	196	* @}
AnnaBridge	156:ff21514d8981	197	*/
AnnaBridge	156:ff21514d8981	198
AnnaBridge	156:ff21514d8981	199	/** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection
AnnaBridge	156:ff21514d8981	200	* @{
AnnaBridge	156:ff21514d8981	201	*/
AnnaBridge	156:ff21514d8981	202	#define OB_RDP_LEVEL_0 ((uint8_t)0xAA)
AnnaBridge	156:ff21514d8981	203	#define OB_RDP_LEVEL_1 ((uint8_t)0x55)
AnnaBridge	156:ff21514d8981	204	#define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2
AnnaBridge	156:ff21514d8981	205	it s no more possible to go back to level 1 or 0 */
AnnaBridge	156:ff21514d8981	206	/**
AnnaBridge	156:ff21514d8981	207	* @}
AnnaBridge	156:ff21514d8981	208	*/
AnnaBridge	156:ff21514d8981	209
AnnaBridge	156:ff21514d8981	210	/** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog
AnnaBridge	156:ff21514d8981	211	* @{
AnnaBridge	156:ff21514d8981	212	*/
AnnaBridge	156:ff21514d8981	213	#define OB_IWDG_SW ((uint8_t)0x20) /!< Software IWDG selected /
AnnaBridge	156:ff21514d8981	214	#define OB_IWDG_HW ((uint8_t)0x00) /!< Hardware IWDG selected /
AnnaBridge	156:ff21514d8981	215	/**
AnnaBridge	156:ff21514d8981	216	* @}
AnnaBridge	156:ff21514d8981	217	*/
AnnaBridge	156:ff21514d8981	218
AnnaBridge	156:ff21514d8981	219	/** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP
AnnaBridge	156:ff21514d8981	220	* @{
AnnaBridge	156:ff21514d8981	221	*/
AnnaBridge	156:ff21514d8981	222	#define OB_STOP_NO_RST ((uint8_t)0x40) /!< No reset generated when entering in STOP /
AnnaBridge	156:ff21514d8981	223	#define OB_STOP_RST ((uint8_t)0x00) /!< Reset generated when entering in STOP /
AnnaBridge	156:ff21514d8981	224	/**
AnnaBridge	156:ff21514d8981	225	* @}
AnnaBridge	156:ff21514d8981	226	*/
AnnaBridge	156:ff21514d8981	227
AnnaBridge	156:ff21514d8981	228
AnnaBridge	156:ff21514d8981	229	/** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY
AnnaBridge	156:ff21514d8981	230	* @{
AnnaBridge	156:ff21514d8981	231	*/
AnnaBridge	156:ff21514d8981	232	#define OB_STDBY_NO_RST ((uint8_t)0x80) /!< No reset generated when entering in STANDBY /
AnnaBridge	156:ff21514d8981	233	#define OB_STDBY_RST ((uint8_t)0x00) /!< Reset generated when entering in STANDBY /
AnnaBridge	156:ff21514d8981	234	/**
AnnaBridge	156:ff21514d8981	235	* @}
AnnaBridge	156:ff21514d8981	236	*/
AnnaBridge	156:ff21514d8981	237
AnnaBridge	156:ff21514d8981	238	/** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level
AnnaBridge	156:ff21514d8981	239	* @{
AnnaBridge	156:ff21514d8981	240	*/
AnnaBridge	156:ff21514d8981	241	#define OB_BOR_LEVEL3 ((uint8_t)0x00) /!< Supply voltage ranges from 2.70 to 3.60 V /
AnnaBridge	156:ff21514d8981	242	#define OB_BOR_LEVEL2 ((uint8_t)0x04) /!< Supply voltage ranges from 2.40 to 2.70 V /
AnnaBridge	156:ff21514d8981	243	#define OB_BOR_LEVEL1 ((uint8_t)0x08) /!< Supply voltage ranges from 2.10 to 2.40 V /
AnnaBridge	156:ff21514d8981	244	#define OB_BOR_OFF ((uint8_t)0x0C) /!< Supply voltage ranges from 1.62 to 2.10 V /
AnnaBridge	156:ff21514d8981	245	/**
AnnaBridge	156:ff21514d8981	246	* @}
AnnaBridge	156:ff21514d8981	247	*/
AnnaBridge	156:ff21514d8981	248
AnnaBridge	156:ff21514d8981	249	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	250	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	251	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
AnnaBridge	156:ff21514d8981	252	defined(STM32F479xx) \|\| defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\|\
AnnaBridge	156:ff21514d8981	253	defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	254	/** @defgroup FLASHEx_PCROP_State FLASH PCROP State
AnnaBridge	156:ff21514d8981	255	* @{
AnnaBridge	156:ff21514d8981	256	*/
AnnaBridge	156:ff21514d8981	257	#define OB_PCROP_STATE_DISABLE 0x00000000U /!< Disable PCROP /
AnnaBridge	156:ff21514d8981	258	#define OB_PCROP_STATE_ENABLE 0x00000001U /!< Enable PCROP /
AnnaBridge	156:ff21514d8981	259	/**
AnnaBridge	156:ff21514d8981	260	* @}
AnnaBridge	156:ff21514d8981	261	*/
AnnaBridge	156:ff21514d8981	262	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\|\
AnnaBridge	156:ff21514d8981	263	STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx \|\| STM32F412Zx \|\|\
AnnaBridge	156:ff21514d8981	264	STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	265
AnnaBridge	156:ff21514d8981	266	/** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type
AnnaBridge	156:ff21514d8981	267	* @{
AnnaBridge	156:ff21514d8981	268	*/
AnnaBridge	156:ff21514d8981	269	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	270	defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	271	#define OPTIONBYTE_PCROP 0x00000001U /!< PCROP option byte configuration /
AnnaBridge	156:ff21514d8981	272	#define OPTIONBYTE_BOOTCONFIG 0x00000002U /!< BOOTConfig option byte configuration /
AnnaBridge	156:ff21514d8981	273	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	274
AnnaBridge	156:ff21514d8981	275	#if defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	276	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F412Zx) \|\|\
AnnaBridge	156:ff21514d8981	277	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\|\
AnnaBridge	156:ff21514d8981	278	defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	279	#define OPTIONBYTE_PCROP 0x00000001U /!<PCROP option byte configuration /
AnnaBridge	156:ff21514d8981	280	#endif /* STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx \|\|
AnnaBridge	156:ff21514d8981	281	STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	282	/**
AnnaBridge	156:ff21514d8981	283	* @}
AnnaBridge	156:ff21514d8981	284	*/
AnnaBridge	156:ff21514d8981	285
AnnaBridge	156:ff21514d8981	286	/** @defgroup FLASH_Latency FLASH Latency
AnnaBridge	156:ff21514d8981	287	* @{
AnnaBridge	156:ff21514d8981	288	*/
AnnaBridge	156:ff21514d8981	289	/------------------------- STM32F42xxx/STM32F43xxx/STM32F446xx/STM32F469xx/STM32F479xx ----------------------/
AnnaBridge	156:ff21514d8981	290	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	291	defined(STM32F446xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	292	#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /!< FLASH Zero Latency cycle /
AnnaBridge	156:ff21514d8981	293	#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /!< FLASH One Latency cycle /
AnnaBridge	156:ff21514d8981	294	#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /!< FLASH Two Latency cycles /
AnnaBridge	156:ff21514d8981	295	#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /!< FLASH Three Latency cycles /
AnnaBridge	156:ff21514d8981	296	#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /!< FLASH Four Latency cycles /
AnnaBridge	156:ff21514d8981	297	#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /!< FLASH Five Latency cycles /
AnnaBridge	156:ff21514d8981	298	#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /!< FLASH Six Latency cycles /
AnnaBridge	156:ff21514d8981	299	#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /!< FLASH Seven Latency cycles /
AnnaBridge	156:ff21514d8981	300	#define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /!< FLASH Eight Latency cycles /
AnnaBridge	156:ff21514d8981	301	#define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /!< FLASH Nine Latency cycles /
AnnaBridge	156:ff21514d8981	302	#define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /!< FLASH Ten Latency cycles /
AnnaBridge	156:ff21514d8981	303	#define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /!< FLASH Eleven Latency cycles /
AnnaBridge	156:ff21514d8981	304	#define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /!< FLASH Twelve Latency cycles /
AnnaBridge	156:ff21514d8981	305	#define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /!< FLASH Thirteen Latency cycles /
AnnaBridge	156:ff21514d8981	306	#define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /!< FLASH Fourteen Latency cycles /
AnnaBridge	156:ff21514d8981	307	#define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /!< FLASH Fifteen Latency cycles /
AnnaBridge	156:ff21514d8981	308	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	309	/--------------------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	310
AnnaBridge	156:ff21514d8981	311	/-------------------------- STM32F40xxx/STM32F41xxx/STM32F401xx/STM32F411xx/STM32F423xx -----------------------/
AnnaBridge	156:ff21514d8981	312	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
AnnaBridge	156:ff21514d8981	313	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	314	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\|\
AnnaBridge	156:ff21514d8981	315	defined(STM32F412Rx) \|\| defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	316
AnnaBridge	156:ff21514d8981	317	#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /!< FLASH Zero Latency cycle /
AnnaBridge	156:ff21514d8981	318	#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /!< FLASH One Latency cycle /
AnnaBridge	156:ff21514d8981	319	#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /!< FLASH Two Latency cycles /
AnnaBridge	156:ff21514d8981	320	#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /!< FLASH Three Latency cycles /
AnnaBridge	156:ff21514d8981	321	#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /!< FLASH Four Latency cycles /
AnnaBridge	156:ff21514d8981	322	#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /!< FLASH Five Latency cycles /
AnnaBridge	156:ff21514d8981	323	#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /!< FLASH Six Latency cycles /
AnnaBridge	156:ff21514d8981	324	#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /!< FLASH Seven Latency cycles /
AnnaBridge	156:ff21514d8981	325	#endif /* STM32F40xxx \|\| STM32F41xxx \|\| STM32F401xx \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx \|\|
AnnaBridge	156:ff21514d8981	326	STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	327	/--------------------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	328
AnnaBridge	156:ff21514d8981	329	/**
AnnaBridge	156:ff21514d8981	330	* @}
AnnaBridge	156:ff21514d8981	331	*/
AnnaBridge	156:ff21514d8981	332
AnnaBridge	156:ff21514d8981	333
AnnaBridge	156:ff21514d8981	334	/** @defgroup FLASHEx_Banks FLASH Banks
AnnaBridge	156:ff21514d8981	335	* @{
AnnaBridge	156:ff21514d8981	336	*/
AnnaBridge	156:ff21514d8981	337	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	338	defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	339	#define FLASH_BANK_1 1U /!< Bank 1 /
AnnaBridge	156:ff21514d8981	340	#define FLASH_BANK_2 2U /!< Bank 2 /
AnnaBridge	156:ff21514d8981	341	#define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 \| FLASH_BANK_2) /!< Bank1 and Bank2 /
AnnaBridge	156:ff21514d8981	342	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	343
AnnaBridge	156:ff21514d8981	344	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
AnnaBridge	156:ff21514d8981	345	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	346	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F412Zx) \|\|\
AnnaBridge	156:ff21514d8981	347	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\|\
AnnaBridge	156:ff21514d8981	348	defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	349	#define FLASH_BANK_1 1U /!< Bank 1 /
AnnaBridge	156:ff21514d8981	350	#endif /* STM32F40xxx \|\| STM32F41xxx \|\| STM32F401xx \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx
AnnaBridge	156:ff21514d8981	351	STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	352	/**
AnnaBridge	156:ff21514d8981	353	* @}
AnnaBridge	156:ff21514d8981	354	*/
AnnaBridge	156:ff21514d8981	355
AnnaBridge	156:ff21514d8981	356	/** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit
AnnaBridge	156:ff21514d8981	357	* @{
AnnaBridge	156:ff21514d8981	358	*/
AnnaBridge	156:ff21514d8981	359	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	360	defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	361	#define FLASH_MER_BIT (FLASH_CR_MER1 \| FLASH_CR_MER2) /!< 2 MER bits here to clear /
AnnaBridge	156:ff21514d8981	362	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	363
AnnaBridge	156:ff21514d8981	364	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
AnnaBridge	156:ff21514d8981	365	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	366	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F412Zx) \|\|\
AnnaBridge	156:ff21514d8981	367	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\|\
AnnaBridge	156:ff21514d8981	368	defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	369	#define FLASH_MER_BIT (FLASH_CR_MER) /!< only 1 MER Bit /
AnnaBridge	156:ff21514d8981	370	#endif /* STM32F40xxx \|\| STM32F41xxx \|\| STM32F401xx \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx
AnnaBridge	156:ff21514d8981	371	STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	372	/**
AnnaBridge	156:ff21514d8981	373	* @}
AnnaBridge	156:ff21514d8981	374	*/
AnnaBridge	156:ff21514d8981	375
AnnaBridge	156:ff21514d8981	376	/** @defgroup FLASHEx_Sectors FLASH Sectors
AnnaBridge	156:ff21514d8981	377	* @{
AnnaBridge	156:ff21514d8981	378	*/
AnnaBridge	156:ff21514d8981	379	/-------------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx ------------------------------------/
AnnaBridge	156:ff21514d8981	380	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	381	defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	382	#define FLASH_SECTOR_0 0U /!< Sector Number 0 /
AnnaBridge	156:ff21514d8981	383	#define FLASH_SECTOR_1 1U /!< Sector Number 1 /
AnnaBridge	156:ff21514d8981	384	#define FLASH_SECTOR_2 2U /!< Sector Number 2 /
AnnaBridge	156:ff21514d8981	385	#define FLASH_SECTOR_3 3U /!< Sector Number 3 /
AnnaBridge	156:ff21514d8981	386	#define FLASH_SECTOR_4 4U /!< Sector Number 4 /
AnnaBridge	156:ff21514d8981	387	#define FLASH_SECTOR_5 5U /!< Sector Number 5 /
AnnaBridge	156:ff21514d8981	388	#define FLASH_SECTOR_6 6U /!< Sector Number 6 /
AnnaBridge	156:ff21514d8981	389	#define FLASH_SECTOR_7 7U /!< Sector Number 7 /
AnnaBridge	156:ff21514d8981	390	#define FLASH_SECTOR_8 8U /!< Sector Number 8 /
AnnaBridge	156:ff21514d8981	391	#define FLASH_SECTOR_9 9U /!< Sector Number 9 /
AnnaBridge	156:ff21514d8981	392	#define FLASH_SECTOR_10 10U /!< Sector Number 10 /
AnnaBridge	156:ff21514d8981	393	#define FLASH_SECTOR_11 11U /!< Sector Number 11 /
AnnaBridge	156:ff21514d8981	394	#define FLASH_SECTOR_12 12U /!< Sector Number 12 /
AnnaBridge	156:ff21514d8981	395	#define FLASH_SECTOR_13 13U /!< Sector Number 13 /
AnnaBridge	156:ff21514d8981	396	#define FLASH_SECTOR_14 14U /!< Sector Number 14 /
AnnaBridge	156:ff21514d8981	397	#define FLASH_SECTOR_15 15U /!< Sector Number 15 /
AnnaBridge	156:ff21514d8981	398	#define FLASH_SECTOR_16 16U /!< Sector Number 16 /
AnnaBridge	156:ff21514d8981	399	#define FLASH_SECTOR_17 17U /!< Sector Number 17 /
AnnaBridge	156:ff21514d8981	400	#define FLASH_SECTOR_18 18U /!< Sector Number 18 /
AnnaBridge	156:ff21514d8981	401	#define FLASH_SECTOR_19 19U /!< Sector Number 19 /
AnnaBridge	156:ff21514d8981	402	#define FLASH_SECTOR_20 20U /!< Sector Number 20 /
AnnaBridge	156:ff21514d8981	403	#define FLASH_SECTOR_21 21U /!< Sector Number 21 /
AnnaBridge	156:ff21514d8981	404	#define FLASH_SECTOR_22 22U /!< Sector Number 22 /
AnnaBridge	156:ff21514d8981	405	#define FLASH_SECTOR_23 23U /!< Sector Number 23 /
AnnaBridge	156:ff21514d8981	406	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	407	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	408
AnnaBridge	156:ff21514d8981	409	/-------------------------------------- STM32F413xx/STM32F423xx --------------------------------------/
AnnaBridge	156:ff21514d8981	410	#if defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	411	#define FLASH_SECTOR_0 0U /!< Sector Number 0 /
AnnaBridge	156:ff21514d8981	412	#define FLASH_SECTOR_1 1U /!< Sector Number 1 /
AnnaBridge	156:ff21514d8981	413	#define FLASH_SECTOR_2 2U /!< Sector Number 2 /
AnnaBridge	156:ff21514d8981	414	#define FLASH_SECTOR_3 3U /!< Sector Number 3 /
AnnaBridge	156:ff21514d8981	415	#define FLASH_SECTOR_4 4U /!< Sector Number 4 /
AnnaBridge	156:ff21514d8981	416	#define FLASH_SECTOR_5 5U /!< Sector Number 5 /
AnnaBridge	156:ff21514d8981	417	#define FLASH_SECTOR_6 6U /!< Sector Number 6 /
AnnaBridge	156:ff21514d8981	418	#define FLASH_SECTOR_7 7U /!< Sector Number 7 /
AnnaBridge	156:ff21514d8981	419	#define FLASH_SECTOR_8 8U /!< Sector Number 8 /
AnnaBridge	156:ff21514d8981	420	#define FLASH_SECTOR_9 9U /!< Sector Number 9 /
AnnaBridge	156:ff21514d8981	421	#define FLASH_SECTOR_10 10U /!< Sector Number 10 /
AnnaBridge	156:ff21514d8981	422	#define FLASH_SECTOR_11 11U /!< Sector Number 11 /
AnnaBridge	156:ff21514d8981	423	#define FLASH_SECTOR_12 12U /!< Sector Number 12 /
AnnaBridge	156:ff21514d8981	424	#define FLASH_SECTOR_13 13U /!< Sector Number 13 /
AnnaBridge	156:ff21514d8981	425	#define FLASH_SECTOR_14 14U /!< Sector Number 14 /
AnnaBridge	156:ff21514d8981	426	#define FLASH_SECTOR_15 15U /!< Sector Number 15 /
AnnaBridge	156:ff21514d8981	427	#endif /* STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	428	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	429
AnnaBridge	156:ff21514d8981	430	/--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------/
AnnaBridge	156:ff21514d8981	431	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\| defined(STM32F412Zx) \|\|\
AnnaBridge	156:ff21514d8981	432	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx)
AnnaBridge	156:ff21514d8981	433	#define FLASH_SECTOR_0 0U /!< Sector Number 0 /
AnnaBridge	156:ff21514d8981	434	#define FLASH_SECTOR_1 1U /!< Sector Number 1 /
AnnaBridge	156:ff21514d8981	435	#define FLASH_SECTOR_2 2U /!< Sector Number 2 /
AnnaBridge	156:ff21514d8981	436	#define FLASH_SECTOR_3 3U /!< Sector Number 3 /
AnnaBridge	156:ff21514d8981	437	#define FLASH_SECTOR_4 4U /!< Sector Number 4 /
AnnaBridge	156:ff21514d8981	438	#define FLASH_SECTOR_5 5U /!< Sector Number 5 /
AnnaBridge	156:ff21514d8981	439	#define FLASH_SECTOR_6 6U /!< Sector Number 6 /
AnnaBridge	156:ff21514d8981	440	#define FLASH_SECTOR_7 7U /!< Sector Number 7 /
AnnaBridge	156:ff21514d8981	441	#define FLASH_SECTOR_8 8U /!< Sector Number 8 /
AnnaBridge	156:ff21514d8981	442	#define FLASH_SECTOR_9 9U /!< Sector Number 9 /
AnnaBridge	156:ff21514d8981	443	#define FLASH_SECTOR_10 10U /!< Sector Number 10 /
AnnaBridge	156:ff21514d8981	444	#define FLASH_SECTOR_11 11U /!< Sector Number 11 /
AnnaBridge	156:ff21514d8981	445	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx */
AnnaBridge	156:ff21514d8981	446	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	447
AnnaBridge	156:ff21514d8981	448	/--------------------------------------------- STM32F401xC -------------------------------------------/
AnnaBridge	156:ff21514d8981	449	#if defined(STM32F401xC)
AnnaBridge	156:ff21514d8981	450	#define FLASH_SECTOR_0 0U /!< Sector Number 0 /
AnnaBridge	156:ff21514d8981	451	#define FLASH_SECTOR_1 1U /!< Sector Number 1 /
AnnaBridge	156:ff21514d8981	452	#define FLASH_SECTOR_2 2U /!< Sector Number 2 /
AnnaBridge	156:ff21514d8981	453	#define FLASH_SECTOR_3 3U /!< Sector Number 3 /
AnnaBridge	156:ff21514d8981	454	#define FLASH_SECTOR_4 4U /!< Sector Number 4 /
AnnaBridge	156:ff21514d8981	455	#define FLASH_SECTOR_5 5U /!< Sector Number 5 /
AnnaBridge	156:ff21514d8981	456	#endif /* STM32F401xC */
AnnaBridge	156:ff21514d8981	457	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	458
AnnaBridge	156:ff21514d8981	459	/--------------------------------------------- STM32F410xx -------------------------------------------/
AnnaBridge	156:ff21514d8981	460	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
AnnaBridge	156:ff21514d8981	461	#define FLASH_SECTOR_0 0U /!< Sector Number 0 /
AnnaBridge	156:ff21514d8981	462	#define FLASH_SECTOR_1 1U /!< Sector Number 1 /
AnnaBridge	156:ff21514d8981	463	#define FLASH_SECTOR_2 2U /!< Sector Number 2 /
AnnaBridge	156:ff21514d8981	464	#define FLASH_SECTOR_3 3U /!< Sector Number 3 /
AnnaBridge	156:ff21514d8981	465	#define FLASH_SECTOR_4 4U /!< Sector Number 4 /
AnnaBridge	156:ff21514d8981	466	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
AnnaBridge	156:ff21514d8981	467	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	468
AnnaBridge	156:ff21514d8981	469	/---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------/
AnnaBridge	156:ff21514d8981	470	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
AnnaBridge	156:ff21514d8981	471	#define FLASH_SECTOR_0 0U /!< Sector Number 0 /
AnnaBridge	156:ff21514d8981	472	#define FLASH_SECTOR_1 1U /!< Sector Number 1 /
AnnaBridge	156:ff21514d8981	473	#define FLASH_SECTOR_2 2U /!< Sector Number 2 /
AnnaBridge	156:ff21514d8981	474	#define FLASH_SECTOR_3 3U /!< Sector Number 3 /
AnnaBridge	156:ff21514d8981	475	#define FLASH_SECTOR_4 4U /!< Sector Number 4 /
AnnaBridge	156:ff21514d8981	476	#define FLASH_SECTOR_5 5U /!< Sector Number 5 /
AnnaBridge	156:ff21514d8981	477	#define FLASH_SECTOR_6 6U /!< Sector Number 6 /
AnnaBridge	156:ff21514d8981	478	#define FLASH_SECTOR_7 7U /!< Sector Number 7 /
AnnaBridge	156:ff21514d8981	479	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
AnnaBridge	156:ff21514d8981	480	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	481
AnnaBridge	156:ff21514d8981	482	/**
AnnaBridge	156:ff21514d8981	483	* @}
AnnaBridge	156:ff21514d8981	484	*/
AnnaBridge	156:ff21514d8981	485
AnnaBridge	156:ff21514d8981	486	/** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection
AnnaBridge	156:ff21514d8981	487	* @{
AnnaBridge	156:ff21514d8981	488	*/
AnnaBridge	156:ff21514d8981	489	/--------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx -------------------------/
AnnaBridge	156:ff21514d8981	490	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	491	defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	492	#define OB_WRP_SECTOR_0 0x00000001U /!< Write protection of Sector0 /
AnnaBridge	156:ff21514d8981	493	#define OB_WRP_SECTOR_1 0x00000002U /!< Write protection of Sector1 /
AnnaBridge	156:ff21514d8981	494	#define OB_WRP_SECTOR_2 0x00000004U /!< Write protection of Sector2 /
AnnaBridge	156:ff21514d8981	495	#define OB_WRP_SECTOR_3 0x00000008U /!< Write protection of Sector3 /
AnnaBridge	156:ff21514d8981	496	#define OB_WRP_SECTOR_4 0x00000010U /!< Write protection of Sector4 /
AnnaBridge	156:ff21514d8981	497	#define OB_WRP_SECTOR_5 0x00000020U /!< Write protection of Sector5 /
AnnaBridge	156:ff21514d8981	498	#define OB_WRP_SECTOR_6 0x00000040U /!< Write protection of Sector6 /
AnnaBridge	156:ff21514d8981	499	#define OB_WRP_SECTOR_7 0x00000080U /!< Write protection of Sector7 /
AnnaBridge	156:ff21514d8981	500	#define OB_WRP_SECTOR_8 0x00000100U /!< Write protection of Sector8 /
AnnaBridge	156:ff21514d8981	501	#define OB_WRP_SECTOR_9 0x00000200U /!< Write protection of Sector9 /
AnnaBridge	156:ff21514d8981	502	#define OB_WRP_SECTOR_10 0x00000400U /!< Write protection of Sector10 /
AnnaBridge	156:ff21514d8981	503	#define OB_WRP_SECTOR_11 0x00000800U /!< Write protection of Sector11 /
AnnaBridge	156:ff21514d8981	504	#define OB_WRP_SECTOR_12 0x00000001U << 12U /!< Write protection of Sector12 /
AnnaBridge	156:ff21514d8981	505	#define OB_WRP_SECTOR_13 0x00000002U << 12U /!< Write protection of Sector13 /
AnnaBridge	156:ff21514d8981	506	#define OB_WRP_SECTOR_14 0x00000004U << 12U /!< Write protection of Sector14 /
AnnaBridge	156:ff21514d8981	507	#define OB_WRP_SECTOR_15 0x00000008U << 12U /!< Write protection of Sector15 /
AnnaBridge	156:ff21514d8981	508	#define OB_WRP_SECTOR_16 0x00000010U << 12U /!< Write protection of Sector16 /
AnnaBridge	156:ff21514d8981	509	#define OB_WRP_SECTOR_17 0x00000020U << 12U /!< Write protection of Sector17 /
AnnaBridge	156:ff21514d8981	510	#define OB_WRP_SECTOR_18 0x00000040U << 12U /!< Write protection of Sector18 /
AnnaBridge	156:ff21514d8981	511	#define OB_WRP_SECTOR_19 0x00000080U << 12U /!< Write protection of Sector19 /
AnnaBridge	156:ff21514d8981	512	#define OB_WRP_SECTOR_20 0x00000100U << 12U /!< Write protection of Sector20 /
AnnaBridge	156:ff21514d8981	513	#define OB_WRP_SECTOR_21 0x00000200U << 12U /!< Write protection of Sector21 /
AnnaBridge	156:ff21514d8981	514	#define OB_WRP_SECTOR_22 0x00000400U << 12U /!< Write protection of Sector22 /
AnnaBridge	156:ff21514d8981	515	#define OB_WRP_SECTOR_23 0x00000800U << 12U /!< Write protection of Sector23 /
AnnaBridge	156:ff21514d8981	516	#define OB_WRP_SECTOR_All 0x00000FFFU << 12U /!< Write protection of all Sectors /
AnnaBridge	156:ff21514d8981	517	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	518	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	519
AnnaBridge	156:ff21514d8981	520	/--------------------------------------- STM32F413xx/STM32F423xx -------------------------------------/
AnnaBridge	156:ff21514d8981	521	#if defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	522	#define OB_WRP_SECTOR_0 0x00000001U /!< Write protection of Sector0 /
AnnaBridge	156:ff21514d8981	523	#define OB_WRP_SECTOR_1 0x00000002U /!< Write protection of Sector1 /
AnnaBridge	156:ff21514d8981	524	#define OB_WRP_SECTOR_2 0x00000004U /!< Write protection of Sector2 /
AnnaBridge	156:ff21514d8981	525	#define OB_WRP_SECTOR_3 0x00000008U /!< Write protection of Sector3 /
AnnaBridge	156:ff21514d8981	526	#define OB_WRP_SECTOR_4 0x00000010U /!< Write protection of Sector4 /
AnnaBridge	156:ff21514d8981	527	#define OB_WRP_SECTOR_5 0x00000020U /!< Write protection of Sector5 /
AnnaBridge	156:ff21514d8981	528	#define OB_WRP_SECTOR_6 0x00000040U /!< Write protection of Sector6 /
AnnaBridge	156:ff21514d8981	529	#define OB_WRP_SECTOR_7 0x00000080U /!< Write protection of Sector7 /
AnnaBridge	156:ff21514d8981	530	#define OB_WRP_SECTOR_8 0x00000100U /!< Write protection of Sector8 /
AnnaBridge	156:ff21514d8981	531	#define OB_WRP_SECTOR_9 0x00000200U /!< Write protection of Sector9 /
AnnaBridge	156:ff21514d8981	532	#define OB_WRP_SECTOR_10 0x00000400U /!< Write protection of Sector10 /
AnnaBridge	156:ff21514d8981	533	#define OB_WRP_SECTOR_11 0x00000800U /!< Write protection of Sector11 /
AnnaBridge	156:ff21514d8981	534	#define OB_WRP_SECTOR_12 0x00001000U /!< Write protection of Sector12 /
AnnaBridge	156:ff21514d8981	535	#define OB_WRP_SECTOR_13 0x00002000U /!< Write protection of Sector13 /
AnnaBridge	156:ff21514d8981	536	#define OB_WRP_SECTOR_14 0x00004000U /!< Write protection of Sector14 /
AnnaBridge	156:ff21514d8981	537	#define OB_WRP_SECTOR_15 0x00004000U /!< Write protection of Sector15 /
AnnaBridge	156:ff21514d8981	538	#define OB_WRP_SECTOR_All 0x00007FFFU /!< Write protection of all Sectors /
AnnaBridge	156:ff21514d8981	539	#endif /* STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	540	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	541
AnnaBridge	156:ff21514d8981	542	/--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------/
AnnaBridge	156:ff21514d8981	543	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\| defined(STM32F412Zx) \|\|\
AnnaBridge	156:ff21514d8981	544	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx)
AnnaBridge	156:ff21514d8981	545	#define OB_WRP_SECTOR_0 0x00000001U /!< Write protection of Sector0 /
AnnaBridge	156:ff21514d8981	546	#define OB_WRP_SECTOR_1 0x00000002U /!< Write protection of Sector1 /
AnnaBridge	156:ff21514d8981	547	#define OB_WRP_SECTOR_2 0x00000004U /!< Write protection of Sector2 /
AnnaBridge	156:ff21514d8981	548	#define OB_WRP_SECTOR_3 0x00000008U /!< Write protection of Sector3 /
AnnaBridge	156:ff21514d8981	549	#define OB_WRP_SECTOR_4 0x00000010U /!< Write protection of Sector4 /
AnnaBridge	156:ff21514d8981	550	#define OB_WRP_SECTOR_5 0x00000020U /!< Write protection of Sector5 /
AnnaBridge	156:ff21514d8981	551	#define OB_WRP_SECTOR_6 0x00000040U /!< Write protection of Sector6 /
AnnaBridge	156:ff21514d8981	552	#define OB_WRP_SECTOR_7 0x00000080U /!< Write protection of Sector7 /
AnnaBridge	156:ff21514d8981	553	#define OB_WRP_SECTOR_8 0x00000100U /!< Write protection of Sector8 /
AnnaBridge	156:ff21514d8981	554	#define OB_WRP_SECTOR_9 0x00000200U /!< Write protection of Sector9 /
AnnaBridge	156:ff21514d8981	555	#define OB_WRP_SECTOR_10 0x00000400U /!< Write protection of Sector10 /
AnnaBridge	156:ff21514d8981	556	#define OB_WRP_SECTOR_11 0x00000800U /!< Write protection of Sector11 /
AnnaBridge	156:ff21514d8981	557	#define OB_WRP_SECTOR_All 0x00000FFFU /!< Write protection of all Sectors /
AnnaBridge	156:ff21514d8981	558	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx */
AnnaBridge	156:ff21514d8981	559	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	560
AnnaBridge	156:ff21514d8981	561	/--------------------------------------------- STM32F401xC -------------------------------------------/
AnnaBridge	156:ff21514d8981	562	#if defined(STM32F401xC)
AnnaBridge	156:ff21514d8981	563	#define OB_WRP_SECTOR_0 0x00000001U /!< Write protection of Sector0 /
AnnaBridge	156:ff21514d8981	564	#define OB_WRP_SECTOR_1 0x00000002U /!< Write protection of Sector1 /
AnnaBridge	156:ff21514d8981	565	#define OB_WRP_SECTOR_2 0x00000004U /!< Write protection of Sector2 /
AnnaBridge	156:ff21514d8981	566	#define OB_WRP_SECTOR_3 0x00000008U /!< Write protection of Sector3 /
AnnaBridge	156:ff21514d8981	567	#define OB_WRP_SECTOR_4 0x00000010U /!< Write protection of Sector4 /
AnnaBridge	156:ff21514d8981	568	#define OB_WRP_SECTOR_5 0x00000020U /!< Write protection of Sector5 /
AnnaBridge	156:ff21514d8981	569	#define OB_WRP_SECTOR_All 0x00000FFFU /!< Write protection of all Sectors /
AnnaBridge	156:ff21514d8981	570	#endif /* STM32F401xC */
AnnaBridge	156:ff21514d8981	571	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	572
AnnaBridge	156:ff21514d8981	573	/--------------------------------------------- STM32F410xx -------------------------------------------/
AnnaBridge	156:ff21514d8981	574	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
AnnaBridge	156:ff21514d8981	575	#define OB_WRP_SECTOR_0 0x00000001U /!< Write protection of Sector0 /
AnnaBridge	156:ff21514d8981	576	#define OB_WRP_SECTOR_1 0x00000002U /!< Write protection of Sector1 /
AnnaBridge	156:ff21514d8981	577	#define OB_WRP_SECTOR_2 0x00000004U /!< Write protection of Sector2 /
AnnaBridge	156:ff21514d8981	578	#define OB_WRP_SECTOR_3 0x00000008U /!< Write protection of Sector3 /
AnnaBridge	156:ff21514d8981	579	#define OB_WRP_SECTOR_4 0x00000010U /!< Write protection of Sector4 /
AnnaBridge	156:ff21514d8981	580	#define OB_WRP_SECTOR_All 0x00000FFFU /!< Write protection of all Sectors /
AnnaBridge	156:ff21514d8981	581	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
AnnaBridge	156:ff21514d8981	582	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	583
AnnaBridge	156:ff21514d8981	584	/---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------/
AnnaBridge	156:ff21514d8981	585	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
AnnaBridge	156:ff21514d8981	586	#define OB_WRP_SECTOR_0 0x00000001U /!< Write protection of Sector0 /
AnnaBridge	156:ff21514d8981	587	#define OB_WRP_SECTOR_1 0x00000002U /!< Write protection of Sector1 /
AnnaBridge	156:ff21514d8981	588	#define OB_WRP_SECTOR_2 0x00000004U /!< Write protection of Sector2 /
AnnaBridge	156:ff21514d8981	589	#define OB_WRP_SECTOR_3 0x00000008U /!< Write protection of Sector3 /
AnnaBridge	156:ff21514d8981	590	#define OB_WRP_SECTOR_4 0x00000010U /!< Write protection of Sector4 /
AnnaBridge	156:ff21514d8981	591	#define OB_WRP_SECTOR_5 0x00000020U /!< Write protection of Sector5 /
AnnaBridge	156:ff21514d8981	592	#define OB_WRP_SECTOR_6 0x00000040U /!< Write protection of Sector6 /
AnnaBridge	156:ff21514d8981	593	#define OB_WRP_SECTOR_7 0x00000080U /!< Write protection of Sector7 /
AnnaBridge	156:ff21514d8981	594	#define OB_WRP_SECTOR_All 0x00000FFFU /!< Write protection of all Sectors /
AnnaBridge	156:ff21514d8981	595	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
AnnaBridge	156:ff21514d8981	596	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	597	/**
AnnaBridge	156:ff21514d8981	598	* @}
AnnaBridge	156:ff21514d8981	599	*/
AnnaBridge	156:ff21514d8981	600
AnnaBridge	156:ff21514d8981	601	/** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection
AnnaBridge	156:ff21514d8981	602	* @{
AnnaBridge	156:ff21514d8981	603	*/
AnnaBridge	156:ff21514d8981	604	/-------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx ---------------------------/
AnnaBridge	156:ff21514d8981	605	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	606	defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	607	#define OB_PCROP_SECTOR_0 0x00000001U /!< PC Read/Write protection of Sector0 /
AnnaBridge	156:ff21514d8981	608	#define OB_PCROP_SECTOR_1 0x00000002U /!< PC Read/Write protection of Sector1 /
AnnaBridge	156:ff21514d8981	609	#define OB_PCROP_SECTOR_2 0x00000004U /!< PC Read/Write protection of Sector2 /
AnnaBridge	156:ff21514d8981	610	#define OB_PCROP_SECTOR_3 0x00000008U /!< PC Read/Write protection of Sector3 /
AnnaBridge	156:ff21514d8981	611	#define OB_PCROP_SECTOR_4 0x00000010U /!< PC Read/Write protection of Sector4 /
AnnaBridge	156:ff21514d8981	612	#define OB_PCROP_SECTOR_5 0x00000020U /!< PC Read/Write protection of Sector5 /
AnnaBridge	156:ff21514d8981	613	#define OB_PCROP_SECTOR_6 0x00000040U /!< PC Read/Write protection of Sector6 /
AnnaBridge	156:ff21514d8981	614	#define OB_PCROP_SECTOR_7 0x00000080U /!< PC Read/Write protection of Sector7 /
AnnaBridge	156:ff21514d8981	615	#define OB_PCROP_SECTOR_8 0x00000100U /!< PC Read/Write protection of Sector8 /
AnnaBridge	156:ff21514d8981	616	#define OB_PCROP_SECTOR_9 0x00000200U /!< PC Read/Write protection of Sector9 /
AnnaBridge	156:ff21514d8981	617	#define OB_PCROP_SECTOR_10 0x00000400U /!< PC Read/Write protection of Sector10 /
AnnaBridge	156:ff21514d8981	618	#define OB_PCROP_SECTOR_11 0x00000800U /!< PC Read/Write protection of Sector11 /
AnnaBridge	156:ff21514d8981	619	#define OB_PCROP_SECTOR_12 0x00000001U /!< PC Read/Write protection of Sector12 /
AnnaBridge	156:ff21514d8981	620	#define OB_PCROP_SECTOR_13 0x00000002U /!< PC Read/Write protection of Sector13 /
AnnaBridge	156:ff21514d8981	621	#define OB_PCROP_SECTOR_14 0x00000004U /!< PC Read/Write protection of Sector14 /
AnnaBridge	156:ff21514d8981	622	#define OB_PCROP_SECTOR_15 0x00000008U /!< PC Read/Write protection of Sector15 /
AnnaBridge	156:ff21514d8981	623	#define OB_PCROP_SECTOR_16 0x00000010U /!< PC Read/Write protection of Sector16 /
AnnaBridge	156:ff21514d8981	624	#define OB_PCROP_SECTOR_17 0x00000020U /!< PC Read/Write protection of Sector17 /
AnnaBridge	156:ff21514d8981	625	#define OB_PCROP_SECTOR_18 0x00000040U /!< PC Read/Write protection of Sector18 /
AnnaBridge	156:ff21514d8981	626	#define OB_PCROP_SECTOR_19 0x00000080U /!< PC Read/Write protection of Sector19 /
AnnaBridge	156:ff21514d8981	627	#define OB_PCROP_SECTOR_20 0x00000100U /!< PC Read/Write protection of Sector20 /
AnnaBridge	156:ff21514d8981	628	#define OB_PCROP_SECTOR_21 0x00000200U /!< PC Read/Write protection of Sector21 /
AnnaBridge	156:ff21514d8981	629	#define OB_PCROP_SECTOR_22 0x00000400U /!< PC Read/Write protection of Sector22 /
AnnaBridge	156:ff21514d8981	630	#define OB_PCROP_SECTOR_23 0x00000800U /!< PC Read/Write protection of Sector23 /
AnnaBridge	156:ff21514d8981	631	#define OB_PCROP_SECTOR_All 0x00000FFFU /!< PC Read/Write protection of all Sectors /
AnnaBridge	156:ff21514d8981	632	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	633	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	634
AnnaBridge	156:ff21514d8981	635	/------------------------------------- STM32F413xx/STM32F423xx ---------------------------------------/
AnnaBridge	156:ff21514d8981	636	#if defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	637	#define OB_PCROP_SECTOR_0 0x00000001U /!< PC Read/Write protection of Sector0 /
AnnaBridge	156:ff21514d8981	638	#define OB_PCROP_SECTOR_1 0x00000002U /!< PC Read/Write protection of Sector1 /
AnnaBridge	156:ff21514d8981	639	#define OB_PCROP_SECTOR_2 0x00000004U /!< PC Read/Write protection of Sector2 /
AnnaBridge	156:ff21514d8981	640	#define OB_PCROP_SECTOR_3 0x00000008U /!< PC Read/Write protection of Sector3 /
AnnaBridge	156:ff21514d8981	641	#define OB_PCROP_SECTOR_4 0x00000010U /!< PC Read/Write protection of Sector4 /
AnnaBridge	156:ff21514d8981	642	#define OB_PCROP_SECTOR_5 0x00000020U /!< PC Read/Write protection of Sector5 /
AnnaBridge	156:ff21514d8981	643	#define OB_PCROP_SECTOR_6 0x00000040U /!< PC Read/Write protection of Sector6 /
AnnaBridge	156:ff21514d8981	644	#define OB_PCROP_SECTOR_7 0x00000080U /!< PC Read/Write protection of Sector7 /
AnnaBridge	156:ff21514d8981	645	#define OB_PCROP_SECTOR_8 0x00000100U /!< PC Read/Write protection of Sector8 /
AnnaBridge	156:ff21514d8981	646	#define OB_PCROP_SECTOR_9 0x00000200U /!< PC Read/Write protection of Sector9 /
AnnaBridge	156:ff21514d8981	647	#define OB_PCROP_SECTOR_10 0x00000400U /!< PC Read/Write protection of Sector10 /
AnnaBridge	156:ff21514d8981	648	#define OB_PCROP_SECTOR_11 0x00000800U /!< PC Read/Write protection of Sector11 /
AnnaBridge	156:ff21514d8981	649	#define OB_PCROP_SECTOR_12 0x00001000U /!< PC Read/Write protection of Sector12 /
AnnaBridge	156:ff21514d8981	650	#define OB_PCROP_SECTOR_13 0x00002000U /!< PC Read/Write protection of Sector13 /
AnnaBridge	156:ff21514d8981	651	#define OB_PCROP_SECTOR_14 0x00004000U /!< PC Read/Write protection of Sector14 /
AnnaBridge	156:ff21514d8981	652	#define OB_PCROP_SECTOR_15 0x00004000U /!< PC Read/Write protection of Sector15 /
AnnaBridge	156:ff21514d8981	653	#define OB_PCROP_SECTOR_All 0x00007FFFU /!< PC Read/Write protection of all Sectors /
AnnaBridge	156:ff21514d8981	654	#endif /* STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	655	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	656
AnnaBridge	156:ff21514d8981	657	/--------------------------------------------- STM32F401xC -------------------------------------------/
AnnaBridge	156:ff21514d8981	658	#if defined(STM32F401xC)
AnnaBridge	156:ff21514d8981	659	#define OB_PCROP_SECTOR_0 0x00000001U /!< PC Read/Write protection of Sector0 /
AnnaBridge	156:ff21514d8981	660	#define OB_PCROP_SECTOR_1 0x00000002U /!< PC Read/Write protection of Sector1 /
AnnaBridge	156:ff21514d8981	661	#define OB_PCROP_SECTOR_2 0x00000004U /!< PC Read/Write protection of Sector2 /
AnnaBridge	156:ff21514d8981	662	#define OB_PCROP_SECTOR_3 0x00000008U /!< PC Read/Write protection of Sector3 /
AnnaBridge	156:ff21514d8981	663	#define OB_PCROP_SECTOR_4 0x00000010U /!< PC Read/Write protection of Sector4 /
AnnaBridge	156:ff21514d8981	664	#define OB_PCROP_SECTOR_5 0x00000020U /!< PC Read/Write protection of Sector5 /
AnnaBridge	156:ff21514d8981	665	#define OB_PCROP_SECTOR_All 0x00000FFFU /!< PC Read/Write protection of all Sectors /
AnnaBridge	156:ff21514d8981	666	#endif /* STM32F401xC */
AnnaBridge	156:ff21514d8981	667	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	668
AnnaBridge	156:ff21514d8981	669	/--------------------------------------------- STM32F410xx -------------------------------------------/
AnnaBridge	156:ff21514d8981	670	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
AnnaBridge	156:ff21514d8981	671	#define OB_PCROP_SECTOR_0 0x00000001U /!< PC Read/Write protection of Sector0 /
AnnaBridge	156:ff21514d8981	672	#define OB_PCROP_SECTOR_1 0x00000002U /!< PC Read/Write protection of Sector1 /
AnnaBridge	156:ff21514d8981	673	#define OB_PCROP_SECTOR_2 0x00000004U /!< PC Read/Write protection of Sector2 /
AnnaBridge	156:ff21514d8981	674	#define OB_PCROP_SECTOR_3 0x00000008U /!< PC Read/Write protection of Sector3 /
AnnaBridge	156:ff21514d8981	675	#define OB_PCROP_SECTOR_4 0x00000010U /!< PC Read/Write protection of Sector4 /
AnnaBridge	156:ff21514d8981	676	#define OB_PCROP_SECTOR_All 0x00000FFFU /!< PC Read/Write protection of all Sectors /
AnnaBridge	156:ff21514d8981	677	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
AnnaBridge	156:ff21514d8981	678	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	679
AnnaBridge	156:ff21514d8981	680	/-------------- STM32F401xE/STM32F411xE/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx/STM32F446xx --/
AnnaBridge	156:ff21514d8981	681	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F412Zx) \|\|\
AnnaBridge	156:ff21514d8981	682	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx)
AnnaBridge	156:ff21514d8981	683	#define OB_PCROP_SECTOR_0 0x00000001U /!< PC Read/Write protection of Sector0 /
AnnaBridge	156:ff21514d8981	684	#define OB_PCROP_SECTOR_1 0x00000002U /!< PC Read/Write protection of Sector1 /
AnnaBridge	156:ff21514d8981	685	#define OB_PCROP_SECTOR_2 0x00000004U /!< PC Read/Write protection of Sector2 /
AnnaBridge	156:ff21514d8981	686	#define OB_PCROP_SECTOR_3 0x00000008U /!< PC Read/Write protection of Sector3 /
AnnaBridge	156:ff21514d8981	687	#define OB_PCROP_SECTOR_4 0x00000010U /!< PC Read/Write protection of Sector4 /
AnnaBridge	156:ff21514d8981	688	#define OB_PCROP_SECTOR_5 0x00000020U /!< PC Read/Write protection of Sector5 /
AnnaBridge	156:ff21514d8981	689	#define OB_PCROP_SECTOR_6 0x00000040U /!< PC Read/Write protection of Sector6 /
AnnaBridge	156:ff21514d8981	690	#define OB_PCROP_SECTOR_7 0x00000080U /!< PC Read/Write protection of Sector7 /
AnnaBridge	156:ff21514d8981	691	#define OB_PCROP_SECTOR_All 0x00000FFFU /!< PC Read/Write protection of all Sectors /
AnnaBridge	156:ff21514d8981	692	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx */
AnnaBridge	156:ff21514d8981	693	/-----------------------------------------------------------------------------------------------------/
AnnaBridge	156:ff21514d8981	694
AnnaBridge	156:ff21514d8981	695	/**
AnnaBridge	156:ff21514d8981	696	* @}
AnnaBridge	156:ff21514d8981	697	*/
AnnaBridge	156:ff21514d8981	698
AnnaBridge	156:ff21514d8981	699	/** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot
AnnaBridge	156:ff21514d8981	700	* @{
AnnaBridge	156:ff21514d8981	701	*/
AnnaBridge	156:ff21514d8981	702	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	703	defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	704	#define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10) /!< Dual Bank Boot Enable /
AnnaBridge	156:ff21514d8981	705	#define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00) /!< Dual Bank Boot Disable, always boot on User Flash /
AnnaBridge	156:ff21514d8981	706	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	707	/**
AnnaBridge	156:ff21514d8981	708	* @}
AnnaBridge	156:ff21514d8981	709	*/
AnnaBridge	156:ff21514d8981	710
AnnaBridge	156:ff21514d8981	711	/** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode
AnnaBridge	156:ff21514d8981	712	* @{
AnnaBridge	156:ff21514d8981	713	*/
AnnaBridge	156:ff21514d8981	714	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	715	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	716	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
AnnaBridge	156:ff21514d8981	717	defined(STM32F479xx) \|\| defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\|\
AnnaBridge	156:ff21514d8981	718	defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	719	#define OB_PCROP_DESELECTED ((uint8_t)0x00) /!< Disabled PcROP, nWPRi bits used for Write Protection on sector i /
AnnaBridge	156:ff21514d8981	720	#define OB_PCROP_SELECTED ((uint8_t)0x80) /!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i /
AnnaBridge	156:ff21514d8981	721	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\|\
AnnaBridge	156:ff21514d8981	722	STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx \|\| STM32F412Zx \|\|\
AnnaBridge	156:ff21514d8981	723	STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	724	/**
AnnaBridge	156:ff21514d8981	725	* @}
AnnaBridge	156:ff21514d8981	726	*/
AnnaBridge	156:ff21514d8981	727
AnnaBridge	156:ff21514d8981	728	/**
AnnaBridge	156:ff21514d8981	729	* @}
AnnaBridge	156:ff21514d8981	730	*/
AnnaBridge	156:ff21514d8981	731
AnnaBridge	156:ff21514d8981	732	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	733
AnnaBridge	156:ff21514d8981	734	/* Exported functions --------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	735	/** @addtogroup FLASHEx_Exported_Functions
AnnaBridge	156:ff21514d8981	736	* @{
AnnaBridge	156:ff21514d8981	737	*/
AnnaBridge	156:ff21514d8981	738
AnnaBridge	156:ff21514d8981	739	/** @addtogroup FLASHEx_Exported_Functions_Group1
AnnaBridge	156:ff21514d8981	740	* @{
AnnaBridge	156:ff21514d8981	741	*/
AnnaBridge	156:ff21514d8981	742	/* Extension Program operation functions *************************************/
AnnaBridge	156:ff21514d8981	743	HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef pEraseInit, uint32_t SectorError);
AnnaBridge	156:ff21514d8981	744	HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
AnnaBridge	156:ff21514d8981	745	HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
AnnaBridge	156:ff21514d8981	746	void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
AnnaBridge	156:ff21514d8981	747
AnnaBridge	156:ff21514d8981	748	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	749	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	750	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
AnnaBridge	156:ff21514d8981	751	defined(STM32F479xx) \|\| defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\|\
AnnaBridge	156:ff21514d8981	752	defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	753	HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
AnnaBridge	156:ff21514d8981	754	void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
AnnaBridge	156:ff21514d8981	755	HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
AnnaBridge	156:ff21514d8981	756	HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
AnnaBridge	156:ff21514d8981	757	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\|\
AnnaBridge	156:ff21514d8981	758	STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx \|\| STM32F412Zx \|\|\
AnnaBridge	156:ff21514d8981	759	STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	760
AnnaBridge	156:ff21514d8981	761	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	762	defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	763	uint16_t HAL_FLASHEx_OB_GetBank2WRP(void);
AnnaBridge	156:ff21514d8981	764	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	765	/**
AnnaBridge	156:ff21514d8981	766	* @}
AnnaBridge	156:ff21514d8981	767	*/
AnnaBridge	156:ff21514d8981	768
AnnaBridge	156:ff21514d8981	769	/**
AnnaBridge	156:ff21514d8981	770	* @}
AnnaBridge	156:ff21514d8981	771	*/
AnnaBridge	156:ff21514d8981	772	/* Private types -------------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	773	/* Private variables ---------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	774	/* Private constants ---------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	775	/** @defgroup FLASHEx_Private_Constants FLASH Private Constants
AnnaBridge	156:ff21514d8981	776	* @{
AnnaBridge	156:ff21514d8981	777	*/
AnnaBridge	156:ff21514d8981	778	/--------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx---------------------/
AnnaBridge	156:ff21514d8981	779	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	780	#define FLASH_SECTOR_TOTAL 24U
AnnaBridge	156:ff21514d8981	781	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	782
AnnaBridge	156:ff21514d8981	783	/-------------------------------------- STM32F413xx/STM32F423xx ---------------------------------------/
AnnaBridge	156:ff21514d8981	784	#if defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	785	#define FLASH_SECTOR_TOTAL 16U
AnnaBridge	156:ff21514d8981	786	#endif /* STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	787
AnnaBridge	156:ff21514d8981	788	/--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------/
AnnaBridge	156:ff21514d8981	789	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\| defined(STM32F412Zx) \|\|\
AnnaBridge	156:ff21514d8981	790	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx)
AnnaBridge	156:ff21514d8981	791	#define FLASH_SECTOR_TOTAL 12U
AnnaBridge	156:ff21514d8981	792	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx */
AnnaBridge	156:ff21514d8981	793
AnnaBridge	156:ff21514d8981	794	/--------------------------------------------- STM32F401xC -------------------------------------------/
AnnaBridge	156:ff21514d8981	795	#if defined(STM32F401xC)
AnnaBridge	156:ff21514d8981	796	#define FLASH_SECTOR_TOTAL 6U
AnnaBridge	156:ff21514d8981	797	#endif /* STM32F401xC */
AnnaBridge	156:ff21514d8981	798
AnnaBridge	156:ff21514d8981	799	/--------------------------------------------- STM32F410xx -------------------------------------------/
AnnaBridge	156:ff21514d8981	800	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
AnnaBridge	156:ff21514d8981	801	#define FLASH_SECTOR_TOTAL 5U
AnnaBridge	156:ff21514d8981	802	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
AnnaBridge	156:ff21514d8981	803
AnnaBridge	156:ff21514d8981	804	/--------------------------------- STM32F401xE/STM32F411xE/STM32F412xG/STM32F446xx -------------------/
AnnaBridge	156:ff21514d8981	805	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
AnnaBridge	156:ff21514d8981	806	#define FLASH_SECTOR_TOTAL 8U
AnnaBridge	156:ff21514d8981	807	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
AnnaBridge	156:ff21514d8981	808
AnnaBridge	156:ff21514d8981	809	/**
AnnaBridge	156:ff21514d8981	810	* @brief OPTCR1 register byte 2 (Bits[23:16]) base address
AnnaBridge	156:ff21514d8981	811	*/
AnnaBridge	156:ff21514d8981	812	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	813	#define OPTCR1_BYTE2_ADDRESS 0x40023C1AU
AnnaBridge	156:ff21514d8981	814	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	815
AnnaBridge	156:ff21514d8981	816	/**
AnnaBridge	156:ff21514d8981	817	* @}
AnnaBridge	156:ff21514d8981	818	*/
AnnaBridge	156:ff21514d8981	819
AnnaBridge	156:ff21514d8981	820	/* Private macros ------------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	821	/** @defgroup FLASHEx_Private_Macros FLASH Private Macros
AnnaBridge	156:ff21514d8981	822	* @{
AnnaBridge	156:ff21514d8981	823	*/
AnnaBridge	156:ff21514d8981	824
AnnaBridge	156:ff21514d8981	825	/** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters
AnnaBridge	156:ff21514d8981	826	* @{
AnnaBridge	156:ff21514d8981	827	*/
AnnaBridge	156:ff21514d8981	828
AnnaBridge	156:ff21514d8981	829	#define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) \|\| \
AnnaBridge	156:ff21514d8981	830	((VALUE) == FLASH_TYPEERASE_MASSERASE))
AnnaBridge	156:ff21514d8981	831
AnnaBridge	156:ff21514d8981	832	#define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) \|\| \
AnnaBridge	156:ff21514d8981	833	((RANGE) == FLASH_VOLTAGE_RANGE_2) \|\| \
AnnaBridge	156:ff21514d8981	834	((RANGE) == FLASH_VOLTAGE_RANGE_3) \|\| \
AnnaBridge	156:ff21514d8981	835	((RANGE) == FLASH_VOLTAGE_RANGE_4))
AnnaBridge	156:ff21514d8981	836
AnnaBridge	156:ff21514d8981	837	#define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) \|\| \
AnnaBridge	156:ff21514d8981	838	((VALUE) == OB_WRPSTATE_ENABLE))
AnnaBridge	156:ff21514d8981	839
AnnaBridge	156:ff21514d8981	840	#define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP\|OPTIONBYTE_RDP\|OPTIONBYTE_USER\|OPTIONBYTE_BOR)))
AnnaBridge	156:ff21514d8981	841
AnnaBridge	156:ff21514d8981	842	#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) \|\|\
AnnaBridge	156:ff21514d8981	843	((LEVEL) == OB_RDP_LEVEL_1) \|\|\
AnnaBridge	156:ff21514d8981	844	((LEVEL) == OB_RDP_LEVEL_2))
AnnaBridge	156:ff21514d8981	845
AnnaBridge	156:ff21514d8981	846	#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) \|\| ((SOURCE) == OB_IWDG_HW))
AnnaBridge	156:ff21514d8981	847
AnnaBridge	156:ff21514d8981	848	#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) \|\| ((SOURCE) == OB_STOP_RST))
AnnaBridge	156:ff21514d8981	849
AnnaBridge	156:ff21514d8981	850	#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) \|\| ((SOURCE) == OB_STDBY_RST))
AnnaBridge	156:ff21514d8981	851
AnnaBridge	156:ff21514d8981	852	#define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) \|\| ((LEVEL) == OB_BOR_LEVEL2) \|\|\
AnnaBridge	156:ff21514d8981	853	((LEVEL) == OB_BOR_LEVEL3) \|\| ((LEVEL) == OB_BOR_OFF))
AnnaBridge	156:ff21514d8981	854
AnnaBridge	156:ff21514d8981	855	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	856	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	857	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
AnnaBridge	156:ff21514d8981	858	defined(STM32F479xx) \|\| defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\|\
AnnaBridge	156:ff21514d8981	859	defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	860	#define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) \|\| \
AnnaBridge	156:ff21514d8981	861	((VALUE) == OB_PCROP_STATE_ENABLE))
AnnaBridge	156:ff21514d8981	862	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\|\
AnnaBridge	156:ff21514d8981	863	STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx \|\| STM32F412Zx \|\|\
AnnaBridge	156:ff21514d8981	864	STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	865
AnnaBridge	156:ff21514d8981	866	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	867	defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	868	#define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) \|\| \
AnnaBridge	156:ff21514d8981	869	((VALUE) == OPTIONBYTE_BOOTCONFIG))
AnnaBridge	156:ff21514d8981	870	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	871
AnnaBridge	156:ff21514d8981	872	#if defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	873	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F412Zx) \|\|\
AnnaBridge	156:ff21514d8981	874	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\|\
AnnaBridge	156:ff21514d8981	875	defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	876	#define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP))
AnnaBridge	156:ff21514d8981	877	#endif /* STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F412Zx \|\|\
AnnaBridge	156:ff21514d8981	878	STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	879
AnnaBridge	156:ff21514d8981	880	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	881	defined(STM32F446xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	882	#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) \|\| \
AnnaBridge	156:ff21514d8981	883	((LATENCY) == FLASH_LATENCY_1) \|\| \
AnnaBridge	156:ff21514d8981	884	((LATENCY) == FLASH_LATENCY_2) \|\| \
AnnaBridge	156:ff21514d8981	885	((LATENCY) == FLASH_LATENCY_3) \|\| \
AnnaBridge	156:ff21514d8981	886	((LATENCY) == FLASH_LATENCY_4) \|\| \
AnnaBridge	156:ff21514d8981	887	((LATENCY) == FLASH_LATENCY_5) \|\| \
AnnaBridge	156:ff21514d8981	888	((LATENCY) == FLASH_LATENCY_6) \|\| \
AnnaBridge	156:ff21514d8981	889	((LATENCY) == FLASH_LATENCY_7) \|\| \
AnnaBridge	156:ff21514d8981	890	((LATENCY) == FLASH_LATENCY_8) \|\| \
AnnaBridge	156:ff21514d8981	891	((LATENCY) == FLASH_LATENCY_9) \|\| \
AnnaBridge	156:ff21514d8981	892	((LATENCY) == FLASH_LATENCY_10) \|\| \
AnnaBridge	156:ff21514d8981	893	((LATENCY) == FLASH_LATENCY_11) \|\| \
AnnaBridge	156:ff21514d8981	894	((LATENCY) == FLASH_LATENCY_12) \|\| \
AnnaBridge	156:ff21514d8981	895	((LATENCY) == FLASH_LATENCY_13) \|\| \
AnnaBridge	156:ff21514d8981	896	((LATENCY) == FLASH_LATENCY_14) \|\| \
AnnaBridge	156:ff21514d8981	897	((LATENCY) == FLASH_LATENCY_15))
AnnaBridge	156:ff21514d8981	898	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	899
AnnaBridge	156:ff21514d8981	900	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
AnnaBridge	156:ff21514d8981	901	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	902	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\|\
AnnaBridge	156:ff21514d8981	903	defined(STM32F412Rx) \|\| defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	904	#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) \|\| \
AnnaBridge	156:ff21514d8981	905	((LATENCY) == FLASH_LATENCY_1) \|\| \
AnnaBridge	156:ff21514d8981	906	((LATENCY) == FLASH_LATENCY_2) \|\| \
AnnaBridge	156:ff21514d8981	907	((LATENCY) == FLASH_LATENCY_3) \|\| \
AnnaBridge	156:ff21514d8981	908	((LATENCY) == FLASH_LATENCY_4) \|\| \
AnnaBridge	156:ff21514d8981	909	((LATENCY) == FLASH_LATENCY_5) \|\| \
AnnaBridge	156:ff21514d8981	910	((LATENCY) == FLASH_LATENCY_6) \|\| \
AnnaBridge	156:ff21514d8981	911	((LATENCY) == FLASH_LATENCY_7))
AnnaBridge	156:ff21514d8981	912	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F412Zx \|\| STM32F412Vx \|\|\
AnnaBridge	156:ff21514d8981	913	STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	914
AnnaBridge	156:ff21514d8981	915	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	916	#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) \|\| \
AnnaBridge	156:ff21514d8981	917	((BANK) == FLASH_BANK_2) \|\| \
AnnaBridge	156:ff21514d8981	918	((BANK) == FLASH_BANK_BOTH))
AnnaBridge	156:ff21514d8981	919	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	920
AnnaBridge	156:ff21514d8981	921	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
AnnaBridge	156:ff21514d8981	922	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	923	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F412Zx) \|\|\
AnnaBridge	156:ff21514d8981	924	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\|\
AnnaBridge	156:ff21514d8981	925	defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	926	#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
AnnaBridge	156:ff21514d8981	927	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F412Zx \|\| STM32F412Vx \|\|\
AnnaBridge	156:ff21514d8981	928	STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	929
AnnaBridge	156:ff21514d8981	930	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	931	#define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
AnnaBridge	156:ff21514d8981	932	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
AnnaBridge	156:ff21514d8981	933	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5) \|\|\
AnnaBridge	156:ff21514d8981	934	((SECTOR) == FLASH_SECTOR_6) \|\| ((SECTOR) == FLASH_SECTOR_7) \|\|\
AnnaBridge	156:ff21514d8981	935	((SECTOR) == FLASH_SECTOR_8) \|\| ((SECTOR) == FLASH_SECTOR_9) \|\|\
AnnaBridge	156:ff21514d8981	936	((SECTOR) == FLASH_SECTOR_10) \|\| ((SECTOR) == FLASH_SECTOR_11) \|\|\
AnnaBridge	156:ff21514d8981	937	((SECTOR) == FLASH_SECTOR_12) \|\| ((SECTOR) == FLASH_SECTOR_13) \|\|\
AnnaBridge	156:ff21514d8981	938	((SECTOR) == FLASH_SECTOR_14) \|\| ((SECTOR) == FLASH_SECTOR_15) \|\|\
AnnaBridge	156:ff21514d8981	939	((SECTOR) == FLASH_SECTOR_16) \|\| ((SECTOR) == FLASH_SECTOR_17) \|\|\
AnnaBridge	156:ff21514d8981	940	((SECTOR) == FLASH_SECTOR_18) \|\| ((SECTOR) == FLASH_SECTOR_19) \|\|\
AnnaBridge	156:ff21514d8981	941	((SECTOR) == FLASH_SECTOR_20) \|\| ((SECTOR) == FLASH_SECTOR_21) \|\|\
AnnaBridge	156:ff21514d8981	942	((SECTOR) == FLASH_SECTOR_22) \|\| ((SECTOR) == FLASH_SECTOR_23))
AnnaBridge	156:ff21514d8981	943	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	944
AnnaBridge	156:ff21514d8981	945	#if defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	946	#define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
AnnaBridge	156:ff21514d8981	947	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
AnnaBridge	156:ff21514d8981	948	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5) \|\|\
AnnaBridge	156:ff21514d8981	949	((SECTOR) == FLASH_SECTOR_6) \|\| ((SECTOR) == FLASH_SECTOR_7) \|\|\
AnnaBridge	156:ff21514d8981	950	((SECTOR) == FLASH_SECTOR_8) \|\| ((SECTOR) == FLASH_SECTOR_9) \|\|\
AnnaBridge	156:ff21514d8981	951	((SECTOR) == FLASH_SECTOR_10) \|\| ((SECTOR) == FLASH_SECTOR_11) \|\|\
AnnaBridge	156:ff21514d8981	952	((SECTOR) == FLASH_SECTOR_12) \|\| ((SECTOR) == FLASH_SECTOR_13) \|\|\
AnnaBridge	156:ff21514d8981	953	((SECTOR) == FLASH_SECTOR_14) \|\| ((SECTOR) == FLASH_SECTOR_15))
AnnaBridge	156:ff21514d8981	954	#endif /* STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	955
AnnaBridge	156:ff21514d8981	956	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\| defined(STM32F412Zx) \|\|\
AnnaBridge	156:ff21514d8981	957	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx)
AnnaBridge	156:ff21514d8981	958	#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
AnnaBridge	156:ff21514d8981	959	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
AnnaBridge	156:ff21514d8981	960	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5) \|\|\
AnnaBridge	156:ff21514d8981	961	((SECTOR) == FLASH_SECTOR_6) \|\| ((SECTOR) == FLASH_SECTOR_7) \|\|\
AnnaBridge	156:ff21514d8981	962	((SECTOR) == FLASH_SECTOR_8) \|\| ((SECTOR) == FLASH_SECTOR_9) \|\|\
AnnaBridge	156:ff21514d8981	963	((SECTOR) == FLASH_SECTOR_10) \|\| ((SECTOR) == FLASH_SECTOR_11))
AnnaBridge	156:ff21514d8981	964	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx */
AnnaBridge	156:ff21514d8981	965
AnnaBridge	156:ff21514d8981	966	#if defined(STM32F401xC)
AnnaBridge	156:ff21514d8981	967	#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
AnnaBridge	156:ff21514d8981	968	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
AnnaBridge	156:ff21514d8981	969	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5))
AnnaBridge	156:ff21514d8981	970	#endif /* STM32F401xC */
AnnaBridge	156:ff21514d8981	971
AnnaBridge	156:ff21514d8981	972	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
AnnaBridge	156:ff21514d8981	973	#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
AnnaBridge	156:ff21514d8981	974	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
AnnaBridge	156:ff21514d8981	975	((SECTOR) == FLASH_SECTOR_4))
AnnaBridge	156:ff21514d8981	976	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
AnnaBridge	156:ff21514d8981	977
AnnaBridge	156:ff21514d8981	978	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
AnnaBridge	156:ff21514d8981	979	#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
AnnaBridge	156:ff21514d8981	980	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
AnnaBridge	156:ff21514d8981	981	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5) \|\|\
AnnaBridge	156:ff21514d8981	982	((SECTOR) == FLASH_SECTOR_6) \|\| ((SECTOR) == FLASH_SECTOR_7))
AnnaBridge	156:ff21514d8981	983	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
AnnaBridge	156:ff21514d8981	984
AnnaBridge	156:ff21514d8981	985	#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END)) \|\| \
AnnaBridge	156:ff21514d8981	986	(((ADDRESS) >= FLASH_OTP_BASE) && ((ADDRESS) <= FLASH_OTP_END)))
AnnaBridge	156:ff21514d8981	987
AnnaBridge	156:ff21514d8981	988	#define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL))
AnnaBridge	156:ff21514d8981	989
AnnaBridge	156:ff21514d8981	990	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	991	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFF000000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
AnnaBridge	156:ff21514d8981	992	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	993
AnnaBridge	156:ff21514d8981	994	#if defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	995	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFF8000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
AnnaBridge	156:ff21514d8981	996	#endif /* STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	997
AnnaBridge	156:ff21514d8981	998	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx)
AnnaBridge	156:ff21514d8981	999	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
AnnaBridge	156:ff21514d8981	1000	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx */
AnnaBridge	156:ff21514d8981	1001
AnnaBridge	156:ff21514d8981	1002	#if defined(STM32F401xC)
AnnaBridge	156:ff21514d8981	1003	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
AnnaBridge	156:ff21514d8981	1004	#endif /* STM32F401xC */
AnnaBridge	156:ff21514d8981	1005
AnnaBridge	156:ff21514d8981	1006	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
AnnaBridge	156:ff21514d8981	1007	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
AnnaBridge	156:ff21514d8981	1008	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
AnnaBridge	156:ff21514d8981	1009
AnnaBridge	156:ff21514d8981	1010	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\|\
AnnaBridge	156:ff21514d8981	1011	defined(STM32F412Rx) \|\| defined(STM32F412Cx)
AnnaBridge	156:ff21514d8981	1012	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
AnnaBridge	156:ff21514d8981	1013	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx */
AnnaBridge	156:ff21514d8981	1014
AnnaBridge	156:ff21514d8981	1015	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	1016	#define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
AnnaBridge	156:ff21514d8981	1017	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	1018
AnnaBridge	156:ff21514d8981	1019	#if defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	1020	#define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFF8000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
AnnaBridge	156:ff21514d8981	1021	#endif /* STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	1022
AnnaBridge	156:ff21514d8981	1023	#if defined(STM32F401xC)
AnnaBridge	156:ff21514d8981	1024	#define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
AnnaBridge	156:ff21514d8981	1025	#endif /* STM32F401xC */
AnnaBridge	156:ff21514d8981	1026
AnnaBridge	156:ff21514d8981	1027	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
AnnaBridge	156:ff21514d8981	1028	#define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
AnnaBridge	156:ff21514d8981	1029	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
AnnaBridge	156:ff21514d8981	1030
AnnaBridge	156:ff21514d8981	1031	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\|\
AnnaBridge	156:ff21514d8981	1032	defined(STM32F412Rx) \|\| defined(STM32F412Cx)
AnnaBridge	156:ff21514d8981	1033	#define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
AnnaBridge	156:ff21514d8981	1034	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx */
AnnaBridge	156:ff21514d8981	1035
AnnaBridge	156:ff21514d8981	1036	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	1037	defined(STM32F469xx) \|\| defined(STM32F479xx)
AnnaBridge	156:ff21514d8981	1038	#define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) \|\| ((BOOT) == OB_DUAL_BOOT_DISABLE))
AnnaBridge	156:ff21514d8981	1039	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
AnnaBridge	156:ff21514d8981	1040
AnnaBridge	156:ff21514d8981	1041	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
AnnaBridge	156:ff21514d8981	1042	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
AnnaBridge	156:ff21514d8981	1043	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
AnnaBridge	156:ff21514d8981	1044	defined(STM32F479xx) \|\| defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\|\
AnnaBridge	156:ff21514d8981	1045	defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
AnnaBridge	156:ff21514d8981	1046	#define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) \|\| ((PCROP) == OB_PCROP_DESELECTED))
AnnaBridge	156:ff21514d8981	1047	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\|\
AnnaBridge	156:ff21514d8981	1048	STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx \|\| STM32F412Zx \|\|\
AnnaBridge	156:ff21514d8981	1049	STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
AnnaBridge	156:ff21514d8981	1050	/**
AnnaBridge	156:ff21514d8981	1051	* @}
AnnaBridge	156:ff21514d8981	1052	*/
AnnaBridge	156:ff21514d8981	1053
AnnaBridge	156:ff21514d8981	1054	/**
AnnaBridge	156:ff21514d8981	1055	* @}
AnnaBridge	156:ff21514d8981	1056	*/
AnnaBridge	156:ff21514d8981	1057
AnnaBridge	156:ff21514d8981	1058	/* Private functions ---------------------------------------------------------*/
AnnaBridge	156:ff21514d8981	1059	/** @defgroup FLASHEx_Private_Functions FLASH Private Functions
AnnaBridge	156:ff21514d8981	1060	* @{
AnnaBridge	156:ff21514d8981	1061	*/
AnnaBridge	156:ff21514d8981	1062	void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange);
AnnaBridge	156:ff21514d8981	1063	void FLASH_FlushCaches(void);
AnnaBridge	156:ff21514d8981	1064	/**
AnnaBridge	156:ff21514d8981	1065	* @}
AnnaBridge	156:ff21514d8981	1066	*/
AnnaBridge	156:ff21514d8981	1067
AnnaBridge	156:ff21514d8981	1068	/**
AnnaBridge	156:ff21514d8981	1069	* @}
AnnaBridge	156:ff21514d8981	1070	*/
AnnaBridge	156:ff21514d8981	1071
AnnaBridge	156:ff21514d8981	1072	/**
AnnaBridge	156:ff21514d8981	1073	* @}
AnnaBridge	156:ff21514d8981	1074	*/
AnnaBridge	156:ff21514d8981	1075
AnnaBridge	156:ff21514d8981	1076	#ifdef __cplusplus
AnnaBridge	156:ff21514d8981	1077	}
AnnaBridge	156:ff21514d8981	1078	#endif
AnnaBridge	156:ff21514d8981	1079
AnnaBridge	156:ff21514d8981	1080	#endif /* __STM32F4xx_HAL_FLASH_EX_H */
AnnaBridge	156:ff21514d8981	1081
AnnaBridge	156:ff21514d8981	1082	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/