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TARGET_B96B_F446VE/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dma2d.h@169:a7c7b631e539, 2018-06-22 (annotated)
- Committer:
- Anna Bridge
- Date:
- Fri Jun 22 15:38:59 2018 +0100
- Revision:
- 169:a7c7b631e539
- Parent:
- 163:e59c8e839560
mbed library. Release version 162
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 156:ff21514d8981 | 1 | /** |
| AnnaBridge | 156:ff21514d8981 | 2 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 3 | * @file stm32f4xx_hal_dma2d.h |
| AnnaBridge | 156:ff21514d8981 | 4 | * @author MCD Application Team |
| AnnaBridge | 156:ff21514d8981 | 5 | * @brief Header file of DMA2D HAL module. |
| AnnaBridge | 156:ff21514d8981 | 6 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 7 | * @attention |
| AnnaBridge | 156:ff21514d8981 | 8 | * |
| AnnaBridge | 156:ff21514d8981 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 156:ff21514d8981 | 10 | * |
| AnnaBridge | 156:ff21514d8981 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 156:ff21514d8981 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 156:ff21514d8981 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 156:ff21514d8981 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 156:ff21514d8981 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 156:ff21514d8981 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 156:ff21514d8981 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 156:ff21514d8981 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 156:ff21514d8981 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 156:ff21514d8981 | 20 | * without specific prior written permission. |
| AnnaBridge | 156:ff21514d8981 | 21 | * |
| AnnaBridge | 156:ff21514d8981 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 156:ff21514d8981 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 156:ff21514d8981 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 156:ff21514d8981 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 156:ff21514d8981 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 156:ff21514d8981 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 156:ff21514d8981 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 156:ff21514d8981 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 156:ff21514d8981 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 156:ff21514d8981 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 156:ff21514d8981 | 32 | * |
| AnnaBridge | 156:ff21514d8981 | 33 | ****************************************************************************** |
| AnnaBridge | 156:ff21514d8981 | 34 | */ |
| AnnaBridge | 156:ff21514d8981 | 35 | |
| AnnaBridge | 156:ff21514d8981 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 37 | #ifndef __STM32F4xx_HAL_DMA2D_H |
| AnnaBridge | 156:ff21514d8981 | 38 | #define __STM32F4xx_HAL_DMA2D_H |
| AnnaBridge | 156:ff21514d8981 | 39 | |
| AnnaBridge | 156:ff21514d8981 | 40 | #ifdef __cplusplus |
| AnnaBridge | 156:ff21514d8981 | 41 | extern "C" { |
| AnnaBridge | 156:ff21514d8981 | 42 | #endif |
| AnnaBridge | 156:ff21514d8981 | 43 | |
| AnnaBridge | 156:ff21514d8981 | 44 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| AnnaBridge | 156:ff21514d8981 | 45 | defined(STM32F469xx) || defined(STM32F479xx) |
| AnnaBridge | 156:ff21514d8981 | 46 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 47 | #include "stm32f4xx_hal_def.h" |
| AnnaBridge | 156:ff21514d8981 | 48 | |
| AnnaBridge | 156:ff21514d8981 | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
| AnnaBridge | 156:ff21514d8981 | 50 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 51 | */ |
| AnnaBridge | 156:ff21514d8981 | 52 | |
| AnnaBridge | 156:ff21514d8981 | 53 | /** @addtogroup DMA2D DMA2D |
| AnnaBridge | 156:ff21514d8981 | 54 | * @brief DMA2D HAL module driver |
| AnnaBridge | 156:ff21514d8981 | 55 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 56 | */ |
| AnnaBridge | 156:ff21514d8981 | 57 | |
| AnnaBridge | 156:ff21514d8981 | 58 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 59 | /** @defgroup DMA2D_Exported_Types DMA2D Exported Types |
| AnnaBridge | 156:ff21514d8981 | 60 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 61 | */ |
| AnnaBridge | 156:ff21514d8981 | 62 | #define MAX_DMA2D_LAYER 2U |
| AnnaBridge | 156:ff21514d8981 | 63 | |
| AnnaBridge | 156:ff21514d8981 | 64 | /** |
| AnnaBridge | 156:ff21514d8981 | 65 | * @brief DMA2D color Structure definition |
| AnnaBridge | 156:ff21514d8981 | 66 | */ |
| AnnaBridge | 156:ff21514d8981 | 67 | typedef struct |
| AnnaBridge | 156:ff21514d8981 | 68 | { |
| AnnaBridge | 156:ff21514d8981 | 69 | uint32_t Blue; /*!< Configures the blue value. |
| AnnaBridge | 156:ff21514d8981 | 70 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */ |
| AnnaBridge | 156:ff21514d8981 | 71 | |
| AnnaBridge | 156:ff21514d8981 | 72 | uint32_t Green; /*!< Configures the green value. |
| AnnaBridge | 156:ff21514d8981 | 73 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */ |
| AnnaBridge | 156:ff21514d8981 | 74 | |
| AnnaBridge | 156:ff21514d8981 | 75 | uint32_t Red; /*!< Configures the red value. |
| AnnaBridge | 156:ff21514d8981 | 76 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */ |
| AnnaBridge | 156:ff21514d8981 | 77 | } DMA2D_ColorTypeDef; |
| AnnaBridge | 156:ff21514d8981 | 78 | |
| AnnaBridge | 156:ff21514d8981 | 79 | /** |
| AnnaBridge | 156:ff21514d8981 | 80 | * @brief DMA2D CLUT Structure definition |
| AnnaBridge | 156:ff21514d8981 | 81 | */ |
| AnnaBridge | 156:ff21514d8981 | 82 | typedef struct |
| AnnaBridge | 156:ff21514d8981 | 83 | { |
| AnnaBridge | 156:ff21514d8981 | 84 | uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/ |
| AnnaBridge | 156:ff21514d8981 | 85 | |
| AnnaBridge | 156:ff21514d8981 | 86 | uint32_t CLUTColorMode; /*!< Configures the DMA2D CLUT color mode. |
| AnnaBridge | 156:ff21514d8981 | 87 | This parameter can be one value of @ref DMA2D_CLUT_CM. */ |
| AnnaBridge | 156:ff21514d8981 | 88 | |
| AnnaBridge | 156:ff21514d8981 | 89 | uint32_t Size; /*!< Configures the DMA2D CLUT size. |
| AnnaBridge | 156:ff21514d8981 | 90 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/ |
| AnnaBridge | 156:ff21514d8981 | 91 | } DMA2D_CLUTCfgTypeDef; |
| AnnaBridge | 156:ff21514d8981 | 92 | |
| AnnaBridge | 156:ff21514d8981 | 93 | /** |
| AnnaBridge | 156:ff21514d8981 | 94 | * @brief DMA2D Init structure definition |
| AnnaBridge | 156:ff21514d8981 | 95 | */ |
| AnnaBridge | 156:ff21514d8981 | 96 | typedef struct |
| AnnaBridge | 156:ff21514d8981 | 97 | { |
| AnnaBridge | 156:ff21514d8981 | 98 | uint32_t Mode; /*!< Configures the DMA2D transfer mode. |
| AnnaBridge | 156:ff21514d8981 | 99 | This parameter can be one value of @ref DMA2D_Mode. */ |
| AnnaBridge | 156:ff21514d8981 | 100 | |
| AnnaBridge | 156:ff21514d8981 | 101 | uint32_t ColorMode; /*!< Configures the color format of the output image. |
| AnnaBridge | 156:ff21514d8981 | 102 | This parameter can be one value of @ref DMA2D_Output_Color_Mode. */ |
| AnnaBridge | 156:ff21514d8981 | 103 | |
| AnnaBridge | 156:ff21514d8981 | 104 | uint32_t OutputOffset; /*!< Specifies the Offset value. |
| AnnaBridge | 156:ff21514d8981 | 105 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */ |
| AnnaBridge | 156:ff21514d8981 | 106 | |
| AnnaBridge | 156:ff21514d8981 | 107 | } DMA2D_InitTypeDef; |
| AnnaBridge | 156:ff21514d8981 | 108 | |
| AnnaBridge | 156:ff21514d8981 | 109 | /** |
| AnnaBridge | 156:ff21514d8981 | 110 | * @brief DMA2D Layer structure definition |
| AnnaBridge | 156:ff21514d8981 | 111 | */ |
| AnnaBridge | 156:ff21514d8981 | 112 | typedef struct |
| AnnaBridge | 156:ff21514d8981 | 113 | { |
| AnnaBridge | 156:ff21514d8981 | 114 | uint32_t InputOffset; /*!< Configures the DMA2D foreground or background offset. |
| AnnaBridge | 156:ff21514d8981 | 115 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */ |
| AnnaBridge | 156:ff21514d8981 | 116 | |
| AnnaBridge | 156:ff21514d8981 | 117 | uint32_t InputColorMode; /*!< Configures the DMA2D foreground or background color mode. |
| AnnaBridge | 156:ff21514d8981 | 118 | This parameter can be one value of @ref DMA2D_Input_Color_Mode. */ |
| AnnaBridge | 156:ff21514d8981 | 119 | |
| AnnaBridge | 156:ff21514d8981 | 120 | uint32_t AlphaMode; /*!< Configures the DMA2D foreground or background alpha mode. |
| AnnaBridge | 156:ff21514d8981 | 121 | This parameter can be one value of @ref DMA2D_Alpha_Mode. */ |
| AnnaBridge | 156:ff21514d8981 | 122 | |
| AnnaBridge | 156:ff21514d8981 | 123 | uint32_t InputAlpha; /*!< Specifies the DMA2D foreground or background alpha value and color value in case of A8 or A4 color mode. |
| AnnaBridge | 156:ff21514d8981 | 124 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF except for the color modes detailed below. |
| AnnaBridge | 156:ff21514d8981 | 125 | @note In case of A8 or A4 color mode (ARGB), this parameter must be a number between |
| AnnaBridge | 156:ff21514d8981 | 126 | Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF where |
| AnnaBridge | 156:ff21514d8981 | 127 | - InputAlpha[24:31] is the alpha value ALPHA[0:7] |
| AnnaBridge | 156:ff21514d8981 | 128 | - InputAlpha[16:23] is the red value RED[0:7] |
| AnnaBridge | 156:ff21514d8981 | 129 | - InputAlpha[8:15] is the green value GREEN[0:7] |
| AnnaBridge | 156:ff21514d8981 | 130 | - InputAlpha[0:7] is the blue value BLUE[0:7]. */ |
| AnnaBridge | 156:ff21514d8981 | 131 | |
| AnnaBridge | 156:ff21514d8981 | 132 | } DMA2D_LayerCfgTypeDef; |
| AnnaBridge | 156:ff21514d8981 | 133 | |
| AnnaBridge | 156:ff21514d8981 | 134 | /** |
| AnnaBridge | 156:ff21514d8981 | 135 | * @brief HAL DMA2D State structures definition |
| AnnaBridge | 156:ff21514d8981 | 136 | */ |
| AnnaBridge | 156:ff21514d8981 | 137 | typedef enum |
| AnnaBridge | 156:ff21514d8981 | 138 | { |
| AnnaBridge | 156:ff21514d8981 | 139 | HAL_DMA2D_STATE_RESET = 0x00U, /*!< DMA2D not yet initialized or disabled */ |
| AnnaBridge | 156:ff21514d8981 | 140 | HAL_DMA2D_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
| AnnaBridge | 156:ff21514d8981 | 141 | HAL_DMA2D_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ |
| AnnaBridge | 156:ff21514d8981 | 142 | HAL_DMA2D_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ |
| AnnaBridge | 156:ff21514d8981 | 143 | HAL_DMA2D_STATE_ERROR = 0x04U, /*!< DMA2D state error */ |
| AnnaBridge | 156:ff21514d8981 | 144 | HAL_DMA2D_STATE_SUSPEND = 0x05U /*!< DMA2D process is suspended */ |
| AnnaBridge | 156:ff21514d8981 | 145 | }HAL_DMA2D_StateTypeDef; |
| AnnaBridge | 156:ff21514d8981 | 146 | |
| AnnaBridge | 156:ff21514d8981 | 147 | /** |
| AnnaBridge | 156:ff21514d8981 | 148 | * @brief DMA2D handle Structure definition |
| AnnaBridge | 156:ff21514d8981 | 149 | */ |
| AnnaBridge | 156:ff21514d8981 | 150 | typedef struct __DMA2D_HandleTypeDef |
| AnnaBridge | 156:ff21514d8981 | 151 | { |
| AnnaBridge | 156:ff21514d8981 | 152 | DMA2D_TypeDef *Instance; /*!< DMA2D register base address. */ |
| AnnaBridge | 156:ff21514d8981 | 153 | |
| AnnaBridge | 156:ff21514d8981 | 154 | DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters. */ |
| AnnaBridge | 156:ff21514d8981 | 155 | |
| AnnaBridge | 156:ff21514d8981 | 156 | void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback. */ |
| AnnaBridge | 156:ff21514d8981 | 157 | |
| AnnaBridge | 156:ff21514d8981 | 158 | void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback. */ |
| AnnaBridge | 156:ff21514d8981 | 159 | |
| AnnaBridge | 156:ff21514d8981 | 160 | DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */ |
| AnnaBridge | 156:ff21514d8981 | 161 | |
| AnnaBridge | 156:ff21514d8981 | 162 | HAL_LockTypeDef Lock; /*!< DMA2D lock. */ |
| AnnaBridge | 156:ff21514d8981 | 163 | |
| AnnaBridge | 156:ff21514d8981 | 164 | __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state. */ |
| AnnaBridge | 156:ff21514d8981 | 165 | |
| AnnaBridge | 156:ff21514d8981 | 166 | __IO uint32_t ErrorCode; /*!< DMA2D error code. */ |
| AnnaBridge | 156:ff21514d8981 | 167 | } DMA2D_HandleTypeDef; |
| AnnaBridge | 156:ff21514d8981 | 168 | /** |
| AnnaBridge | 156:ff21514d8981 | 169 | * @} |
| AnnaBridge | 156:ff21514d8981 | 170 | */ |
| AnnaBridge | 156:ff21514d8981 | 171 | |
| AnnaBridge | 156:ff21514d8981 | 172 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 173 | /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants |
| AnnaBridge | 156:ff21514d8981 | 174 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 175 | */ |
| AnnaBridge | 156:ff21514d8981 | 176 | |
| AnnaBridge | 156:ff21514d8981 | 177 | /** @defgroup DMA2D_Error_Code DMA2D Error Code |
| AnnaBridge | 156:ff21514d8981 | 178 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 179 | */ |
| AnnaBridge | 156:ff21514d8981 | 180 | #define HAL_DMA2D_ERROR_NONE 0x00000000U /*!< No error */ |
| AnnaBridge | 156:ff21514d8981 | 181 | #define HAL_DMA2D_ERROR_TE 0x00000001U /*!< Transfer error */ |
| AnnaBridge | 156:ff21514d8981 | 182 | #define HAL_DMA2D_ERROR_CE 0x00000002U /*!< Configuration error */ |
| AnnaBridge | 156:ff21514d8981 | 183 | #define HAL_DMA2D_ERROR_CAE 0x00000004U /*!< CLUT access error */ |
| AnnaBridge | 156:ff21514d8981 | 184 | #define HAL_DMA2D_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */ |
| AnnaBridge | 156:ff21514d8981 | 185 | /** |
| AnnaBridge | 156:ff21514d8981 | 186 | * @} |
| AnnaBridge | 156:ff21514d8981 | 187 | */ |
| AnnaBridge | 156:ff21514d8981 | 188 | |
| AnnaBridge | 156:ff21514d8981 | 189 | /** @defgroup DMA2D_Mode DMA2D Mode |
| AnnaBridge | 156:ff21514d8981 | 190 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 191 | */ |
| AnnaBridge | 156:ff21514d8981 | 192 | #define DMA2D_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */ |
| AnnaBridge | 156:ff21514d8981 | 193 | #define DMA2D_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */ |
| AnnaBridge | 156:ff21514d8981 | 194 | #define DMA2D_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */ |
| AnnaBridge | 156:ff21514d8981 | 195 | #define DMA2D_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */ |
| AnnaBridge | 156:ff21514d8981 | 196 | /** |
| AnnaBridge | 156:ff21514d8981 | 197 | * @} |
| AnnaBridge | 156:ff21514d8981 | 198 | */ |
| AnnaBridge | 156:ff21514d8981 | 199 | |
| AnnaBridge | 156:ff21514d8981 | 200 | /** @defgroup DMA2D_Output_Color_Mode DMA2D Output Color Mode |
| AnnaBridge | 156:ff21514d8981 | 201 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 202 | */ |
| AnnaBridge | 156:ff21514d8981 | 203 | #define DMA2D_OUTPUT_ARGB8888 0x00000000U /*!< ARGB8888 DMA2D color mode */ |
| AnnaBridge | 156:ff21514d8981 | 204 | #define DMA2D_OUTPUT_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 DMA2D color mode */ |
| AnnaBridge | 156:ff21514d8981 | 205 | #define DMA2D_OUTPUT_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 DMA2D color mode */ |
| AnnaBridge | 156:ff21514d8981 | 206 | #define DMA2D_OUTPUT_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 DMA2D color mode */ |
| AnnaBridge | 156:ff21514d8981 | 207 | #define DMA2D_OUTPUT_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 DMA2D color mode */ |
| AnnaBridge | 156:ff21514d8981 | 208 | /** |
| AnnaBridge | 156:ff21514d8981 | 209 | * @} |
| AnnaBridge | 156:ff21514d8981 | 210 | */ |
| AnnaBridge | 156:ff21514d8981 | 211 | |
| AnnaBridge | 156:ff21514d8981 | 212 | /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode |
| AnnaBridge | 156:ff21514d8981 | 213 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 214 | */ |
| AnnaBridge | 156:ff21514d8981 | 215 | #define DMA2D_INPUT_ARGB8888 0x00000000U /*!< ARGB8888 color mode */ |
| AnnaBridge | 156:ff21514d8981 | 216 | #define DMA2D_INPUT_RGB888 0x00000001U /*!< RGB888 color mode */ |
| AnnaBridge | 156:ff21514d8981 | 217 | #define DMA2D_INPUT_RGB565 0x00000002U /*!< RGB565 color mode */ |
| AnnaBridge | 156:ff21514d8981 | 218 | #define DMA2D_INPUT_ARGB1555 0x00000003U /*!< ARGB1555 color mode */ |
| AnnaBridge | 156:ff21514d8981 | 219 | #define DMA2D_INPUT_ARGB4444 0x00000004U /*!< ARGB4444 color mode */ |
| AnnaBridge | 156:ff21514d8981 | 220 | #define DMA2D_INPUT_L8 0x00000005U /*!< L8 color mode */ |
| AnnaBridge | 156:ff21514d8981 | 221 | #define DMA2D_INPUT_AL44 0x00000006U /*!< AL44 color mode */ |
| AnnaBridge | 156:ff21514d8981 | 222 | #define DMA2D_INPUT_AL88 0x00000007U /*!< AL88 color mode */ |
| AnnaBridge | 156:ff21514d8981 | 223 | #define DMA2D_INPUT_L4 0x00000008U /*!< L4 color mode */ |
| AnnaBridge | 156:ff21514d8981 | 224 | #define DMA2D_INPUT_A8 0x00000009U /*!< A8 color mode */ |
| AnnaBridge | 156:ff21514d8981 | 225 | #define DMA2D_INPUT_A4 0x0000000AU /*!< A4 color mode */ |
| AnnaBridge | 156:ff21514d8981 | 226 | /** |
| AnnaBridge | 156:ff21514d8981 | 227 | * @} |
| AnnaBridge | 156:ff21514d8981 | 228 | */ |
| AnnaBridge | 156:ff21514d8981 | 229 | |
| AnnaBridge | 156:ff21514d8981 | 230 | /** @defgroup DMA2D_Alpha_Mode DMA2D Alpha Mode |
| AnnaBridge | 156:ff21514d8981 | 231 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 232 | */ |
| AnnaBridge | 156:ff21514d8981 | 233 | #define DMA2D_NO_MODIF_ALPHA 0x00000000U /*!< No modification of the alpha channel value */ |
| AnnaBridge | 156:ff21514d8981 | 234 | #define DMA2D_REPLACE_ALPHA 0x00000001U /*!< Replace original alpha channel value by programmed alpha value */ |
| AnnaBridge | 156:ff21514d8981 | 235 | #define DMA2D_COMBINE_ALPHA 0x00000002U /*!< Replace original alpha channel value by programmed alpha value |
| AnnaBridge | 156:ff21514d8981 | 236 | with original alpha channel value */ |
| AnnaBridge | 156:ff21514d8981 | 237 | /** |
| AnnaBridge | 156:ff21514d8981 | 238 | * @} |
| AnnaBridge | 156:ff21514d8981 | 239 | */ |
| AnnaBridge | 156:ff21514d8981 | 240 | |
| AnnaBridge | 156:ff21514d8981 | 241 | /** @defgroup DMA2D_CLUT_CM DMA2D CLUT Color Mode |
| AnnaBridge | 156:ff21514d8981 | 242 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 243 | */ |
| AnnaBridge | 156:ff21514d8981 | 244 | #define DMA2D_CCM_ARGB8888 0x00000000U /*!< ARGB8888 DMA2D CLUT color mode */ |
| AnnaBridge | 156:ff21514d8981 | 245 | #define DMA2D_CCM_RGB888 0x00000001U /*!< RGB888 DMA2D CLUT color mode */ |
| AnnaBridge | 156:ff21514d8981 | 246 | /** |
| AnnaBridge | 156:ff21514d8981 | 247 | * @} |
| AnnaBridge | 156:ff21514d8981 | 248 | */ |
| AnnaBridge | 156:ff21514d8981 | 249 | |
| AnnaBridge | 156:ff21514d8981 | 250 | /** @defgroup DMA2D_Interrupts DMA2D Interrupts |
| AnnaBridge | 156:ff21514d8981 | 251 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 252 | */ |
| AnnaBridge | 156:ff21514d8981 | 253 | #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */ |
| AnnaBridge | 156:ff21514d8981 | 254 | #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */ |
| AnnaBridge | 156:ff21514d8981 | 255 | #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */ |
| AnnaBridge | 156:ff21514d8981 | 256 | #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */ |
| AnnaBridge | 156:ff21514d8981 | 257 | #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */ |
| AnnaBridge | 156:ff21514d8981 | 258 | #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */ |
| AnnaBridge | 156:ff21514d8981 | 259 | /** |
| AnnaBridge | 156:ff21514d8981 | 260 | * @} |
| AnnaBridge | 156:ff21514d8981 | 261 | */ |
| AnnaBridge | 156:ff21514d8981 | 262 | |
| AnnaBridge | 156:ff21514d8981 | 263 | /** @defgroup DMA2D_Flags DMA2D Flags |
| AnnaBridge | 156:ff21514d8981 | 264 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 265 | */ |
| AnnaBridge | 156:ff21514d8981 | 266 | #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */ |
| AnnaBridge | 156:ff21514d8981 | 267 | #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */ |
| AnnaBridge | 156:ff21514d8981 | 268 | #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */ |
| AnnaBridge | 156:ff21514d8981 | 269 | #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */ |
| AnnaBridge | 156:ff21514d8981 | 270 | #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */ |
| AnnaBridge | 156:ff21514d8981 | 271 | #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */ |
| AnnaBridge | 156:ff21514d8981 | 272 | /** |
| AnnaBridge | 156:ff21514d8981 | 273 | * @} |
| AnnaBridge | 156:ff21514d8981 | 274 | */ |
| AnnaBridge | 156:ff21514d8981 | 275 | |
| AnnaBridge | 156:ff21514d8981 | 276 | /** @defgroup DMA2D_Aliases DMA2D API Aliases |
| AnnaBridge | 156:ff21514d8981 | 277 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 278 | */ |
| AnnaBridge | 156:ff21514d8981 | 279 | #define HAL_DMA2D_DisableCLUT HAL_DMA2D_CLUTLoading_Abort /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort for compatibility with legacy code */ |
| AnnaBridge | 156:ff21514d8981 | 280 | /** |
| AnnaBridge | 156:ff21514d8981 | 281 | * @} |
| AnnaBridge | 156:ff21514d8981 | 282 | */ |
| AnnaBridge | 156:ff21514d8981 | 283 | |
| AnnaBridge | 156:ff21514d8981 | 284 | /** |
| AnnaBridge | 156:ff21514d8981 | 285 | * @} |
| AnnaBridge | 156:ff21514d8981 | 286 | */ |
| AnnaBridge | 156:ff21514d8981 | 287 | /* Exported macros ------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 288 | /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros |
| AnnaBridge | 156:ff21514d8981 | 289 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 290 | */ |
| AnnaBridge | 156:ff21514d8981 | 291 | |
| AnnaBridge | 156:ff21514d8981 | 292 | /** @brief Reset DMA2D handle state |
| AnnaBridge | 163:e59c8e839560 | 293 | * @param __HANDLE__ specifies the DMA2D handle. |
| AnnaBridge | 156:ff21514d8981 | 294 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 295 | */ |
| AnnaBridge | 156:ff21514d8981 | 296 | #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET) |
| AnnaBridge | 156:ff21514d8981 | 297 | |
| AnnaBridge | 156:ff21514d8981 | 298 | /** |
| AnnaBridge | 156:ff21514d8981 | 299 | * @brief Enable the DMA2D. |
| AnnaBridge | 163:e59c8e839560 | 300 | * @param __HANDLE__ DMA2D handle |
| AnnaBridge | 156:ff21514d8981 | 301 | * @retval None. |
| AnnaBridge | 156:ff21514d8981 | 302 | */ |
| AnnaBridge | 156:ff21514d8981 | 303 | #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START) |
| AnnaBridge | 156:ff21514d8981 | 304 | |
| AnnaBridge | 156:ff21514d8981 | 305 | /* Interrupt & Flag management */ |
| AnnaBridge | 156:ff21514d8981 | 306 | /** |
| AnnaBridge | 156:ff21514d8981 | 307 | * @brief Get the DMA2D pending flags. |
| AnnaBridge | 163:e59c8e839560 | 308 | * @param __HANDLE__ DMA2D handle |
| AnnaBridge | 163:e59c8e839560 | 309 | * @param __FLAG__ flag to check. |
| AnnaBridge | 156:ff21514d8981 | 310 | * This parameter can be any combination of the following values: |
| AnnaBridge | 156:ff21514d8981 | 311 | * @arg DMA2D_FLAG_CE: Configuration error flag |
| AnnaBridge | 156:ff21514d8981 | 312 | * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag |
| AnnaBridge | 156:ff21514d8981 | 313 | * @arg DMA2D_FLAG_CAE: CLUT access error flag |
| AnnaBridge | 156:ff21514d8981 | 314 | * @arg DMA2D_FLAG_TW: Transfer Watermark flag |
| AnnaBridge | 156:ff21514d8981 | 315 | * @arg DMA2D_FLAG_TC: Transfer complete flag |
| AnnaBridge | 156:ff21514d8981 | 316 | * @arg DMA2D_FLAG_TE: Transfer error flag |
| AnnaBridge | 156:ff21514d8981 | 317 | * @retval The state of FLAG. |
| AnnaBridge | 156:ff21514d8981 | 318 | */ |
| AnnaBridge | 156:ff21514d8981 | 319 | #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__)) |
| AnnaBridge | 156:ff21514d8981 | 320 | |
| AnnaBridge | 156:ff21514d8981 | 321 | /** |
| AnnaBridge | 156:ff21514d8981 | 322 | * @brief Clear the DMA2D pending flags. |
| AnnaBridge | 163:e59c8e839560 | 323 | * @param __HANDLE__ DMA2D handle |
| AnnaBridge | 163:e59c8e839560 | 324 | * @param __FLAG__ specifies the flag to clear. |
| AnnaBridge | 156:ff21514d8981 | 325 | * This parameter can be any combination of the following values: |
| AnnaBridge | 156:ff21514d8981 | 326 | * @arg DMA2D_FLAG_CE: Configuration error flag |
| AnnaBridge | 156:ff21514d8981 | 327 | * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag |
| AnnaBridge | 156:ff21514d8981 | 328 | * @arg DMA2D_FLAG_CAE: CLUT access error flag |
| AnnaBridge | 156:ff21514d8981 | 329 | * @arg DMA2D_FLAG_TW: Transfer Watermark flag |
| AnnaBridge | 156:ff21514d8981 | 330 | * @arg DMA2D_FLAG_TC: Transfer complete flag |
| AnnaBridge | 156:ff21514d8981 | 331 | * @arg DMA2D_FLAG_TE: Transfer error flag |
| AnnaBridge | 156:ff21514d8981 | 332 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 333 | */ |
| AnnaBridge | 156:ff21514d8981 | 334 | #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__)) |
| AnnaBridge | 156:ff21514d8981 | 335 | |
| AnnaBridge | 156:ff21514d8981 | 336 | /** |
| AnnaBridge | 156:ff21514d8981 | 337 | * @brief Enable the specified DMA2D interrupts. |
| AnnaBridge | 163:e59c8e839560 | 338 | * @param __HANDLE__ DMA2D handle |
| AnnaBridge | 163:e59c8e839560 | 339 | * @param __INTERRUPT__ specifies the DMA2D interrupt sources to be enabled. |
| AnnaBridge | 156:ff21514d8981 | 340 | * This parameter can be any combination of the following values: |
| AnnaBridge | 156:ff21514d8981 | 341 | * @arg DMA2D_IT_CE: Configuration error interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 342 | * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 343 | * @arg DMA2D_IT_CAE: CLUT access error interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 344 | * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 345 | * @arg DMA2D_IT_TC: Transfer complete interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 346 | * @arg DMA2D_IT_TE: Transfer error interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 347 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 348 | */ |
| AnnaBridge | 156:ff21514d8981 | 349 | #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) |
| AnnaBridge | 156:ff21514d8981 | 350 | |
| AnnaBridge | 156:ff21514d8981 | 351 | /** |
| AnnaBridge | 156:ff21514d8981 | 352 | * @brief Disable the specified DMA2D interrupts. |
| AnnaBridge | 163:e59c8e839560 | 353 | * @param __HANDLE__ DMA2D handle |
| AnnaBridge | 163:e59c8e839560 | 354 | * @param __INTERRUPT__ specifies the DMA2D interrupt sources to be disabled. |
| AnnaBridge | 156:ff21514d8981 | 355 | * This parameter can be any combination of the following values: |
| AnnaBridge | 156:ff21514d8981 | 356 | * @arg DMA2D_IT_CE: Configuration error interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 357 | * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 358 | * @arg DMA2D_IT_CAE: CLUT access error interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 359 | * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 360 | * @arg DMA2D_IT_TC: Transfer complete interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 361 | * @arg DMA2D_IT_TE: Transfer error interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 362 | * @retval None |
| AnnaBridge | 156:ff21514d8981 | 363 | */ |
| AnnaBridge | 156:ff21514d8981 | 364 | #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) |
| AnnaBridge | 156:ff21514d8981 | 365 | |
| AnnaBridge | 156:ff21514d8981 | 366 | /** |
| AnnaBridge | 156:ff21514d8981 | 367 | * @brief Check whether the specified DMA2D interrupt source is enabled or not. |
| AnnaBridge | 163:e59c8e839560 | 368 | * @param __HANDLE__ DMA2D handle |
| AnnaBridge | 163:e59c8e839560 | 369 | * @param __INTERRUPT__ specifies the DMA2D interrupt source to check. |
| AnnaBridge | 156:ff21514d8981 | 370 | * This parameter can be one of the following values: |
| AnnaBridge | 156:ff21514d8981 | 371 | * @arg DMA2D_IT_CE: Configuration error interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 372 | * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 373 | * @arg DMA2D_IT_CAE: CLUT access error interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 374 | * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 375 | * @arg DMA2D_IT_TC: Transfer complete interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 376 | * @arg DMA2D_IT_TE: Transfer error interrupt mask |
| AnnaBridge | 156:ff21514d8981 | 377 | * @retval The state of INTERRUPT source. |
| AnnaBridge | 156:ff21514d8981 | 378 | */ |
| AnnaBridge | 156:ff21514d8981 | 379 | #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__)) |
| AnnaBridge | 156:ff21514d8981 | 380 | |
| AnnaBridge | 156:ff21514d8981 | 381 | /** |
| AnnaBridge | 156:ff21514d8981 | 382 | * @} |
| AnnaBridge | 156:ff21514d8981 | 383 | */ |
| AnnaBridge | 156:ff21514d8981 | 384 | |
| AnnaBridge | 156:ff21514d8981 | 385 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 386 | /** @addtogroup DMA2D_Exported_Functions DMA2D Exported Functions |
| AnnaBridge | 156:ff21514d8981 | 387 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 388 | */ |
| AnnaBridge | 156:ff21514d8981 | 389 | |
| AnnaBridge | 156:ff21514d8981 | 390 | /** @addtogroup DMA2D_Exported_Functions_Group1 Initialization and de-initialization functions |
| AnnaBridge | 156:ff21514d8981 | 391 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 392 | */ |
| AnnaBridge | 156:ff21514d8981 | 393 | |
| AnnaBridge | 156:ff21514d8981 | 394 | /* Initialization and de-initialization functions *******************************/ |
| AnnaBridge | 156:ff21514d8981 | 395 | HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 396 | HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 397 | void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 398 | void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 399 | |
| AnnaBridge | 156:ff21514d8981 | 400 | /** |
| AnnaBridge | 156:ff21514d8981 | 401 | * @} |
| AnnaBridge | 156:ff21514d8981 | 402 | */ |
| AnnaBridge | 156:ff21514d8981 | 403 | |
| AnnaBridge | 156:ff21514d8981 | 404 | /** @addtogroup DMA2D_Exported_Functions_Group2 IO operation functions |
| AnnaBridge | 156:ff21514d8981 | 405 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 406 | */ |
| AnnaBridge | 156:ff21514d8981 | 407 | |
| AnnaBridge | 156:ff21514d8981 | 408 | /* IO operation functions *******************************************************/ |
| AnnaBridge | 156:ff21514d8981 | 409 | HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height); |
| AnnaBridge | 156:ff21514d8981 | 410 | HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height); |
| AnnaBridge | 156:ff21514d8981 | 411 | HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height); |
| AnnaBridge | 156:ff21514d8981 | 412 | HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height); |
| AnnaBridge | 156:ff21514d8981 | 413 | HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 414 | HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 415 | HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 416 | HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); |
| AnnaBridge | 156:ff21514d8981 | 417 | HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx); |
| AnnaBridge | 156:ff21514d8981 | 418 | HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx); |
| AnnaBridge | 156:ff21514d8981 | 419 | HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); |
| AnnaBridge | 156:ff21514d8981 | 420 | HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); |
| AnnaBridge | 156:ff21514d8981 | 421 | HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); |
| AnnaBridge | 156:ff21514d8981 | 422 | HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout); |
| AnnaBridge | 156:ff21514d8981 | 423 | void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 424 | void HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 425 | void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 426 | |
| AnnaBridge | 156:ff21514d8981 | 427 | /** |
| AnnaBridge | 156:ff21514d8981 | 428 | * @} |
| AnnaBridge | 156:ff21514d8981 | 429 | */ |
| AnnaBridge | 156:ff21514d8981 | 430 | |
| AnnaBridge | 156:ff21514d8981 | 431 | /** @addtogroup DMA2D_Exported_Functions_Group3 Peripheral Control functions |
| AnnaBridge | 156:ff21514d8981 | 432 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 433 | */ |
| AnnaBridge | 156:ff21514d8981 | 434 | |
| AnnaBridge | 156:ff21514d8981 | 435 | /* Peripheral Control functions *************************************************/ |
| AnnaBridge | 156:ff21514d8981 | 436 | HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); |
| AnnaBridge | 156:ff21514d8981 | 437 | HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx); |
| AnnaBridge | 156:ff21514d8981 | 438 | HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line); |
| AnnaBridge | 156:ff21514d8981 | 439 | HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 440 | HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 441 | HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime); |
| AnnaBridge | 156:ff21514d8981 | 442 | |
| AnnaBridge | 156:ff21514d8981 | 443 | /** |
| AnnaBridge | 156:ff21514d8981 | 444 | * @} |
| AnnaBridge | 156:ff21514d8981 | 445 | */ |
| AnnaBridge | 156:ff21514d8981 | 446 | |
| AnnaBridge | 156:ff21514d8981 | 447 | /** @addtogroup DMA2D_Exported_Functions_Group4 Peripheral State and Error functions |
| AnnaBridge | 156:ff21514d8981 | 448 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 449 | */ |
| AnnaBridge | 156:ff21514d8981 | 450 | |
| AnnaBridge | 156:ff21514d8981 | 451 | /* Peripheral State functions ***************************************************/ |
| AnnaBridge | 156:ff21514d8981 | 452 | HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 453 | uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d); |
| AnnaBridge | 156:ff21514d8981 | 454 | |
| AnnaBridge | 156:ff21514d8981 | 455 | /** |
| AnnaBridge | 156:ff21514d8981 | 456 | * @} |
| AnnaBridge | 156:ff21514d8981 | 457 | */ |
| AnnaBridge | 156:ff21514d8981 | 458 | |
| AnnaBridge | 156:ff21514d8981 | 459 | /** |
| AnnaBridge | 156:ff21514d8981 | 460 | * @} |
| AnnaBridge | 156:ff21514d8981 | 461 | */ |
| AnnaBridge | 156:ff21514d8981 | 462 | |
| AnnaBridge | 156:ff21514d8981 | 463 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 464 | |
| AnnaBridge | 156:ff21514d8981 | 465 | /** @addtogroup DMA2D_Private_Constants DMA2D Private Constants |
| AnnaBridge | 156:ff21514d8981 | 466 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 467 | */ |
| AnnaBridge | 156:ff21514d8981 | 468 | |
| AnnaBridge | 156:ff21514d8981 | 469 | /** @defgroup DMA2D_Maximum_Line_WaterMark DMA2D Maximum Line Watermark |
| AnnaBridge | 156:ff21514d8981 | 470 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 471 | */ |
| AnnaBridge | 156:ff21514d8981 | 472 | #define DMA2D_LINE_WATERMARK_MAX DMA2D_LWR_LW /*!< DMA2D maximum line watermark */ |
| AnnaBridge | 156:ff21514d8981 | 473 | /** |
| AnnaBridge | 156:ff21514d8981 | 474 | * @} |
| AnnaBridge | 156:ff21514d8981 | 475 | */ |
| AnnaBridge | 156:ff21514d8981 | 476 | |
| AnnaBridge | 156:ff21514d8981 | 477 | /** @defgroup DMA2D_Color_Value DMA2D Color Value |
| AnnaBridge | 156:ff21514d8981 | 478 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 479 | */ |
| AnnaBridge | 156:ff21514d8981 | 480 | #define DMA2D_COLOR_VALUE 0x000000FFU /*!< Color value mask */ |
| AnnaBridge | 156:ff21514d8981 | 481 | /** |
| AnnaBridge | 156:ff21514d8981 | 482 | * @} |
| AnnaBridge | 156:ff21514d8981 | 483 | */ |
| AnnaBridge | 156:ff21514d8981 | 484 | |
| AnnaBridge | 156:ff21514d8981 | 485 | /** @defgroup DMA2D_Max_Layer DMA2D Maximum Number of Layers |
| AnnaBridge | 156:ff21514d8981 | 486 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 487 | */ |
| AnnaBridge | 156:ff21514d8981 | 488 | #define DMA2D_MAX_LAYER 2U /*!< DMA2D maximum number of layers */ |
| AnnaBridge | 156:ff21514d8981 | 489 | /** |
| AnnaBridge | 156:ff21514d8981 | 490 | * @} |
| AnnaBridge | 156:ff21514d8981 | 491 | */ |
| AnnaBridge | 156:ff21514d8981 | 492 | |
| AnnaBridge | 156:ff21514d8981 | 493 | /** @defgroup DMA2D_Offset DMA2D Offset |
| AnnaBridge | 156:ff21514d8981 | 494 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 495 | */ |
| AnnaBridge | 156:ff21514d8981 | 496 | #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */ |
| AnnaBridge | 156:ff21514d8981 | 497 | /** |
| AnnaBridge | 156:ff21514d8981 | 498 | * @} |
| AnnaBridge | 156:ff21514d8981 | 499 | */ |
| AnnaBridge | 156:ff21514d8981 | 500 | |
| AnnaBridge | 156:ff21514d8981 | 501 | /** @defgroup DMA2D_Size DMA2D Size |
| AnnaBridge | 156:ff21514d8981 | 502 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 503 | */ |
| AnnaBridge | 156:ff21514d8981 | 504 | #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16U) /*!< DMA2D number of pixels per line */ |
| AnnaBridge | 156:ff21514d8981 | 505 | #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of lines */ |
| AnnaBridge | 156:ff21514d8981 | 506 | /** |
| AnnaBridge | 156:ff21514d8981 | 507 | * @} |
| AnnaBridge | 156:ff21514d8981 | 508 | */ |
| AnnaBridge | 156:ff21514d8981 | 509 | |
| AnnaBridge | 156:ff21514d8981 | 510 | /** @defgroup DMA2D_CLUT_Size DMA2D CLUT Size |
| AnnaBridge | 156:ff21514d8981 | 511 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 512 | */ |
| AnnaBridge | 156:ff21514d8981 | 513 | #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8U) /*!< DMA2D CLUT size */ |
| AnnaBridge | 156:ff21514d8981 | 514 | /** |
| AnnaBridge | 156:ff21514d8981 | 515 | * @} |
| AnnaBridge | 156:ff21514d8981 | 516 | */ |
| AnnaBridge | 156:ff21514d8981 | 517 | |
| AnnaBridge | 156:ff21514d8981 | 518 | /** |
| AnnaBridge | 156:ff21514d8981 | 519 | * @} |
| AnnaBridge | 156:ff21514d8981 | 520 | */ |
| AnnaBridge | 156:ff21514d8981 | 521 | |
| AnnaBridge | 156:ff21514d8981 | 522 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 156:ff21514d8981 | 523 | /** @defgroup DMA2D_Private_Macros DMA2D Private Macros |
| AnnaBridge | 156:ff21514d8981 | 524 | * @{ |
| AnnaBridge | 156:ff21514d8981 | 525 | */ |
| AnnaBridge | 156:ff21514d8981 | 526 | #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= DMA2D_MAX_LAYER) |
| AnnaBridge | 156:ff21514d8981 | 527 | #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \ |
| AnnaBridge | 156:ff21514d8981 | 528 | ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M)) |
| AnnaBridge | 156:ff21514d8981 | 529 | #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_OUTPUT_ARGB8888) || ((MODE_ARGB) == DMA2D_OUTPUT_RGB888) || \ |
| AnnaBridge | 156:ff21514d8981 | 530 | ((MODE_ARGB) == DMA2D_OUTPUT_RGB565) || ((MODE_ARGB) == DMA2D_OUTPUT_ARGB1555) || \ |
| AnnaBridge | 156:ff21514d8981 | 531 | ((MODE_ARGB) == DMA2D_OUTPUT_ARGB4444)) |
| AnnaBridge | 156:ff21514d8981 | 532 | #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= DMA2D_COLOR_VALUE) |
| AnnaBridge | 156:ff21514d8981 | 533 | #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE) |
| AnnaBridge | 156:ff21514d8981 | 534 | #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL) |
| AnnaBridge | 156:ff21514d8981 | 535 | #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET) |
| AnnaBridge | 156:ff21514d8981 | 536 | #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == DMA2D_INPUT_ARGB8888) || ((INPUT_CM) == DMA2D_INPUT_RGB888) || \ |
| AnnaBridge | 156:ff21514d8981 | 537 | ((INPUT_CM) == DMA2D_INPUT_RGB565) || ((INPUT_CM) == DMA2D_INPUT_ARGB1555) || \ |
| AnnaBridge | 156:ff21514d8981 | 538 | ((INPUT_CM) == DMA2D_INPUT_ARGB4444) || ((INPUT_CM) == DMA2D_INPUT_L8) || \ |
| AnnaBridge | 156:ff21514d8981 | 539 | ((INPUT_CM) == DMA2D_INPUT_AL44) || ((INPUT_CM) == DMA2D_INPUT_AL88) || \ |
| AnnaBridge | 156:ff21514d8981 | 540 | ((INPUT_CM) == DMA2D_INPUT_L4) || ((INPUT_CM) == DMA2D_INPUT_A8) || \ |
| AnnaBridge | 156:ff21514d8981 | 541 | ((INPUT_CM) == DMA2D_INPUT_A4)) |
| AnnaBridge | 156:ff21514d8981 | 542 | #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \ |
| AnnaBridge | 156:ff21514d8981 | 543 | ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \ |
| AnnaBridge | 156:ff21514d8981 | 544 | ((AlphaMode) == DMA2D_COMBINE_ALPHA)) |
| AnnaBridge | 156:ff21514d8981 | 545 | |
| AnnaBridge | 156:ff21514d8981 | 546 | #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888)) |
| AnnaBridge | 156:ff21514d8981 | 547 | #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE) |
| AnnaBridge | 156:ff21514d8981 | 548 | #define IS_DMA2D_LINEWATERMARK(LineWatermark) ((LineWatermark) <= DMA2D_LINE_WATERMARK_MAX) |
| AnnaBridge | 156:ff21514d8981 | 549 | #define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \ |
| AnnaBridge | 156:ff21514d8981 | 550 | ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \ |
| AnnaBridge | 156:ff21514d8981 | 551 | ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE)) |
| AnnaBridge | 156:ff21514d8981 | 552 | #define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \ |
| AnnaBridge | 156:ff21514d8981 | 553 | ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \ |
| AnnaBridge | 156:ff21514d8981 | 554 | ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE)) |
| AnnaBridge | 156:ff21514d8981 | 555 | /** |
| AnnaBridge | 156:ff21514d8981 | 556 | * @} |
| AnnaBridge | 156:ff21514d8981 | 557 | */ |
| AnnaBridge | 156:ff21514d8981 | 558 | |
| AnnaBridge | 156:ff21514d8981 | 559 | /** |
| AnnaBridge | 156:ff21514d8981 | 560 | * @} |
| AnnaBridge | 156:ff21514d8981 | 561 | */ |
| AnnaBridge | 156:ff21514d8981 | 562 | |
| AnnaBridge | 156:ff21514d8981 | 563 | /** |
| AnnaBridge | 156:ff21514d8981 | 564 | * @} |
| AnnaBridge | 156:ff21514d8981 | 565 | */ |
| AnnaBridge | 156:ff21514d8981 | 566 | |
| AnnaBridge | 156:ff21514d8981 | 567 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ |
| AnnaBridge | 156:ff21514d8981 | 568 | |
| AnnaBridge | 156:ff21514d8981 | 569 | #ifdef __cplusplus |
| AnnaBridge | 156:ff21514d8981 | 570 | } |
| AnnaBridge | 156:ff21514d8981 | 571 | #endif |
| AnnaBridge | 156:ff21514d8981 | 572 | |
| AnnaBridge | 156:ff21514d8981 | 573 | #endif /* __STM32F4xx_HAL_DMA2D_H */ |
| AnnaBridge | 156:ff21514d8981 | 574 | |
| AnnaBridge | 156:ff21514d8981 | 575 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
