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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_B96B_F446VE/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.h@169:a7c7b631e539, 2018-06-22 (annotated)

Committer:
Anna Bridge
Date:
Fri Jun 22 15:38:59 2018 +0100
Revision:
169:a7c7b631e539
Parent:
163:e59c8e839560 
mbed library. Release version 162

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 156:ff21514d8981 1 /**
AnnaBridge 156:ff21514d8981 2 ******************************************************************************
AnnaBridge 156:ff21514d8981 3 * @file stm32f4xx_hal.h
AnnaBridge 156:ff21514d8981 4 * @author MCD Application Team
AnnaBridge 156:ff21514d8981 5 * @brief This file contains all the functions prototypes for the HAL
AnnaBridge 156:ff21514d8981 6 * module driver.
AnnaBridge 156:ff21514d8981 7 ******************************************************************************
AnnaBridge 156:ff21514d8981 8 * @attention
AnnaBridge 156:ff21514d8981 9 *
AnnaBridge 156:ff21514d8981 10 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 156:ff21514d8981 11 *
AnnaBridge 156:ff21514d8981 12 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 156:ff21514d8981 13 * are permitted provided that the following conditions are met:
AnnaBridge 156:ff21514d8981 14 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 156:ff21514d8981 15 * this list of conditions and the following disclaimer.
AnnaBridge 156:ff21514d8981 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 156:ff21514d8981 17 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 156:ff21514d8981 18 * and/or other materials provided with the distribution.
AnnaBridge 156:ff21514d8981 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 156:ff21514d8981 20 * may be used to endorse or promote products derived from this software
AnnaBridge 156:ff21514d8981 21 * without specific prior written permission.
AnnaBridge 156:ff21514d8981 22 *
AnnaBridge 156:ff21514d8981 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 156:ff21514d8981 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 156:ff21514d8981 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 156:ff21514d8981 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 156:ff21514d8981 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 156:ff21514d8981 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 156:ff21514d8981 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 156:ff21514d8981 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 156:ff21514d8981 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 156:ff21514d8981 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 156:ff21514d8981 33 *
AnnaBridge 156:ff21514d8981 34 ******************************************************************************
AnnaBridge 156:ff21514d8981 35 */
AnnaBridge 156:ff21514d8981 36
AnnaBridge 156:ff21514d8981 37 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 156:ff21514d8981 38 #ifndef __STM32F4xx_HAL_H
AnnaBridge 156:ff21514d8981 39 #define __STM32F4xx_HAL_H
AnnaBridge 156:ff21514d8981 40
AnnaBridge 156:ff21514d8981 41 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 42 extern "C" {
AnnaBridge 156:ff21514d8981 43 #endif
AnnaBridge 156:ff21514d8981 44
AnnaBridge 156:ff21514d8981 45 /* Includes ------------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 46 #include "stm32f4xx_hal_conf.h"
AnnaBridge 156:ff21514d8981 47
AnnaBridge 156:ff21514d8981 48 /** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge 156:ff21514d8981 49 * @{
AnnaBridge 156:ff21514d8981 50 */
AnnaBridge 156:ff21514d8981 51
AnnaBridge 156:ff21514d8981 52 /** @addtogroup HAL
AnnaBridge 156:ff21514d8981 53 * @{
AnnaBridge 156:ff21514d8981 54 */
AnnaBridge 156:ff21514d8981 55
AnnaBridge 156:ff21514d8981 56 /* Exported types ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 57 /* Exported constants --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 58
AnnaBridge 163:e59c8e839560 59 /** @defgroup HAL_Exported_Constants HAL Exported Constants
AnnaBridge 163:e59c8e839560 60 * @{
AnnaBridge 163:e59c8e839560 61 */
AnnaBridge 163:e59c8e839560 62
AnnaBridge 163:e59c8e839560 63 /** @defgroup HAL_TICK_FREQ Tick Frequency
AnnaBridge 163:e59c8e839560 64 * @{
AnnaBridge 163:e59c8e839560 65 */
AnnaBridge 163:e59c8e839560 66 typedef enum
AnnaBridge 163:e59c8e839560 67 {
AnnaBridge 163:e59c8e839560 68 HAL_TICK_FREQ_10HZ = 100U,
AnnaBridge 163:e59c8e839560 69 HAL_TICK_FREQ_100HZ = 10U,
AnnaBridge 163:e59c8e839560 70 HAL_TICK_FREQ_1KHZ = 1U,
AnnaBridge 163:e59c8e839560 71 HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
AnnaBridge 163:e59c8e839560 72 } HAL_TickFreqTypeDef;
AnnaBridge 163:e59c8e839560 73 /**
AnnaBridge 163:e59c8e839560 74 * @}
AnnaBridge 163:e59c8e839560 75 */
AnnaBridge 163:e59c8e839560 76
AnnaBridge 163:e59c8e839560 77 /**
AnnaBridge 163:e59c8e839560 78 * @}
AnnaBridge 163:e59c8e839560 79 */
AnnaBridge 163:e59c8e839560 80
AnnaBridge 156:ff21514d8981 81 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 82 /** @defgroup HAL_Exported_Macros HAL Exported Macros
AnnaBridge 156:ff21514d8981 83 * @{
AnnaBridge 156:ff21514d8981 84 */
AnnaBridge 156:ff21514d8981 85
AnnaBridge 156:ff21514d8981 86 /** @brief Freeze/Unfreeze Peripherals in Debug mode
AnnaBridge 156:ff21514d8981 87 */
AnnaBridge 156:ff21514d8981 88 #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
AnnaBridge 156:ff21514d8981 89 #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
AnnaBridge 156:ff21514d8981 90 #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
AnnaBridge 156:ff21514d8981 91 #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
AnnaBridge 156:ff21514d8981 92 #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
AnnaBridge 156:ff21514d8981 93 #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
AnnaBridge 156:ff21514d8981 94 #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
AnnaBridge 156:ff21514d8981 95 #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
AnnaBridge 156:ff21514d8981 96 #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
AnnaBridge 156:ff21514d8981 97 #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
AnnaBridge 156:ff21514d8981 98 #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
AnnaBridge 156:ff21514d8981 99 #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
AnnaBridge 156:ff21514d8981 100 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
AnnaBridge 156:ff21514d8981 101 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
AnnaBridge 156:ff21514d8981 102 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
AnnaBridge 156:ff21514d8981 103 #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
AnnaBridge 156:ff21514d8981 104 #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
AnnaBridge 156:ff21514d8981 105 #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
AnnaBridge 156:ff21514d8981 106 #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
AnnaBridge 156:ff21514d8981 107 #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
AnnaBridge 156:ff21514d8981 108 #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
AnnaBridge 156:ff21514d8981 109 #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
AnnaBridge 156:ff21514d8981 110
AnnaBridge 156:ff21514d8981 111 #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
AnnaBridge 156:ff21514d8981 112 #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
AnnaBridge 156:ff21514d8981 113 #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
AnnaBridge 156:ff21514d8981 114 #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
AnnaBridge 156:ff21514d8981 115 #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
AnnaBridge 156:ff21514d8981 116 #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
AnnaBridge 156:ff21514d8981 117 #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
AnnaBridge 156:ff21514d8981 118 #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
AnnaBridge 156:ff21514d8981 119 #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
AnnaBridge 156:ff21514d8981 120 #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
AnnaBridge 156:ff21514d8981 121 #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
AnnaBridge 156:ff21514d8981 122 #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
AnnaBridge 156:ff21514d8981 123 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
AnnaBridge 156:ff21514d8981 124 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
AnnaBridge 156:ff21514d8981 125 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
AnnaBridge 156:ff21514d8981 126 #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
AnnaBridge 156:ff21514d8981 127 #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
AnnaBridge 156:ff21514d8981 128 #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
AnnaBridge 156:ff21514d8981 129 #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
AnnaBridge 156:ff21514d8981 130 #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
AnnaBridge 156:ff21514d8981 131 #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
AnnaBridge 156:ff21514d8981 132 #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
AnnaBridge 156:ff21514d8981 133
AnnaBridge 156:ff21514d8981 134 /** @brief Main Flash memory mapped at 0x00000000
AnnaBridge 156:ff21514d8981 135 */
AnnaBridge 156:ff21514d8981 136 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
AnnaBridge 156:ff21514d8981 137
AnnaBridge 156:ff21514d8981 138 /** @brief System Flash memory mapped at 0x00000000
AnnaBridge 156:ff21514d8981 139 */
AnnaBridge 156:ff21514d8981 140 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
AnnaBridge 156:ff21514d8981 141 SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
AnnaBridge 156:ff21514d8981 142 }while(0);
AnnaBridge 156:ff21514d8981 143
AnnaBridge 156:ff21514d8981 144 /** @brief Embedded SRAM mapped at 0x00000000
AnnaBridge 156:ff21514d8981 145 */
AnnaBridge 156:ff21514d8981 146 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
AnnaBridge 156:ff21514d8981 147 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
AnnaBridge 156:ff21514d8981 148 }while(0);
AnnaBridge 156:ff21514d8981 149
AnnaBridge 156:ff21514d8981 150 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
AnnaBridge 156:ff21514d8981 151 /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
AnnaBridge 156:ff21514d8981 152 */
AnnaBridge 156:ff21514d8981 153 #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
AnnaBridge 156:ff21514d8981 154 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
AnnaBridge 156:ff21514d8981 155 }while(0);
AnnaBridge 156:ff21514d8981 156 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
AnnaBridge 156:ff21514d8981 157
AnnaBridge 156:ff21514d8981 158 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
AnnaBridge 156:ff21514d8981 159 defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 156:ff21514d8981 160 /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
AnnaBridge 156:ff21514d8981 161 */
AnnaBridge 156:ff21514d8981 162 #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
AnnaBridge 156:ff21514d8981 163 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
AnnaBridge 156:ff21514d8981 164 }while(0);
AnnaBridge 156:ff21514d8981 165
AnnaBridge 156:ff21514d8981 166 /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
AnnaBridge 156:ff21514d8981 167 */
AnnaBridge 156:ff21514d8981 168 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
AnnaBridge 156:ff21514d8981 169 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
AnnaBridge 156:ff21514d8981 170 }while(0);
AnnaBridge 156:ff21514d8981 171 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
AnnaBridge 156:ff21514d8981 172
AnnaBridge 156:ff21514d8981 173 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
AnnaBridge 156:ff21514d8981 174 /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
AnnaBridge 156:ff21514d8981 175 * @{
AnnaBridge 156:ff21514d8981 176 */
AnnaBridge 156:ff21514d8981 177 /** @brief SYSCFG Break Lockup lock
AnnaBridge 156:ff21514d8981 178 * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
AnnaBridge 156:ff21514d8981 179 * @note The selected configuration is locked and can be unlocked by system reset
AnnaBridge 156:ff21514d8981 180 */
AnnaBridge 156:ff21514d8981 181 #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
AnnaBridge 156:ff21514d8981 182 SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \
AnnaBridge 156:ff21514d8981 183 }while(0)
AnnaBridge 156:ff21514d8981 184 /**
AnnaBridge 156:ff21514d8981 185 * @}
AnnaBridge 156:ff21514d8981 186 */
AnnaBridge 156:ff21514d8981 187
AnnaBridge 156:ff21514d8981 188 /** @defgroup PVD_Lock_Enable PVD Lock
AnnaBridge 156:ff21514d8981 189 * @{
AnnaBridge 156:ff21514d8981 190 */
AnnaBridge 156:ff21514d8981 191 /** @brief SYSCFG Break PVD lock
AnnaBridge 156:ff21514d8981 192 * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
AnnaBridge 156:ff21514d8981 193 * @note The selected configuration is locked and can be unlocked by system reset
AnnaBridge 156:ff21514d8981 194 */
AnnaBridge 156:ff21514d8981 195 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
AnnaBridge 156:ff21514d8981 196 SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \
AnnaBridge 156:ff21514d8981 197 }while(0)
AnnaBridge 156:ff21514d8981 198 /**
AnnaBridge 156:ff21514d8981 199 * @}
AnnaBridge 156:ff21514d8981 200 */
AnnaBridge 156:ff21514d8981 201 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
AnnaBridge 156:ff21514d8981 202 /**
AnnaBridge 156:ff21514d8981 203 * @}
AnnaBridge 156:ff21514d8981 204 */
AnnaBridge 156:ff21514d8981 205
AnnaBridge 163:e59c8e839560 206 /** @defgroup HAL_Private_Macros HAL Private Macros
AnnaBridge 163:e59c8e839560 207 * @{
AnnaBridge 163:e59c8e839560 208 */
AnnaBridge 163:e59c8e839560 209 #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
AnnaBridge 163:e59c8e839560 210 ((FREQ) == HAL_TICK_FREQ_100HZ) || \
AnnaBridge 163:e59c8e839560 211 ((FREQ) == HAL_TICK_FREQ_1KHZ))
AnnaBridge 163:e59c8e839560 212 /**
AnnaBridge 163:e59c8e839560 213 * @}
AnnaBridge 163:e59c8e839560 214 */
AnnaBridge 163:e59c8e839560 215
AnnaBridge 156:ff21514d8981 216 /* Exported functions --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 217 /** @addtogroup HAL_Exported_Functions
AnnaBridge 156:ff21514d8981 218 * @{
AnnaBridge 156:ff21514d8981 219 */
AnnaBridge 156:ff21514d8981 220 /** @addtogroup HAL_Exported_Functions_Group1
AnnaBridge 156:ff21514d8981 221 * @{
AnnaBridge 156:ff21514d8981 222 */
AnnaBridge 163:e59c8e839560 223 /* Initialization and Configuration functions ******************************/
AnnaBridge 156:ff21514d8981 224 HAL_StatusTypeDef HAL_Init(void);
AnnaBridge 156:ff21514d8981 225 HAL_StatusTypeDef HAL_DeInit(void);
AnnaBridge 156:ff21514d8981 226 void HAL_MspInit(void);
AnnaBridge 156:ff21514d8981 227 void HAL_MspDeInit(void);
AnnaBridge 156:ff21514d8981 228 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
AnnaBridge 156:ff21514d8981 229 /**
AnnaBridge 156:ff21514d8981 230 * @}
AnnaBridge 156:ff21514d8981 231 */
AnnaBridge 156:ff21514d8981 232
AnnaBridge 156:ff21514d8981 233 /** @addtogroup HAL_Exported_Functions_Group2
AnnaBridge 156:ff21514d8981 234 * @{
AnnaBridge 156:ff21514d8981 235 */
AnnaBridge 156:ff21514d8981 236 /* Peripheral Control functions ************************************************/
AnnaBridge 156:ff21514d8981 237 void HAL_IncTick(void);
AnnaBridge 163:e59c8e839560 238 void HAL_Delay(uint32_t Delay);
AnnaBridge 156:ff21514d8981 239 uint32_t HAL_GetTick(void);
AnnaBridge 163:e59c8e839560 240 uint32_t HAL_GetTickPrio(void);
AnnaBridge 163:e59c8e839560 241 HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
AnnaBridge 163:e59c8e839560 242 HAL_TickFreqTypeDef HAL_GetTickFreq(void);
AnnaBridge 156:ff21514d8981 243 void HAL_SuspendTick(void);
AnnaBridge 156:ff21514d8981 244 void HAL_ResumeTick(void);
AnnaBridge 156:ff21514d8981 245 uint32_t HAL_GetHalVersion(void);
AnnaBridge 156:ff21514d8981 246 uint32_t HAL_GetREVID(void);
AnnaBridge 156:ff21514d8981 247 uint32_t HAL_GetDEVID(void);
AnnaBridge 156:ff21514d8981 248 void HAL_DBGMCU_EnableDBGSleepMode(void);
AnnaBridge 156:ff21514d8981 249 void HAL_DBGMCU_DisableDBGSleepMode(void);
AnnaBridge 156:ff21514d8981 250 void HAL_DBGMCU_EnableDBGStopMode(void);
AnnaBridge 156:ff21514d8981 251 void HAL_DBGMCU_DisableDBGStopMode(void);
AnnaBridge 156:ff21514d8981 252 void HAL_DBGMCU_EnableDBGStandbyMode(void);
AnnaBridge 156:ff21514d8981 253 void HAL_DBGMCU_DisableDBGStandbyMode(void);
AnnaBridge 156:ff21514d8981 254 void HAL_EnableCompensationCell(void);
AnnaBridge 156:ff21514d8981 255 void HAL_DisableCompensationCell(void);
AnnaBridge 156:ff21514d8981 256 void HAL_GetUID(uint32_t *UID);
AnnaBridge 156:ff21514d8981 257 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
AnnaBridge 156:ff21514d8981 258 defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 156:ff21514d8981 259 void HAL_EnableMemorySwappingBank(void);
AnnaBridge 156:ff21514d8981 260 void HAL_DisableMemorySwappingBank(void);
AnnaBridge 156:ff21514d8981 261 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
AnnaBridge 156:ff21514d8981 262 /**
AnnaBridge 156:ff21514d8981 263 * @}
AnnaBridge 156:ff21514d8981 264 */
AnnaBridge 156:ff21514d8981 265
AnnaBridge 156:ff21514d8981 266 /**
AnnaBridge 156:ff21514d8981 267 * @}
AnnaBridge 156:ff21514d8981 268 */
AnnaBridge 156:ff21514d8981 269 /* Private types -------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 270 /* Private variables ---------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 271 /** @defgroup HAL_Private_Variables HAL Private Variables
AnnaBridge 156:ff21514d8981 272 * @{
AnnaBridge 156:ff21514d8981 273 */
AnnaBridge 156:ff21514d8981 274 /**
AnnaBridge 156:ff21514d8981 275 * @}
AnnaBridge 156:ff21514d8981 276 */
AnnaBridge 156:ff21514d8981 277 /* Private constants ---------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 278 /** @defgroup HAL_Private_Constants HAL Private Constants
AnnaBridge 156:ff21514d8981 279 * @{
AnnaBridge 156:ff21514d8981 280 */
AnnaBridge 156:ff21514d8981 281 /**
AnnaBridge 156:ff21514d8981 282 * @}
AnnaBridge 156:ff21514d8981 283 */
AnnaBridge 156:ff21514d8981 284 /* Private macros ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 285 /* Private functions ---------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 286 /**
AnnaBridge 156:ff21514d8981 287 * @}
AnnaBridge 156:ff21514d8981 288 */
AnnaBridge 156:ff21514d8981 289
AnnaBridge 156:ff21514d8981 290 /**
AnnaBridge 156:ff21514d8981 291 * @}
AnnaBridge 156:ff21514d8981 292 */
AnnaBridge 156:ff21514d8981 293
AnnaBridge 156:ff21514d8981 294 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 295 }
AnnaBridge 156:ff21514d8981 296 #endif
AnnaBridge 156:ff21514d8981 297
AnnaBridge 156:ff21514d8981 298 #endif /* __STM32F4xx_HAL_H */
AnnaBridge 156:ff21514d8981 299
AnnaBridge 156:ff21514d8981 300 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/