mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F756ZG/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spi.h@128:9bcdf88f62b0, 2016-10-27 (annotated)

Committer:
<>
Date:
Thu Oct 27 16:45:56 2016 +0100
Revision:
128:9bcdf88f62b0
Parent:
TARGET_NUCLEO_F767ZI/stm32f7xx_hal_spi.h@122:f9eeca106725
Child:
135:176b8275d35d
Release 128 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



2966: Add kw24 support https://github.com/ARMmbed/mbed-os/pull/2966

3068: MultiTech mDot - clean up PeripheralPins.c and add new pin names https://github.com/ARMmbed/mbed-os/pull/3068

3089: Kinetis HAL: Remove clock initialization code from serial and ticker  https://github.com/ARMmbed/mbed-os/pull/3089

2943: [NRF5] NVIC_SetVector functionality https://github.com/ARMmbed/mbed-os/pull/2943

2938: InterruptIn changes in NCS36510 HAL. https://github.com/ARMmbed/mbed-os/pull/2938

3108: Fix sleep function for NRF52. https://github.com/ARMmbed/mbed-os/pull/3108

3076: STM32F1: Correct timer master value reading https://github.com/ARMmbed/mbed-os/pull/3076

3085: Add LOWPOWERTIMER capability for NUCLEO_F303ZE https://github.com/ARMmbed/mbed-os/pull/3085

3046: [BEETLE] Update BLE stack on Beetle board https://github.com/ARMmbed/mbed-os/pull/3046

3122: [Silicon Labs] Update of Silicon Labs HAL https://github.com/ARMmbed/mbed-os/pull/3122

3022: OnSemi RAM usage fix https://github.com/ARMmbed/mbed-os/pull/3022

3121: STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH https://github.com/ARMmbed/mbed-os/pull/3121

3142: Targets- NUMAKER_PFM_NUC47216 remove mbed 2 https://github.com/ARMmbed/mbed-os/pull/3142

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 122:f9eeca106725 1 /**
Kojto 122:f9eeca106725 2 ******************************************************************************
Kojto 122:f9eeca106725 3 * @file stm32f7xx_hal_spi.h
Kojto 122:f9eeca106725 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.1.0
Kojto 122:f9eeca106725 6 * @date 22-April-2016
Kojto 122:f9eeca106725 7 * @brief Header file of SPI HAL module.
Kojto 122:f9eeca106725 8 ******************************************************************************
Kojto 122:f9eeca106725 9 * @attention
Kojto 122:f9eeca106725 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 122:f9eeca106725 12 *
Kojto 122:f9eeca106725 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 122:f9eeca106725 14 * are permitted provided that the following conditions are met:
Kojto 122:f9eeca106725 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 122:f9eeca106725 16 * this list of conditions and the following disclaimer.
Kojto 122:f9eeca106725 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 122:f9eeca106725 18 * this list of conditions and the following disclaimer in the documentation
Kojto 122:f9eeca106725 19 * and/or other materials provided with the distribution.
Kojto 122:f9eeca106725 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 122:f9eeca106725 21 * may be used to endorse or promote products derived from this software
Kojto 122:f9eeca106725 22 * without specific prior written permission.
Kojto 122:f9eeca106725 23 *
Kojto 122:f9eeca106725 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 122:f9eeca106725 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 122:f9eeca106725 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 122:f9eeca106725 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 122:f9eeca106725 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 122:f9eeca106725 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 122:f9eeca106725 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 122:f9eeca106725 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 122:f9eeca106725 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 122:f9eeca106725 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 122:f9eeca106725 34 *
Kojto 122:f9eeca106725 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
Kojto 122:f9eeca106725 37
Kojto 122:f9eeca106725 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 122:f9eeca106725 39 #ifndef __STM32F7xx_HAL_SPI_H
Kojto 122:f9eeca106725 40 #define __STM32F7xx_HAL_SPI_H
Kojto 122:f9eeca106725 41
Kojto 122:f9eeca106725 42 #ifdef __cplusplus
Kojto 122:f9eeca106725 43 extern "C" {
Kojto 122:f9eeca106725 44 #endif
Kojto 122:f9eeca106725 45
Kojto 122:f9eeca106725 46 /* Includes ------------------------------------------------------------------*/
Kojto 122:f9eeca106725 47 #include "stm32f7xx_hal_def.h"
Kojto 122:f9eeca106725 48
Kojto 122:f9eeca106725 49 /** @addtogroup STM32F7xx_HAL_Driver
Kojto 122:f9eeca106725 50 * @{
Kojto 122:f9eeca106725 51 */
Kojto 122:f9eeca106725 52
Kojto 122:f9eeca106725 53 /** @addtogroup SPI
Kojto 122:f9eeca106725 54 * @{
Kojto 122:f9eeca106725 55 */
Kojto 122:f9eeca106725 56
Kojto 122:f9eeca106725 57 /* Exported types ------------------------------------------------------------*/
Kojto 122:f9eeca106725 58 /** @defgroup SPI_Exported_Types SPI Exported Types
Kojto 122:f9eeca106725 59 * @{
Kojto 122:f9eeca106725 60 */
Kojto 122:f9eeca106725 61
Kojto 122:f9eeca106725 62 /**
Kojto 122:f9eeca106725 63 * @brief SPI Configuration Structure definition
Kojto 122:f9eeca106725 64 */
Kojto 122:f9eeca106725 65 typedef struct
Kojto 122:f9eeca106725 66 {
Kojto 122:f9eeca106725 67 uint32_t Mode; /*!< Specifies the SPI operating mode.
Kojto 122:f9eeca106725 68 This parameter can be a value of @ref SPI_Mode */
Kojto 122:f9eeca106725 69
Kojto 122:f9eeca106725 70 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
Kojto 122:f9eeca106725 71 This parameter can be a value of @ref SPI_Direction */
Kojto 122:f9eeca106725 72
Kojto 122:f9eeca106725 73 uint32_t DataSize; /*!< Specifies the SPI data size.
Kojto 122:f9eeca106725 74 This parameter can be a value of @ref SPI_Data_Size */
Kojto 122:f9eeca106725 75
Kojto 122:f9eeca106725 76 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
Kojto 122:f9eeca106725 77 This parameter can be a value of @ref SPI_Clock_Polarity */
Kojto 122:f9eeca106725 78
Kojto 122:f9eeca106725 79 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
Kojto 122:f9eeca106725 80 This parameter can be a value of @ref SPI_Clock_Phase */
Kojto 122:f9eeca106725 81
Kojto 122:f9eeca106725 82 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
Kojto 122:f9eeca106725 83 hardware (NSS pin) or by software using the SSI bit.
Kojto 122:f9eeca106725 84 This parameter can be a value of @ref SPI_Slave_Select_management */
Kojto 122:f9eeca106725 85
Kojto 122:f9eeca106725 86 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
Kojto 122:f9eeca106725 87 used to configure the transmit and receive SCK clock.
Kojto 122:f9eeca106725 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler
Kojto 122:f9eeca106725 89 @note The communication clock is derived from the master
Kojto 122:f9eeca106725 90 clock. The slave clock does not need to be set. */
Kojto 122:f9eeca106725 91
Kojto 122:f9eeca106725 92 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
Kojto 122:f9eeca106725 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
Kojto 122:f9eeca106725 94
Kojto 122:f9eeca106725 95 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not .
Kojto 122:f9eeca106725 96 This parameter can be a value of @ref SPI_TI_mode */
Kojto 122:f9eeca106725 97
Kojto 122:f9eeca106725 98 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
Kojto 122:f9eeca106725 99 This parameter can be a value of @ref SPI_CRC_Calculation */
Kojto 122:f9eeca106725 100
Kojto 122:f9eeca106725 101 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
Kojto 122:f9eeca106725 102 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
Kojto 122:f9eeca106725 103
Kojto 122:f9eeca106725 104 uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation.
Kojto 122:f9eeca106725 105 CRC Length is only used with Data8 and Data16, not other data size
Kojto 122:f9eeca106725 106 This parameter can be a value of @ref SPI_CRC_length */
Kojto 122:f9eeca106725 107
Kojto 122:f9eeca106725 108 uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not .
Kojto 122:f9eeca106725 109 This parameter can be a value of @ref SPI_NSSP_Mode
Kojto 122:f9eeca106725 110 This mode is activated by the NSSP bit in the SPIx_CR2 register and
Kojto 122:f9eeca106725 111 it takes effect only if the SPI interface is configured as Motorola SPI
Kojto 122:f9eeca106725 112 master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
Kojto 122:f9eeca106725 113 CPOL setting is ignored).. */
Kojto 122:f9eeca106725 114 } SPI_InitTypeDef;
Kojto 122:f9eeca106725 115
Kojto 122:f9eeca106725 116 /**
Kojto 122:f9eeca106725 117 * @brief HAL State structures definition
Kojto 122:f9eeca106725 118 */
Kojto 122:f9eeca106725 119 typedef enum
Kojto 122:f9eeca106725 120 {
Kojto 122:f9eeca106725 121 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */
Kojto 122:f9eeca106725 122 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
Kojto 122:f9eeca106725 123 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
Kojto 122:f9eeca106725 124 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
Kojto 122:f9eeca106725 125 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
Kojto 122:f9eeca106725 126 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing*/
Kojto 122:f9eeca106725 127 HAL_SPI_STATE_ERROR = 0x06U /*!< SPI error state */
Kojto 122:f9eeca106725 128 }HAL_SPI_StateTypeDef;
Kojto 122:f9eeca106725 129
Kojto 122:f9eeca106725 130 /**
Kojto 122:f9eeca106725 131 * @brief SPI handle Structure definition
Kojto 122:f9eeca106725 132 */
Kojto 122:f9eeca106725 133 typedef struct __SPI_HandleTypeDef
Kojto 122:f9eeca106725 134 {
Kojto 122:f9eeca106725 135 SPI_TypeDef *Instance; /* SPI registers base address */
Kojto 122:f9eeca106725 136
Kojto 122:f9eeca106725 137 SPI_InitTypeDef Init; /* SPI communication parameters */
Kojto 122:f9eeca106725 138
Kojto 122:f9eeca106725 139 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
Kojto 122:f9eeca106725 140
Kojto 122:f9eeca106725 141 uint16_t TxXferSize; /* SPI Tx Transfer size */
Kojto 122:f9eeca106725 142
Kojto 122:f9eeca106725 143 uint16_t TxXferCount; /* SPI Tx Transfer Counter */
Kojto 122:f9eeca106725 144
Kojto 122:f9eeca106725 145 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
Kojto 122:f9eeca106725 146
Kojto 122:f9eeca106725 147 uint16_t RxXferSize; /* SPI Rx Transfer size */
Kojto 122:f9eeca106725 148
Kojto 122:f9eeca106725 149 uint16_t RxXferCount; /* SPI Rx Transfer Counter */
Kojto 122:f9eeca106725 150
Kojto 122:f9eeca106725 151 uint32_t CRCSize; /* SPI CRC size used for the transfer */
Kojto 122:f9eeca106725 152
Kojto 122:f9eeca106725 153 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */
Kojto 122:f9eeca106725 154
Kojto 122:f9eeca106725 155 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */
Kojto 122:f9eeca106725 156
Kojto 122:f9eeca106725 157 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */
Kojto 122:f9eeca106725 158
Kojto 122:f9eeca106725 159 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */
Kojto 122:f9eeca106725 160
Kojto 122:f9eeca106725 161 HAL_LockTypeDef Lock; /* Locking object */
Kojto 122:f9eeca106725 162
Kojto 122:f9eeca106725 163 __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
Kojto 122:f9eeca106725 164
Kojto 122:f9eeca106725 165 __IO uint32_t ErrorCode; /* SPI Error code */
Kojto 122:f9eeca106725 166
Kojto 122:f9eeca106725 167 }SPI_HandleTypeDef;
Kojto 122:f9eeca106725 168
Kojto 122:f9eeca106725 169 /**
Kojto 122:f9eeca106725 170 * @}
Kojto 122:f9eeca106725 171 */
Kojto 122:f9eeca106725 172
Kojto 122:f9eeca106725 173 /* Exported constants --------------------------------------------------------*/
Kojto 122:f9eeca106725 174
Kojto 122:f9eeca106725 175 /** @defgroup SPI_Exported_Constants SPI Exported Constants
Kojto 122:f9eeca106725 176 * @{
Kojto 122:f9eeca106725 177 */
Kojto 122:f9eeca106725 178
Kojto 122:f9eeca106725 179 /** @defgroup SPI_Error_Code SPI Error Code
Kojto 122:f9eeca106725 180 * @{
Kojto 122:f9eeca106725 181 */
Kojto 122:f9eeca106725 182 #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
Kojto 122:f9eeca106725 183 #define HAL_SPI_ERROR_MODF ((uint32_t)0x00000001U) /*!< MODF error */
Kojto 122:f9eeca106725 184 #define HAL_SPI_ERROR_CRC ((uint32_t)0x00000002U) /*!< CRC error */
Kojto 122:f9eeca106725 185 #define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004U) /*!< OVR error */
Kojto 122:f9eeca106725 186 #define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008U) /*!< FRE error */
Kojto 122:f9eeca106725 187 #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
Kojto 122:f9eeca106725 188 #define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020U) /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */
Kojto 122:f9eeca106725 189 #define HAL_SPI_ERROR_UNKNOW ((uint32_t)0x00000040U) /*!< Unknow Error error */
Kojto 122:f9eeca106725 190 /**
Kojto 122:f9eeca106725 191 * @}
Kojto 122:f9eeca106725 192 */
Kojto 122:f9eeca106725 193
Kojto 122:f9eeca106725 194
Kojto 122:f9eeca106725 195 /** @defgroup SPI_Mode SPI Mode
Kojto 122:f9eeca106725 196 * @{
Kojto 122:f9eeca106725 197 */
Kojto 122:f9eeca106725 198 #define SPI_MODE_SLAVE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 199 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
Kojto 122:f9eeca106725 200 /**
Kojto 122:f9eeca106725 201 * @}
Kojto 122:f9eeca106725 202 */
Kojto 122:f9eeca106725 203
Kojto 122:f9eeca106725 204 /** @defgroup SPI_Direction SPI Direction Mode
Kojto 122:f9eeca106725 205 * @{
Kojto 122:f9eeca106725 206 */
Kojto 122:f9eeca106725 207 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 208 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
Kojto 122:f9eeca106725 209 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
Kojto 122:f9eeca106725 210 /**
Kojto 122:f9eeca106725 211 * @}
Kojto 122:f9eeca106725 212 */
Kojto 122:f9eeca106725 213
Kojto 122:f9eeca106725 214 /** @defgroup SPI_Data_Size SPI Data Size
Kojto 122:f9eeca106725 215 * @{
Kojto 122:f9eeca106725 216 */
Kojto 122:f9eeca106725 217 #define SPI_DATASIZE_4BIT ((uint32_t)0x0300U)
Kojto 122:f9eeca106725 218 #define SPI_DATASIZE_5BIT ((uint32_t)0x0400U)
Kojto 122:f9eeca106725 219 #define SPI_DATASIZE_6BIT ((uint32_t)0x0500U)
Kojto 122:f9eeca106725 220 #define SPI_DATASIZE_7BIT ((uint32_t)0x0600U)
Kojto 122:f9eeca106725 221 #define SPI_DATASIZE_8BIT ((uint32_t)0x0700U)
Kojto 122:f9eeca106725 222 #define SPI_DATASIZE_9BIT ((uint32_t)0x0800U)
Kojto 122:f9eeca106725 223 #define SPI_DATASIZE_10BIT ((uint32_t)0x0900U)
Kojto 122:f9eeca106725 224 #define SPI_DATASIZE_11BIT ((uint32_t)0x0A00U)
Kojto 122:f9eeca106725 225 #define SPI_DATASIZE_12BIT ((uint32_t)0x0B00U)
Kojto 122:f9eeca106725 226 #define SPI_DATASIZE_13BIT ((uint32_t)0x0C00U)
Kojto 122:f9eeca106725 227 #define SPI_DATASIZE_14BIT ((uint32_t)0x0D00U)
Kojto 122:f9eeca106725 228 #define SPI_DATASIZE_15BIT ((uint32_t)0x0E00U)
Kojto 122:f9eeca106725 229 #define SPI_DATASIZE_16BIT ((uint32_t)0x0F00U)
Kojto 122:f9eeca106725 230 /**
Kojto 122:f9eeca106725 231 * @}
Kojto 122:f9eeca106725 232 */
Kojto 122:f9eeca106725 233
Kojto 122:f9eeca106725 234 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
Kojto 122:f9eeca106725 235 * @{
Kojto 122:f9eeca106725 236 */
Kojto 122:f9eeca106725 237 #define SPI_POLARITY_LOW ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 238 #define SPI_POLARITY_HIGH SPI_CR1_CPOL
Kojto 122:f9eeca106725 239 /**
Kojto 122:f9eeca106725 240 * @}
Kojto 122:f9eeca106725 241 */
Kojto 122:f9eeca106725 242
Kojto 122:f9eeca106725 243 /** @defgroup SPI_Clock_Phase SPI Clock Phase
Kojto 122:f9eeca106725 244 * @{
Kojto 122:f9eeca106725 245 */
Kojto 122:f9eeca106725 246 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 247 #define SPI_PHASE_2EDGE SPI_CR1_CPHA
Kojto 122:f9eeca106725 248 /**
Kojto 122:f9eeca106725 249 * @}
Kojto 122:f9eeca106725 250 */
Kojto 122:f9eeca106725 251
Kojto 122:f9eeca106725 252 /** @defgroup SPI_Slave_Select_management SPI Slave Select management
Kojto 122:f9eeca106725 253 * @{
Kojto 122:f9eeca106725 254 */
Kojto 122:f9eeca106725 255 #define SPI_NSS_SOFT SPI_CR1_SSM
Kojto 122:f9eeca106725 256 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 257 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000U)
Kojto 122:f9eeca106725 258 /**
Kojto 122:f9eeca106725 259 * @}
Kojto 122:f9eeca106725 260 */
Kojto 122:f9eeca106725 261
Kojto 122:f9eeca106725 262 /** @defgroup SPI_NSSP_Mode SPI NSS Pulse Mode
Kojto 122:f9eeca106725 263 * @{
Kojto 122:f9eeca106725 264 */
Kojto 122:f9eeca106725 265 #define SPI_NSS_PULSE_ENABLE SPI_CR2_NSSP
Kojto 122:f9eeca106725 266 #define SPI_NSS_PULSE_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 267 /**
Kojto 122:f9eeca106725 268 * @}
Kojto 122:f9eeca106725 269 */
Kojto 122:f9eeca106725 270
Kojto 122:f9eeca106725 271 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
Kojto 122:f9eeca106725 272 * @{
Kojto 122:f9eeca106725 273 */
Kojto 122:f9eeca106725 274 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 275 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008U)
Kojto 122:f9eeca106725 276 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010U)
Kojto 122:f9eeca106725 277 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018U)
Kojto 122:f9eeca106725 278 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020U)
Kojto 122:f9eeca106725 279 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028U)
Kojto 122:f9eeca106725 280 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030U)
Kojto 122:f9eeca106725 281 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038U)
Kojto 122:f9eeca106725 282 /**
Kojto 122:f9eeca106725 283 * @}
Kojto 122:f9eeca106725 284 */
Kojto 122:f9eeca106725 285
Kojto 122:f9eeca106725 286 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
Kojto 122:f9eeca106725 287 * @{
Kojto 122:f9eeca106725 288 */
Kojto 122:f9eeca106725 289 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 290 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
Kojto 122:f9eeca106725 291 /**
Kojto 122:f9eeca106725 292 * @}
Kojto 122:f9eeca106725 293 */
Kojto 122:f9eeca106725 294
Kojto 122:f9eeca106725 295 /** @defgroup SPI_TI_mode SPI TI mode
Kojto 122:f9eeca106725 296 * @{
Kojto 122:f9eeca106725 297 */
Kojto 122:f9eeca106725 298 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 299 #define SPI_TIMODE_ENABLE SPI_CR2_FRF
Kojto 122:f9eeca106725 300 /**
Kojto 122:f9eeca106725 301 * @}
Kojto 122:f9eeca106725 302 */
Kojto 122:f9eeca106725 303
Kojto 122:f9eeca106725 304 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
Kojto 122:f9eeca106725 305 * @{
Kojto 122:f9eeca106725 306 */
Kojto 122:f9eeca106725 307 #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 308 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
Kojto 122:f9eeca106725 309 /**
Kojto 122:f9eeca106725 310 * @}
Kojto 122:f9eeca106725 311 */
Kojto 122:f9eeca106725 312
Kojto 122:f9eeca106725 313 /** @defgroup SPI_CRC_length SPI CRC Length
Kojto 122:f9eeca106725 314 * @{
Kojto 122:f9eeca106725 315 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 316 * SPI_CRC_LENGTH_DATASIZE: aligned with the data size
Kojto 122:f9eeca106725 317 * SPI_CRC_LENGTH_8BIT : CRC 8bit
Kojto 122:f9eeca106725 318 * SPI_CRC_LENGTH_16BIT : CRC 16bit
Kojto 122:f9eeca106725 319 */
Kojto 122:f9eeca106725 320 #define SPI_CRC_LENGTH_DATASIZE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 321 #define SPI_CRC_LENGTH_8BIT ((uint32_t)0x00000001U)
Kojto 122:f9eeca106725 322 #define SPI_CRC_LENGTH_16BIT ((uint32_t)0x00000002U)
Kojto 122:f9eeca106725 323 /**
Kojto 122:f9eeca106725 324 * @}
Kojto 122:f9eeca106725 325 */
Kojto 122:f9eeca106725 326
Kojto 122:f9eeca106725 327 /** @defgroup SPI_FIFO_reception_threshold SPI FIFO Reception Threshold
Kojto 122:f9eeca106725 328 * @{
Kojto 122:f9eeca106725 329 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 330 * SPI_RXFIFO_THRESHOLD or SPI_RXFIFO_THRESHOLD_QF :
Kojto 122:f9eeca106725 331 * RXNE event is generated if the FIFO
Kojto 122:f9eeca106725 332 * level is greater or equal to 1/2(16-bits).
Kojto 122:f9eeca106725 333 * SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO
Kojto 122:f9eeca106725 334 * level is greater or equal to 1/4(8 bits). */
Kojto 122:f9eeca106725 335 #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
Kojto 122:f9eeca106725 336 #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
Kojto 122:f9eeca106725 337 #define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 338
Kojto 122:f9eeca106725 339 /**
Kojto 122:f9eeca106725 340 * @}
Kojto 122:f9eeca106725 341 */
Kojto 122:f9eeca106725 342
Kojto 122:f9eeca106725 343 /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
Kojto 122:f9eeca106725 344 * @brief SPI Interrupt definition
Kojto 122:f9eeca106725 345 * Elements values convention: 0xXXXXXXXX
Kojto 122:f9eeca106725 346 * - XXXXXXXX : Interrupt control mask
Kojto 122:f9eeca106725 347 * @{
Kojto 122:f9eeca106725 348 */
Kojto 122:f9eeca106725 349 #define SPI_IT_TXE SPI_CR2_TXEIE
Kojto 122:f9eeca106725 350 #define SPI_IT_RXNE SPI_CR2_RXNEIE
Kojto 122:f9eeca106725 351 #define SPI_IT_ERR SPI_CR2_ERRIE
Kojto 122:f9eeca106725 352 /**
Kojto 122:f9eeca106725 353 * @}
Kojto 122:f9eeca106725 354 */
Kojto 122:f9eeca106725 355
Kojto 122:f9eeca106725 356
Kojto 122:f9eeca106725 357 /** @defgroup SPI_Flag_definition SPI Flag definition
Kojto 122:f9eeca106725 358 * @brief Flag definition
Kojto 122:f9eeca106725 359 * Elements values convention: 0xXXXXYYYY
Kojto 122:f9eeca106725 360 * - XXXX : Flag register Index
Kojto 122:f9eeca106725 361 * - YYYY : Flag mask
Kojto 122:f9eeca106725 362 * @{
Kojto 122:f9eeca106725 363 */
Kojto 122:f9eeca106725 364 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
Kojto 122:f9eeca106725 365 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
Kojto 122:f9eeca106725 366 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
Kojto 122:f9eeca106725 367 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
Kojto 122:f9eeca106725 368 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
Kojto 122:f9eeca106725 369 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
Kojto 122:f9eeca106725 370 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
Kojto 122:f9eeca106725 371 #define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */
Kojto 122:f9eeca106725 372 #define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */
Kojto 122:f9eeca106725 373 /**
Kojto 122:f9eeca106725 374 * @}
Kojto 122:f9eeca106725 375 */
Kojto 122:f9eeca106725 376
Kojto 122:f9eeca106725 377 /** @defgroup SPI_transmission_fifo_status_level SPI Transmission FIFO Status Level
Kojto 122:f9eeca106725 378 * @{
Kojto 122:f9eeca106725 379 */
Kojto 122:f9eeca106725 380 #define SPI_FTLVL_EMPTY ((uint32_t)0x0000U)
Kojto 122:f9eeca106725 381 #define SPI_FTLVL_QUARTER_FULL ((uint32_t)0x0800U)
Kojto 122:f9eeca106725 382 #define SPI_FTLVL_HALF_FULL ((uint32_t)0x1000U)
Kojto 122:f9eeca106725 383 #define SPI_FTLVL_FULL ((uint32_t)0x1800U)
Kojto 122:f9eeca106725 384
Kojto 122:f9eeca106725 385 /**
Kojto 122:f9eeca106725 386 * @}
Kojto 122:f9eeca106725 387 */
Kojto 122:f9eeca106725 388
Kojto 122:f9eeca106725 389 /** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level
Kojto 122:f9eeca106725 390 * @{
Kojto 122:f9eeca106725 391 */
Kojto 122:f9eeca106725 392 #define SPI_FRLVL_EMPTY ((uint32_t)0x0000U)
Kojto 122:f9eeca106725 393 #define SPI_FRLVL_QUARTER_FULL ((uint32_t)0x0200U)
Kojto 122:f9eeca106725 394 #define SPI_FRLVL_HALF_FULL ((uint32_t)0x0400U)
Kojto 122:f9eeca106725 395 #define SPI_FRLVL_FULL ((uint32_t)0x0600U)
Kojto 122:f9eeca106725 396 /**
Kojto 122:f9eeca106725 397 * @}
Kojto 122:f9eeca106725 398 */
Kojto 122:f9eeca106725 399
Kojto 122:f9eeca106725 400 /**
Kojto 122:f9eeca106725 401 * @}
Kojto 122:f9eeca106725 402 */
Kojto 122:f9eeca106725 403
Kojto 122:f9eeca106725 404 /* Exported macros ------------------------------------------------------------*/
Kojto 122:f9eeca106725 405 /** @defgroup SPI_Exported_Macros SPI Exported Macros
Kojto 122:f9eeca106725 406 * @{
Kojto 122:f9eeca106725 407 */
Kojto 122:f9eeca106725 408
Kojto 122:f9eeca106725 409 /** @brief Reset SPI handle state
Kojto 122:f9eeca106725 410 * @param __HANDLE__: SPI handle.
Kojto 122:f9eeca106725 411 * @retval None
Kojto 122:f9eeca106725 412 */
Kojto 122:f9eeca106725 413 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
Kojto 122:f9eeca106725 414
Kojto 122:f9eeca106725 415 /** @brief Enables or disables the specified SPI interrupts.
Kojto 122:f9eeca106725 416 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 417 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 418 * @param __INTERRUPT__ : specifies the interrupt source to enable or disable.
Kojto 122:f9eeca106725 419 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 420 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
Kojto 122:f9eeca106725 421 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
Kojto 122:f9eeca106725 422 * @arg SPI_IT_ERR: Error interrupt enable
Kojto 122:f9eeca106725 423 * @retval None
Kojto 122:f9eeca106725 424 */
Kojto 122:f9eeca106725 425 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
Kojto 122:f9eeca106725 426 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
Kojto 122:f9eeca106725 427
Kojto 122:f9eeca106725 428 /** @brief Checks if the specified SPI interrupt source is enabled or disabled.
Kojto 122:f9eeca106725 429 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 430 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 431 * @param __INTERRUPT__ : specifies the SPI interrupt source to check.
Kojto 122:f9eeca106725 432 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 433 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
Kojto 122:f9eeca106725 434 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
Kojto 122:f9eeca106725 435 * @arg SPI_IT_ERR: Error interrupt enable
Kojto 122:f9eeca106725 436 * @retval The new state of __IT__ (TRUE or FALSE).
Kojto 122:f9eeca106725 437 */
Kojto 122:f9eeca106725 438 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto 122:f9eeca106725 439
Kojto 122:f9eeca106725 440 /** @brief Checks whether the specified SPI flag is set or not.
Kojto 122:f9eeca106725 441 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 442 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 443 * @param __FLAG__ : specifies the flag to check.
Kojto 122:f9eeca106725 444 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 445 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
Kojto 122:f9eeca106725 446 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
Kojto 122:f9eeca106725 447 * @arg SPI_FLAG_CRCERR: CRC error flag
Kojto 122:f9eeca106725 448 * @arg SPI_FLAG_MODF: Mode fault flag
Kojto 122:f9eeca106725 449 * @arg SPI_FLAG_OVR: Overrun flag
Kojto 122:f9eeca106725 450 * @arg SPI_FLAG_BSY: Busy flag
Kojto 122:f9eeca106725 451 * @arg SPI_FLAG_FRE: Frame format error flag
Kojto 122:f9eeca106725 452 * @arg SPI_FLAG_FTLVL: SPI fifo transmission level
Kojto 122:f9eeca106725 453 * @arg SPI_FLAG_FRLVL: SPI fifo reception level
Kojto 122:f9eeca106725 454 * @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto 122:f9eeca106725 455 */
Kojto 122:f9eeca106725 456 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
Kojto 122:f9eeca106725 457
Kojto 122:f9eeca106725 458 /** @brief Clears the SPI CRCERR pending flag.
Kojto 122:f9eeca106725 459 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 460 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 461 * @retval None
Kojto 122:f9eeca106725 462 */
Kojto 122:f9eeca106725 463 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
Kojto 122:f9eeca106725 464
Kojto 122:f9eeca106725 465 /** @brief Clears the SPI MODF pending flag.
Kojto 122:f9eeca106725 466 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 467 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 468 *
Kojto 122:f9eeca106725 469 * @retval None
Kojto 122:f9eeca106725 470 */
Kojto 122:f9eeca106725 471 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
Kojto 122:f9eeca106725 472 do{ \
Kojto 122:f9eeca106725 473 __IO uint32_t tmpreg; \
Kojto 122:f9eeca106725 474 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 122:f9eeca106725 475 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
Kojto 122:f9eeca106725 476 UNUSED(tmpreg); \
Kojto 122:f9eeca106725 477 } while(0)
Kojto 122:f9eeca106725 478
Kojto 122:f9eeca106725 479 /** @brief Clears the SPI OVR pending flag.
Kojto 122:f9eeca106725 480 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 481 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 482 *
Kojto 122:f9eeca106725 483 * @retval None
Kojto 122:f9eeca106725 484 */
Kojto 122:f9eeca106725 485 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
Kojto 122:f9eeca106725 486 do{ \
Kojto 122:f9eeca106725 487 __IO uint32_t tmpreg; \
Kojto 122:f9eeca106725 488 tmpreg = (__HANDLE__)->Instance->DR; \
Kojto 122:f9eeca106725 489 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 122:f9eeca106725 490 UNUSED(tmpreg); \
Kojto 122:f9eeca106725 491 } while(0)
Kojto 122:f9eeca106725 492
Kojto 122:f9eeca106725 493 /** @brief Clears the SPI FRE pending flag.
Kojto 122:f9eeca106725 494 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 495 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 496 *
Kojto 122:f9eeca106725 497 * @retval None
Kojto 122:f9eeca106725 498 */
Kojto 122:f9eeca106725 499 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
Kojto 122:f9eeca106725 500 do{ \
Kojto 122:f9eeca106725 501 __IO uint32_t tmpreg; \
Kojto 122:f9eeca106725 502 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 122:f9eeca106725 503 UNUSED(tmpreg); \
Kojto 122:f9eeca106725 504 } while(0)
Kojto 122:f9eeca106725 505
Kojto 122:f9eeca106725 506 /** @brief Enables the SPI.
Kojto 122:f9eeca106725 507 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 508 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 509 * @retval None
Kojto 122:f9eeca106725 510 */
Kojto 122:f9eeca106725 511 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
Kojto 122:f9eeca106725 512
Kojto 122:f9eeca106725 513 /** @brief Disables the SPI.
Kojto 122:f9eeca106725 514 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 515 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 516 * @retval None
Kojto 122:f9eeca106725 517 */
Kojto 122:f9eeca106725 518 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
Kojto 122:f9eeca106725 519
Kojto 122:f9eeca106725 520 /**
Kojto 122:f9eeca106725 521 * @}
Kojto 122:f9eeca106725 522 */
Kojto 122:f9eeca106725 523
Kojto 122:f9eeca106725 524 /* Private macros --------------------------------------------------------*/
Kojto 122:f9eeca106725 525 /** @defgroup SPI_Private_Macros SPI Private Macros
Kojto 122:f9eeca106725 526 * @{
Kojto 122:f9eeca106725 527 */
Kojto 122:f9eeca106725 528
Kojto 122:f9eeca106725 529 /** @brief Sets the SPI transmit-only mode.
Kojto 122:f9eeca106725 530 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 531 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 532 * @retval None
Kojto 122:f9eeca106725 533 */
Kojto 122:f9eeca106725 534 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
Kojto 122:f9eeca106725 535
Kojto 122:f9eeca106725 536 /** @brief Sets the SPI receive-only mode.
Kojto 122:f9eeca106725 537 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 538 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 539 * @retval None
Kojto 122:f9eeca106725 540 */
Kojto 122:f9eeca106725 541 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
Kojto 122:f9eeca106725 542
Kojto 122:f9eeca106725 543 /** @brief Resets the CRC calculation of the SPI.
Kojto 122:f9eeca106725 544 * @param __HANDLE__ : specifies the SPI Handle.
Kojto 122:f9eeca106725 545 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 122:f9eeca106725 546 * @retval None
Kojto 122:f9eeca106725 547 */
Kojto 122:f9eeca106725 548 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
Kojto 122:f9eeca106725 549 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
Kojto 122:f9eeca106725 550
Kojto 122:f9eeca106725 551 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
Kojto 122:f9eeca106725 552 ((MODE) == SPI_MODE_MASTER))
Kojto 122:f9eeca106725 553
Kojto 122:f9eeca106725 554 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
Kojto 122:f9eeca106725 555 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\
Kojto 122:f9eeca106725 556 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 122:f9eeca106725 557
Kojto 122:f9eeca106725 558 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
Kojto 122:f9eeca106725 559
Kojto 122:f9eeca106725 560 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \
Kojto 122:f9eeca106725 561 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 122:f9eeca106725 562
Kojto 122:f9eeca106725 563 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
Kojto 122:f9eeca106725 564 ((DATASIZE) == SPI_DATASIZE_15BIT) || \
Kojto 122:f9eeca106725 565 ((DATASIZE) == SPI_DATASIZE_14BIT) || \
Kojto 122:f9eeca106725 566 ((DATASIZE) == SPI_DATASIZE_13BIT) || \
Kojto 122:f9eeca106725 567 ((DATASIZE) == SPI_DATASIZE_12BIT) || \
Kojto 122:f9eeca106725 568 ((DATASIZE) == SPI_DATASIZE_11BIT) || \
Kojto 122:f9eeca106725 569 ((DATASIZE) == SPI_DATASIZE_10BIT) || \
Kojto 122:f9eeca106725 570 ((DATASIZE) == SPI_DATASIZE_9BIT) || \
Kojto 122:f9eeca106725 571 ((DATASIZE) == SPI_DATASIZE_8BIT) || \
Kojto 122:f9eeca106725 572 ((DATASIZE) == SPI_DATASIZE_7BIT) || \
Kojto 122:f9eeca106725 573 ((DATASIZE) == SPI_DATASIZE_6BIT) || \
Kojto 122:f9eeca106725 574 ((DATASIZE) == SPI_DATASIZE_5BIT) || \
Kojto 122:f9eeca106725 575 ((DATASIZE) == SPI_DATASIZE_4BIT))
Kojto 122:f9eeca106725 576
Kojto 122:f9eeca106725 577 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
Kojto 122:f9eeca106725 578 ((CPOL) == SPI_POLARITY_HIGH))
Kojto 122:f9eeca106725 579
Kojto 122:f9eeca106725 580 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
Kojto 122:f9eeca106725 581 ((CPHA) == SPI_PHASE_2EDGE))
Kojto 122:f9eeca106725 582
Kojto 122:f9eeca106725 583 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
Kojto 122:f9eeca106725 584 ((NSS) == SPI_NSS_HARD_INPUT) || \
Kojto 122:f9eeca106725 585 ((NSS) == SPI_NSS_HARD_OUTPUT))
Kojto 122:f9eeca106725 586
Kojto 122:f9eeca106725 587 #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLE) || \
Kojto 122:f9eeca106725 588 ((NSSP) == SPI_NSS_PULSE_DISABLE))
Kojto 122:f9eeca106725 589
Kojto 122:f9eeca106725 590 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
Kojto 122:f9eeca106725 591 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
Kojto 122:f9eeca106725 592 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
Kojto 122:f9eeca106725 593 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
Kojto 122:f9eeca106725 594 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
Kojto 122:f9eeca106725 595 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
Kojto 122:f9eeca106725 596 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
Kojto 122:f9eeca106725 597 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
Kojto 122:f9eeca106725 598
Kojto 122:f9eeca106725 599 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
Kojto 122:f9eeca106725 600 ((BIT) == SPI_FIRSTBIT_LSB))
Kojto 122:f9eeca106725 601
Kojto 122:f9eeca106725 602 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
Kojto 122:f9eeca106725 603 ((MODE) == SPI_TIMODE_ENABLE))
Kojto 122:f9eeca106725 604
Kojto 122:f9eeca106725 605 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
Kojto 122:f9eeca106725 606 ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
Kojto 122:f9eeca106725 607
Kojto 122:f9eeca106725 608 #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\
Kojto 122:f9eeca106725 609 ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \
Kojto 122:f9eeca106725 610 ((LENGTH) == SPI_CRC_LENGTH_16BIT))
Kojto 122:f9eeca106725 611
Kojto 122:f9eeca106725 612 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF) && (((POLYNOMIAL)&0x1) != 0))
Kojto 122:f9eeca106725 613
Kojto 122:f9eeca106725 614
Kojto 122:f9eeca106725 615 /**
Kojto 122:f9eeca106725 616 * @}
Kojto 122:f9eeca106725 617 */
Kojto 122:f9eeca106725 618
Kojto 122:f9eeca106725 619 /* Exported functions --------------------------------------------------------*/
Kojto 122:f9eeca106725 620 /** @addtogroup SPI_Exported_Functions SPI Exported Functions
Kojto 122:f9eeca106725 621 * @{
Kojto 122:f9eeca106725 622 */
Kojto 122:f9eeca106725 623
Kojto 122:f9eeca106725 624 /** @addtogroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 122:f9eeca106725 625 * @{
Kojto 122:f9eeca106725 626 */
Kojto 122:f9eeca106725 627
Kojto 122:f9eeca106725 628 /* Initialization and de-initialization functions ****************************/
Kojto 122:f9eeca106725 629 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 630 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 631 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 632 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 633 /**
Kojto 122:f9eeca106725 634 * @}
Kojto 122:f9eeca106725 635 */
Kojto 122:f9eeca106725 636
Kojto 122:f9eeca106725 637 /** @addtogroup SPI_Exported_Functions_Group2 IO operation functions
Kojto 122:f9eeca106725 638 * @{
Kojto 122:f9eeca106725 639 */
Kojto 122:f9eeca106725 640
Kojto 122:f9eeca106725 641 /* IO operation functions *****************************************************/
Kojto 122:f9eeca106725 642 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
Kojto 122:f9eeca106725 643 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
Kojto 122:f9eeca106725 644 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
Kojto 122:f9eeca106725 645 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 122:f9eeca106725 646 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 122:f9eeca106725 647 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
Kojto 122:f9eeca106725 648 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 122:f9eeca106725 649 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 122:f9eeca106725 650 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
Kojto 122:f9eeca106725 651 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 652 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 653 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 654
Kojto 122:f9eeca106725 655 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 656 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 657 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 658 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 659 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 660 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 661 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 662 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 663 /**
Kojto 122:f9eeca106725 664 * @}
Kojto 122:f9eeca106725 665 */
Kojto 122:f9eeca106725 666
Kojto 122:f9eeca106725 667 /** @addtogroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
Kojto 122:f9eeca106725 668 * @{
Kojto 122:f9eeca106725 669 */
Kojto 122:f9eeca106725 670
Kojto 122:f9eeca106725 671 /* Peripheral State and Error functions ***************************************/
Kojto 122:f9eeca106725 672 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 673 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
Kojto 122:f9eeca106725 674 /**
Kojto 122:f9eeca106725 675 * @}
Kojto 122:f9eeca106725 676 */
Kojto 122:f9eeca106725 677
Kojto 122:f9eeca106725 678 /**
Kojto 122:f9eeca106725 679 * @}
Kojto 122:f9eeca106725 680 */
Kojto 122:f9eeca106725 681
Kojto 122:f9eeca106725 682 /**
Kojto 122:f9eeca106725 683 * @}
Kojto 122:f9eeca106725 684 */
Kojto 122:f9eeca106725 685
Kojto 122:f9eeca106725 686 /**
Kojto 122:f9eeca106725 687 * @}
Kojto 122:f9eeca106725 688 */
Kojto 122:f9eeca106725 689
Kojto 122:f9eeca106725 690 #ifdef __cplusplus
Kojto 122:f9eeca106725 691 }
Kojto 122:f9eeca106725 692 #endif
Kojto 122:f9eeca106725 693
Kojto 122:f9eeca106725 694 #endif /* __STM32F7xx_HAL_SPI_H */
Kojto 122:f9eeca106725 695
Kojto 122:f9eeca106725 696 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/