mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_EFM32LG_STK3600/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/system_efm32lg.h@128:9bcdf88f62b0, 2016-10-27 (annotated)

Committer:
<>
Date:
Thu Oct 27 16:45:56 2016 +0100
Revision:
128:9bcdf88f62b0
Child:
139:856d2700e60b
Release 128 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



2966: Add kw24 support https://github.com/ARMmbed/mbed-os/pull/2966

3068: MultiTech mDot - clean up PeripheralPins.c and add new pin names https://github.com/ARMmbed/mbed-os/pull/3068

3089: Kinetis HAL: Remove clock initialization code from serial and ticker  https://github.com/ARMmbed/mbed-os/pull/3089

2943: [NRF5] NVIC_SetVector functionality https://github.com/ARMmbed/mbed-os/pull/2943

2938: InterruptIn changes in NCS36510 HAL. https://github.com/ARMmbed/mbed-os/pull/2938

3108: Fix sleep function for NRF52. https://github.com/ARMmbed/mbed-os/pull/3108

3076: STM32F1: Correct timer master value reading https://github.com/ARMmbed/mbed-os/pull/3076

3085: Add LOWPOWERTIMER capability for NUCLEO_F303ZE https://github.com/ARMmbed/mbed-os/pull/3085

3046: [BEETLE] Update BLE stack on Beetle board https://github.com/ARMmbed/mbed-os/pull/3046

3122: [Silicon Labs] Update of Silicon Labs HAL https://github.com/ARMmbed/mbed-os/pull/3122

3022: OnSemi RAM usage fix https://github.com/ARMmbed/mbed-os/pull/3022

3121: STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH https://github.com/ARMmbed/mbed-os/pull/3121

3142: Targets- NUMAKER_PFM_NUC47216 remove mbed 2 https://github.com/ARMmbed/mbed-os/pull/3142

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /***************************************************************************//**
<> 128:9bcdf88f62b0 2 * @file system_efm32lg.h
<> 128:9bcdf88f62b0 3 * @brief CMSIS Cortex-M3 System Layer for EFM32LG devices.
<> 128:9bcdf88f62b0 4 * @version 5.0.0
<> 128:9bcdf88f62b0 5 ******************************************************************************
<> 128:9bcdf88f62b0 6 * @section License
<> 128:9bcdf88f62b0 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
<> 128:9bcdf88f62b0 8 ******************************************************************************
<> 128:9bcdf88f62b0 9 *
<> 128:9bcdf88f62b0 10 * Permission is granted to anyone to use this software for any purpose,
<> 128:9bcdf88f62b0 11 * including commercial applications, and to alter it and redistribute it
<> 128:9bcdf88f62b0 12 * freely, subject to the following restrictions:
<> 128:9bcdf88f62b0 13 *
<> 128:9bcdf88f62b0 14 * 1. The origin of this software must not be misrepresented; you must not
<> 128:9bcdf88f62b0 15 * claim that you wrote the original software.@n
<> 128:9bcdf88f62b0 16 * 2. Altered source versions must be plainly marked as such, and must not be
<> 128:9bcdf88f62b0 17 * misrepresented as being the original software.@n
<> 128:9bcdf88f62b0 18 * 3. This notice may not be removed or altered from any source distribution.
<> 128:9bcdf88f62b0 19 *
<> 128:9bcdf88f62b0 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
<> 128:9bcdf88f62b0 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
<> 128:9bcdf88f62b0 22 * providing the Software "AS IS", with no express or implied warranties of any
<> 128:9bcdf88f62b0 23 * kind, including, but not limited to, any implied warranties of
<> 128:9bcdf88f62b0 24 * merchantability or fitness for any particular purpose or warranties against
<> 128:9bcdf88f62b0 25 * infringement of any proprietary rights of a third party.
<> 128:9bcdf88f62b0 26 *
<> 128:9bcdf88f62b0 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
<> 128:9bcdf88f62b0 28 * incidental, or special damages, or any other relief, or for any claim by
<> 128:9bcdf88f62b0 29 * any third party, arising from your use of this Software.
<> 128:9bcdf88f62b0 30 *
<> 128:9bcdf88f62b0 31 *****************************************************************************/
<> 128:9bcdf88f62b0 32
<> 128:9bcdf88f62b0 33 #ifndef SYSTEM_EFM32LG_H
<> 128:9bcdf88f62b0 34 #define SYSTEM_EFM32LG_H
<> 128:9bcdf88f62b0 35
<> 128:9bcdf88f62b0 36 #ifdef __cplusplus
<> 128:9bcdf88f62b0 37 extern "C" {
<> 128:9bcdf88f62b0 38 #endif
<> 128:9bcdf88f62b0 39
<> 128:9bcdf88f62b0 40 #include <stdint.h>
<> 128:9bcdf88f62b0 41
<> 128:9bcdf88f62b0 42 /*******************************************************************************
<> 128:9bcdf88f62b0 43 ************************** GLOBAL VARIABLES *******************************
<> 128:9bcdf88f62b0 44 ******************************************************************************/
<> 128:9bcdf88f62b0 45
<> 128:9bcdf88f62b0 46 extern uint32_t SystemCoreClock; /**< System Clock Frequency (Core Clock) */
<> 128:9bcdf88f62b0 47
<> 128:9bcdf88f62b0 48 /*******************************************************************************
<> 128:9bcdf88f62b0 49 ***************************** PROTOTYPES **********************************
<> 128:9bcdf88f62b0 50 ******************************************************************************/
<> 128:9bcdf88f62b0 51
<> 128:9bcdf88f62b0 52 /* Interrupt routines - prototypes */
<> 128:9bcdf88f62b0 53 void Reset_Handler(void);
<> 128:9bcdf88f62b0 54 void NMI_Handler(void);
<> 128:9bcdf88f62b0 55 void HardFault_Handler(void);
<> 128:9bcdf88f62b0 56 void MemManage_Handler(void);
<> 128:9bcdf88f62b0 57 void BusFault_Handler(void);
<> 128:9bcdf88f62b0 58 void UsageFault_Handler(void);
<> 128:9bcdf88f62b0 59 void SVC_Handler(void);
<> 128:9bcdf88f62b0 60 void DebugMon_Handler(void);
<> 128:9bcdf88f62b0 61 void PendSV_Handler(void);
<> 128:9bcdf88f62b0 62 void SysTick_Handler(void);
<> 128:9bcdf88f62b0 63
<> 128:9bcdf88f62b0 64 void DMA_IRQHandler(void);
<> 128:9bcdf88f62b0 65 void GPIO_EVEN_IRQHandler(void);
<> 128:9bcdf88f62b0 66 void TIMER0_IRQHandler(void);
<> 128:9bcdf88f62b0 67 void USART0_RX_IRQHandler(void);
<> 128:9bcdf88f62b0 68 void USART0_TX_IRQHandler(void);
<> 128:9bcdf88f62b0 69 void USB_IRQHandler(void);
<> 128:9bcdf88f62b0 70 void ACMP0_IRQHandler(void);
<> 128:9bcdf88f62b0 71 void ADC0_IRQHandler(void);
<> 128:9bcdf88f62b0 72 void DAC0_IRQHandler(void);
<> 128:9bcdf88f62b0 73 void I2C0_IRQHandler(void);
<> 128:9bcdf88f62b0 74 void I2C1_IRQHandler(void);
<> 128:9bcdf88f62b0 75 void GPIO_ODD_IRQHandler(void);
<> 128:9bcdf88f62b0 76 void TIMER1_IRQHandler(void);
<> 128:9bcdf88f62b0 77 void TIMER2_IRQHandler(void);
<> 128:9bcdf88f62b0 78 void TIMER3_IRQHandler(void);
<> 128:9bcdf88f62b0 79 void USART1_RX_IRQHandler(void);
<> 128:9bcdf88f62b0 80 void USART1_TX_IRQHandler(void);
<> 128:9bcdf88f62b0 81 void LESENSE_IRQHandler(void);
<> 128:9bcdf88f62b0 82 void USART2_RX_IRQHandler(void);
<> 128:9bcdf88f62b0 83 void USART2_TX_IRQHandler(void);
<> 128:9bcdf88f62b0 84 void UART0_RX_IRQHandler(void);
<> 128:9bcdf88f62b0 85 void UART0_TX_IRQHandler(void);
<> 128:9bcdf88f62b0 86 void UART1_RX_IRQHandler(void);
<> 128:9bcdf88f62b0 87 void UART1_TX_IRQHandler(void);
<> 128:9bcdf88f62b0 88 void LEUART0_IRQHandler(void);
<> 128:9bcdf88f62b0 89 void LEUART1_IRQHandler(void);
<> 128:9bcdf88f62b0 90 void LETIMER0_IRQHandler(void);
<> 128:9bcdf88f62b0 91 void PCNT0_IRQHandler(void);
<> 128:9bcdf88f62b0 92 void PCNT1_IRQHandler(void);
<> 128:9bcdf88f62b0 93 void PCNT2_IRQHandler(void);
<> 128:9bcdf88f62b0 94 void RTC_IRQHandler(void);
<> 128:9bcdf88f62b0 95 void BURTC_IRQHandler(void);
<> 128:9bcdf88f62b0 96 void CMU_IRQHandler(void);
<> 128:9bcdf88f62b0 97 void VCMP_IRQHandler(void);
<> 128:9bcdf88f62b0 98 void LCD_IRQHandler(void);
<> 128:9bcdf88f62b0 99 void MSC_IRQHandler(void);
<> 128:9bcdf88f62b0 100 void AES_IRQHandler(void);
<> 128:9bcdf88f62b0 101 void EBI_IRQHandler(void);
<> 128:9bcdf88f62b0 102 void EMU_IRQHandler(void);
<> 128:9bcdf88f62b0 103
<> 128:9bcdf88f62b0 104 uint32_t SystemCoreClockGet(void);
<> 128:9bcdf88f62b0 105 uint32_t SystemMaxCoreClockGet(void);
<> 128:9bcdf88f62b0 106
<> 128:9bcdf88f62b0 107 /**************************************************************************//**
<> 128:9bcdf88f62b0 108 * @brief
<> 128:9bcdf88f62b0 109 * Update CMSIS SystemCoreClock variable.
<> 128:9bcdf88f62b0 110 *
<> 128:9bcdf88f62b0 111 * @details
<> 128:9bcdf88f62b0 112 * CMSIS defines a global variable SystemCoreClock that shall hold the
<> 128:9bcdf88f62b0 113 * core frequency in Hz. If the core frequency is dynamically changed, the
<> 128:9bcdf88f62b0 114 * variable must be kept updated in order to be CMSIS compliant.
<> 128:9bcdf88f62b0 115 *
<> 128:9bcdf88f62b0 116 * Notice that if only changing core clock frequency through the EFM32 CMU
<> 128:9bcdf88f62b0 117 * API, this variable will be kept updated. This function is only provided
<> 128:9bcdf88f62b0 118 * for CMSIS compliance and if a user modifies the the core clock outside
<> 128:9bcdf88f62b0 119 * the CMU API.
<> 128:9bcdf88f62b0 120 *****************************************************************************/
<> 128:9bcdf88f62b0 121 static __INLINE void SystemCoreClockUpdate(void)
<> 128:9bcdf88f62b0 122 {
<> 128:9bcdf88f62b0 123 SystemCoreClockGet();
<> 128:9bcdf88f62b0 124 }
<> 128:9bcdf88f62b0 125
<> 128:9bcdf88f62b0 126 void SystemInit(void);
<> 128:9bcdf88f62b0 127 uint32_t SystemHFClockGet(void);
<> 128:9bcdf88f62b0 128 uint32_t SystemHFXOClockGet(void);
<> 128:9bcdf88f62b0 129 void SystemHFXOClockSet(uint32_t freq);
<> 128:9bcdf88f62b0 130 uint32_t SystemLFRCOClockGet(void);
<> 128:9bcdf88f62b0 131 uint32_t SystemULFRCOClockGet(void);
<> 128:9bcdf88f62b0 132 uint32_t SystemLFXOClockGet(void);
<> 128:9bcdf88f62b0 133 void SystemLFXOClockSet(uint32_t freq);
<> 128:9bcdf88f62b0 134
<> 128:9bcdf88f62b0 135 #ifdef __cplusplus
<> 128:9bcdf88f62b0 136 }
<> 128:9bcdf88f62b0 137 #endif
<> 128:9bcdf88f62b0 138 #endif /* SYSTEM_EFM32LG_H */