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TARGET_NUCLEO_L486RG/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_spi.h@140:97feb9bacc10, 2017-04-12 (annotated)
- Committer:
- <>
- Date:
- Wed Apr 12 16:07:08 2017 +0100
- Revision:
- 140:97feb9bacc10
- Parent:
- 128:9bcdf88f62b0
- Child:
- 145:64910690c574
Release 140 of the mbed library
Ports for Upcoming Targets
3841: Add nRf52840 target https://github.com/ARMmbed/mbed-os/pull/3841
3992: Introducing UBLOX_C030 platform. https://github.com/ARMmbed/mbed-os/pull/3992
Fixes and Changes
3951: [NUCLEO_F303ZE] Correct ARDUINO pin https://github.com/ARMmbed/mbed-os/pull/3951
4021: Fixing a macro to detect when RTOS was in use for the NRF52840_DK https://github.com/ARMmbed/mbed-os/pull/4021
3979: KW24D: Add missing SPI defines and Arduino connector definitions https://github.com/ARMmbed/mbed-os/pull/3979
3990: UBLOX_C027: construct a ticker-based wait, rather than calling wait_ms(), in the https://github.com/ARMmbed/mbed-os/pull/3990
4003: Fixed OBOE in async serial tx for NRF52 target, fixes #4002 https://github.com/ARMmbed/mbed-os/pull/4003
4012: STM32: Correct I2C master error handling https://github.com/ARMmbed/mbed-os/pull/4012
4020: NUCLEO_L011K4 remove unsupported tool chain files https://github.com/ARMmbed/mbed-os/pull/4020
4065: K66F: Move bss section to m_data_2 Section https://github.com/ARMmbed/mbed-os/pull/4065
4014: Issue 3763: Reduce heap allocation in the GCC linker file https://github.com/ARMmbed/mbed-os/pull/4014
4030: [STM32L0] reduce IAR heap and stack size for small targets https://github.com/ARMmbed/mbed-os/pull/4030
4109: NUCLEO_L476RG : minor serial pin update https://github.com/ARMmbed/mbed-os/pull/4109
3982: Ticker - kl25z bugfix for handling events in the past https://github.com/ARMmbed/mbed-os/pull/3982
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Kojto | 122:f9eeca106725 | 1 | /** |
Kojto | 122:f9eeca106725 | 2 | ****************************************************************************** |
Kojto | 122:f9eeca106725 | 3 | * @file stm32l4xx_ll_spi.h |
Kojto | 122:f9eeca106725 | 4 | * @author MCD Application Team |
Kojto | 122:f9eeca106725 | 5 | * @version V1.5.1 |
Kojto | 122:f9eeca106725 | 6 | * @date 31-May-2016 |
Kojto | 122:f9eeca106725 | 7 | * @brief Header file of SPI LL module. |
Kojto | 122:f9eeca106725 | 8 | ****************************************************************************** |
Kojto | 122:f9eeca106725 | 9 | * @attention |
Kojto | 122:f9eeca106725 | 10 | * |
Kojto | 122:f9eeca106725 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
Kojto | 122:f9eeca106725 | 12 | * |
Kojto | 122:f9eeca106725 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
Kojto | 122:f9eeca106725 | 14 | * are permitted provided that the following conditions are met: |
Kojto | 122:f9eeca106725 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
Kojto | 122:f9eeca106725 | 16 | * this list of conditions and the following disclaimer. |
Kojto | 122:f9eeca106725 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
Kojto | 122:f9eeca106725 | 18 | * this list of conditions and the following disclaimer in the documentation |
Kojto | 122:f9eeca106725 | 19 | * and/or other materials provided with the distribution. |
Kojto | 122:f9eeca106725 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
Kojto | 122:f9eeca106725 | 21 | * may be used to endorse or promote products derived from this software |
Kojto | 122:f9eeca106725 | 22 | * without specific prior written permission. |
Kojto | 122:f9eeca106725 | 23 | * |
Kojto | 122:f9eeca106725 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
Kojto | 122:f9eeca106725 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
Kojto | 122:f9eeca106725 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 122:f9eeca106725 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
Kojto | 122:f9eeca106725 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
Kojto | 122:f9eeca106725 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
Kojto | 122:f9eeca106725 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
Kojto | 122:f9eeca106725 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
Kojto | 122:f9eeca106725 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
Kojto | 122:f9eeca106725 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 122:f9eeca106725 | 34 | * |
Kojto | 122:f9eeca106725 | 35 | ****************************************************************************** |
Kojto | 122:f9eeca106725 | 36 | */ |
Kojto | 122:f9eeca106725 | 37 | |
Kojto | 122:f9eeca106725 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
Kojto | 122:f9eeca106725 | 39 | #ifndef __STM32L4xx_LL_SPI_H |
Kojto | 122:f9eeca106725 | 40 | #define __STM32L4xx_LL_SPI_H |
Kojto | 122:f9eeca106725 | 41 | |
Kojto | 122:f9eeca106725 | 42 | #ifdef __cplusplus |
Kojto | 122:f9eeca106725 | 43 | extern "C" { |
Kojto | 122:f9eeca106725 | 44 | #endif |
Kojto | 122:f9eeca106725 | 45 | |
Kojto | 122:f9eeca106725 | 46 | /* Includes ------------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 47 | #include "stm32l4xx.h" |
Kojto | 122:f9eeca106725 | 48 | |
Kojto | 122:f9eeca106725 | 49 | /** @addtogroup STM32L4xx_LL_Driver |
Kojto | 122:f9eeca106725 | 50 | * @{ |
Kojto | 122:f9eeca106725 | 51 | */ |
Kojto | 122:f9eeca106725 | 52 | |
Kojto | 122:f9eeca106725 | 53 | #if defined (SPI1) || defined (SPI2) || defined (SPI3) |
Kojto | 122:f9eeca106725 | 54 | |
Kojto | 122:f9eeca106725 | 55 | /** @defgroup SPI_LL SPI |
Kojto | 122:f9eeca106725 | 56 | * @{ |
Kojto | 122:f9eeca106725 | 57 | */ |
Kojto | 122:f9eeca106725 | 58 | |
Kojto | 122:f9eeca106725 | 59 | /* Private types -------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 60 | /* Private variables ---------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 61 | /* Private macros ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 62 | |
Kojto | 122:f9eeca106725 | 63 | /* Exported types ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 64 | #if defined(USE_FULL_LL_DRIVER) |
Kojto | 122:f9eeca106725 | 65 | /** @defgroup SPI_LL_ES_INIT SPI Exported Init structure |
Kojto | 122:f9eeca106725 | 66 | * @{ |
Kojto | 122:f9eeca106725 | 67 | */ |
Kojto | 122:f9eeca106725 | 68 | |
Kojto | 122:f9eeca106725 | 69 | /** |
Kojto | 122:f9eeca106725 | 70 | * @brief SPI Init structures definition |
Kojto | 122:f9eeca106725 | 71 | */ |
Kojto | 122:f9eeca106725 | 72 | typedef struct |
Kojto | 122:f9eeca106725 | 73 | { |
Kojto | 122:f9eeca106725 | 74 | uint32_t TransferDirection; /*!< Specifies the SPI unidirectional or bidirectional data mode. |
Kojto | 122:f9eeca106725 | 75 | This parameter can be a value of @ref SPI_LL_EC_TRANSFER_MODE. |
Kojto | 122:f9eeca106725 | 76 | |
Kojto | 122:f9eeca106725 | 77 | This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferDirection().*/ |
Kojto | 122:f9eeca106725 | 78 | |
Kojto | 122:f9eeca106725 | 79 | uint32_t Mode; /*!< Specifies the SPI mode (Master/Slave). |
Kojto | 122:f9eeca106725 | 80 | This parameter can be a value of @ref SPI_LL_EC_MODE. |
Kojto | 122:f9eeca106725 | 81 | |
Kojto | 122:f9eeca106725 | 82 | This feature can be modified afterwards using unitary function @ref LL_SPI_SetMode().*/ |
Kojto | 122:f9eeca106725 | 83 | |
Kojto | 122:f9eeca106725 | 84 | uint32_t DataWidth; /*!< Specifies the SPI data width. |
Kojto | 122:f9eeca106725 | 85 | This parameter can be a value of @ref SPI_LL_EC_DATAWIDTH. |
Kojto | 122:f9eeca106725 | 86 | |
Kojto | 122:f9eeca106725 | 87 | This feature can be modified afterwards using unitary function @ref LL_SPI_SetDataWidth().*/ |
Kojto | 122:f9eeca106725 | 88 | |
Kojto | 122:f9eeca106725 | 89 | uint32_t ClockPolarity; /*!< Specifies the serial clock steady state. |
Kojto | 122:f9eeca106725 | 90 | This parameter can be a value of @ref SPI_LL_EC_POLARITY. |
Kojto | 122:f9eeca106725 | 91 | |
Kojto | 122:f9eeca106725 | 92 | This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPolarity().*/ |
Kojto | 122:f9eeca106725 | 93 | |
Kojto | 122:f9eeca106725 | 94 | uint32_t ClockPhase; /*!< Specifies the clock active edge for the bit capture. |
Kojto | 122:f9eeca106725 | 95 | This parameter can be a value of @ref SPI_LL_EC_PHASE. |
Kojto | 122:f9eeca106725 | 96 | |
Kojto | 122:f9eeca106725 | 97 | This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPhase().*/ |
Kojto | 122:f9eeca106725 | 98 | |
Kojto | 122:f9eeca106725 | 99 | uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit. |
Kojto | 122:f9eeca106725 | 100 | This parameter can be a value of @ref SPI_LL_EC_NSS_MODE. |
Kojto | 122:f9eeca106725 | 101 | |
Kojto | 122:f9eeca106725 | 102 | This feature can be modified afterwards using unitary function @ref LL_SPI_SetNSSMode().*/ |
Kojto | 122:f9eeca106725 | 103 | |
Kojto | 122:f9eeca106725 | 104 | uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used to configure the transmit and receive SCK clock. |
Kojto | 122:f9eeca106725 | 105 | This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPRESCALER. |
Kojto | 122:f9eeca106725 | 106 | @note The communication clock is derived from the master clock. The slave clock does not need to be set. |
Kojto | 122:f9eeca106725 | 107 | |
Kojto | 122:f9eeca106725 | 108 | This feature can be modified afterwards using unitary function @ref LL_SPI_SetBaudRatePrescaler().*/ |
Kojto | 122:f9eeca106725 | 109 | |
Kojto | 122:f9eeca106725 | 110 | uint32_t BitOrder; /*!< Specifies whether data transfers start from MSB or LSB bit. |
Kojto | 122:f9eeca106725 | 111 | This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER. |
Kojto | 122:f9eeca106725 | 112 | |
Kojto | 122:f9eeca106725 | 113 | This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferBitOrder().*/ |
Kojto | 122:f9eeca106725 | 114 | |
Kojto | 122:f9eeca106725 | 115 | uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. |
Kojto | 122:f9eeca106725 | 116 | This parameter can be a value of @ref SPI_LL_EC_CRC_CALCULATION. |
Kojto | 122:f9eeca106725 | 117 | |
Kojto | 122:f9eeca106725 | 118 | This feature can be modified afterwards using unitary functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/ |
Kojto | 122:f9eeca106725 | 119 | |
Kojto | 122:f9eeca106725 | 120 | uint32_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation. |
Kojto | 122:f9eeca106725 | 121 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF. |
Kojto | 122:f9eeca106725 | 122 | |
Kojto | 122:f9eeca106725 | 123 | This feature can be modified afterwards using unitary function @ref LL_SPI_SetCRCPolynomial().*/ |
Kojto | 122:f9eeca106725 | 124 | |
Kojto | 122:f9eeca106725 | 125 | } LL_SPI_InitTypeDef; |
Kojto | 122:f9eeca106725 | 126 | |
Kojto | 122:f9eeca106725 | 127 | /** |
Kojto | 122:f9eeca106725 | 128 | * @} |
Kojto | 122:f9eeca106725 | 129 | */ |
Kojto | 122:f9eeca106725 | 130 | #endif /* USE_FULL_LL_DRIVER */ |
Kojto | 122:f9eeca106725 | 131 | |
Kojto | 122:f9eeca106725 | 132 | /* Exported constants --------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 133 | /** @defgroup SPI_LL_Exported_Constants SPI Exported Constants |
Kojto | 122:f9eeca106725 | 134 | * @{ |
Kojto | 122:f9eeca106725 | 135 | */ |
Kojto | 122:f9eeca106725 | 136 | |
Kojto | 122:f9eeca106725 | 137 | /** @defgroup SPI_LL_EC_GET_FLAG Get Flags Defines |
Kojto | 122:f9eeca106725 | 138 | * @brief Flags defines which can be used with LL_SPI_ReadReg function |
Kojto | 122:f9eeca106725 | 139 | * @{ |
Kojto | 122:f9eeca106725 | 140 | */ |
Kojto | 122:f9eeca106725 | 141 | #define LL_SPI_SR_RXNE SPI_SR_RXNE /*!< Rx buffer not empty flag */ |
Kojto | 122:f9eeca106725 | 142 | #define LL_SPI_SR_TXE SPI_SR_TXE /*!< Tx buffer empty flag */ |
Kojto | 122:f9eeca106725 | 143 | #define LL_SPI_SR_BSY SPI_SR_BSY /*!< Busy flag */ |
Kojto | 122:f9eeca106725 | 144 | #define LL_SPI_SR_UDR SPI_SR_UDR /*!< Underrun flag */ |
Kojto | 122:f9eeca106725 | 145 | #define LL_SPI_SR_CRCERR SPI_SR_CRCERR /*!< CRC error flag */ |
Kojto | 122:f9eeca106725 | 146 | #define LL_SPI_SR_MODF SPI_SR_MODF /*!< Mode fault flag */ |
Kojto | 122:f9eeca106725 | 147 | #define LL_SPI_SR_OVR SPI_SR_OVR /*!< Overrun flag */ |
Kojto | 122:f9eeca106725 | 148 | #define LL_SPI_SR_FRE SPI_SR_FRE /*!< TI mode frame format error flag */ |
Kojto | 122:f9eeca106725 | 149 | /** |
Kojto | 122:f9eeca106725 | 150 | * @} |
Kojto | 122:f9eeca106725 | 151 | */ |
Kojto | 122:f9eeca106725 | 152 | |
Kojto | 122:f9eeca106725 | 153 | /** @defgroup SPI_LL_EC_IT IT Defines |
Kojto | 122:f9eeca106725 | 154 | * @brief IT defines which can be used with LL_SPI_ReadReg and LL_SPI_WriteReg functions |
Kojto | 122:f9eeca106725 | 155 | * @{ |
Kojto | 122:f9eeca106725 | 156 | */ |
Kojto | 122:f9eeca106725 | 157 | #define LL_SPI_CR2_RXNEIE SPI_CR2_RXNEIE /*!< Rx buffer not empty interrupt enable */ |
Kojto | 122:f9eeca106725 | 158 | #define LL_SPI_CR2_TXEIE SPI_CR2_TXEIE /*!< Tx buffer empty interrupt enable */ |
Kojto | 122:f9eeca106725 | 159 | #define LL_SPI_CR2_ERRIE SPI_CR2_ERRIE /*!< Error interrupt enable */ |
Kojto | 122:f9eeca106725 | 160 | /** |
Kojto | 122:f9eeca106725 | 161 | * @} |
Kojto | 122:f9eeca106725 | 162 | */ |
Kojto | 122:f9eeca106725 | 163 | |
Kojto | 122:f9eeca106725 | 164 | /** @defgroup SPI_LL_EC_MODE Operation Mode |
Kojto | 122:f9eeca106725 | 165 | * @{ |
Kojto | 122:f9eeca106725 | 166 | */ |
Kojto | 122:f9eeca106725 | 167 | #define LL_SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) /*!< Master configuration */ |
Kojto | 122:f9eeca106725 | 168 | #define LL_SPI_MODE_SLAVE ((uint32_t)0x00000000U) /*!< Slave configuration */ |
Kojto | 122:f9eeca106725 | 169 | /** |
Kojto | 122:f9eeca106725 | 170 | * @} |
Kojto | 122:f9eeca106725 | 171 | */ |
Kojto | 122:f9eeca106725 | 172 | |
Kojto | 122:f9eeca106725 | 173 | /** @defgroup SPI_LL_EC_PROTOCOL Serial Protocol |
Kojto | 122:f9eeca106725 | 174 | * @{ |
Kojto | 122:f9eeca106725 | 175 | */ |
Kojto | 122:f9eeca106725 | 176 | #define LL_SPI_PROTOCOL_MOTOROLA ((uint32_t)0x00000000U) /*!< Motorola mode. Used as default value */ |
Kojto | 122:f9eeca106725 | 177 | #define LL_SPI_PROTOCOL_TI (SPI_CR2_FRF) /*!< TI mode */ |
Kojto | 122:f9eeca106725 | 178 | /** |
Kojto | 122:f9eeca106725 | 179 | * @} |
Kojto | 122:f9eeca106725 | 180 | */ |
Kojto | 122:f9eeca106725 | 181 | |
Kojto | 122:f9eeca106725 | 182 | /** @defgroup SPI_LL_EC_PHASE Clock Phase |
Kojto | 122:f9eeca106725 | 183 | * @{ |
Kojto | 122:f9eeca106725 | 184 | */ |
Kojto | 122:f9eeca106725 | 185 | #define LL_SPI_PHASE_1EDGE ((uint32_t)0x00000000U) /*!< First clock transition is the first data capture edge */ |
Kojto | 122:f9eeca106725 | 186 | #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition is the first data capture edge */ |
Kojto | 122:f9eeca106725 | 187 | /** |
Kojto | 122:f9eeca106725 | 188 | * @} |
Kojto | 122:f9eeca106725 | 189 | */ |
Kojto | 122:f9eeca106725 | 190 | |
Kojto | 122:f9eeca106725 | 191 | /** @defgroup SPI_LL_EC_POLARITY Clock Polarity |
Kojto | 122:f9eeca106725 | 192 | * @{ |
Kojto | 122:f9eeca106725 | 193 | */ |
Kojto | 122:f9eeca106725 | 194 | #define LL_SPI_POLARITY_LOW ((uint32_t)0x00000000U) /*!< Clock to 0 when idle */ |
Kojto | 122:f9eeca106725 | 195 | #define LL_SPI_POLARITY_HIGH (SPI_CR1_CPOL) /*!< Clock to 1 when idle */ |
Kojto | 122:f9eeca106725 | 196 | /** |
Kojto | 122:f9eeca106725 | 197 | * @} |
Kojto | 122:f9eeca106725 | 198 | */ |
Kojto | 122:f9eeca106725 | 199 | |
Kojto | 122:f9eeca106725 | 200 | /** @defgroup SPI_LL_EC_BAUDRATEPRESCALER Baud Rate Prescaler |
Kojto | 122:f9eeca106725 | 201 | * @{ |
Kojto | 122:f9eeca106725 | 202 | */ |
Kojto | 122:f9eeca106725 | 203 | #define LL_SPI_BAUDRATEPRESCALER_DIV2 ((uint32_t)0x00000000U) /*!< BaudRate control equal to fPCLK/2 */ |
Kojto | 122:f9eeca106725 | 204 | #define LL_SPI_BAUDRATEPRESCALER_DIV4 (SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/4 */ |
Kojto | 122:f9eeca106725 | 205 | #define LL_SPI_BAUDRATEPRESCALER_DIV8 (SPI_CR1_BR_1) /*!< BaudRate control equal to fPCLK/8 */ |
Kojto | 122:f9eeca106725 | 206 | #define LL_SPI_BAUDRATEPRESCALER_DIV16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/16 */ |
Kojto | 122:f9eeca106725 | 207 | #define LL_SPI_BAUDRATEPRESCALER_DIV32 (SPI_CR1_BR_2) /*!< BaudRate control equal to fPCLK/32 */ |
Kojto | 122:f9eeca106725 | 208 | #define LL_SPI_BAUDRATEPRESCALER_DIV64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/64 */ |
Kojto | 122:f9eeca106725 | 209 | #define LL_SPI_BAUDRATEPRESCALER_DIV128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) /*!< BaudRate control equal to fPCLK/128 */ |
Kojto | 122:f9eeca106725 | 210 | #define LL_SPI_BAUDRATEPRESCALER_DIV256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/256 */ |
Kojto | 122:f9eeca106725 | 211 | /** |
Kojto | 122:f9eeca106725 | 212 | * @} |
Kojto | 122:f9eeca106725 | 213 | */ |
Kojto | 122:f9eeca106725 | 214 | |
Kojto | 122:f9eeca106725 | 215 | /** @defgroup SPI_LL_EC_BIT_ORDER Transmission Bit Order |
Kojto | 122:f9eeca106725 | 216 | * @{ |
Kojto | 122:f9eeca106725 | 217 | */ |
Kojto | 122:f9eeca106725 | 218 | #define LL_SPI_LSB_FIRST (SPI_CR1_LSBFIRST) /*!< Data is transmitted/received with the LSB first */ |
Kojto | 122:f9eeca106725 | 219 | #define LL_SPI_MSB_FIRST ((uint32_t)0x00000000U) /*!< Data is transmitted/received with the MSB first */ |
Kojto | 122:f9eeca106725 | 220 | /** |
Kojto | 122:f9eeca106725 | 221 | * @} |
Kojto | 122:f9eeca106725 | 222 | */ |
Kojto | 122:f9eeca106725 | 223 | |
Kojto | 122:f9eeca106725 | 224 | /** @defgroup SPI_LL_EC_TRANSFER_MODE Transfer Mode |
Kojto | 122:f9eeca106725 | 225 | * @{ |
Kojto | 122:f9eeca106725 | 226 | */ |
Kojto | 122:f9eeca106725 | 227 | #define LL_SPI_FULL_DUPLEX ((uint32_t)0x00000000U) /*!< Full-Duplex mode. Rx and Tx transfer on 2 lines */ |
Kojto | 122:f9eeca106725 | 228 | #define LL_SPI_SIMPLEX_RX (SPI_CR1_RXONLY) /*!< Simplex Rx mode. Rx transfer only on 1 line */ |
Kojto | 122:f9eeca106725 | 229 | #define LL_SPI_HALF_DUPLEX_RX (SPI_CR1_BIDIMODE) /*!< Half-Duplex Rx mode. Rx transfer on 1 line */ |
Kojto | 122:f9eeca106725 | 230 | #define LL_SPI_HALF_DUPLEX_TX (SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE) /*!< Half-Duplex Tx mode. Tx transfer on 1 line */ |
Kojto | 122:f9eeca106725 | 231 | /** |
Kojto | 122:f9eeca106725 | 232 | * @} |
Kojto | 122:f9eeca106725 | 233 | */ |
Kojto | 122:f9eeca106725 | 234 | |
Kojto | 122:f9eeca106725 | 235 | /** @defgroup SPI_LL_EC_NSS_MODE Slave Select Pin Mode |
Kojto | 122:f9eeca106725 | 236 | * @{ |
Kojto | 122:f9eeca106725 | 237 | */ |
Kojto | 122:f9eeca106725 | 238 | #define LL_SPI_NSS_SOFT (SPI_CR1_SSM) /*!< NSS managed internally. NSS pin not used and free */ |
Kojto | 122:f9eeca106725 | 239 | #define LL_SPI_NSS_HARD_INPUT ((uint32_t)0x00000000U) /*!< NSS pin used in Input. Only used in Master mode */ |
Kojto | 122:f9eeca106725 | 240 | #define LL_SPI_NSS_HARD_OUTPUT (((uint32_t)SPI_CR2_SSOE << 16U)) /*!< NSS pin used in Output. Only used in Slave mode as chip select */ |
Kojto | 122:f9eeca106725 | 241 | /** |
Kojto | 122:f9eeca106725 | 242 | * @} |
Kojto | 122:f9eeca106725 | 243 | */ |
Kojto | 122:f9eeca106725 | 244 | |
Kojto | 122:f9eeca106725 | 245 | /** @defgroup SPI_LL_EC_DATAWIDTH Datawidth |
Kojto | 122:f9eeca106725 | 246 | * @{ |
Kojto | 122:f9eeca106725 | 247 | */ |
Kojto | 122:f9eeca106725 | 248 | #define LL_SPI_DATAWIDTH_4BIT (SPI_CR2_DS_0 | SPI_CR2_DS_1) /*!< Data length for SPI transfer: 4 bits */ |
Kojto | 122:f9eeca106725 | 249 | #define LL_SPI_DATAWIDTH_5BIT (SPI_CR2_DS_2) /*!< Data length for SPI transfer: 5 bits */ |
Kojto | 122:f9eeca106725 | 250 | #define LL_SPI_DATAWIDTH_6BIT (SPI_CR2_DS_2 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 6 bits */ |
Kojto | 122:f9eeca106725 | 251 | #define LL_SPI_DATAWIDTH_7BIT (SPI_CR2_DS_2 | SPI_CR2_DS_1) /*!< Data length for SPI transfer: 7 bits */ |
Kojto | 122:f9eeca106725 | 252 | #define LL_SPI_DATAWIDTH_8BIT (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 8 bits */ |
Kojto | 122:f9eeca106725 | 253 | #define LL_SPI_DATAWIDTH_9BIT (SPI_CR2_DS_3) /*!< Data length for SPI transfer: 9 bits */ |
Kojto | 122:f9eeca106725 | 254 | #define LL_SPI_DATAWIDTH_10BIT (SPI_CR2_DS_3 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 10 bits */ |
Kojto | 122:f9eeca106725 | 255 | #define LL_SPI_DATAWIDTH_11BIT (SPI_CR2_DS_3 | SPI_CR2_DS_1) /*!< Data length for SPI transfer: 11 bits */ |
Kojto | 122:f9eeca106725 | 256 | #define LL_SPI_DATAWIDTH_12BIT (SPI_CR2_DS_3 | SPI_CR2_DS_1 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 12 bits */ |
Kojto | 122:f9eeca106725 | 257 | #define LL_SPI_DATAWIDTH_13BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2) /*!< Data length for SPI transfer: 13 bits */ |
Kojto | 122:f9eeca106725 | 258 | #define LL_SPI_DATAWIDTH_14BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 14 bits */ |
Kojto | 122:f9eeca106725 | 259 | #define LL_SPI_DATAWIDTH_15BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1) /*!< Data length for SPI transfer: 15 bits */ |
Kojto | 122:f9eeca106725 | 260 | #define LL_SPI_DATAWIDTH_16BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0) /*!< Data length for SPI transfer: 16 bits */ |
Kojto | 122:f9eeca106725 | 261 | /** |
Kojto | 122:f9eeca106725 | 262 | * @} |
Kojto | 122:f9eeca106725 | 263 | */ |
Kojto | 122:f9eeca106725 | 264 | #if defined(USE_FULL_LL_DRIVER) |
Kojto | 122:f9eeca106725 | 265 | |
Kojto | 122:f9eeca106725 | 266 | /** @defgroup SPI_LL_EC_CRC_CALCULATION CRC Calculation |
Kojto | 122:f9eeca106725 | 267 | * @{ |
Kojto | 122:f9eeca106725 | 268 | */ |
Kojto | 122:f9eeca106725 | 269 | #define LL_SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000U) /*!< CRC calculation disabled */ |
Kojto | 122:f9eeca106725 | 270 | #define LL_SPI_CRCCALCULATION_ENABLE (SPI_CR1_CRCEN) /*!< CRC calculation enabled */ |
Kojto | 122:f9eeca106725 | 271 | /** |
Kojto | 122:f9eeca106725 | 272 | * @} |
Kojto | 122:f9eeca106725 | 273 | */ |
Kojto | 122:f9eeca106725 | 274 | #endif /* USE_FULL_LL_DRIVER */ |
Kojto | 122:f9eeca106725 | 275 | |
Kojto | 122:f9eeca106725 | 276 | /** @defgroup SPI_LL_EC_CRC_LENGTH CRC Length |
Kojto | 122:f9eeca106725 | 277 | * @{ |
Kojto | 122:f9eeca106725 | 278 | */ |
Kojto | 122:f9eeca106725 | 279 | #define LL_SPI_CRC_8BIT ((uint32_t)0x00000000U) /*!< 8-bit CRC length */ |
Kojto | 122:f9eeca106725 | 280 | #define LL_SPI_CRC_16BIT (SPI_CR1_CRCL) /*!< 16-bit CRC length */ |
Kojto | 122:f9eeca106725 | 281 | /** |
Kojto | 122:f9eeca106725 | 282 | * @} |
Kojto | 122:f9eeca106725 | 283 | */ |
Kojto | 122:f9eeca106725 | 284 | |
Kojto | 122:f9eeca106725 | 285 | /** @defgroup SPI_LL_EC_RX_FIFO_TH RX FIFO Threshold |
Kojto | 122:f9eeca106725 | 286 | * @{ |
Kojto | 122:f9eeca106725 | 287 | */ |
Kojto | 122:f9eeca106725 | 288 | #define LL_SPI_RX_FIFO_TH_HALF ((uint32_t)0x00000000U) /*!< RXNE event is generated if FIFO level is greater than or equel to 1/2 (16-bit) */ |
Kojto | 122:f9eeca106725 | 289 | #define LL_SPI_RX_FIFO_TH_QUARTER (SPI_CR2_FRXTH) /*!< RXNE event is generated if FIFO level is greater than or equel to 1/4 (8-bit) */ |
Kojto | 122:f9eeca106725 | 290 | /** |
Kojto | 122:f9eeca106725 | 291 | * @} |
Kojto | 122:f9eeca106725 | 292 | */ |
Kojto | 122:f9eeca106725 | 293 | |
Kojto | 122:f9eeca106725 | 294 | /** @defgroup SPI_LL_EC_RX_FIFO RX FIFO Level |
Kojto | 122:f9eeca106725 | 295 | * @{ |
Kojto | 122:f9eeca106725 | 296 | */ |
Kojto | 122:f9eeca106725 | 297 | #define LL_SPI_RX_FIFO_EMPTY ((uint32_t)0x00000000U) /*!< FIFO reception empty */ |
Kojto | 122:f9eeca106725 | 298 | #define LL_SPI_RX_FIFO_QUARTER_FULL (SPI_SR_FRLVL_0) /*!< FIFO reception 1/4 */ |
Kojto | 122:f9eeca106725 | 299 | #define LL_SPI_RX_FIFO_HALF_FULL (SPI_SR_FRLVL_1) /*!< FIFO reception 1/2 */ |
Kojto | 122:f9eeca106725 | 300 | #define LL_SPI_RX_FIFO_FULL (SPI_SR_FRLVL_1 | SPI_SR_FRLVL_0) /*!< FIFO reception full */ |
Kojto | 122:f9eeca106725 | 301 | /** |
Kojto | 122:f9eeca106725 | 302 | * @} |
Kojto | 122:f9eeca106725 | 303 | */ |
Kojto | 122:f9eeca106725 | 304 | |
Kojto | 122:f9eeca106725 | 305 | /** @defgroup SPI_LL_EC_TX_FIFO TX FIFO Level |
Kojto | 122:f9eeca106725 | 306 | * @{ |
Kojto | 122:f9eeca106725 | 307 | */ |
Kojto | 122:f9eeca106725 | 308 | #define LL_SPI_TX_FIFO_EMPTY ((uint32_t)0x00000000U) /*!< FIFO transmission empty */ |
Kojto | 122:f9eeca106725 | 309 | #define LL_SPI_TX_FIFO_QUARTER_FULL (SPI_SR_FTLVL_0) /*!< FIFO transmission 1/4 */ |
Kojto | 122:f9eeca106725 | 310 | #define LL_SPI_TX_FIFO_HALF_FULL (SPI_SR_FTLVL_1) /*!< FIFO transmission 1/2 */ |
Kojto | 122:f9eeca106725 | 311 | #define LL_SPI_TX_FIFO_FULL (SPI_SR_FTLVL_1 | SPI_SR_FTLVL_0) /*!< FIFO transmission full */ |
Kojto | 122:f9eeca106725 | 312 | /** |
Kojto | 122:f9eeca106725 | 313 | * @} |
Kojto | 122:f9eeca106725 | 314 | */ |
Kojto | 122:f9eeca106725 | 315 | |
Kojto | 122:f9eeca106725 | 316 | /** @defgroup SPI_LL_EC_DMA_PARITY DMA Parity |
Kojto | 122:f9eeca106725 | 317 | * @{ |
Kojto | 122:f9eeca106725 | 318 | */ |
Kojto | 122:f9eeca106725 | 319 | #define LL_SPI_DMA_PARITY_EVEN ((uint32_t)0x00000000U) /*!< Select DMA parity Even */ |
Kojto | 122:f9eeca106725 | 320 | #define LL_SPI_DMA_PARITY_ODD ((uint32_t)0x00000001U) /*!< Select DMA parity Odd */ |
Kojto | 122:f9eeca106725 | 321 | |
Kojto | 122:f9eeca106725 | 322 | /** |
Kojto | 122:f9eeca106725 | 323 | * @} |
Kojto | 122:f9eeca106725 | 324 | */ |
Kojto | 122:f9eeca106725 | 325 | |
Kojto | 122:f9eeca106725 | 326 | /** |
Kojto | 122:f9eeca106725 | 327 | * @} |
Kojto | 122:f9eeca106725 | 328 | */ |
Kojto | 122:f9eeca106725 | 329 | |
Kojto | 122:f9eeca106725 | 330 | /* Exported macro ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 331 | /** @defgroup SPI_LL_Exported_Macros SPI Exported Macros |
Kojto | 122:f9eeca106725 | 332 | * @{ |
Kojto | 122:f9eeca106725 | 333 | */ |
Kojto | 122:f9eeca106725 | 334 | |
Kojto | 122:f9eeca106725 | 335 | /** @defgroup SPI_LL_EM_WRITE_READ Common Write and read registers Macros |
Kojto | 122:f9eeca106725 | 336 | * @{ |
Kojto | 122:f9eeca106725 | 337 | */ |
Kojto | 122:f9eeca106725 | 338 | |
Kojto | 122:f9eeca106725 | 339 | /** |
Kojto | 122:f9eeca106725 | 340 | * @brief Write a value in SPI register |
Kojto | 122:f9eeca106725 | 341 | * @param __INSTANCE__ SPI Instance |
Kojto | 122:f9eeca106725 | 342 | * @param __REG__ Register to be written |
Kojto | 122:f9eeca106725 | 343 | * @param __VALUE__ Value to be written in the register |
Kojto | 122:f9eeca106725 | 344 | * @retval None |
Kojto | 122:f9eeca106725 | 345 | */ |
Kojto | 122:f9eeca106725 | 346 | #define LL_SPI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
Kojto | 122:f9eeca106725 | 347 | |
Kojto | 122:f9eeca106725 | 348 | /** |
Kojto | 122:f9eeca106725 | 349 | * @brief Read a value in SPI register |
Kojto | 122:f9eeca106725 | 350 | * @param __INSTANCE__ SPI Instance |
Kojto | 122:f9eeca106725 | 351 | * @param __REG__ Register to be read |
Kojto | 122:f9eeca106725 | 352 | * @retval Register value |
Kojto | 122:f9eeca106725 | 353 | */ |
Kojto | 122:f9eeca106725 | 354 | #define LL_SPI_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
Kojto | 122:f9eeca106725 | 355 | /** |
Kojto | 122:f9eeca106725 | 356 | * @} |
Kojto | 122:f9eeca106725 | 357 | */ |
Kojto | 122:f9eeca106725 | 358 | |
Kojto | 122:f9eeca106725 | 359 | /** |
Kojto | 122:f9eeca106725 | 360 | * @} |
Kojto | 122:f9eeca106725 | 361 | */ |
Kojto | 122:f9eeca106725 | 362 | |
Kojto | 122:f9eeca106725 | 363 | /* Exported functions --------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 364 | /** @defgroup SPI_LL_Exported_Functions SPI Exported Functions |
Kojto | 122:f9eeca106725 | 365 | * @{ |
Kojto | 122:f9eeca106725 | 366 | */ |
Kojto | 122:f9eeca106725 | 367 | |
Kojto | 122:f9eeca106725 | 368 | /** @defgroup SPI_LL_EF_Configuration Configuration |
Kojto | 122:f9eeca106725 | 369 | * @{ |
Kojto | 122:f9eeca106725 | 370 | */ |
Kojto | 122:f9eeca106725 | 371 | |
Kojto | 122:f9eeca106725 | 372 | /** |
Kojto | 122:f9eeca106725 | 373 | * @brief Enable SPI peripheral |
Kojto | 122:f9eeca106725 | 374 | * @rmtoll CR1 SPE LL_SPI_Enable |
Kojto | 122:f9eeca106725 | 375 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 376 | * @retval None |
Kojto | 122:f9eeca106725 | 377 | */ |
Kojto | 122:f9eeca106725 | 378 | __STATIC_INLINE void LL_SPI_Enable(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 379 | { |
Kojto | 122:f9eeca106725 | 380 | SET_BIT(SPIx->CR1, SPI_CR1_SPE); |
Kojto | 122:f9eeca106725 | 381 | } |
Kojto | 122:f9eeca106725 | 382 | |
Kojto | 122:f9eeca106725 | 383 | /** |
Kojto | 122:f9eeca106725 | 384 | * @brief Disable SPI peripheral |
Kojto | 122:f9eeca106725 | 385 | * @note When disabling the SPI, follow the procedure described in the Reference Manual. |
Kojto | 122:f9eeca106725 | 386 | * @rmtoll CR1 SPE LL_SPI_Disable |
Kojto | 122:f9eeca106725 | 387 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 388 | * @retval None |
Kojto | 122:f9eeca106725 | 389 | */ |
Kojto | 122:f9eeca106725 | 390 | __STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 391 | { |
Kojto | 122:f9eeca106725 | 392 | CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE); |
Kojto | 122:f9eeca106725 | 393 | } |
Kojto | 122:f9eeca106725 | 394 | |
Kojto | 122:f9eeca106725 | 395 | /** |
Kojto | 122:f9eeca106725 | 396 | * @brief Check if SPI peripheral is enabled |
Kojto | 122:f9eeca106725 | 397 | * @rmtoll CR1 SPE LL_SPI_IsEnabled |
Kojto | 122:f9eeca106725 | 398 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 399 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 400 | */ |
Kojto | 122:f9eeca106725 | 401 | __STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 402 | { |
Kojto | 122:f9eeca106725 | 403 | return (READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)); |
Kojto | 122:f9eeca106725 | 404 | } |
Kojto | 122:f9eeca106725 | 405 | |
Kojto | 122:f9eeca106725 | 406 | /** |
Kojto | 122:f9eeca106725 | 407 | * @brief Set SPI operation mode to Master or Slave |
Kojto | 122:f9eeca106725 | 408 | * @note This bit should not be changed when communication is ongoing. |
Kojto | 122:f9eeca106725 | 409 | * @rmtoll CR1 MSTR LL_SPI_SetMode\n |
Kojto | 122:f9eeca106725 | 410 | * CR1 SSI LL_SPI_SetMode |
Kojto | 122:f9eeca106725 | 411 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 412 | * @param Mode This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 413 | * @arg @ref LL_SPI_MODE_MASTER |
Kojto | 122:f9eeca106725 | 414 | * @arg @ref LL_SPI_MODE_SLAVE |
Kojto | 122:f9eeca106725 | 415 | * @retval None |
Kojto | 122:f9eeca106725 | 416 | */ |
Kojto | 122:f9eeca106725 | 417 | __STATIC_INLINE void LL_SPI_SetMode(SPI_TypeDef *SPIx, uint32_t Mode) |
Kojto | 122:f9eeca106725 | 418 | { |
Kojto | 122:f9eeca106725 | 419 | MODIFY_REG(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI, Mode); |
Kojto | 122:f9eeca106725 | 420 | } |
Kojto | 122:f9eeca106725 | 421 | |
Kojto | 122:f9eeca106725 | 422 | /** |
Kojto | 122:f9eeca106725 | 423 | * @brief Get SPI operation mode (Master or Slave) |
Kojto | 122:f9eeca106725 | 424 | * @rmtoll CR1 MSTR LL_SPI_GetMode\n |
Kojto | 122:f9eeca106725 | 425 | * CR1 SSI LL_SPI_GetMode |
Kojto | 122:f9eeca106725 | 426 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 427 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 428 | * @arg @ref LL_SPI_MODE_MASTER |
Kojto | 122:f9eeca106725 | 429 | * @arg @ref LL_SPI_MODE_SLAVE |
Kojto | 122:f9eeca106725 | 430 | */ |
Kojto | 122:f9eeca106725 | 431 | __STATIC_INLINE uint32_t LL_SPI_GetMode(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 432 | { |
Kojto | 122:f9eeca106725 | 433 | return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI)); |
Kojto | 122:f9eeca106725 | 434 | } |
Kojto | 122:f9eeca106725 | 435 | |
Kojto | 122:f9eeca106725 | 436 | /** |
Kojto | 122:f9eeca106725 | 437 | * @brief Set serial protocol used |
Kojto | 122:f9eeca106725 | 438 | * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. |
Kojto | 122:f9eeca106725 | 439 | * @rmtoll CR2 FRF LL_SPI_SetStandard |
Kojto | 122:f9eeca106725 | 440 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 441 | * @param Standard This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 442 | * @arg @ref LL_SPI_PROTOCOL_MOTOROLA |
Kojto | 122:f9eeca106725 | 443 | * @arg @ref LL_SPI_PROTOCOL_TI |
Kojto | 122:f9eeca106725 | 444 | * @retval None |
Kojto | 122:f9eeca106725 | 445 | */ |
Kojto | 122:f9eeca106725 | 446 | __STATIC_INLINE void LL_SPI_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard) |
Kojto | 122:f9eeca106725 | 447 | { |
Kojto | 122:f9eeca106725 | 448 | MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard); |
Kojto | 122:f9eeca106725 | 449 | } |
Kojto | 122:f9eeca106725 | 450 | |
Kojto | 122:f9eeca106725 | 451 | /** |
Kojto | 122:f9eeca106725 | 452 | * @brief Get serial protocol used |
Kojto | 122:f9eeca106725 | 453 | * @rmtoll CR2 FRF LL_SPI_GetStandard |
Kojto | 122:f9eeca106725 | 454 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 455 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 456 | * @arg @ref LL_SPI_PROTOCOL_MOTOROLA |
Kojto | 122:f9eeca106725 | 457 | * @arg @ref LL_SPI_PROTOCOL_TI |
Kojto | 122:f9eeca106725 | 458 | */ |
Kojto | 122:f9eeca106725 | 459 | __STATIC_INLINE uint32_t LL_SPI_GetStandard(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 460 | { |
Kojto | 122:f9eeca106725 | 461 | return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF)); |
Kojto | 122:f9eeca106725 | 462 | } |
Kojto | 122:f9eeca106725 | 463 | |
Kojto | 122:f9eeca106725 | 464 | /** |
Kojto | 122:f9eeca106725 | 465 | * @brief Set clock phase |
Kojto | 122:f9eeca106725 | 466 | * @note This bit should not be changed when communication is ongoing. |
Kojto | 122:f9eeca106725 | 467 | * This bit is not used in SPI TI mode. |
Kojto | 122:f9eeca106725 | 468 | * @rmtoll CR1 CPHA LL_SPI_SetClockPhase |
Kojto | 122:f9eeca106725 | 469 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 470 | * @param ClockPhase This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 471 | * @arg @ref LL_SPI_PHASE_1EDGE |
Kojto | 122:f9eeca106725 | 472 | * @arg @ref LL_SPI_PHASE_2EDGE |
Kojto | 122:f9eeca106725 | 473 | * @retval None |
Kojto | 122:f9eeca106725 | 474 | */ |
Kojto | 122:f9eeca106725 | 475 | __STATIC_INLINE void LL_SPI_SetClockPhase(SPI_TypeDef *SPIx, uint32_t ClockPhase) |
Kojto | 122:f9eeca106725 | 476 | { |
Kojto | 122:f9eeca106725 | 477 | MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); |
Kojto | 122:f9eeca106725 | 478 | } |
Kojto | 122:f9eeca106725 | 479 | |
Kojto | 122:f9eeca106725 | 480 | /** |
Kojto | 122:f9eeca106725 | 481 | * @brief Get clock phase |
Kojto | 122:f9eeca106725 | 482 | * @rmtoll CR1 CPHA LL_SPI_GetClockPhase |
Kojto | 122:f9eeca106725 | 483 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 484 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 485 | * @arg @ref LL_SPI_PHASE_1EDGE |
Kojto | 122:f9eeca106725 | 486 | * @arg @ref LL_SPI_PHASE_2EDGE |
Kojto | 122:f9eeca106725 | 487 | */ |
Kojto | 122:f9eeca106725 | 488 | __STATIC_INLINE uint32_t LL_SPI_GetClockPhase(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 489 | { |
Kojto | 122:f9eeca106725 | 490 | return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); |
Kojto | 122:f9eeca106725 | 491 | } |
Kojto | 122:f9eeca106725 | 492 | |
Kojto | 122:f9eeca106725 | 493 | /** |
Kojto | 122:f9eeca106725 | 494 | * @brief Set clock polarity |
Kojto | 122:f9eeca106725 | 495 | * @note This bit should not be changed when communication is ongoing. |
Kojto | 122:f9eeca106725 | 496 | * This bit is not used in SPI TI mode. |
Kojto | 122:f9eeca106725 | 497 | * @rmtoll CR1 CPOL LL_SPI_SetClockPolarity |
Kojto | 122:f9eeca106725 | 498 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 499 | * @param ClockPolarity This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 500 | * @arg @ref LL_SPI_POLARITY_LOW |
Kojto | 122:f9eeca106725 | 501 | * @arg @ref LL_SPI_POLARITY_HIGH |
Kojto | 122:f9eeca106725 | 502 | * @retval None |
Kojto | 122:f9eeca106725 | 503 | */ |
Kojto | 122:f9eeca106725 | 504 | __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) |
Kojto | 122:f9eeca106725 | 505 | { |
Kojto | 122:f9eeca106725 | 506 | MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity); |
Kojto | 122:f9eeca106725 | 507 | } |
Kojto | 122:f9eeca106725 | 508 | |
Kojto | 122:f9eeca106725 | 509 | /** |
Kojto | 122:f9eeca106725 | 510 | * @brief Get clock polarity |
Kojto | 122:f9eeca106725 | 511 | * @rmtoll CR1 CPOL LL_SPI_GetClockPolarity |
Kojto | 122:f9eeca106725 | 512 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 513 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 514 | * @arg @ref LL_SPI_POLARITY_LOW |
Kojto | 122:f9eeca106725 | 515 | * @arg @ref LL_SPI_POLARITY_HIGH |
Kojto | 122:f9eeca106725 | 516 | */ |
Kojto | 122:f9eeca106725 | 517 | __STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 518 | { |
Kojto | 122:f9eeca106725 | 519 | return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL)); |
Kojto | 122:f9eeca106725 | 520 | } |
Kojto | 122:f9eeca106725 | 521 | |
Kojto | 122:f9eeca106725 | 522 | /** |
Kojto | 122:f9eeca106725 | 523 | * @brief Set baud rate prescaler |
Kojto | 122:f9eeca106725 | 524 | * @note These bits should not be changed when communication is ongoing. SPI BaudRate = fPCLK/Prescaler. |
Kojto | 122:f9eeca106725 | 525 | * @rmtoll CR1 BR LL_SPI_SetBaudRatePrescaler |
Kojto | 122:f9eeca106725 | 526 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 527 | * @param BaudRate This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 528 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2 |
Kojto | 122:f9eeca106725 | 529 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4 |
Kojto | 122:f9eeca106725 | 530 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8 |
Kojto | 122:f9eeca106725 | 531 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16 |
Kojto | 122:f9eeca106725 | 532 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32 |
Kojto | 122:f9eeca106725 | 533 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64 |
Kojto | 122:f9eeca106725 | 534 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128 |
Kojto | 122:f9eeca106725 | 535 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256 |
Kojto | 122:f9eeca106725 | 536 | * @retval None |
Kojto | 122:f9eeca106725 | 537 | */ |
Kojto | 122:f9eeca106725 | 538 | __STATIC_INLINE void LL_SPI_SetBaudRatePrescaler(SPI_TypeDef *SPIx, uint32_t BaudRate) |
Kojto | 122:f9eeca106725 | 539 | { |
Kojto | 122:f9eeca106725 | 540 | MODIFY_REG(SPIx->CR1, SPI_CR1_BR, BaudRate); |
Kojto | 122:f9eeca106725 | 541 | } |
Kojto | 122:f9eeca106725 | 542 | |
Kojto | 122:f9eeca106725 | 543 | /** |
Kojto | 122:f9eeca106725 | 544 | * @brief Get baud rate prescaler |
Kojto | 122:f9eeca106725 | 545 | * @rmtoll CR1 BR LL_SPI_GetBaudRatePrescaler |
Kojto | 122:f9eeca106725 | 546 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 547 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 548 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2 |
Kojto | 122:f9eeca106725 | 549 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4 |
Kojto | 122:f9eeca106725 | 550 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8 |
Kojto | 122:f9eeca106725 | 551 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16 |
Kojto | 122:f9eeca106725 | 552 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32 |
Kojto | 122:f9eeca106725 | 553 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64 |
Kojto | 122:f9eeca106725 | 554 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128 |
Kojto | 122:f9eeca106725 | 555 | * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256 |
Kojto | 122:f9eeca106725 | 556 | */ |
Kojto | 122:f9eeca106725 | 557 | __STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 558 | { |
Kojto | 122:f9eeca106725 | 559 | return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR)); |
Kojto | 122:f9eeca106725 | 560 | } |
Kojto | 122:f9eeca106725 | 561 | |
Kojto | 122:f9eeca106725 | 562 | /** |
Kojto | 122:f9eeca106725 | 563 | * @brief Set transfer bit order |
Kojto | 122:f9eeca106725 | 564 | * @note This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode. |
Kojto | 122:f9eeca106725 | 565 | * @rmtoll CR1 LSBFIRST LL_SPI_SetTransferBitOrder |
Kojto | 122:f9eeca106725 | 566 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 567 | * @param BitOrder This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 568 | * @arg @ref LL_SPI_LSB_FIRST |
Kojto | 122:f9eeca106725 | 569 | * @arg @ref LL_SPI_MSB_FIRST |
Kojto | 122:f9eeca106725 | 570 | * @retval None |
Kojto | 122:f9eeca106725 | 571 | */ |
Kojto | 122:f9eeca106725 | 572 | __STATIC_INLINE void LL_SPI_SetTransferBitOrder(SPI_TypeDef *SPIx, uint32_t BitOrder) |
Kojto | 122:f9eeca106725 | 573 | { |
Kojto | 122:f9eeca106725 | 574 | MODIFY_REG(SPIx->CR1, SPI_CR1_LSBFIRST, BitOrder); |
Kojto | 122:f9eeca106725 | 575 | } |
Kojto | 122:f9eeca106725 | 576 | |
Kojto | 122:f9eeca106725 | 577 | /** |
Kojto | 122:f9eeca106725 | 578 | * @brief Get transfer bit order |
Kojto | 122:f9eeca106725 | 579 | * @rmtoll CR1 LSBFIRST LL_SPI_GetTransferBitOrder |
Kojto | 122:f9eeca106725 | 580 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 581 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 582 | * @arg @ref LL_SPI_LSB_FIRST |
Kojto | 122:f9eeca106725 | 583 | * @arg @ref LL_SPI_MSB_FIRST |
Kojto | 122:f9eeca106725 | 584 | */ |
Kojto | 122:f9eeca106725 | 585 | __STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 586 | { |
Kojto | 122:f9eeca106725 | 587 | return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBFIRST)); |
Kojto | 122:f9eeca106725 | 588 | } |
Kojto | 122:f9eeca106725 | 589 | |
Kojto | 122:f9eeca106725 | 590 | /** |
Kojto | 122:f9eeca106725 | 591 | * @brief Set transfer direction mode |
Kojto | 122:f9eeca106725 | 592 | * @note For Half-Duplex mode, Rx Direction is set by default. |
Kojto | 122:f9eeca106725 | 593 | * In master mode, the MOSI pin is used and in slave mode, the MISO pin is used for Half-Duplex. |
Kojto | 122:f9eeca106725 | 594 | * @rmtoll CR1 RXONLY LL_SPI_SetTransferDirection\n |
Kojto | 122:f9eeca106725 | 595 | * CR1 BIDIMODE LL_SPI_SetTransferDirection\n |
Kojto | 122:f9eeca106725 | 596 | * CR1 BIDIOE LL_SPI_SetTransferDirection |
Kojto | 122:f9eeca106725 | 597 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 598 | * @param TransferDirection This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 599 | * @arg @ref LL_SPI_FULL_DUPLEX |
Kojto | 122:f9eeca106725 | 600 | * @arg @ref LL_SPI_SIMPLEX_RX |
Kojto | 122:f9eeca106725 | 601 | * @arg @ref LL_SPI_HALF_DUPLEX_RX |
Kojto | 122:f9eeca106725 | 602 | * @arg @ref LL_SPI_HALF_DUPLEX_TX |
Kojto | 122:f9eeca106725 | 603 | * @retval None |
Kojto | 122:f9eeca106725 | 604 | */ |
Kojto | 122:f9eeca106725 | 605 | __STATIC_INLINE void LL_SPI_SetTransferDirection(SPI_TypeDef *SPIx, uint32_t TransferDirection) |
Kojto | 122:f9eeca106725 | 606 | { |
Kojto | 122:f9eeca106725 | 607 | MODIFY_REG(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE, TransferDirection); |
Kojto | 122:f9eeca106725 | 608 | } |
Kojto | 122:f9eeca106725 | 609 | |
Kojto | 122:f9eeca106725 | 610 | /** |
Kojto | 122:f9eeca106725 | 611 | * @brief Get transfer direction mode |
Kojto | 122:f9eeca106725 | 612 | * @rmtoll CR1 RXONLY LL_SPI_GetTransferDirection\n |
Kojto | 122:f9eeca106725 | 613 | * CR1 BIDIMODE LL_SPI_GetTransferDirection\n |
Kojto | 122:f9eeca106725 | 614 | * CR1 BIDIOE LL_SPI_GetTransferDirection |
Kojto | 122:f9eeca106725 | 615 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 616 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 617 | * @arg @ref LL_SPI_FULL_DUPLEX |
Kojto | 122:f9eeca106725 | 618 | * @arg @ref LL_SPI_SIMPLEX_RX |
Kojto | 122:f9eeca106725 | 619 | * @arg @ref LL_SPI_HALF_DUPLEX_RX |
Kojto | 122:f9eeca106725 | 620 | * @arg @ref LL_SPI_HALF_DUPLEX_TX |
Kojto | 122:f9eeca106725 | 621 | */ |
Kojto | 122:f9eeca106725 | 622 | __STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 623 | { |
Kojto | 122:f9eeca106725 | 624 | return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE)); |
Kojto | 122:f9eeca106725 | 625 | } |
Kojto | 122:f9eeca106725 | 626 | |
Kojto | 122:f9eeca106725 | 627 | /** |
Kojto | 122:f9eeca106725 | 628 | * @brief Set frame data width |
Kojto | 122:f9eeca106725 | 629 | * @rmtoll CR2 DS LL_SPI_SetDataWidth |
Kojto | 122:f9eeca106725 | 630 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 631 | * @param DataWidth This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 632 | * @arg @ref LL_SPI_DATAWIDTH_4BIT |
Kojto | 122:f9eeca106725 | 633 | * @arg @ref LL_SPI_DATAWIDTH_5BIT |
Kojto | 122:f9eeca106725 | 634 | * @arg @ref LL_SPI_DATAWIDTH_6BIT |
Kojto | 122:f9eeca106725 | 635 | * @arg @ref LL_SPI_DATAWIDTH_7BIT |
Kojto | 122:f9eeca106725 | 636 | * @arg @ref LL_SPI_DATAWIDTH_8BIT |
Kojto | 122:f9eeca106725 | 637 | * @arg @ref LL_SPI_DATAWIDTH_9BIT |
Kojto | 122:f9eeca106725 | 638 | * @arg @ref LL_SPI_DATAWIDTH_10BIT |
Kojto | 122:f9eeca106725 | 639 | * @arg @ref LL_SPI_DATAWIDTH_11BIT |
Kojto | 122:f9eeca106725 | 640 | * @arg @ref LL_SPI_DATAWIDTH_12BIT |
Kojto | 122:f9eeca106725 | 641 | * @arg @ref LL_SPI_DATAWIDTH_13BIT |
Kojto | 122:f9eeca106725 | 642 | * @arg @ref LL_SPI_DATAWIDTH_14BIT |
Kojto | 122:f9eeca106725 | 643 | * @arg @ref LL_SPI_DATAWIDTH_15BIT |
Kojto | 122:f9eeca106725 | 644 | * @arg @ref LL_SPI_DATAWIDTH_16BIT |
Kojto | 122:f9eeca106725 | 645 | * @retval None |
Kojto | 122:f9eeca106725 | 646 | */ |
Kojto | 122:f9eeca106725 | 647 | __STATIC_INLINE void LL_SPI_SetDataWidth(SPI_TypeDef *SPIx, uint32_t DataWidth) |
Kojto | 122:f9eeca106725 | 648 | { |
Kojto | 122:f9eeca106725 | 649 | MODIFY_REG(SPIx->CR2, SPI_CR2_DS, DataWidth); |
Kojto | 122:f9eeca106725 | 650 | } |
Kojto | 122:f9eeca106725 | 651 | |
Kojto | 122:f9eeca106725 | 652 | /** |
Kojto | 122:f9eeca106725 | 653 | * @brief Get frame data width |
Kojto | 122:f9eeca106725 | 654 | * @rmtoll CR2 DS LL_SPI_GetDataWidth |
Kojto | 122:f9eeca106725 | 655 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 656 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 657 | * @arg @ref LL_SPI_DATAWIDTH_4BIT |
Kojto | 122:f9eeca106725 | 658 | * @arg @ref LL_SPI_DATAWIDTH_5BIT |
Kojto | 122:f9eeca106725 | 659 | * @arg @ref LL_SPI_DATAWIDTH_6BIT |
Kojto | 122:f9eeca106725 | 660 | * @arg @ref LL_SPI_DATAWIDTH_7BIT |
Kojto | 122:f9eeca106725 | 661 | * @arg @ref LL_SPI_DATAWIDTH_8BIT |
Kojto | 122:f9eeca106725 | 662 | * @arg @ref LL_SPI_DATAWIDTH_9BIT |
Kojto | 122:f9eeca106725 | 663 | * @arg @ref LL_SPI_DATAWIDTH_10BIT |
Kojto | 122:f9eeca106725 | 664 | * @arg @ref LL_SPI_DATAWIDTH_11BIT |
Kojto | 122:f9eeca106725 | 665 | * @arg @ref LL_SPI_DATAWIDTH_12BIT |
Kojto | 122:f9eeca106725 | 666 | * @arg @ref LL_SPI_DATAWIDTH_13BIT |
Kojto | 122:f9eeca106725 | 667 | * @arg @ref LL_SPI_DATAWIDTH_14BIT |
Kojto | 122:f9eeca106725 | 668 | * @arg @ref LL_SPI_DATAWIDTH_15BIT |
Kojto | 122:f9eeca106725 | 669 | * @arg @ref LL_SPI_DATAWIDTH_16BIT |
Kojto | 122:f9eeca106725 | 670 | */ |
Kojto | 122:f9eeca106725 | 671 | __STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 672 | { |
Kojto | 122:f9eeca106725 | 673 | return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DS)); |
Kojto | 122:f9eeca106725 | 674 | } |
Kojto | 122:f9eeca106725 | 675 | |
Kojto | 122:f9eeca106725 | 676 | /** |
Kojto | 122:f9eeca106725 | 677 | * @brief Set threshold of RXFIFO that triggers an RXNE event |
Kojto | 122:f9eeca106725 | 678 | * @rmtoll CR2 FRXTH LL_SPI_SetRxFIFOThreshold |
Kojto | 122:f9eeca106725 | 679 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 680 | * @param Threshold This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 681 | * @arg @ref LL_SPI_RX_FIFO_TH_HALF |
Kojto | 122:f9eeca106725 | 682 | * @arg @ref LL_SPI_RX_FIFO_TH_QUARTER |
Kojto | 122:f9eeca106725 | 683 | * @retval None |
Kojto | 122:f9eeca106725 | 684 | */ |
Kojto | 122:f9eeca106725 | 685 | __STATIC_INLINE void LL_SPI_SetRxFIFOThreshold(SPI_TypeDef *SPIx, uint32_t Threshold) |
Kojto | 122:f9eeca106725 | 686 | { |
Kojto | 122:f9eeca106725 | 687 | MODIFY_REG(SPIx->CR2, SPI_CR2_FRXTH, Threshold); |
Kojto | 122:f9eeca106725 | 688 | } |
Kojto | 122:f9eeca106725 | 689 | |
Kojto | 122:f9eeca106725 | 690 | /** |
Kojto | 122:f9eeca106725 | 691 | * @brief Get threshold of RXFIFO that triggers an RXNE event |
Kojto | 122:f9eeca106725 | 692 | * @rmtoll CR2 FRXTH LL_SPI_GetRxFIFOThreshold |
Kojto | 122:f9eeca106725 | 693 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 694 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 695 | * @arg @ref LL_SPI_RX_FIFO_TH_HALF |
Kojto | 122:f9eeca106725 | 696 | * @arg @ref LL_SPI_RX_FIFO_TH_QUARTER |
Kojto | 122:f9eeca106725 | 697 | */ |
Kojto | 122:f9eeca106725 | 698 | __STATIC_INLINE uint32_t LL_SPI_GetRxFIFOThreshold(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 699 | { |
Kojto | 122:f9eeca106725 | 700 | return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRXTH)); |
Kojto | 122:f9eeca106725 | 701 | } |
Kojto | 122:f9eeca106725 | 702 | |
Kojto | 122:f9eeca106725 | 703 | /** |
Kojto | 122:f9eeca106725 | 704 | * @} |
Kojto | 122:f9eeca106725 | 705 | */ |
Kojto | 122:f9eeca106725 | 706 | |
Kojto | 122:f9eeca106725 | 707 | /** @defgroup SPI_LL_EF_CRC_Management CRC Management |
Kojto | 122:f9eeca106725 | 708 | * @{ |
Kojto | 122:f9eeca106725 | 709 | */ |
Kojto | 122:f9eeca106725 | 710 | |
Kojto | 122:f9eeca106725 | 711 | /** |
Kojto | 122:f9eeca106725 | 712 | * @brief Enable CRC |
Kojto | 122:f9eeca106725 | 713 | * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. |
Kojto | 122:f9eeca106725 | 714 | * @rmtoll CR1 CRCEN LL_SPI_EnableCRC |
Kojto | 122:f9eeca106725 | 715 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 716 | * @retval None |
Kojto | 122:f9eeca106725 | 717 | */ |
Kojto | 122:f9eeca106725 | 718 | __STATIC_INLINE void LL_SPI_EnableCRC(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 719 | { |
Kojto | 122:f9eeca106725 | 720 | SET_BIT(SPIx->CR1, SPI_CR1_CRCEN); |
Kojto | 122:f9eeca106725 | 721 | } |
Kojto | 122:f9eeca106725 | 722 | |
Kojto | 122:f9eeca106725 | 723 | /** |
Kojto | 122:f9eeca106725 | 724 | * @brief Disable CRC |
Kojto | 122:f9eeca106725 | 725 | * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. |
Kojto | 122:f9eeca106725 | 726 | * @rmtoll CR1 CRCEN LL_SPI_DisableCRC |
Kojto | 122:f9eeca106725 | 727 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 728 | * @retval None |
Kojto | 122:f9eeca106725 | 729 | */ |
Kojto | 122:f9eeca106725 | 730 | __STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 731 | { |
Kojto | 122:f9eeca106725 | 732 | CLEAR_BIT(SPIx->CR1, SPI_CR1_CRCEN); |
Kojto | 122:f9eeca106725 | 733 | } |
Kojto | 122:f9eeca106725 | 734 | |
Kojto | 122:f9eeca106725 | 735 | /** |
Kojto | 122:f9eeca106725 | 736 | * @brief Check if CRC is enabled |
Kojto | 122:f9eeca106725 | 737 | * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. |
Kojto | 122:f9eeca106725 | 738 | * @rmtoll CR1 CRCEN LL_SPI_IsEnabledCRC |
Kojto | 122:f9eeca106725 | 739 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 740 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 741 | */ |
Kojto | 122:f9eeca106725 | 742 | __STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 743 | { |
Kojto | 122:f9eeca106725 | 744 | return (READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN)); |
Kojto | 122:f9eeca106725 | 745 | } |
Kojto | 122:f9eeca106725 | 746 | |
Kojto | 122:f9eeca106725 | 747 | /** |
Kojto | 122:f9eeca106725 | 748 | * @brief Set CRC Length |
Kojto | 122:f9eeca106725 | 749 | * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. |
Kojto | 122:f9eeca106725 | 750 | * @rmtoll CR1 CRCL LL_SPI_SetCRCWidth |
Kojto | 122:f9eeca106725 | 751 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 752 | * @param CRCLength This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 753 | * @arg @ref LL_SPI_CRC_8BIT |
Kojto | 122:f9eeca106725 | 754 | * @arg @ref LL_SPI_CRC_16BIT |
Kojto | 122:f9eeca106725 | 755 | * @retval None |
Kojto | 122:f9eeca106725 | 756 | */ |
Kojto | 122:f9eeca106725 | 757 | __STATIC_INLINE void LL_SPI_SetCRCWidth(SPI_TypeDef *SPIx, uint32_t CRCLength) |
Kojto | 122:f9eeca106725 | 758 | { |
Kojto | 122:f9eeca106725 | 759 | MODIFY_REG(SPIx->CR1, SPI_CR1_CRCL, CRCLength); |
Kojto | 122:f9eeca106725 | 760 | } |
Kojto | 122:f9eeca106725 | 761 | |
Kojto | 122:f9eeca106725 | 762 | /** |
Kojto | 122:f9eeca106725 | 763 | * @brief Get CRC Length |
Kojto | 122:f9eeca106725 | 764 | * @rmtoll CR1 CRCL LL_SPI_GetCRCWidth |
Kojto | 122:f9eeca106725 | 765 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 766 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 767 | * @arg @ref LL_SPI_CRC_8BIT |
Kojto | 122:f9eeca106725 | 768 | * @arg @ref LL_SPI_CRC_16BIT |
Kojto | 122:f9eeca106725 | 769 | */ |
Kojto | 122:f9eeca106725 | 770 | __STATIC_INLINE uint32_t LL_SPI_GetCRCWidth(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 771 | { |
Kojto | 122:f9eeca106725 | 772 | return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CRCL)); |
Kojto | 122:f9eeca106725 | 773 | } |
Kojto | 122:f9eeca106725 | 774 | |
Kojto | 122:f9eeca106725 | 775 | /** |
Kojto | 122:f9eeca106725 | 776 | * @brief Set CRCNext to transfer CRC on the line |
Kojto | 122:f9eeca106725 | 777 | * @note This bit has to be written as soon as the last data is written in the SPIx_DR register. |
Kojto | 122:f9eeca106725 | 778 | * @rmtoll CR1 CRCNEXT LL_SPI_SetCRCNext |
Kojto | 122:f9eeca106725 | 779 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 780 | * @retval None |
Kojto | 122:f9eeca106725 | 781 | */ |
Kojto | 122:f9eeca106725 | 782 | __STATIC_INLINE void LL_SPI_SetCRCNext(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 783 | { |
Kojto | 122:f9eeca106725 | 784 | SET_BIT(SPIx->CR1, SPI_CR1_CRCNEXT); |
Kojto | 122:f9eeca106725 | 785 | } |
Kojto | 122:f9eeca106725 | 786 | |
Kojto | 122:f9eeca106725 | 787 | /** |
Kojto | 122:f9eeca106725 | 788 | * @brief Set polynomial for CRC calculation |
Kojto | 122:f9eeca106725 | 789 | * @rmtoll CRCPR CRCPOLY LL_SPI_SetCRCPolynomial |
Kojto | 122:f9eeca106725 | 790 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 791 | * @param CRCPoly This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF |
Kojto | 122:f9eeca106725 | 792 | * @retval None |
Kojto | 122:f9eeca106725 | 793 | */ |
Kojto | 122:f9eeca106725 | 794 | __STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly) |
Kojto | 122:f9eeca106725 | 795 | { |
Kojto | 122:f9eeca106725 | 796 | WRITE_REG(SPIx->CRCPR, (uint16_t)CRCPoly); |
Kojto | 122:f9eeca106725 | 797 | } |
Kojto | 122:f9eeca106725 | 798 | |
Kojto | 122:f9eeca106725 | 799 | /** |
Kojto | 122:f9eeca106725 | 800 | * @brief Get polynomial for CRC calculation |
Kojto | 122:f9eeca106725 | 801 | * @rmtoll CRCPR CRCPOLY LL_SPI_GetCRCPolynomial |
Kojto | 122:f9eeca106725 | 802 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 803 | * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF |
Kojto | 122:f9eeca106725 | 804 | */ |
Kojto | 122:f9eeca106725 | 805 | __STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 806 | { |
Kojto | 122:f9eeca106725 | 807 | return (uint32_t)(READ_REG(SPIx->CRCPR)); |
Kojto | 122:f9eeca106725 | 808 | } |
Kojto | 122:f9eeca106725 | 809 | |
Kojto | 122:f9eeca106725 | 810 | /** |
Kojto | 122:f9eeca106725 | 811 | * @brief Get Rx CRC |
Kojto | 122:f9eeca106725 | 812 | * @rmtoll RXCRCR RXCRC LL_SPI_GetRxCRC |
Kojto | 122:f9eeca106725 | 813 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 814 | * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF |
Kojto | 122:f9eeca106725 | 815 | */ |
Kojto | 122:f9eeca106725 | 816 | __STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 817 | { |
Kojto | 122:f9eeca106725 | 818 | return (uint32_t)(READ_REG(SPIx->RXCRCR)); |
Kojto | 122:f9eeca106725 | 819 | } |
Kojto | 122:f9eeca106725 | 820 | |
Kojto | 122:f9eeca106725 | 821 | /** |
Kojto | 122:f9eeca106725 | 822 | * @brief Get Tx CRC |
Kojto | 122:f9eeca106725 | 823 | * @rmtoll TXCRCR TXCRC LL_SPI_GetTxCRC |
Kojto | 122:f9eeca106725 | 824 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 825 | * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF |
Kojto | 122:f9eeca106725 | 826 | */ |
Kojto | 122:f9eeca106725 | 827 | __STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 828 | { |
Kojto | 122:f9eeca106725 | 829 | return (uint32_t)(READ_REG(SPIx->TXCRCR)); |
Kojto | 122:f9eeca106725 | 830 | } |
Kojto | 122:f9eeca106725 | 831 | |
Kojto | 122:f9eeca106725 | 832 | /** |
Kojto | 122:f9eeca106725 | 833 | * @} |
Kojto | 122:f9eeca106725 | 834 | */ |
Kojto | 122:f9eeca106725 | 835 | |
Kojto | 122:f9eeca106725 | 836 | /** @defgroup SPI_LL_EF_NSS_Management Slave Select Pin Management |
Kojto | 122:f9eeca106725 | 837 | * @{ |
Kojto | 122:f9eeca106725 | 838 | */ |
Kojto | 122:f9eeca106725 | 839 | |
Kojto | 122:f9eeca106725 | 840 | /** |
Kojto | 122:f9eeca106725 | 841 | * @brief Set NSS mode |
Kojto | 122:f9eeca106725 | 842 | * @note LL_SPI_NSS_SOFT Mode is not used in SPI TI mode. |
Kojto | 122:f9eeca106725 | 843 | * @rmtoll CR1 SSM LL_SPI_SetNSSMode\n |
Kojto | 122:f9eeca106725 | 844 | * @rmtoll CR2 SSOE LL_SPI_SetNSSMode |
Kojto | 122:f9eeca106725 | 845 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 846 | * @param NSS This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 847 | * @arg @ref LL_SPI_NSS_SOFT |
Kojto | 122:f9eeca106725 | 848 | * @arg @ref LL_SPI_NSS_HARD_INPUT |
Kojto | 122:f9eeca106725 | 849 | * @arg @ref LL_SPI_NSS_HARD_OUTPUT |
Kojto | 122:f9eeca106725 | 850 | * @retval None |
Kojto | 122:f9eeca106725 | 851 | */ |
Kojto | 122:f9eeca106725 | 852 | __STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS) |
Kojto | 122:f9eeca106725 | 853 | { |
Kojto | 122:f9eeca106725 | 854 | MODIFY_REG(SPIx->CR1, SPI_CR1_SSM, NSS); |
Kojto | 122:f9eeca106725 | 855 | MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U))); |
Kojto | 122:f9eeca106725 | 856 | } |
Kojto | 122:f9eeca106725 | 857 | |
Kojto | 122:f9eeca106725 | 858 | /** |
Kojto | 122:f9eeca106725 | 859 | * @brief Get NSS mode |
Kojto | 122:f9eeca106725 | 860 | * @rmtoll CR1 SSM LL_SPI_GetNSSMode\n |
Kojto | 122:f9eeca106725 | 861 | * @rmtoll CR2 SSOE LL_SPI_GetNSSMode |
Kojto | 122:f9eeca106725 | 862 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 863 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 864 | * @arg @ref LL_SPI_NSS_SOFT |
Kojto | 122:f9eeca106725 | 865 | * @arg @ref LL_SPI_NSS_HARD_INPUT |
Kojto | 122:f9eeca106725 | 866 | * @arg @ref LL_SPI_NSS_HARD_OUTPUT |
Kojto | 122:f9eeca106725 | 867 | */ |
Kojto | 122:f9eeca106725 | 868 | __STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 869 | { |
Kojto | 122:f9eeca106725 | 870 | register uint32_t Ssm = (READ_BIT(SPIx->CR1, SPI_CR1_SSM)); |
Kojto | 122:f9eeca106725 | 871 | register uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U); |
Kojto | 122:f9eeca106725 | 872 | return (Ssm | Ssoe); |
Kojto | 122:f9eeca106725 | 873 | } |
Kojto | 122:f9eeca106725 | 874 | |
Kojto | 122:f9eeca106725 | 875 | /** |
Kojto | 122:f9eeca106725 | 876 | * @brief Enable NSS pulse management |
Kojto | 122:f9eeca106725 | 877 | * @note This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode. |
Kojto | 122:f9eeca106725 | 878 | * @rmtoll CR2 NSSP LL_SPI_EnableNSSPulseMgt |
Kojto | 122:f9eeca106725 | 879 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 880 | * @retval None |
Kojto | 122:f9eeca106725 | 881 | */ |
Kojto | 122:f9eeca106725 | 882 | __STATIC_INLINE void LL_SPI_EnableNSSPulseMgt(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 883 | { |
Kojto | 122:f9eeca106725 | 884 | SET_BIT(SPIx->CR2, SPI_CR2_NSSP); |
Kojto | 122:f9eeca106725 | 885 | } |
Kojto | 122:f9eeca106725 | 886 | |
Kojto | 122:f9eeca106725 | 887 | /** |
Kojto | 122:f9eeca106725 | 888 | * @brief Disable NSS pulse management |
Kojto | 122:f9eeca106725 | 889 | * @note This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode. |
Kojto | 122:f9eeca106725 | 890 | * @rmtoll CR2 NSSP LL_SPI_DisableNSSPulseMgt |
Kojto | 122:f9eeca106725 | 891 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 892 | * @retval None |
Kojto | 122:f9eeca106725 | 893 | */ |
Kojto | 122:f9eeca106725 | 894 | __STATIC_INLINE void LL_SPI_DisableNSSPulseMgt(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 895 | { |
Kojto | 122:f9eeca106725 | 896 | CLEAR_BIT(SPIx->CR2, SPI_CR2_NSSP); |
Kojto | 122:f9eeca106725 | 897 | } |
Kojto | 122:f9eeca106725 | 898 | |
Kojto | 122:f9eeca106725 | 899 | /** |
Kojto | 122:f9eeca106725 | 900 | * @brief Check if NSS pulse is enabled |
Kojto | 122:f9eeca106725 | 901 | * @note This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode. |
Kojto | 122:f9eeca106725 | 902 | * @rmtoll CR2 NSSP LL_SPI_IsEnabledNSSPulse |
Kojto | 122:f9eeca106725 | 903 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 904 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 905 | */ |
Kojto | 122:f9eeca106725 | 906 | __STATIC_INLINE uint32_t LL_SPI_IsEnabledNSSPulse(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 907 | { |
Kojto | 122:f9eeca106725 | 908 | return (READ_BIT(SPIx->CR2, SPI_CR2_NSSP) == (SPI_CR2_NSSP)); |
Kojto | 122:f9eeca106725 | 909 | } |
Kojto | 122:f9eeca106725 | 910 | |
Kojto | 122:f9eeca106725 | 911 | /** |
Kojto | 122:f9eeca106725 | 912 | * @} |
Kojto | 122:f9eeca106725 | 913 | */ |
Kojto | 122:f9eeca106725 | 914 | |
Kojto | 122:f9eeca106725 | 915 | /** @defgroup SPI_LL_EF_FLAG_Management FLAG Management |
Kojto | 122:f9eeca106725 | 916 | * @{ |
Kojto | 122:f9eeca106725 | 917 | */ |
Kojto | 122:f9eeca106725 | 918 | |
Kojto | 122:f9eeca106725 | 919 | /** |
Kojto | 122:f9eeca106725 | 920 | * @brief Check if Rx buffer is not empty |
Kojto | 122:f9eeca106725 | 921 | * @rmtoll SR RXNE LL_SPI_IsActiveFlag_RXNE |
Kojto | 122:f9eeca106725 | 922 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 923 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 924 | */ |
Kojto | 122:f9eeca106725 | 925 | __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 926 | { |
Kojto | 122:f9eeca106725 | 927 | return (READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE)); |
Kojto | 122:f9eeca106725 | 928 | } |
Kojto | 122:f9eeca106725 | 929 | |
Kojto | 122:f9eeca106725 | 930 | /** |
Kojto | 122:f9eeca106725 | 931 | * @brief Check if Tx buffer is empty |
Kojto | 122:f9eeca106725 | 932 | * @rmtoll SR TXE LL_SPI_IsActiveFlag_TXE |
Kojto | 122:f9eeca106725 | 933 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 934 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 935 | */ |
Kojto | 122:f9eeca106725 | 936 | __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 937 | { |
Kojto | 122:f9eeca106725 | 938 | return (READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)); |
Kojto | 122:f9eeca106725 | 939 | } |
Kojto | 122:f9eeca106725 | 940 | |
Kojto | 122:f9eeca106725 | 941 | /** |
Kojto | 122:f9eeca106725 | 942 | * @brief Get CRC error flag |
Kojto | 122:f9eeca106725 | 943 | * @rmtoll SR CRCERR LL_SPI_IsActiveFlag_CRCERR |
Kojto | 122:f9eeca106725 | 944 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 945 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 946 | */ |
Kojto | 122:f9eeca106725 | 947 | __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 948 | { |
Kojto | 122:f9eeca106725 | 949 | return (READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR)); |
Kojto | 122:f9eeca106725 | 950 | } |
Kojto | 122:f9eeca106725 | 951 | |
Kojto | 122:f9eeca106725 | 952 | /** |
Kojto | 122:f9eeca106725 | 953 | * @brief Get mode fault error flag |
Kojto | 122:f9eeca106725 | 954 | * @rmtoll SR MODF LL_SPI_IsActiveFlag_MODF |
Kojto | 122:f9eeca106725 | 955 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 956 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 957 | */ |
Kojto | 122:f9eeca106725 | 958 | __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 959 | { |
Kojto | 122:f9eeca106725 | 960 | return (READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF)); |
Kojto | 122:f9eeca106725 | 961 | } |
Kojto | 122:f9eeca106725 | 962 | |
Kojto | 122:f9eeca106725 | 963 | /** |
Kojto | 122:f9eeca106725 | 964 | * @brief Get overrun error flag |
Kojto | 122:f9eeca106725 | 965 | * @rmtoll SR OVR LL_SPI_IsActiveFlag_OVR |
Kojto | 122:f9eeca106725 | 966 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 967 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 968 | */ |
Kojto | 122:f9eeca106725 | 969 | __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 970 | { |
Kojto | 122:f9eeca106725 | 971 | return (READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR)); |
Kojto | 122:f9eeca106725 | 972 | } |
Kojto | 122:f9eeca106725 | 973 | |
Kojto | 122:f9eeca106725 | 974 | /** |
Kojto | 122:f9eeca106725 | 975 | * @brief Get busy flag |
Kojto | 122:f9eeca106725 | 976 | * @note The BSY flag is cleared under any one of the following conditions: |
Kojto | 122:f9eeca106725 | 977 | * -When the SPI is correctly disabled |
Kojto | 122:f9eeca106725 | 978 | * -When a fault is detected in Master mode (MODF bit set to 1) |
Kojto | 122:f9eeca106725 | 979 | * -In Master mode, when it finishes a data transmission and no new data is ready to be |
Kojto | 122:f9eeca106725 | 980 | * sent |
Kojto | 122:f9eeca106725 | 981 | * -In Slave mode, when the BSY flag is set to '0' for at least one SPI clock cycle between |
Kojto | 122:f9eeca106725 | 982 | * each data transfer. |
Kojto | 122:f9eeca106725 | 983 | * @rmtoll SR BSY LL_SPI_IsActiveFlag_BSY |
Kojto | 122:f9eeca106725 | 984 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 985 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 986 | */ |
Kojto | 122:f9eeca106725 | 987 | __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 988 | { |
Kojto | 122:f9eeca106725 | 989 | return (READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY)); |
Kojto | 122:f9eeca106725 | 990 | } |
Kojto | 122:f9eeca106725 | 991 | |
Kojto | 122:f9eeca106725 | 992 | /** |
Kojto | 122:f9eeca106725 | 993 | * @brief Get frame format error flag |
Kojto | 122:f9eeca106725 | 994 | * @rmtoll SR FRE LL_SPI_IsActiveFlag_FRE |
Kojto | 122:f9eeca106725 | 995 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 996 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 997 | */ |
Kojto | 122:f9eeca106725 | 998 | __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 999 | { |
Kojto | 122:f9eeca106725 | 1000 | return (READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE)); |
Kojto | 122:f9eeca106725 | 1001 | } |
Kojto | 122:f9eeca106725 | 1002 | |
Kojto | 122:f9eeca106725 | 1003 | /** |
Kojto | 122:f9eeca106725 | 1004 | * @brief Get FIFO reception Level |
Kojto | 122:f9eeca106725 | 1005 | * @rmtoll SR FRLVL LL_SPI_GetRxFIFOLevel |
Kojto | 122:f9eeca106725 | 1006 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1007 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 1008 | * @arg @ref LL_SPI_RX_FIFO_EMPTY |
Kojto | 122:f9eeca106725 | 1009 | * @arg @ref LL_SPI_RX_FIFO_QUARTER_FULL |
Kojto | 122:f9eeca106725 | 1010 | * @arg @ref LL_SPI_RX_FIFO_HALF_FULL |
Kojto | 122:f9eeca106725 | 1011 | * @arg @ref LL_SPI_RX_FIFO_FULL |
Kojto | 122:f9eeca106725 | 1012 | */ |
Kojto | 122:f9eeca106725 | 1013 | __STATIC_INLINE uint32_t LL_SPI_GetRxFIFOLevel(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1014 | { |
Kojto | 122:f9eeca106725 | 1015 | return (uint32_t)(READ_BIT(SPIx->SR, SPI_SR_FRLVL)); |
Kojto | 122:f9eeca106725 | 1016 | } |
Kojto | 122:f9eeca106725 | 1017 | |
Kojto | 122:f9eeca106725 | 1018 | /** |
Kojto | 122:f9eeca106725 | 1019 | * @brief Get FIFO Transmission Level |
Kojto | 122:f9eeca106725 | 1020 | * @rmtoll SR FTLVL LL_SPI_GetTxFIFOLevel |
Kojto | 122:f9eeca106725 | 1021 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1022 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 1023 | * @arg @ref LL_SPI_TX_FIFO_EMPTY |
Kojto | 122:f9eeca106725 | 1024 | * @arg @ref LL_SPI_TX_FIFO_QUARTER_FULL |
Kojto | 122:f9eeca106725 | 1025 | * @arg @ref LL_SPI_TX_FIFO_HALF_FULL |
Kojto | 122:f9eeca106725 | 1026 | * @arg @ref LL_SPI_TX_FIFO_FULL |
Kojto | 122:f9eeca106725 | 1027 | */ |
Kojto | 122:f9eeca106725 | 1028 | __STATIC_INLINE uint32_t LL_SPI_GetTxFIFOLevel(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1029 | { |
Kojto | 122:f9eeca106725 | 1030 | return (uint32_t)(READ_BIT(SPIx->SR, SPI_SR_FTLVL)); |
Kojto | 122:f9eeca106725 | 1031 | } |
Kojto | 122:f9eeca106725 | 1032 | |
Kojto | 122:f9eeca106725 | 1033 | /** |
Kojto | 122:f9eeca106725 | 1034 | * @brief Clear CRC error flag |
Kojto | 122:f9eeca106725 | 1035 | * @rmtoll SR CRCERR LL_SPI_ClearFlag_CRCERR |
Kojto | 122:f9eeca106725 | 1036 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1037 | * @retval None |
Kojto | 122:f9eeca106725 | 1038 | */ |
Kojto | 122:f9eeca106725 | 1039 | __STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1040 | { |
Kojto | 122:f9eeca106725 | 1041 | CLEAR_BIT(SPIx->SR, SPI_SR_CRCERR); |
Kojto | 122:f9eeca106725 | 1042 | } |
Kojto | 122:f9eeca106725 | 1043 | |
Kojto | 122:f9eeca106725 | 1044 | /** |
Kojto | 122:f9eeca106725 | 1045 | * @brief Clear mode fault error flag |
Kojto | 122:f9eeca106725 | 1046 | * @note Clearing this flag is done by a read access to the SPIx_SR |
Kojto | 122:f9eeca106725 | 1047 | * register followed by a write access to the SPIx_CR1 register |
Kojto | 122:f9eeca106725 | 1048 | * @rmtoll SR MODF LL_SPI_ClearFlag_MODF |
Kojto | 122:f9eeca106725 | 1049 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1050 | * @retval None |
Kojto | 122:f9eeca106725 | 1051 | */ |
Kojto | 122:f9eeca106725 | 1052 | __STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1053 | { |
Kojto | 122:f9eeca106725 | 1054 | __IO uint32_t tmpreg; |
Kojto | 122:f9eeca106725 | 1055 | tmpreg = SPIx->SR; |
Kojto | 122:f9eeca106725 | 1056 | (void) tmpreg; |
Kojto | 122:f9eeca106725 | 1057 | tmpreg = CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE); |
Kojto | 122:f9eeca106725 | 1058 | (void) tmpreg; |
Kojto | 122:f9eeca106725 | 1059 | } |
Kojto | 122:f9eeca106725 | 1060 | |
Kojto | 122:f9eeca106725 | 1061 | /** |
Kojto | 122:f9eeca106725 | 1062 | * @brief Clear overrun error flag |
Kojto | 122:f9eeca106725 | 1063 | * @note Clearing this flag is done by a read access to the SPIx_DR |
Kojto | 122:f9eeca106725 | 1064 | * register followed by a read access to the SPIx_SR register |
Kojto | 122:f9eeca106725 | 1065 | * @rmtoll SR OVR LL_SPI_ClearFlag_OVR |
Kojto | 122:f9eeca106725 | 1066 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1067 | * @retval None |
Kojto | 122:f9eeca106725 | 1068 | */ |
Kojto | 122:f9eeca106725 | 1069 | __STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1070 | { |
Kojto | 122:f9eeca106725 | 1071 | __IO uint32_t tmpreg; |
Kojto | 122:f9eeca106725 | 1072 | tmpreg = SPIx->DR; |
Kojto | 122:f9eeca106725 | 1073 | (void) tmpreg; |
Kojto | 122:f9eeca106725 | 1074 | tmpreg = SPIx->SR; |
Kojto | 122:f9eeca106725 | 1075 | (void) tmpreg; |
Kojto | 122:f9eeca106725 | 1076 | } |
Kojto | 122:f9eeca106725 | 1077 | |
Kojto | 122:f9eeca106725 | 1078 | /** |
Kojto | 122:f9eeca106725 | 1079 | * @brief Clear frame format error flag |
Kojto | 122:f9eeca106725 | 1080 | * @note Clearing this flag is done by reading SPIx_SR register |
Kojto | 122:f9eeca106725 | 1081 | * @rmtoll SR FRE LL_SPI_ClearFlag_FRE |
Kojto | 122:f9eeca106725 | 1082 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1083 | * @retval None |
Kojto | 122:f9eeca106725 | 1084 | */ |
Kojto | 122:f9eeca106725 | 1085 | __STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1086 | { |
Kojto | 122:f9eeca106725 | 1087 | __IO uint32_t tmpreg; |
Kojto | 122:f9eeca106725 | 1088 | tmpreg = SPIx->SR; |
Kojto | 122:f9eeca106725 | 1089 | (void) tmpreg; |
Kojto | 122:f9eeca106725 | 1090 | } |
Kojto | 122:f9eeca106725 | 1091 | |
Kojto | 122:f9eeca106725 | 1092 | /** |
Kojto | 122:f9eeca106725 | 1093 | * @} |
Kojto | 122:f9eeca106725 | 1094 | */ |
Kojto | 122:f9eeca106725 | 1095 | |
Kojto | 122:f9eeca106725 | 1096 | /** @defgroup SPI_LL_EF_IT_Management Interrupt Management |
Kojto | 122:f9eeca106725 | 1097 | * @{ |
Kojto | 122:f9eeca106725 | 1098 | */ |
Kojto | 122:f9eeca106725 | 1099 | |
Kojto | 122:f9eeca106725 | 1100 | /** |
Kojto | 122:f9eeca106725 | 1101 | * @brief Enable error interrupt |
Kojto | 122:f9eeca106725 | 1102 | * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). |
Kojto | 122:f9eeca106725 | 1103 | * @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR |
Kojto | 122:f9eeca106725 | 1104 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1105 | * @retval None |
Kojto | 122:f9eeca106725 | 1106 | */ |
Kojto | 122:f9eeca106725 | 1107 | __STATIC_INLINE void LL_SPI_EnableIT_ERR(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1108 | { |
Kojto | 122:f9eeca106725 | 1109 | SET_BIT(SPIx->CR2, SPI_CR2_ERRIE); |
Kojto | 122:f9eeca106725 | 1110 | } |
Kojto | 122:f9eeca106725 | 1111 | |
Kojto | 122:f9eeca106725 | 1112 | /** |
Kojto | 122:f9eeca106725 | 1113 | * @brief Enable Rx buffer not empty interrupt |
Kojto | 122:f9eeca106725 | 1114 | * @rmtoll CR2 RXNEIE LL_SPI_EnableIT_RXNE |
Kojto | 122:f9eeca106725 | 1115 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1116 | * @retval None |
Kojto | 122:f9eeca106725 | 1117 | */ |
Kojto | 122:f9eeca106725 | 1118 | __STATIC_INLINE void LL_SPI_EnableIT_RXNE(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1119 | { |
Kojto | 122:f9eeca106725 | 1120 | SET_BIT(SPIx->CR2, SPI_CR2_RXNEIE); |
Kojto | 122:f9eeca106725 | 1121 | } |
Kojto | 122:f9eeca106725 | 1122 | |
Kojto | 122:f9eeca106725 | 1123 | /** |
Kojto | 122:f9eeca106725 | 1124 | * @brief Enable Tx buffer empty interrupt |
Kojto | 122:f9eeca106725 | 1125 | * @rmtoll CR2 TXEIE LL_SPI_EnableIT_TXE |
Kojto | 122:f9eeca106725 | 1126 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1127 | * @retval None |
Kojto | 122:f9eeca106725 | 1128 | */ |
Kojto | 122:f9eeca106725 | 1129 | __STATIC_INLINE void LL_SPI_EnableIT_TXE(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1130 | { |
Kojto | 122:f9eeca106725 | 1131 | SET_BIT(SPIx->CR2, SPI_CR2_TXEIE); |
Kojto | 122:f9eeca106725 | 1132 | } |
Kojto | 122:f9eeca106725 | 1133 | |
Kojto | 122:f9eeca106725 | 1134 | /** |
Kojto | 122:f9eeca106725 | 1135 | * @brief Disable error interrupt |
Kojto | 122:f9eeca106725 | 1136 | * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). |
Kojto | 122:f9eeca106725 | 1137 | * @rmtoll CR2 ERRIE LL_SPI_DisableIT_ERR |
Kojto | 122:f9eeca106725 | 1138 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1139 | * @retval None |
Kojto | 122:f9eeca106725 | 1140 | */ |
Kojto | 122:f9eeca106725 | 1141 | __STATIC_INLINE void LL_SPI_DisableIT_ERR(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1142 | { |
Kojto | 122:f9eeca106725 | 1143 | CLEAR_BIT(SPIx->CR2, SPI_CR2_ERRIE); |
Kojto | 122:f9eeca106725 | 1144 | } |
Kojto | 122:f9eeca106725 | 1145 | |
Kojto | 122:f9eeca106725 | 1146 | /** |
Kojto | 122:f9eeca106725 | 1147 | * @brief Disable Rx buffer not empty interrupt |
Kojto | 122:f9eeca106725 | 1148 | * @rmtoll CR2 RXNEIE LL_SPI_DisableIT_RXNE |
Kojto | 122:f9eeca106725 | 1149 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1150 | * @retval None |
Kojto | 122:f9eeca106725 | 1151 | */ |
Kojto | 122:f9eeca106725 | 1152 | __STATIC_INLINE void LL_SPI_DisableIT_RXNE(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1153 | { |
Kojto | 122:f9eeca106725 | 1154 | CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE); |
Kojto | 122:f9eeca106725 | 1155 | } |
Kojto | 122:f9eeca106725 | 1156 | |
Kojto | 122:f9eeca106725 | 1157 | /** |
Kojto | 122:f9eeca106725 | 1158 | * @brief Disable Tx buffer empty interrupt |
Kojto | 122:f9eeca106725 | 1159 | * @rmtoll CR2 TXEIE LL_SPI_DisableIT_TXE |
Kojto | 122:f9eeca106725 | 1160 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1161 | * @retval None |
Kojto | 122:f9eeca106725 | 1162 | */ |
Kojto | 122:f9eeca106725 | 1163 | __STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1164 | { |
Kojto | 122:f9eeca106725 | 1165 | CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE); |
Kojto | 122:f9eeca106725 | 1166 | } |
Kojto | 122:f9eeca106725 | 1167 | |
Kojto | 122:f9eeca106725 | 1168 | /** |
Kojto | 122:f9eeca106725 | 1169 | * @brief Check if error interrupt is enabled |
Kojto | 122:f9eeca106725 | 1170 | * @rmtoll CR2 ERRIE LL_SPI_IsEnabledIT_ERR |
Kojto | 122:f9eeca106725 | 1171 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1172 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 1173 | */ |
Kojto | 122:f9eeca106725 | 1174 | __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1175 | { |
Kojto | 122:f9eeca106725 | 1176 | return (READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE)); |
Kojto | 122:f9eeca106725 | 1177 | } |
Kojto | 122:f9eeca106725 | 1178 | |
Kojto | 122:f9eeca106725 | 1179 | /** |
Kojto | 122:f9eeca106725 | 1180 | * @brief Check if Rx buffer not empty interrupt is enabled |
Kojto | 122:f9eeca106725 | 1181 | * @rmtoll CR2 RXNEIE LL_SPI_IsEnabledIT_RXNE |
Kojto | 122:f9eeca106725 | 1182 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1183 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 1184 | */ |
Kojto | 122:f9eeca106725 | 1185 | __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1186 | { |
Kojto | 122:f9eeca106725 | 1187 | return (READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE)); |
Kojto | 122:f9eeca106725 | 1188 | } |
Kojto | 122:f9eeca106725 | 1189 | |
Kojto | 122:f9eeca106725 | 1190 | /** |
Kojto | 122:f9eeca106725 | 1191 | * @brief Check if Tx buffer empty interrupt |
Kojto | 122:f9eeca106725 | 1192 | * @rmtoll CR2 TXEIE LL_SPI_IsEnabledIT_TXE |
Kojto | 122:f9eeca106725 | 1193 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1194 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 1195 | */ |
Kojto | 122:f9eeca106725 | 1196 | __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1197 | { |
Kojto | 122:f9eeca106725 | 1198 | return (READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE)); |
Kojto | 122:f9eeca106725 | 1199 | } |
Kojto | 122:f9eeca106725 | 1200 | |
Kojto | 122:f9eeca106725 | 1201 | /** |
Kojto | 122:f9eeca106725 | 1202 | * @} |
Kojto | 122:f9eeca106725 | 1203 | */ |
Kojto | 122:f9eeca106725 | 1204 | |
Kojto | 122:f9eeca106725 | 1205 | /** @defgroup SPI_LL_EF_DMA_Management DMA Management |
Kojto | 122:f9eeca106725 | 1206 | * @{ |
Kojto | 122:f9eeca106725 | 1207 | */ |
Kojto | 122:f9eeca106725 | 1208 | |
Kojto | 122:f9eeca106725 | 1209 | /** |
Kojto | 122:f9eeca106725 | 1210 | * @brief Enable DMA Rx |
Kojto | 122:f9eeca106725 | 1211 | * @rmtoll CR2 RXDMAEN LL_SPI_EnableDMAReq_RX |
Kojto | 122:f9eeca106725 | 1212 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1213 | * @retval None |
Kojto | 122:f9eeca106725 | 1214 | */ |
Kojto | 122:f9eeca106725 | 1215 | __STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1216 | { |
Kojto | 122:f9eeca106725 | 1217 | SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN); |
Kojto | 122:f9eeca106725 | 1218 | } |
Kojto | 122:f9eeca106725 | 1219 | |
Kojto | 122:f9eeca106725 | 1220 | /** |
Kojto | 122:f9eeca106725 | 1221 | * @brief Disable DMA Rx |
Kojto | 122:f9eeca106725 | 1222 | * @rmtoll CR2 RXDMAEN LL_SPI_DisableDMAReq_RX |
Kojto | 122:f9eeca106725 | 1223 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1224 | * @retval None |
Kojto | 122:f9eeca106725 | 1225 | */ |
Kojto | 122:f9eeca106725 | 1226 | __STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1227 | { |
Kojto | 122:f9eeca106725 | 1228 | CLEAR_BIT(SPIx->CR2, SPI_CR2_RXDMAEN); |
Kojto | 122:f9eeca106725 | 1229 | } |
Kojto | 122:f9eeca106725 | 1230 | |
Kojto | 122:f9eeca106725 | 1231 | /** |
Kojto | 122:f9eeca106725 | 1232 | * @brief Check if DMA Rx is enabled |
Kojto | 122:f9eeca106725 | 1233 | * @rmtoll CR2 RXDMAEN LL_SPI_IsEnabledDMAReq_RX |
Kojto | 122:f9eeca106725 | 1234 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1235 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 1236 | */ |
Kojto | 122:f9eeca106725 | 1237 | __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1238 | { |
Kojto | 122:f9eeca106725 | 1239 | return (READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN)); |
Kojto | 122:f9eeca106725 | 1240 | } |
Kojto | 122:f9eeca106725 | 1241 | |
Kojto | 122:f9eeca106725 | 1242 | /** |
Kojto | 122:f9eeca106725 | 1243 | * @brief Enable DMA Tx |
Kojto | 122:f9eeca106725 | 1244 | * @rmtoll CR2 TXDMAEN LL_SPI_EnableDMAReq_TX |
Kojto | 122:f9eeca106725 | 1245 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1246 | * @retval None |
Kojto | 122:f9eeca106725 | 1247 | */ |
Kojto | 122:f9eeca106725 | 1248 | __STATIC_INLINE void LL_SPI_EnableDMAReq_TX(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1249 | { |
Kojto | 122:f9eeca106725 | 1250 | SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN); |
Kojto | 122:f9eeca106725 | 1251 | } |
Kojto | 122:f9eeca106725 | 1252 | |
Kojto | 122:f9eeca106725 | 1253 | /** |
Kojto | 122:f9eeca106725 | 1254 | * @brief Disable DMA Tx |
Kojto | 122:f9eeca106725 | 1255 | * @rmtoll CR2 TXDMAEN LL_SPI_DisableDMAReq_TX |
Kojto | 122:f9eeca106725 | 1256 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1257 | * @retval None |
Kojto | 122:f9eeca106725 | 1258 | */ |
Kojto | 122:f9eeca106725 | 1259 | __STATIC_INLINE void LL_SPI_DisableDMAReq_TX(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1260 | { |
Kojto | 122:f9eeca106725 | 1261 | CLEAR_BIT(SPIx->CR2, SPI_CR2_TXDMAEN); |
Kojto | 122:f9eeca106725 | 1262 | } |
Kojto | 122:f9eeca106725 | 1263 | |
Kojto | 122:f9eeca106725 | 1264 | /** |
Kojto | 122:f9eeca106725 | 1265 | * @brief Check if DMA Tx is enabled |
Kojto | 122:f9eeca106725 | 1266 | * @rmtoll CR2 TXDMAEN LL_SPI_IsEnabledDMAReq_TX |
Kojto | 122:f9eeca106725 | 1267 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1268 | * @retval State of bit (1 or 0). |
Kojto | 122:f9eeca106725 | 1269 | */ |
Kojto | 122:f9eeca106725 | 1270 | __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1271 | { |
Kojto | 122:f9eeca106725 | 1272 | return (READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)); |
Kojto | 122:f9eeca106725 | 1273 | } |
Kojto | 122:f9eeca106725 | 1274 | |
Kojto | 122:f9eeca106725 | 1275 | /** |
Kojto | 122:f9eeca106725 | 1276 | * @brief Set parity of Last DMA reception |
Kojto | 122:f9eeca106725 | 1277 | * @rmtoll CR2 LDMARX LL_SPI_SetDMAParity_RX |
Kojto | 122:f9eeca106725 | 1278 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1279 | * @param Parity This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 1280 | * @arg @ref LL_SPI_DMA_PARITY_ODD |
Kojto | 122:f9eeca106725 | 1281 | * @arg @ref LL_SPI_DMA_PARITY_EVEN |
Kojto | 122:f9eeca106725 | 1282 | * @retval None |
Kojto | 122:f9eeca106725 | 1283 | */ |
Kojto | 122:f9eeca106725 | 1284 | __STATIC_INLINE void LL_SPI_SetDMAParity_RX(SPI_TypeDef *SPIx, uint32_t Parity) |
Kojto | 122:f9eeca106725 | 1285 | { |
Kojto | 122:f9eeca106725 | 1286 | MODIFY_REG(SPIx->CR2, SPI_CR2_LDMARX, (Parity << POSITION_VAL(SPI_CR2_LDMARX))); |
Kojto | 122:f9eeca106725 | 1287 | } |
Kojto | 122:f9eeca106725 | 1288 | |
Kojto | 122:f9eeca106725 | 1289 | /** |
Kojto | 122:f9eeca106725 | 1290 | * @brief Get parity configuration for Last DMA reception |
Kojto | 122:f9eeca106725 | 1291 | * @rmtoll CR2 LDMARX LL_SPI_GetDMAParity_RX |
Kojto | 122:f9eeca106725 | 1292 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1293 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 1294 | * @arg @ref LL_SPI_DMA_PARITY_ODD |
Kojto | 122:f9eeca106725 | 1295 | * @arg @ref LL_SPI_DMA_PARITY_EVEN |
Kojto | 122:f9eeca106725 | 1296 | */ |
Kojto | 122:f9eeca106725 | 1297 | __STATIC_INLINE uint32_t LL_SPI_GetDMAParity_RX(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1298 | { |
Kojto | 122:f9eeca106725 | 1299 | return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMARX) >> POSITION_VAL(SPI_CR2_LDMARX)); |
Kojto | 122:f9eeca106725 | 1300 | } |
Kojto | 122:f9eeca106725 | 1301 | |
Kojto | 122:f9eeca106725 | 1302 | /** |
Kojto | 122:f9eeca106725 | 1303 | * @brief Set parity of Last DMA transmission |
Kojto | 122:f9eeca106725 | 1304 | * @rmtoll CR2 LDMATX LL_SPI_SetDMAParity_TX |
Kojto | 122:f9eeca106725 | 1305 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1306 | * @param Parity This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 1307 | * @arg @ref LL_SPI_DMA_PARITY_ODD |
Kojto | 122:f9eeca106725 | 1308 | * @arg @ref LL_SPI_DMA_PARITY_EVEN |
Kojto | 122:f9eeca106725 | 1309 | * @retval None |
Kojto | 122:f9eeca106725 | 1310 | */ |
Kojto | 122:f9eeca106725 | 1311 | __STATIC_INLINE void LL_SPI_SetDMAParity_TX(SPI_TypeDef *SPIx, uint32_t Parity) |
Kojto | 122:f9eeca106725 | 1312 | { |
Kojto | 122:f9eeca106725 | 1313 | MODIFY_REG(SPIx->CR2, SPI_CR2_LDMATX, (Parity << POSITION_VAL(SPI_CR2_LDMATX))); |
Kojto | 122:f9eeca106725 | 1314 | } |
Kojto | 122:f9eeca106725 | 1315 | |
Kojto | 122:f9eeca106725 | 1316 | /** |
Kojto | 122:f9eeca106725 | 1317 | * @brief Get parity configuration for Last DMA transmission |
Kojto | 122:f9eeca106725 | 1318 | * @rmtoll CR2 LDMATX LL_SPI_GetDMAParity_TX |
Kojto | 122:f9eeca106725 | 1319 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1320 | * @retval Returned value can be one of the following values: |
Kojto | 122:f9eeca106725 | 1321 | * @arg @ref LL_SPI_DMA_PARITY_ODD |
Kojto | 122:f9eeca106725 | 1322 | * @arg @ref LL_SPI_DMA_PARITY_EVEN |
Kojto | 122:f9eeca106725 | 1323 | */ |
Kojto | 122:f9eeca106725 | 1324 | __STATIC_INLINE uint32_t LL_SPI_GetDMAParity_TX(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1325 | { |
Kojto | 122:f9eeca106725 | 1326 | return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMATX) >> POSITION_VAL(SPI_CR2_LDMATX)); |
Kojto | 122:f9eeca106725 | 1327 | } |
Kojto | 122:f9eeca106725 | 1328 | |
Kojto | 122:f9eeca106725 | 1329 | /** |
Kojto | 122:f9eeca106725 | 1330 | * @brief Get the data register address used for DMA transfer |
Kojto | 122:f9eeca106725 | 1331 | * @rmtoll DR DR LL_SPI_DMA_GetRegAddr |
Kojto | 122:f9eeca106725 | 1332 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1333 | * @retval Address of data register |
Kojto | 122:f9eeca106725 | 1334 | */ |
Kojto | 122:f9eeca106725 | 1335 | __STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1336 | { |
Kojto | 122:f9eeca106725 | 1337 | return (uint32_t) & (SPIx->DR); |
Kojto | 122:f9eeca106725 | 1338 | } |
Kojto | 122:f9eeca106725 | 1339 | |
Kojto | 122:f9eeca106725 | 1340 | /** |
Kojto | 122:f9eeca106725 | 1341 | * @} |
Kojto | 122:f9eeca106725 | 1342 | */ |
Kojto | 122:f9eeca106725 | 1343 | |
Kojto | 122:f9eeca106725 | 1344 | /** @defgroup SPI_LL_EF_DATA_Management DATA Management |
Kojto | 122:f9eeca106725 | 1345 | * @{ |
Kojto | 122:f9eeca106725 | 1346 | */ |
Kojto | 122:f9eeca106725 | 1347 | |
Kojto | 122:f9eeca106725 | 1348 | /** |
Kojto | 122:f9eeca106725 | 1349 | * @brief Read 8-Bits in the data register |
Kojto | 122:f9eeca106725 | 1350 | * @rmtoll DR DR LL_SPI_ReceiveData8 |
Kojto | 122:f9eeca106725 | 1351 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1352 | * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFF |
Kojto | 122:f9eeca106725 | 1353 | */ |
Kojto | 122:f9eeca106725 | 1354 | __STATIC_INLINE uint8_t LL_SPI_ReceiveData8(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1355 | { |
Kojto | 122:f9eeca106725 | 1356 | return (uint8_t)(READ_REG(SPIx->DR)); |
Kojto | 122:f9eeca106725 | 1357 | } |
Kojto | 122:f9eeca106725 | 1358 | |
Kojto | 122:f9eeca106725 | 1359 | /** |
Kojto | 122:f9eeca106725 | 1360 | * @brief Read 16-Bits in the data register |
Kojto | 122:f9eeca106725 | 1361 | * @rmtoll DR DR LL_SPI_ReceiveData16 |
Kojto | 122:f9eeca106725 | 1362 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1363 | * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFFFF |
Kojto | 122:f9eeca106725 | 1364 | */ |
Kojto | 122:f9eeca106725 | 1365 | __STATIC_INLINE uint16_t LL_SPI_ReceiveData16(SPI_TypeDef *SPIx) |
Kojto | 122:f9eeca106725 | 1366 | { |
Kojto | 122:f9eeca106725 | 1367 | return (uint16_t)(READ_REG(SPIx->DR)); |
Kojto | 122:f9eeca106725 | 1368 | } |
Kojto | 122:f9eeca106725 | 1369 | |
Kojto | 122:f9eeca106725 | 1370 | /** |
Kojto | 122:f9eeca106725 | 1371 | * @brief Write 8-Bits in the data register |
Kojto | 122:f9eeca106725 | 1372 | * @rmtoll DR DR LL_SPI_TransmitData8 |
Kojto | 122:f9eeca106725 | 1373 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1374 | * @param TxData Value between Min_Data=0x00 and Max_Data=0xFF |
Kojto | 122:f9eeca106725 | 1375 | * @retval None |
Kojto | 122:f9eeca106725 | 1376 | */ |
Kojto | 122:f9eeca106725 | 1377 | __STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData) |
Kojto | 122:f9eeca106725 | 1378 | { |
Kojto | 122:f9eeca106725 | 1379 | *((__IO uint8_t *)&SPIx->DR) = TxData; |
Kojto | 122:f9eeca106725 | 1380 | } |
Kojto | 122:f9eeca106725 | 1381 | |
Kojto | 122:f9eeca106725 | 1382 | /** |
Kojto | 122:f9eeca106725 | 1383 | * @brief Write 16-Bits in the data register |
Kojto | 122:f9eeca106725 | 1384 | * @rmtoll DR DR LL_SPI_TransmitData16 |
Kojto | 122:f9eeca106725 | 1385 | * @param SPIx SPI Instance |
Kojto | 122:f9eeca106725 | 1386 | * @param TxData Value between Min_Data=0x00 and Max_Data=0xFFFF |
Kojto | 122:f9eeca106725 | 1387 | * @retval None |
Kojto | 122:f9eeca106725 | 1388 | */ |
Kojto | 122:f9eeca106725 | 1389 | __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) |
Kojto | 122:f9eeca106725 | 1390 | { |
Kojto | 122:f9eeca106725 | 1391 | *((__IO uint16_t *)&SPIx->DR) = TxData; |
Kojto | 122:f9eeca106725 | 1392 | } |
Kojto | 122:f9eeca106725 | 1393 | |
Kojto | 122:f9eeca106725 | 1394 | /** |
Kojto | 122:f9eeca106725 | 1395 | * @} |
Kojto | 122:f9eeca106725 | 1396 | */ |
Kojto | 122:f9eeca106725 | 1397 | #if defined(USE_FULL_LL_DRIVER) |
Kojto | 122:f9eeca106725 | 1398 | /** @defgroup SPI_LL_EF_Init Initialization and de-initialization functions |
Kojto | 122:f9eeca106725 | 1399 | * @{ |
Kojto | 122:f9eeca106725 | 1400 | */ |
Kojto | 122:f9eeca106725 | 1401 | |
Kojto | 122:f9eeca106725 | 1402 | ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx); |
Kojto | 122:f9eeca106725 | 1403 | ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct); |
Kojto | 122:f9eeca106725 | 1404 | void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct); |
Kojto | 122:f9eeca106725 | 1405 | |
Kojto | 122:f9eeca106725 | 1406 | /** |
Kojto | 122:f9eeca106725 | 1407 | * @} |
Kojto | 122:f9eeca106725 | 1408 | */ |
Kojto | 122:f9eeca106725 | 1409 | #endif /* USE_FULL_LL_DRIVER */ |
Kojto | 122:f9eeca106725 | 1410 | /** |
Kojto | 122:f9eeca106725 | 1411 | * @} |
Kojto | 122:f9eeca106725 | 1412 | */ |
Kojto | 122:f9eeca106725 | 1413 | |
Kojto | 122:f9eeca106725 | 1414 | /** |
Kojto | 122:f9eeca106725 | 1415 | * @} |
Kojto | 122:f9eeca106725 | 1416 | */ |
Kojto | 122:f9eeca106725 | 1417 | |
Kojto | 122:f9eeca106725 | 1418 | #endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) */ |
Kojto | 122:f9eeca106725 | 1419 | |
Kojto | 122:f9eeca106725 | 1420 | /** |
Kojto | 122:f9eeca106725 | 1421 | * @} |
Kojto | 122:f9eeca106725 | 1422 | */ |
Kojto | 122:f9eeca106725 | 1423 | |
Kojto | 122:f9eeca106725 | 1424 | #ifdef __cplusplus |
Kojto | 122:f9eeca106725 | 1425 | } |
Kojto | 122:f9eeca106725 | 1426 | #endif |
Kojto | 122:f9eeca106725 | 1427 | |
Kojto | 122:f9eeca106725 | 1428 | #endif /* __STM32L4xx_LL_SPI_H */ |
Kojto | 122:f9eeca106725 | 1429 | |
Kojto | 122:f9eeca106725 | 1430 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |