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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_L486RG/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_lpuart.h@140:97feb9bacc10, 2017-04-12 (annotated)

Committer:
<>
Date:
Wed Apr 12 16:07:08 2017 +0100
Revision:
140:97feb9bacc10
Parent:
128:9bcdf88f62b0
Child:
145:64910690c574
Release 140 of the mbed library



Ports for Upcoming Targets



3841: Add nRf52840 target https://github.com/ARMmbed/mbed-os/pull/3841

3992: Introducing UBLOX_C030 platform. https://github.com/ARMmbed/mbed-os/pull/3992



Fixes and Changes



3951: [NUCLEO_F303ZE] Correct ARDUINO pin https://github.com/ARMmbed/mbed-os/pull/3951

4021: Fixing a macro to detect when RTOS was in use for the NRF52840_DK https://github.com/ARMmbed/mbed-os/pull/4021

3979: KW24D: Add missing SPI defines and Arduino connector definitions https://github.com/ARMmbed/mbed-os/pull/3979

3990: UBLOX_C027: construct a ticker-based wait, rather than calling wait_ms(), in the  https://github.com/ARMmbed/mbed-os/pull/3990

4003: Fixed OBOE in async serial tx for NRF52 target, fixes #4002 https://github.com/ARMmbed/mbed-os/pull/4003

4012: STM32: Correct I2C master error handling https://github.com/ARMmbed/mbed-os/pull/4012

4020: NUCLEO_L011K4 remove unsupported tool chain files https://github.com/ARMmbed/mbed-os/pull/4020

4065: K66F: Move bss section to m_data_2 Section https://github.com/ARMmbed/mbed-os/pull/4065

4014: Issue 3763: Reduce heap allocation in the GCC linker file https://github.com/ARMmbed/mbed-os/pull/4014

4030: [STM32L0] reduce IAR heap and stack size for small targets https://github.com/ARMmbed/mbed-os/pull/4030

4109: NUCLEO_L476RG : minor serial pin update https://github.com/ARMmbed/mbed-os/pull/4109

3982: Ticker - kl25z bugfix for handling events in the past https://github.com/ARMmbed/mbed-os/pull/3982

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 122:f9eeca106725 1 /**
Kojto 122:f9eeca106725 2 ******************************************************************************
Kojto 122:f9eeca106725 3 * @file stm32l4xx_ll_lpuart.h
Kojto 122:f9eeca106725 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.1
Kojto 122:f9eeca106725 6 * @date 31-May-2016
Kojto 122:f9eeca106725 7 * @brief Header file of LPUART LL module.
Kojto 122:f9eeca106725 8 ******************************************************************************
Kojto 122:f9eeca106725 9 * @attention
Kojto 122:f9eeca106725 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 122:f9eeca106725 12 *
Kojto 122:f9eeca106725 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 122:f9eeca106725 14 * are permitted provided that the following conditions are met:
Kojto 122:f9eeca106725 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 122:f9eeca106725 16 * this list of conditions and the following disclaimer.
Kojto 122:f9eeca106725 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 122:f9eeca106725 18 * this list of conditions and the following disclaimer in the documentation
Kojto 122:f9eeca106725 19 * and/or other materials provided with the distribution.
Kojto 122:f9eeca106725 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 122:f9eeca106725 21 * may be used to endorse or promote products derived from this software
Kojto 122:f9eeca106725 22 * without specific prior written permission.
Kojto 122:f9eeca106725 23 *
Kojto 122:f9eeca106725 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 122:f9eeca106725 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 122:f9eeca106725 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 122:f9eeca106725 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 122:f9eeca106725 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 122:f9eeca106725 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 122:f9eeca106725 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 122:f9eeca106725 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 122:f9eeca106725 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 122:f9eeca106725 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 122:f9eeca106725 34 *
Kojto 122:f9eeca106725 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
Kojto 122:f9eeca106725 37
Kojto 122:f9eeca106725 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 122:f9eeca106725 39 #ifndef __STM32L4xx_LL_LPUART_H
Kojto 122:f9eeca106725 40 #define __STM32L4xx_LL_LPUART_H
Kojto 122:f9eeca106725 41
Kojto 122:f9eeca106725 42 #ifdef __cplusplus
Kojto 122:f9eeca106725 43 extern "C" {
Kojto 122:f9eeca106725 44 #endif
Kojto 122:f9eeca106725 45
Kojto 122:f9eeca106725 46 /* Includes ------------------------------------------------------------------*/
Kojto 122:f9eeca106725 47 #include "stm32l4xx.h"
Kojto 122:f9eeca106725 48
Kojto 122:f9eeca106725 49 /** @addtogroup STM32L4xx_LL_Driver
Kojto 122:f9eeca106725 50 * @{
Kojto 122:f9eeca106725 51 */
Kojto 122:f9eeca106725 52
Kojto 122:f9eeca106725 53 #if defined (LPUART1)
Kojto 122:f9eeca106725 54
Kojto 122:f9eeca106725 55 /** @defgroup LPUART_LL LPUART
Kojto 122:f9eeca106725 56 * @{
Kojto 122:f9eeca106725 57 */
Kojto 122:f9eeca106725 58
Kojto 122:f9eeca106725 59 /* Private types -------------------------------------------------------------*/
Kojto 122:f9eeca106725 60 /* Private variables ---------------------------------------------------------*/
Kojto 122:f9eeca106725 61
Kojto 122:f9eeca106725 62 /* Private constants ---------------------------------------------------------*/
Kojto 122:f9eeca106725 63 /** @defgroup LPUART_LL_Private_Constants LPUART Private Constants
Kojto 122:f9eeca106725 64 * @{
Kojto 122:f9eeca106725 65 */
Kojto 122:f9eeca106725 66
Kojto 122:f9eeca106725 67 /* Defines used for the bit position in the register and perform offsets*/
Kojto 122:f9eeca106725 68 #define LPUART_POSITION_CR1_DEDT (uint32_t)POSITION_VAL(USART_CR1_DEDT)
Kojto 122:f9eeca106725 69 #define LPUART_POSITION_CR1_DEAT (uint32_t)POSITION_VAL(USART_CR1_DEAT)
Kojto 122:f9eeca106725 70 #define LPUART_POSITION_CR2_ADD (uint32_t)POSITION_VAL(USART_CR2_ADD)
Kojto 122:f9eeca106725 71
Kojto 122:f9eeca106725 72 /* Defines used in Baud Rate related macros and corresponding register setting computation */
Kojto 122:f9eeca106725 73 #define LPUART_LPUARTDIV_FREQ_MUL (uint32_t)(256U)
Kojto 122:f9eeca106725 74 #define LPUART_BRR_MASK (uint32_t)(0x000FFFFFU)
Kojto 122:f9eeca106725 75 #define LPUART_BRR_MIN_VALUE (uint32_t)(0x00000300U)
Kojto 122:f9eeca106725 76 /**
Kojto 122:f9eeca106725 77 * @}
Kojto 122:f9eeca106725 78 */
Kojto 122:f9eeca106725 79
Kojto 122:f9eeca106725 80
Kojto 122:f9eeca106725 81 /* Private macros ------------------------------------------------------------*/
Kojto 122:f9eeca106725 82 #if defined(USE_FULL_LL_DRIVER)
Kojto 122:f9eeca106725 83 /** @defgroup LPUART_LL_Private_Macros LPUART Private Macros
Kojto 122:f9eeca106725 84 * @{
Kojto 122:f9eeca106725 85 */
Kojto 122:f9eeca106725 86 /**
Kojto 122:f9eeca106725 87 * @}
Kojto 122:f9eeca106725 88 */
Kojto 122:f9eeca106725 89 #endif /*USE_FULL_LL_DRIVER*/
Kojto 122:f9eeca106725 90
Kojto 122:f9eeca106725 91 /* Exported types ------------------------------------------------------------*/
Kojto 122:f9eeca106725 92 #if defined(USE_FULL_LL_DRIVER)
Kojto 122:f9eeca106725 93 /** @defgroup LPUART_LL_ES_INIT LPUART Exported Init structures
Kojto 122:f9eeca106725 94 * @{
Kojto 122:f9eeca106725 95 */
Kojto 122:f9eeca106725 96
Kojto 122:f9eeca106725 97 /**
Kojto 122:f9eeca106725 98 * @brief LL LPUART Init Structure definition
Kojto 122:f9eeca106725 99 */
Kojto 122:f9eeca106725 100 typedef struct
Kojto 122:f9eeca106725 101 {
Kojto 122:f9eeca106725 102 uint32_t BaudRate; /*!< This field defines expected LPUART communication baud rate.
Kojto 122:f9eeca106725 103
Kojto 122:f9eeca106725 104 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetBaudRate().*/
Kojto 122:f9eeca106725 105
Kojto 122:f9eeca106725 106 uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
Kojto 122:f9eeca106725 107 This parameter can be a value of @ref LPUART_LL_EC_DATAWIDTH.
Kojto 122:f9eeca106725 108
Kojto 122:f9eeca106725 109 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetDataWidth().*/
Kojto 122:f9eeca106725 110
Kojto 122:f9eeca106725 111 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
Kojto 122:f9eeca106725 112 This parameter can be a value of @ref LPUART_LL_EC_STOPBITS.
Kojto 122:f9eeca106725 113
Kojto 122:f9eeca106725 114 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetStopBitsLength().*/
Kojto 122:f9eeca106725 115
Kojto 122:f9eeca106725 116 uint32_t Parity; /*!< Specifies the parity mode.
Kojto 122:f9eeca106725 117 This parameter can be a value of @ref LPUART_LL_EC_PARITY.
Kojto 122:f9eeca106725 118
Kojto 122:f9eeca106725 119 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetParity().*/
Kojto 122:f9eeca106725 120
Kojto 122:f9eeca106725 121 uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
Kojto 122:f9eeca106725 122 This parameter can be a value of @ref LPUART_LL_EC_DIRECTION.
Kojto 122:f9eeca106725 123
Kojto 122:f9eeca106725 124 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetTransferDirection().*/
Kojto 122:f9eeca106725 125
Kojto 122:f9eeca106725 126 uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
Kojto 122:f9eeca106725 127 This parameter can be a value of @ref LPUART_LL_EC_HWCONTROL.
Kojto 122:f9eeca106725 128
Kojto 122:f9eeca106725 129 This feature can be modified afterwards using unitary function @ref LL_LPUART_SetHWFlowCtrl().*/
Kojto 122:f9eeca106725 130
Kojto 122:f9eeca106725 131 } LL_LPUART_InitTypeDef;
Kojto 122:f9eeca106725 132
Kojto 122:f9eeca106725 133 /**
Kojto 122:f9eeca106725 134 * @}
Kojto 122:f9eeca106725 135 */
Kojto 122:f9eeca106725 136 #endif /* USE_FULL_LL_DRIVER */
Kojto 122:f9eeca106725 137
Kojto 122:f9eeca106725 138 /* Exported constants --------------------------------------------------------*/
Kojto 122:f9eeca106725 139 /** @defgroup LPUART_LL_Exported_Constants LPUART Exported Constants
Kojto 122:f9eeca106725 140 * @{
Kojto 122:f9eeca106725 141 */
Kojto 122:f9eeca106725 142
Kojto 122:f9eeca106725 143 /** @defgroup LPUART_LL_EC_CLEAR_FLAG Clear Flags Defines
Kojto 122:f9eeca106725 144 * @brief Flags defines which can be used with LL_LPUART_WriteReg function
Kojto 122:f9eeca106725 145 * @{
Kojto 122:f9eeca106725 146 */
Kojto 122:f9eeca106725 147 #define LL_LPUART_ICR_PECF USART_ICR_PECF /*!< Parity error flag */
Kojto 122:f9eeca106725 148 #define LL_LPUART_ICR_FECF USART_ICR_FECF /*!< Framing error flag */
Kojto 122:f9eeca106725 149 #define LL_LPUART_ICR_NCF USART_ICR_NCF /*!< Noise detected flag */
Kojto 122:f9eeca106725 150 #define LL_LPUART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error flag */
Kojto 122:f9eeca106725 151 #define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected flag */
Kojto 122:f9eeca106725 152 #define LL_LPUART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete flag */
Kojto 122:f9eeca106725 153 #define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS flag */
Kojto 122:f9eeca106725 154 #define LL_LPUART_ICR_CMCF USART_ICR_CMCF /*!< Character match flag */
Kojto 122:f9eeca106725 155 #define LL_LPUART_ICR_WUCF USART_ICR_WUCF /*!< Wakeup from Stop mode flag */
Kojto 122:f9eeca106725 156 /**
Kojto 122:f9eeca106725 157 * @}
Kojto 122:f9eeca106725 158 */
Kojto 122:f9eeca106725 159
Kojto 122:f9eeca106725 160 /** @defgroup LPUART_LL_EC_GET_FLAG Get Flags Defines
Kojto 122:f9eeca106725 161 * @brief Flags defines which can be used with LL_LPUART_ReadReg function
Kojto 122:f9eeca106725 162 * @{
Kojto 122:f9eeca106725 163 */
Kojto 122:f9eeca106725 164 #define LL_LPUART_ISR_PE USART_ISR_PE /*!< Parity error flag */
Kojto 122:f9eeca106725 165 #define LL_LPUART_ISR_FE USART_ISR_FE /*!< Framing error flag */
Kojto 122:f9eeca106725 166 #define LL_LPUART_ISR_NE USART_ISR_NE /*!< Noise detected flag */
Kojto 122:f9eeca106725 167 #define LL_LPUART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */
Kojto 122:f9eeca106725 168 #define LL_LPUART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */
Kojto 122:f9eeca106725 169 #define LL_LPUART_ISR_RXNE USART_ISR_RXNE /*!< Read data register not empty flag */
Kojto 122:f9eeca106725 170 #define LL_LPUART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */
Kojto 122:f9eeca106725 171 #define LL_LPUART_ISR_TXE USART_ISR_TXE /*!< Transmit data register empty flag */
Kojto 122:f9eeca106725 172 #define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */
Kojto 122:f9eeca106725 173 #define LL_LPUART_ISR_CTS USART_ISR_CTS /*!< CTS flag */
Kojto 122:f9eeca106725 174 #define LL_LPUART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */
Kojto 122:f9eeca106725 175 #define LL_LPUART_ISR_CMF USART_ISR_CMF /*!< Character match flag */
Kojto 122:f9eeca106725 176 #define LL_LPUART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */
Kojto 122:f9eeca106725 177 #define LL_LPUART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from Mute mode flag */
Kojto 122:f9eeca106725 178 #define LL_LPUART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop mode flag */
Kojto 122:f9eeca106725 179 #define LL_LPUART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */
Kojto 122:f9eeca106725 180 #define LL_LPUART_ISR_REACK USART_ISR_REACK /*!< Receive enable acknowledge flag */
Kojto 122:f9eeca106725 181 /**
Kojto 122:f9eeca106725 182 * @}
Kojto 122:f9eeca106725 183 */
Kojto 122:f9eeca106725 184
Kojto 122:f9eeca106725 185 /** @defgroup LPUART_LL_EC_IT IT Defines
Kojto 122:f9eeca106725 186 * @brief IT defines which can be used with LL_LPUART_ReadReg and LL_LPUART_WriteReg functions
Kojto 122:f9eeca106725 187 * @{
Kojto 122:f9eeca106725 188 */
Kojto 122:f9eeca106725 189 #define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
Kojto 122:f9eeca106725 190 #define LL_LPUART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
Kojto 122:f9eeca106725 191 #define LL_LPUART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
Kojto 122:f9eeca106725 192 #define LL_LPUART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
Kojto 122:f9eeca106725 193 #define LL_LPUART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
Kojto 122:f9eeca106725 194 #define LL_LPUART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */
Kojto 122:f9eeca106725 195 #define LL_LPUART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
Kojto 122:f9eeca106725 196 #define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
Kojto 122:f9eeca106725 197 #define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop mode interrupt enable */
Kojto 122:f9eeca106725 198 /**
Kojto 122:f9eeca106725 199 * @}
Kojto 122:f9eeca106725 200 */
Kojto 122:f9eeca106725 201
Kojto 122:f9eeca106725 202 /** @defgroup LPUART_LL_EC_DIRECTION Direction
Kojto 122:f9eeca106725 203 * @{
Kojto 122:f9eeca106725 204 */
Kojto 122:f9eeca106725 205 #define LL_LPUART_DIRECTION_NONE (uint32_t)0x00000000U /*!< Transmitter and Receiver are disabled */
Kojto 122:f9eeca106725 206 #define LL_LPUART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
Kojto 122:f9eeca106725 207 #define LL_LPUART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
Kojto 122:f9eeca106725 208 #define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
Kojto 122:f9eeca106725 209 /**
Kojto 122:f9eeca106725 210 * @}
Kojto 122:f9eeca106725 211 */
Kojto 122:f9eeca106725 212
Kojto 122:f9eeca106725 213 /** @defgroup LPUART_LL_EC_PARITY Parity Control
Kojto 122:f9eeca106725 214 * @{
Kojto 122:f9eeca106725 215 */
Kojto 122:f9eeca106725 216 #define LL_LPUART_PARITY_NONE (uint32_t)0x00000000U /*!< Parity control disabled */
Kojto 122:f9eeca106725 217 #define LL_LPUART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
Kojto 122:f9eeca106725 218 #define LL_LPUART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
Kojto 122:f9eeca106725 219 /**
Kojto 122:f9eeca106725 220 * @}
Kojto 122:f9eeca106725 221 */
Kojto 122:f9eeca106725 222
Kojto 122:f9eeca106725 223 /** @defgroup LPUART_LL_EC_WAKEUP Wakeup
Kojto 122:f9eeca106725 224 * @{
Kojto 122:f9eeca106725 225 */
Kojto 122:f9eeca106725 226 #define LL_LPUART_WAKEUP_IDLELINE (uint32_t)0x00000000U /*!< LPUART wake up from Mute mode on Idle Line */
Kojto 122:f9eeca106725 227 #define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< LPUART wake up from Mute mode on Address Mark */
Kojto 122:f9eeca106725 228 /**
Kojto 122:f9eeca106725 229 * @}
Kojto 122:f9eeca106725 230 */
Kojto 122:f9eeca106725 231
Kojto 122:f9eeca106725 232 /** @defgroup LPUART_LL_EC_DATAWIDTH Datawidth
Kojto 122:f9eeca106725 233 * @{
Kojto 122:f9eeca106725 234 */
Kojto 122:f9eeca106725 235 #define LL_LPUART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */
Kojto 122:f9eeca106725 236 #define LL_LPUART_DATAWIDTH_8B (uint32_t)0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
Kojto 122:f9eeca106725 237 #define LL_LPUART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
Kojto 122:f9eeca106725 238 /**
Kojto 122:f9eeca106725 239 * @}
Kojto 122:f9eeca106725 240 */
Kojto 122:f9eeca106725 241
Kojto 122:f9eeca106725 242 /** @defgroup LPUART_LL_EC_STOPBITS Stop Bits
Kojto 122:f9eeca106725 243 * @{
Kojto 122:f9eeca106725 244 */
Kojto 122:f9eeca106725 245 #define LL_LPUART_STOPBITS_1 (uint32_t)0x00000000U /*!< 1 stop bit */
Kojto 122:f9eeca106725 246 #define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
Kojto 122:f9eeca106725 247 /**
Kojto 122:f9eeca106725 248 * @}
Kojto 122:f9eeca106725 249 */
Kojto 122:f9eeca106725 250
Kojto 122:f9eeca106725 251 /** @defgroup LPUART_LL_EC_TXRX TX RX Pins Swap
Kojto 122:f9eeca106725 252 * @{
Kojto 122:f9eeca106725 253 */
Kojto 122:f9eeca106725 254 #define LL_LPUART_TXRX_STANDARD (uint32_t)0x00000000U /*!< TX/RX pins are used as defined in standard pinout */
Kojto 122:f9eeca106725 255 #define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions are swapped. */
Kojto 122:f9eeca106725 256 /**
Kojto 122:f9eeca106725 257 * @}
Kojto 122:f9eeca106725 258 */
Kojto 122:f9eeca106725 259
Kojto 122:f9eeca106725 260 /** @defgroup LPUART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion
Kojto 122:f9eeca106725 261 * @{
Kojto 122:f9eeca106725 262 */
Kojto 122:f9eeca106725 263 #define LL_LPUART_RXPIN_LEVEL_STANDARD (uint32_t)0x00000000U /*!< RX pin signal works using the standard logic levels */
Kojto 122:f9eeca106725 264 #define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal values are inverted. */
Kojto 122:f9eeca106725 265 /**
Kojto 122:f9eeca106725 266 * @}
Kojto 122:f9eeca106725 267 */
Kojto 122:f9eeca106725 268
Kojto 122:f9eeca106725 269 /** @defgroup LPUART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
Kojto 122:f9eeca106725 270 * @{
Kojto 122:f9eeca106725 271 */
Kojto 122:f9eeca106725 272 #define LL_LPUART_TXPIN_LEVEL_STANDARD (uint32_t)0x00000000U /*!< TX pin signal works using the standard logic levels */
Kojto 122:f9eeca106725 273 #define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are inverted. */
Kojto 122:f9eeca106725 274 /**
Kojto 122:f9eeca106725 275 * @}
Kojto 122:f9eeca106725 276 */
Kojto 122:f9eeca106725 277
Kojto 122:f9eeca106725 278 /** @defgroup LPUART_LL_EC_BINARY_LOGIC Binary Data Inversion
Kojto 122:f9eeca106725 279 * @{
Kojto 122:f9eeca106725 280 */
Kojto 122:f9eeca106725 281 #define LL_LPUART_BINARY_LOGIC_POSITIVE (uint32_t)0x00000000U /*!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) */
Kojto 122:f9eeca106725 282 #define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. */
Kojto 122:f9eeca106725 283 /**
Kojto 122:f9eeca106725 284 * @}
Kojto 122:f9eeca106725 285 */
Kojto 122:f9eeca106725 286
Kojto 122:f9eeca106725 287 /** @defgroup LPUART_LL_EC_BITORDER Bit Order
Kojto 122:f9eeca106725 288 * @{
Kojto 122:f9eeca106725 289 */
Kojto 122:f9eeca106725 290 #define LL_LPUART_BITORDER_LSBFIRST (uint32_t)0x00000000U /*!< data is transmitted/received with data bit 0 first, following the start bit */
Kojto 122:f9eeca106725 291 #define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/received with the MSB first, following the start bit */
Kojto 122:f9eeca106725 292 /**
Kojto 122:f9eeca106725 293 * @}
Kojto 122:f9eeca106725 294 */
Kojto 122:f9eeca106725 295
Kojto 122:f9eeca106725 296 /** @defgroup LPUART_LL_EC_ADDRESS_DETECT Address Length Detection
Kojto 122:f9eeca106725 297 * @{
Kojto 122:f9eeca106725 298 */
Kojto 122:f9eeca106725 299 #define LL_LPUART_ADDRESS_DETECT_4B (uint32_t)0x00000000U /*!< 4-bit address detection method selected */
Kojto 122:f9eeca106725 300 #define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection (in 8-bit data mode) method selected */
Kojto 122:f9eeca106725 301 /**
Kojto 122:f9eeca106725 302 * @}
Kojto 122:f9eeca106725 303 */
Kojto 122:f9eeca106725 304
Kojto 122:f9eeca106725 305 /** @defgroup LPUART_LL_EC_HWCONTROL Hardware Control
Kojto 122:f9eeca106725 306 * @{
Kojto 122:f9eeca106725 307 */
Kojto 122:f9eeca106725 308 #define LL_LPUART_HWCONTROL_NONE (uint32_t)0x00000000U /*!< CTS and RTS hardware flow control disabled */
Kojto 122:f9eeca106725 309 #define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
Kojto 122:f9eeca106725 310 #define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
Kojto 122:f9eeca106725 311 #define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
Kojto 122:f9eeca106725 312 /**
Kojto 122:f9eeca106725 313 * @}
Kojto 122:f9eeca106725 314 */
Kojto 122:f9eeca106725 315
Kojto 122:f9eeca106725 316 /** @defgroup LPUART_LL_EC_WAKEUP_ON Wakeup Activation
Kojto 122:f9eeca106725 317 * @{
Kojto 122:f9eeca106725 318 */
Kojto 122:f9eeca106725 319 #define LL_LPUART_WAKEUP_ON_ADDRESS (uint32_t)0x00000000U /*!< Wake up active on address match */
Kojto 122:f9eeca106725 320 #define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake up active on Start bit detection */
Kojto 122:f9eeca106725 321 #define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake up active on RXNE */
Kojto 122:f9eeca106725 322 /**
Kojto 122:f9eeca106725 323 * @}
Kojto 122:f9eeca106725 324 */
Kojto 122:f9eeca106725 325
Kojto 122:f9eeca106725 326 /** @defgroup LPUART_LL_EC_DE_POLARITY Driver Enable Polarity
Kojto 122:f9eeca106725 327 * @{
Kojto 122:f9eeca106725 328 */
Kojto 122:f9eeca106725 329 #define LL_LPUART_DE_POLARITY_HIGH (uint32_t)0x00000000U /*!< DE signal is active high */
Kojto 122:f9eeca106725 330 #define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is active low */
Kojto 122:f9eeca106725 331 /**
Kojto 122:f9eeca106725 332 * @}
Kojto 122:f9eeca106725 333 */
Kojto 122:f9eeca106725 334
Kojto 122:f9eeca106725 335 /** @defgroup LPUART_LL_EC_DMA_REG_DATA DMA Register Data
Kojto 122:f9eeca106725 336 * @{
Kojto 122:f9eeca106725 337 */
Kojto 122:f9eeca106725 338 #define LL_LPUART_DMA_REG_DATA_TRANSMIT (uint32_t)0U /*!< Get address of data register used for transmission */
Kojto 122:f9eeca106725 339 #define LL_LPUART_DMA_REG_DATA_RECEIVE (uint32_t)1U /*!< Get address of data register used for reception */
Kojto 122:f9eeca106725 340 /**
Kojto 122:f9eeca106725 341 * @}
Kojto 122:f9eeca106725 342 */
Kojto 122:f9eeca106725 343
Kojto 122:f9eeca106725 344 /**
Kojto 122:f9eeca106725 345 * @}
Kojto 122:f9eeca106725 346 */
Kojto 122:f9eeca106725 347
Kojto 122:f9eeca106725 348 /* Exported macro ------------------------------------------------------------*/
Kojto 122:f9eeca106725 349 /** @defgroup LPUART_LL_Exported_Macros LPUART Exported Macros
Kojto 122:f9eeca106725 350 * @{
Kojto 122:f9eeca106725 351 */
Kojto 122:f9eeca106725 352
Kojto 122:f9eeca106725 353 /** @defgroup LPUART_LL_EM_WRITE_READ Common Write and read registers Macros
Kojto 122:f9eeca106725 354 * @{
Kojto 122:f9eeca106725 355 */
Kojto 122:f9eeca106725 356
Kojto 122:f9eeca106725 357 /**
Kojto 122:f9eeca106725 358 * @brief Write a value in LPUART register
Kojto 122:f9eeca106725 359 * @param __INSTANCE__ LPUART Instance
Kojto 122:f9eeca106725 360 * @param __REG__ Register to be written
Kojto 122:f9eeca106725 361 * @param __VALUE__ Value to be written in the register
Kojto 122:f9eeca106725 362 * @retval None
Kojto 122:f9eeca106725 363 */
Kojto 122:f9eeca106725 364 #define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
Kojto 122:f9eeca106725 365
Kojto 122:f9eeca106725 366 /**
Kojto 122:f9eeca106725 367 * @brief Read a value in LPUART register
Kojto 122:f9eeca106725 368 * @param __INSTANCE__ LPUART Instance
Kojto 122:f9eeca106725 369 * @param __REG__ Register to be read
Kojto 122:f9eeca106725 370 * @retval Register value
Kojto 122:f9eeca106725 371 */
Kojto 122:f9eeca106725 372 #define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
Kojto 122:f9eeca106725 373 /**
Kojto 122:f9eeca106725 374 * @}
Kojto 122:f9eeca106725 375 */
Kojto 122:f9eeca106725 376
Kojto 122:f9eeca106725 377 /** @defgroup LPUART_LL_EM_Exported_Macros_Helper Helper Macros
Kojto 122:f9eeca106725 378 * @{
Kojto 122:f9eeca106725 379 */
Kojto 122:f9eeca106725 380
Kojto 122:f9eeca106725 381 /**
Kojto 122:f9eeca106725 382 * @brief Compute LPUARTDIV value according to Peripheral Clock and
Kojto 122:f9eeca106725 383 * expected Baud Rate (20-bit value of LPUARTDIV is returned)
Kojto 122:f9eeca106725 384 * @param __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance
Kojto 122:f9eeca106725 385 * @param __BAUDRATE__ Baud Rate value to achieve
Kojto 122:f9eeca106725 386 * @retval LPUARTDIV value to be used for BRR register filling
Kojto 122:f9eeca106725 387 */
Kojto 122:f9eeca106725 388 #define __LL_LPUART_DIV(__PERIPHCLK__, __BAUDRATE__) (((((uint64_t)(__PERIPHCLK__)*LPUART_LPUARTDIV_FREQ_MUL) + ((__BAUDRATE__)/2))/(__BAUDRATE__)) & LPUART_BRR_MASK)
Kojto 122:f9eeca106725 389
Kojto 122:f9eeca106725 390 /**
Kojto 122:f9eeca106725 391 * @}
Kojto 122:f9eeca106725 392 */
Kojto 122:f9eeca106725 393
Kojto 122:f9eeca106725 394 /**
Kojto 122:f9eeca106725 395 * @}
Kojto 122:f9eeca106725 396 */
Kojto 122:f9eeca106725 397
Kojto 122:f9eeca106725 398 /* Exported functions --------------------------------------------------------*/
Kojto 122:f9eeca106725 399 /** @defgroup LPUART_LL_Exported_Functions LPUART Exported Functions
Kojto 122:f9eeca106725 400 * @{
Kojto 122:f9eeca106725 401 */
Kojto 122:f9eeca106725 402
Kojto 122:f9eeca106725 403 /** @defgroup LPUART_LL_EF_Configuration Configuration functions
Kojto 122:f9eeca106725 404 * @{
Kojto 122:f9eeca106725 405 */
Kojto 122:f9eeca106725 406
Kojto 122:f9eeca106725 407 /**
Kojto 122:f9eeca106725 408 * @brief LPUART Enable
Kojto 122:f9eeca106725 409 * @rmtoll CR1 UE LL_LPUART_Enable
Kojto 122:f9eeca106725 410 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 411 * @retval None
Kojto 122:f9eeca106725 412 */
Kojto 122:f9eeca106725 413 __STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 414 {
Kojto 122:f9eeca106725 415 SET_BIT(LPUARTx->CR1, USART_CR1_UE);
Kojto 122:f9eeca106725 416 }
Kojto 122:f9eeca106725 417
Kojto 122:f9eeca106725 418 /**
Kojto 122:f9eeca106725 419 * @brief LPUART Disable
Kojto 122:f9eeca106725 420 * @note When LPUART is disabled, LPUART prescalers and outputs are stopped immediately,
Kojto 122:f9eeca106725 421 * and current operations are discarded. The configuration of the LPUART is kept, but all the status
Kojto 122:f9eeca106725 422 * flags, in the LPUARTx_ISR are set to their default values.
Kojto 122:f9eeca106725 423 * @note In order to go into low-power mode without generating errors on the line,
Kojto 122:f9eeca106725 424 * the TE bit must be reset before and the software must wait
Kojto 122:f9eeca106725 425 * for the TC bit in the LPUART_ISR to be set before resetting the UE bit.
Kojto 122:f9eeca106725 426 * The DMA requests are also reset when UE = 0 so the DMA channel must
Kojto 122:f9eeca106725 427 * be disabled before resetting the UE bit.
Kojto 122:f9eeca106725 428 * @rmtoll CR1 UE LL_LPUART_Disable
Kojto 122:f9eeca106725 429 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 430 * @retval None
Kojto 122:f9eeca106725 431 */
Kojto 122:f9eeca106725 432 __STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 433 {
Kojto 122:f9eeca106725 434 CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE);
Kojto 122:f9eeca106725 435 }
Kojto 122:f9eeca106725 436
Kojto 122:f9eeca106725 437 /**
Kojto 122:f9eeca106725 438 * @brief Indicate if LPUART is enabled
Kojto 122:f9eeca106725 439 * @rmtoll CR1 UE LL_LPUART_IsEnabled
Kojto 122:f9eeca106725 440 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 441 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 442 */
Kojto 122:f9eeca106725 443 __STATIC_INLINE uint32_t LL_LPUART_IsEnabled(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 444 {
Kojto 122:f9eeca106725 445 return (READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
Kojto 122:f9eeca106725 446 }
Kojto 122:f9eeca106725 447
Kojto 122:f9eeca106725 448 /**
Kojto 122:f9eeca106725 449 * @brief LPUART enabled in STOP Mode
Kojto 122:f9eeca106725 450 * @note When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provided that
Kojto 122:f9eeca106725 451 * LPUART clock selection is HSI or LSE in RCC.
Kojto 122:f9eeca106725 452 * @rmtoll CR1 UESM LL_LPUART_EnableInStopMode
Kojto 122:f9eeca106725 453 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 454 * @retval None
Kojto 122:f9eeca106725 455 */
Kojto 122:f9eeca106725 456 __STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 457 {
Kojto 122:f9eeca106725 458 SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
Kojto 122:f9eeca106725 459 }
Kojto 122:f9eeca106725 460
Kojto 122:f9eeca106725 461 /**
Kojto 122:f9eeca106725 462 * @brief LPUART disabled in STOP Mode
Kojto 122:f9eeca106725 463 * @note When this function is disabled, LPUART is not able to wake up the MCU from Stop mode
Kojto 122:f9eeca106725 464 * @rmtoll CR1 UESM LL_LPUART_DisableInStopMode
Kojto 122:f9eeca106725 465 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 466 * @retval None
Kojto 122:f9eeca106725 467 */
Kojto 122:f9eeca106725 468 __STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 469 {
Kojto 122:f9eeca106725 470 CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM);
Kojto 122:f9eeca106725 471 }
Kojto 122:f9eeca106725 472
Kojto 122:f9eeca106725 473 /**
Kojto 122:f9eeca106725 474 * @brief Indicate if LPUART is enabled in STOP Mode
Kojto 122:f9eeca106725 475 * (able to wake up MCU from Stop mode or not)
Kojto 122:f9eeca106725 476 * @rmtoll CR1 UESM LL_LPUART_IsEnabledInStopMode
Kojto 122:f9eeca106725 477 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 478 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 479 */
Kojto 122:f9eeca106725 480 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 481 {
Kojto 122:f9eeca106725 482 return (READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM));
Kojto 122:f9eeca106725 483 }
Kojto 122:f9eeca106725 484
Kojto 122:f9eeca106725 485 /**
Kojto 122:f9eeca106725 486 * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
Kojto 122:f9eeca106725 487 * @rmtoll CR1 RE LL_LPUART_EnableDirectionRx
Kojto 122:f9eeca106725 488 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 489 * @retval None
Kojto 122:f9eeca106725 490 */
Kojto 122:f9eeca106725 491 __STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 492 {
Kojto 122:f9eeca106725 493 SET_BIT(LPUARTx->CR1, USART_CR1_RE);
Kojto 122:f9eeca106725 494 }
Kojto 122:f9eeca106725 495
Kojto 122:f9eeca106725 496 /**
Kojto 122:f9eeca106725 497 * @brief Receiver Disable
Kojto 122:f9eeca106725 498 * @rmtoll CR1 RE LL_LPUART_DisableDirectionRx
Kojto 122:f9eeca106725 499 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 500 * @retval None
Kojto 122:f9eeca106725 501 */
Kojto 122:f9eeca106725 502 __STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 503 {
Kojto 122:f9eeca106725 504 CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE);
Kojto 122:f9eeca106725 505 }
Kojto 122:f9eeca106725 506
Kojto 122:f9eeca106725 507 /**
Kojto 122:f9eeca106725 508 * @brief Transmitter Enable
Kojto 122:f9eeca106725 509 * @rmtoll CR1 TE LL_LPUART_EnableDirectionTx
Kojto 122:f9eeca106725 510 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 511 * @retval None
Kojto 122:f9eeca106725 512 */
Kojto 122:f9eeca106725 513 __STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 514 {
Kojto 122:f9eeca106725 515 SET_BIT(LPUARTx->CR1, USART_CR1_TE);
Kojto 122:f9eeca106725 516 }
Kojto 122:f9eeca106725 517
Kojto 122:f9eeca106725 518 /**
Kojto 122:f9eeca106725 519 * @brief Transmitter Disable
Kojto 122:f9eeca106725 520 * @rmtoll CR1 TE LL_LPUART_DisableDirectionTx
Kojto 122:f9eeca106725 521 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 522 * @retval None
Kojto 122:f9eeca106725 523 */
Kojto 122:f9eeca106725 524 __STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 525 {
Kojto 122:f9eeca106725 526 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE);
Kojto 122:f9eeca106725 527 }
Kojto 122:f9eeca106725 528
Kojto 122:f9eeca106725 529 /**
Kojto 122:f9eeca106725 530 * @brief Configure simultaneously enabled/disabled states
Kojto 122:f9eeca106725 531 * of Transmitter and Receiver
Kojto 122:f9eeca106725 532 * @rmtoll CR1 RE LL_LPUART_SetTransferDirection\n
Kojto 122:f9eeca106725 533 * CR1 TE LL_LPUART_SetTransferDirection
Kojto 122:f9eeca106725 534 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 535 * @param TransferDirection This parameter can be one of the following values:
Kojto 122:f9eeca106725 536 * @arg @ref LL_LPUART_DIRECTION_NONE
Kojto 122:f9eeca106725 537 * @arg @ref LL_LPUART_DIRECTION_RX
Kojto 122:f9eeca106725 538 * @arg @ref LL_LPUART_DIRECTION_TX
Kojto 122:f9eeca106725 539 * @arg @ref LL_LPUART_DIRECTION_TX_RX
Kojto 122:f9eeca106725 540 * @retval None
Kojto 122:f9eeca106725 541 */
Kojto 122:f9eeca106725 542 __STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection)
Kojto 122:f9eeca106725 543 {
Kojto 122:f9eeca106725 544 MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
Kojto 122:f9eeca106725 545 }
Kojto 122:f9eeca106725 546
Kojto 122:f9eeca106725 547 /**
Kojto 122:f9eeca106725 548 * @brief Return enabled/disabled states of Transmitter and Receiver
Kojto 122:f9eeca106725 549 * @rmtoll CR1 RE LL_LPUART_GetTransferDirection\n
Kojto 122:f9eeca106725 550 * CR1 TE LL_LPUART_GetTransferDirection
Kojto 122:f9eeca106725 551 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 552 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 553 * @arg @ref LL_LPUART_DIRECTION_NONE
Kojto 122:f9eeca106725 554 * @arg @ref LL_LPUART_DIRECTION_RX
Kojto 122:f9eeca106725 555 * @arg @ref LL_LPUART_DIRECTION_TX
Kojto 122:f9eeca106725 556 * @arg @ref LL_LPUART_DIRECTION_TX_RX
Kojto 122:f9eeca106725 557 */
Kojto 122:f9eeca106725 558 __STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 559 {
Kojto 122:f9eeca106725 560 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE));
Kojto 122:f9eeca106725 561 }
Kojto 122:f9eeca106725 562
Kojto 122:f9eeca106725 563 /**
Kojto 122:f9eeca106725 564 * @brief Configure Parity (enabled/disabled and parity mode if enabled)
Kojto 122:f9eeca106725 565 * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
Kojto 122:f9eeca106725 566 * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
Kojto 122:f9eeca106725 567 * (depending on data width) and parity is checked on the received data.
Kojto 122:f9eeca106725 568 * @rmtoll CR1 PS LL_LPUART_SetParity\n
Kojto 122:f9eeca106725 569 * CR1 PCE LL_LPUART_SetParity
Kojto 122:f9eeca106725 570 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 571 * @param Parity This parameter can be one of the following values:
Kojto 122:f9eeca106725 572 * @arg @ref LL_LPUART_PARITY_NONE
Kojto 122:f9eeca106725 573 * @arg @ref LL_LPUART_PARITY_EVEN
Kojto 122:f9eeca106725 574 * @arg @ref LL_LPUART_PARITY_ODD
Kojto 122:f9eeca106725 575 * @retval None
Kojto 122:f9eeca106725 576 */
Kojto 122:f9eeca106725 577 __STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity)
Kojto 122:f9eeca106725 578 {
Kojto 122:f9eeca106725 579 MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
Kojto 122:f9eeca106725 580 }
Kojto 122:f9eeca106725 581
Kojto 122:f9eeca106725 582 /**
Kojto 122:f9eeca106725 583 * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
Kojto 122:f9eeca106725 584 * @rmtoll CR1 PS LL_LPUART_GetParity\n
Kojto 122:f9eeca106725 585 * CR1 PCE LL_LPUART_GetParity
Kojto 122:f9eeca106725 586 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 587 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 588 * @arg @ref LL_LPUART_PARITY_NONE
Kojto 122:f9eeca106725 589 * @arg @ref LL_LPUART_PARITY_EVEN
Kojto 122:f9eeca106725 590 * @arg @ref LL_LPUART_PARITY_ODD
Kojto 122:f9eeca106725 591 */
Kojto 122:f9eeca106725 592 __STATIC_INLINE uint32_t LL_LPUART_GetParity(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 593 {
Kojto 122:f9eeca106725 594 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
Kojto 122:f9eeca106725 595 }
Kojto 122:f9eeca106725 596
Kojto 122:f9eeca106725 597 /**
Kojto 122:f9eeca106725 598 * @brief Set Receiver Wake Up method from Mute mode.
Kojto 122:f9eeca106725 599 * @rmtoll CR1 WAKE LL_LPUART_SetWakeUpMethod
Kojto 122:f9eeca106725 600 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 601 * @param Method This parameter can be one of the following values:
Kojto 122:f9eeca106725 602 * @arg @ref LL_LPUART_WAKEUP_IDLELINE
Kojto 122:f9eeca106725 603 * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
Kojto 122:f9eeca106725 604 * @retval None
Kojto 122:f9eeca106725 605 */
Kojto 122:f9eeca106725 606 __STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method)
Kojto 122:f9eeca106725 607 {
Kojto 122:f9eeca106725 608 MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method);
Kojto 122:f9eeca106725 609 }
Kojto 122:f9eeca106725 610
Kojto 122:f9eeca106725 611 /**
Kojto 122:f9eeca106725 612 * @brief Return Receiver Wake Up method from Mute mode
Kojto 122:f9eeca106725 613 * @rmtoll CR1 WAKE LL_LPUART_GetWakeUpMethod
Kojto 122:f9eeca106725 614 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 615 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 616 * @arg @ref LL_LPUART_WAKEUP_IDLELINE
Kojto 122:f9eeca106725 617 * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
Kojto 122:f9eeca106725 618 */
Kojto 122:f9eeca106725 619 __STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 620 {
Kojto 122:f9eeca106725 621 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE));
Kojto 122:f9eeca106725 622 }
Kojto 122:f9eeca106725 623
Kojto 122:f9eeca106725 624 /**
Kojto 122:f9eeca106725 625 * @brief Set Word length (nb of data bits, excluding start and stop bits)
Kojto 122:f9eeca106725 626 * @rmtoll CR1 M LL_LPUART_SetDataWidth
Kojto 122:f9eeca106725 627 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 628 * @param DataWidth This parameter can be one of the following values:
Kojto 122:f9eeca106725 629 * @arg @ref LL_LPUART_DATAWIDTH_7B
Kojto 122:f9eeca106725 630 * @arg @ref LL_LPUART_DATAWIDTH_8B
Kojto 122:f9eeca106725 631 * @arg @ref LL_LPUART_DATAWIDTH_9B
Kojto 122:f9eeca106725 632 * @retval None
Kojto 122:f9eeca106725 633 */
Kojto 122:f9eeca106725 634 __STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth)
Kojto 122:f9eeca106725 635 {
Kojto 122:f9eeca106725 636 MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth);
Kojto 122:f9eeca106725 637 }
Kojto 122:f9eeca106725 638
Kojto 122:f9eeca106725 639 /**
Kojto 122:f9eeca106725 640 * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
Kojto 122:f9eeca106725 641 * @rmtoll CR1 M LL_LPUART_GetDataWidth
Kojto 122:f9eeca106725 642 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 643 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 644 * @arg @ref LL_LPUART_DATAWIDTH_7B
Kojto 122:f9eeca106725 645 * @arg @ref LL_LPUART_DATAWIDTH_8B
Kojto 122:f9eeca106725 646 * @arg @ref LL_LPUART_DATAWIDTH_9B
Kojto 122:f9eeca106725 647 */
Kojto 122:f9eeca106725 648 __STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 649 {
Kojto 122:f9eeca106725 650 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M));
Kojto 122:f9eeca106725 651 }
Kojto 122:f9eeca106725 652
Kojto 122:f9eeca106725 653 /**
Kojto 122:f9eeca106725 654 * @brief Allow switch between Mute Mode and Active mode
Kojto 122:f9eeca106725 655 * @rmtoll CR1 MME LL_LPUART_EnableMuteMode
Kojto 122:f9eeca106725 656 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 657 * @retval None
Kojto 122:f9eeca106725 658 */
Kojto 122:f9eeca106725 659 __STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 660 {
Kojto 122:f9eeca106725 661 SET_BIT(LPUARTx->CR1, USART_CR1_MME);
Kojto 122:f9eeca106725 662 }
Kojto 122:f9eeca106725 663
Kojto 122:f9eeca106725 664 /**
Kojto 122:f9eeca106725 665 * @brief Prevent Mute Mode use. Set Receiver in active mode permanently.
Kojto 122:f9eeca106725 666 * @rmtoll CR1 MME LL_LPUART_DisableMuteMode
Kojto 122:f9eeca106725 667 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 668 * @retval None
Kojto 122:f9eeca106725 669 */
Kojto 122:f9eeca106725 670 __STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 671 {
Kojto 122:f9eeca106725 672 CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME);
Kojto 122:f9eeca106725 673 }
Kojto 122:f9eeca106725 674
Kojto 122:f9eeca106725 675 /**
Kojto 122:f9eeca106725 676 * @brief Indicate if switch between Mute Mode and Active mode is allowed
Kojto 122:f9eeca106725 677 * @rmtoll CR1 MME LL_LPUART_IsEnabledMuteMode
Kojto 122:f9eeca106725 678 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 679 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 680 */
Kojto 122:f9eeca106725 681 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 682 {
Kojto 122:f9eeca106725 683 return (READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
Kojto 122:f9eeca106725 684 }
Kojto 122:f9eeca106725 685
Kojto 122:f9eeca106725 686 /**
Kojto 122:f9eeca106725 687 * @brief Set the length of the stop bits
Kojto 122:f9eeca106725 688 * @rmtoll CR2 STOP LL_LPUART_SetStopBitsLength
Kojto 122:f9eeca106725 689 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 690 * @param StopBits This parameter can be one of the following values:
Kojto 122:f9eeca106725 691 * @arg @ref LL_LPUART_STOPBITS_1
Kojto 122:f9eeca106725 692 * @arg @ref LL_LPUART_STOPBITS_2
Kojto 122:f9eeca106725 693 * @retval None
Kojto 122:f9eeca106725 694 */
Kojto 122:f9eeca106725 695 __STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits)
Kojto 122:f9eeca106725 696 {
Kojto 122:f9eeca106725 697 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
Kojto 122:f9eeca106725 698 }
Kojto 122:f9eeca106725 699
Kojto 122:f9eeca106725 700 /**
Kojto 122:f9eeca106725 701 * @brief Retrieve the length of the stop bits
Kojto 122:f9eeca106725 702 * @rmtoll CR2 STOP LL_LPUART_GetStopBitsLength
Kojto 122:f9eeca106725 703 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 704 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 705 * @arg @ref LL_LPUART_STOPBITS_1
Kojto 122:f9eeca106725 706 * @arg @ref LL_LPUART_STOPBITS_2
Kojto 122:f9eeca106725 707 */
Kojto 122:f9eeca106725 708 __STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 709 {
Kojto 122:f9eeca106725 710 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP));
Kojto 122:f9eeca106725 711 }
Kojto 122:f9eeca106725 712
Kojto 122:f9eeca106725 713 /**
Kojto 122:f9eeca106725 714 * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
Kojto 122:f9eeca106725 715 * @note Call of this function is equivalent to following function call sequence :
Kojto 122:f9eeca106725 716 * - Data Width configuration using @ref LL_LPUART_SetDataWidth() function
Kojto 122:f9eeca106725 717 * - Parity Control and mode configuration using @ref LL_LPUART_SetParity() function
Kojto 122:f9eeca106725 718 * - Stop bits configuration using @ref LL_LPUART_SetStopBitsLength() function
Kojto 122:f9eeca106725 719 * @rmtoll CR1 PS LL_LPUART_ConfigCharacter\n
Kojto 122:f9eeca106725 720 * CR1 PCE LL_LPUART_ConfigCharacter\n
Kojto 122:f9eeca106725 721 * CR1 M LL_LPUART_ConfigCharacter\n
Kojto 122:f9eeca106725 722 * CR2 STOP LL_LPUART_ConfigCharacter
Kojto 122:f9eeca106725 723 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 724 * @param DataWidth This parameter can be one of the following values:
Kojto 122:f9eeca106725 725 * @arg @ref LL_LPUART_DATAWIDTH_7B
Kojto 122:f9eeca106725 726 * @arg @ref LL_LPUART_DATAWIDTH_8B
Kojto 122:f9eeca106725 727 * @arg @ref LL_LPUART_DATAWIDTH_9B
Kojto 122:f9eeca106725 728 * @param Parity This parameter can be one of the following values:
Kojto 122:f9eeca106725 729 * @arg @ref LL_LPUART_PARITY_NONE
Kojto 122:f9eeca106725 730 * @arg @ref LL_LPUART_PARITY_EVEN
Kojto 122:f9eeca106725 731 * @arg @ref LL_LPUART_PARITY_ODD
Kojto 122:f9eeca106725 732 * @param StopBits This parameter can be one of the following values:
Kojto 122:f9eeca106725 733 * @arg @ref LL_LPUART_STOPBITS_1
Kojto 122:f9eeca106725 734 * @arg @ref LL_LPUART_STOPBITS_2
Kojto 122:f9eeca106725 735 * @retval None
Kojto 122:f9eeca106725 736 */
Kojto 122:f9eeca106725 737 __STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity,
Kojto 122:f9eeca106725 738 uint32_t StopBits)
Kojto 122:f9eeca106725 739 {
Kojto 122:f9eeca106725 740 MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
Kojto 122:f9eeca106725 741 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
Kojto 122:f9eeca106725 742 }
Kojto 122:f9eeca106725 743
Kojto 122:f9eeca106725 744 /**
Kojto 122:f9eeca106725 745 * @brief Configure TX/RX pins swapping setting.
Kojto 122:f9eeca106725 746 * @rmtoll CR2 SWAP LL_LPUART_SetTXRXSwap
Kojto 122:f9eeca106725 747 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 748 * @param SwapConfig This parameter can be one of the following values:
Kojto 122:f9eeca106725 749 * @arg @ref LL_LPUART_TXRX_STANDARD
Kojto 122:f9eeca106725 750 * @arg @ref LL_LPUART_TXRX_SWAPPED
Kojto 122:f9eeca106725 751 * @retval None
Kojto 122:f9eeca106725 752 */
Kojto 122:f9eeca106725 753 __STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig)
Kojto 122:f9eeca106725 754 {
Kojto 122:f9eeca106725 755 MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig);
Kojto 122:f9eeca106725 756 }
Kojto 122:f9eeca106725 757
Kojto 122:f9eeca106725 758 /**
Kojto 122:f9eeca106725 759 * @brief Retrieve TX/RX pins swapping configuration.
Kojto 122:f9eeca106725 760 * @rmtoll CR2 SWAP LL_LPUART_GetTXRXSwap
Kojto 122:f9eeca106725 761 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 762 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 763 * @arg @ref LL_LPUART_TXRX_STANDARD
Kojto 122:f9eeca106725 764 * @arg @ref LL_LPUART_TXRX_SWAPPED
Kojto 122:f9eeca106725 765 */
Kojto 122:f9eeca106725 766 __STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 767 {
Kojto 122:f9eeca106725 768 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP));
Kojto 122:f9eeca106725 769 }
Kojto 122:f9eeca106725 770
Kojto 122:f9eeca106725 771 /**
Kojto 122:f9eeca106725 772 * @brief Configure RX pin active level logic
Kojto 122:f9eeca106725 773 * @rmtoll CR2 RXINV LL_LPUART_SetRXPinLevel
Kojto 122:f9eeca106725 774 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 775 * @param PinInvMethod This parameter can be one of the following values:
Kojto 122:f9eeca106725 776 * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
Kojto 122:f9eeca106725 777 * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
Kojto 122:f9eeca106725 778 * @retval None
Kojto 122:f9eeca106725 779 */
Kojto 122:f9eeca106725 780 __STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
Kojto 122:f9eeca106725 781 {
Kojto 122:f9eeca106725 782 MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod);
Kojto 122:f9eeca106725 783 }
Kojto 122:f9eeca106725 784
Kojto 122:f9eeca106725 785 /**
Kojto 122:f9eeca106725 786 * @brief Retrieve RX pin active level logic configuration
Kojto 122:f9eeca106725 787 * @rmtoll CR2 RXINV LL_LPUART_GetRXPinLevel
Kojto 122:f9eeca106725 788 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 789 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 790 * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
Kojto 122:f9eeca106725 791 * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
Kojto 122:f9eeca106725 792 */
Kojto 122:f9eeca106725 793 __STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 794 {
Kojto 122:f9eeca106725 795 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV));
Kojto 122:f9eeca106725 796 }
Kojto 122:f9eeca106725 797
Kojto 122:f9eeca106725 798 /**
Kojto 122:f9eeca106725 799 * @brief Configure TX pin active level logic
Kojto 122:f9eeca106725 800 * @rmtoll CR2 TXINV LL_LPUART_SetTXPinLevel
Kojto 122:f9eeca106725 801 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 802 * @param PinInvMethod This parameter can be one of the following values:
Kojto 122:f9eeca106725 803 * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
Kojto 122:f9eeca106725 804 * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
Kojto 122:f9eeca106725 805 * @retval None
Kojto 122:f9eeca106725 806 */
Kojto 122:f9eeca106725 807 __STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
Kojto 122:f9eeca106725 808 {
Kojto 122:f9eeca106725 809 MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod);
Kojto 122:f9eeca106725 810 }
Kojto 122:f9eeca106725 811
Kojto 122:f9eeca106725 812 /**
Kojto 122:f9eeca106725 813 * @brief Retrieve TX pin active level logic configuration
Kojto 122:f9eeca106725 814 * @rmtoll CR2 TXINV LL_LPUART_GetTXPinLevel
Kojto 122:f9eeca106725 815 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 816 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 817 * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
Kojto 122:f9eeca106725 818 * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
Kojto 122:f9eeca106725 819 */
Kojto 122:f9eeca106725 820 __STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 821 {
Kojto 122:f9eeca106725 822 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV));
Kojto 122:f9eeca106725 823 }
Kojto 122:f9eeca106725 824
Kojto 122:f9eeca106725 825 /**
Kojto 122:f9eeca106725 826 * @brief Configure Binary data logic.
Kojto 122:f9eeca106725 827 *
Kojto 122:f9eeca106725 828 * @note Allow to define how Logical data from the data register are send/received :
Kojto 122:f9eeca106725 829 * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
Kojto 122:f9eeca106725 830 * @rmtoll CR2 DATAINV LL_LPUART_SetBinaryDataLogic
Kojto 122:f9eeca106725 831 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 832 * @param DataLogic This parameter can be one of the following values:
Kojto 122:f9eeca106725 833 * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
Kojto 122:f9eeca106725 834 * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
Kojto 122:f9eeca106725 835 * @retval None
Kojto 122:f9eeca106725 836 */
Kojto 122:f9eeca106725 837 __STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic)
Kojto 122:f9eeca106725 838 {
Kojto 122:f9eeca106725 839 MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic);
Kojto 122:f9eeca106725 840 }
Kojto 122:f9eeca106725 841
Kojto 122:f9eeca106725 842 /**
Kojto 122:f9eeca106725 843 * @brief Retrieve Binary data configuration
Kojto 122:f9eeca106725 844 * @rmtoll CR2 DATAINV LL_LPUART_GetBinaryDataLogic
Kojto 122:f9eeca106725 845 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 846 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 847 * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
Kojto 122:f9eeca106725 848 * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
Kojto 122:f9eeca106725 849 */
Kojto 122:f9eeca106725 850 __STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 851 {
Kojto 122:f9eeca106725 852 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV));
Kojto 122:f9eeca106725 853 }
Kojto 122:f9eeca106725 854
Kojto 122:f9eeca106725 855 /**
Kojto 122:f9eeca106725 856 * @brief Configure transfer bit order (either Less or Most Significant Bit First)
Kojto 122:f9eeca106725 857 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
Kojto 122:f9eeca106725 858 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
Kojto 122:f9eeca106725 859 * @rmtoll CR2 MSBFIRST LL_LPUART_SetTransferBitOrder
Kojto 122:f9eeca106725 860 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 861 * @param BitOrder This parameter can be one of the following values:
Kojto 122:f9eeca106725 862 * @arg @ref LL_LPUART_BITORDER_LSBFIRST
Kojto 122:f9eeca106725 863 * @arg @ref LL_LPUART_BITORDER_MSBFIRST
Kojto 122:f9eeca106725 864 * @retval None
Kojto 122:f9eeca106725 865 */
Kojto 122:f9eeca106725 866 __STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder)
Kojto 122:f9eeca106725 867 {
Kojto 122:f9eeca106725 868 MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
Kojto 122:f9eeca106725 869 }
Kojto 122:f9eeca106725 870
Kojto 122:f9eeca106725 871 /**
Kojto 122:f9eeca106725 872 * @brief Return transfer bit order (either Less or Most Significant Bit First)
Kojto 122:f9eeca106725 873 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
Kojto 122:f9eeca106725 874 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
Kojto 122:f9eeca106725 875 * @rmtoll CR2 MSBFIRST LL_LPUART_GetTransferBitOrder
Kojto 122:f9eeca106725 876 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 877 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 878 * @arg @ref LL_LPUART_BITORDER_LSBFIRST
Kojto 122:f9eeca106725 879 * @arg @ref LL_LPUART_BITORDER_MSBFIRST
Kojto 122:f9eeca106725 880 */
Kojto 122:f9eeca106725 881 __STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 882 {
Kojto 122:f9eeca106725 883 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST));
Kojto 122:f9eeca106725 884 }
Kojto 122:f9eeca106725 885
Kojto 122:f9eeca106725 886 /**
Kojto 122:f9eeca106725 887 * @brief Set Address of the LPUART node.
Kojto 122:f9eeca106725 888 * @note This is used in multiprocessor communication during Mute mode or Stop mode,
Kojto 122:f9eeca106725 889 * for wake up with address mark detection.
Kojto 122:f9eeca106725 890 * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7.
Kojto 122:f9eeca106725 891 * (b7-b4 should be set to 0)
Kojto 122:f9eeca106725 892 * 8bits address node is used when 7-bit Address Detection is selected in ADDM7.
Kojto 122:f9eeca106725 893 * (This is used in multiprocessor communication during Mute mode or Stop mode,
Kojto 122:f9eeca106725 894 * for wake up with 7-bit address mark detection.
Kojto 122:f9eeca106725 895 * The MSB of the character sent by the transmitter should be equal to 1.
Kojto 122:f9eeca106725 896 * It may also be used for character detection during normal reception,
Kojto 122:f9eeca106725 897 * Mute mode inactive (for example, end of block detection in ModBus protocol).
Kojto 122:f9eeca106725 898 * In this case, the whole received character (8-bit) is compared to the ADD[7:0]
Kojto 122:f9eeca106725 899 * value and CMF flag is set on match)
Kojto 122:f9eeca106725 900 * @rmtoll CR2 ADD LL_LPUART_ConfigNodeAddress\n
Kojto 122:f9eeca106725 901 * CR2 ADDM7 LL_LPUART_ConfigNodeAddress
Kojto 122:f9eeca106725 902 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 903 * @param AddressLen This parameter can be one of the following values:
Kojto 122:f9eeca106725 904 * @arg @ref LL_LPUART_ADDRESS_DETECT_4B
Kojto 122:f9eeca106725 905 * @arg @ref LL_LPUART_ADDRESS_DETECT_7B
Kojto 122:f9eeca106725 906 * @param NodeAddress 4 or 7 bit Address of the LPUART node.
Kojto 122:f9eeca106725 907 * @retval None
Kojto 122:f9eeca106725 908 */
Kojto 122:f9eeca106725 909 __STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress)
Kojto 122:f9eeca106725 910 {
Kojto 122:f9eeca106725 911 MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
Kojto 122:f9eeca106725 912 (uint32_t)(AddressLen | (NodeAddress << LPUART_POSITION_CR2_ADD)));
Kojto 122:f9eeca106725 913 }
Kojto 122:f9eeca106725 914
Kojto 122:f9eeca106725 915 /**
Kojto 122:f9eeca106725 916 * @brief Return 8 bit Address of the LPUART node as set in ADD field of CR2.
Kojto 122:f9eeca106725 917 * @note If 4-bit Address Detection is selected in ADDM7,
Kojto 122:f9eeca106725 918 * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
Kojto 122:f9eeca106725 919 * If 7-bit Address Detection is selected in ADDM7,
Kojto 122:f9eeca106725 920 * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
Kojto 122:f9eeca106725 921 * @rmtoll CR2 ADD LL_LPUART_GetNodeAddress
Kojto 122:f9eeca106725 922 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 923 * @retval Address of the LPUART node (Value between Min_Data=0 and Max_Data=255)
Kojto 122:f9eeca106725 924 */
Kojto 122:f9eeca106725 925 __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 926 {
Kojto 122:f9eeca106725 927 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> LPUART_POSITION_CR2_ADD);
Kojto 122:f9eeca106725 928 }
Kojto 122:f9eeca106725 929
Kojto 122:f9eeca106725 930 /**
Kojto 122:f9eeca106725 931 * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
Kojto 122:f9eeca106725 932 * @rmtoll CR2 ADDM7 LL_LPUART_GetNodeAddressLen
Kojto 122:f9eeca106725 933 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 934 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 935 * @arg @ref LL_LPUART_ADDRESS_DETECT_4B
Kojto 122:f9eeca106725 936 * @arg @ref LL_LPUART_ADDRESS_DETECT_7B
Kojto 122:f9eeca106725 937 */
Kojto 122:f9eeca106725 938 __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 939 {
Kojto 122:f9eeca106725 940 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7));
Kojto 122:f9eeca106725 941 }
Kojto 122:f9eeca106725 942
Kojto 122:f9eeca106725 943 /**
Kojto 122:f9eeca106725 944 * @brief Enable RTS HW Flow Control
Kojto 122:f9eeca106725 945 * @rmtoll CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl
Kojto 122:f9eeca106725 946 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 947 * @retval None
Kojto 122:f9eeca106725 948 */
Kojto 122:f9eeca106725 949 __STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 950 {
Kojto 122:f9eeca106725 951 SET_BIT(LPUARTx->CR3, USART_CR3_RTSE);
Kojto 122:f9eeca106725 952 }
Kojto 122:f9eeca106725 953
Kojto 122:f9eeca106725 954 /**
Kojto 122:f9eeca106725 955 * @brief Disable RTS HW Flow Control
Kojto 122:f9eeca106725 956 * @rmtoll CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl
Kojto 122:f9eeca106725 957 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 958 * @retval None
Kojto 122:f9eeca106725 959 */
Kojto 122:f9eeca106725 960 __STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 961 {
Kojto 122:f9eeca106725 962 CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE);
Kojto 122:f9eeca106725 963 }
Kojto 122:f9eeca106725 964
Kojto 122:f9eeca106725 965 /**
Kojto 122:f9eeca106725 966 * @brief Enable CTS HW Flow Control
Kojto 122:f9eeca106725 967 * @rmtoll CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl
Kojto 122:f9eeca106725 968 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 969 * @retval None
Kojto 122:f9eeca106725 970 */
Kojto 122:f9eeca106725 971 __STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 972 {
Kojto 122:f9eeca106725 973 SET_BIT(LPUARTx->CR3, USART_CR3_CTSE);
Kojto 122:f9eeca106725 974 }
Kojto 122:f9eeca106725 975
Kojto 122:f9eeca106725 976 /**
Kojto 122:f9eeca106725 977 * @brief Disable CTS HW Flow Control
Kojto 122:f9eeca106725 978 * @rmtoll CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl
Kojto 122:f9eeca106725 979 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 980 * @retval None
Kojto 122:f9eeca106725 981 */
Kojto 122:f9eeca106725 982 __STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 983 {
Kojto 122:f9eeca106725 984 CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE);
Kojto 122:f9eeca106725 985 }
Kojto 122:f9eeca106725 986
Kojto 122:f9eeca106725 987 /**
Kojto 122:f9eeca106725 988 * @brief Configure HW Flow Control mode (both CTS and RTS)
Kojto 122:f9eeca106725 989 * @rmtoll CR3 RTSE LL_LPUART_SetHWFlowCtrl\n
Kojto 122:f9eeca106725 990 * CR3 CTSE LL_LPUART_SetHWFlowCtrl
Kojto 122:f9eeca106725 991 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 992 * @param HardwareFlowControl This parameter can be one of the following values:
Kojto 122:f9eeca106725 993 * @arg @ref LL_LPUART_HWCONTROL_NONE
Kojto 122:f9eeca106725 994 * @arg @ref LL_LPUART_HWCONTROL_RTS
Kojto 122:f9eeca106725 995 * @arg @ref LL_LPUART_HWCONTROL_CTS
Kojto 122:f9eeca106725 996 * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
Kojto 122:f9eeca106725 997 * @retval None
Kojto 122:f9eeca106725 998 */
Kojto 122:f9eeca106725 999 __STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl)
Kojto 122:f9eeca106725 1000 {
Kojto 122:f9eeca106725 1001 MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
Kojto 122:f9eeca106725 1002 }
Kojto 122:f9eeca106725 1003
Kojto 122:f9eeca106725 1004 /**
Kojto 122:f9eeca106725 1005 * @brief Return HW Flow Control configuration (both CTS and RTS)
Kojto 122:f9eeca106725 1006 * @rmtoll CR3 RTSE LL_LPUART_GetHWFlowCtrl\n
Kojto 122:f9eeca106725 1007 * CR3 CTSE LL_LPUART_GetHWFlowCtrl
Kojto 122:f9eeca106725 1008 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1009 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 1010 * @arg @ref LL_LPUART_HWCONTROL_NONE
Kojto 122:f9eeca106725 1011 * @arg @ref LL_LPUART_HWCONTROL_RTS
Kojto 122:f9eeca106725 1012 * @arg @ref LL_LPUART_HWCONTROL_CTS
Kojto 122:f9eeca106725 1013 * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
Kojto 122:f9eeca106725 1014 */
Kojto 122:f9eeca106725 1015 __STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1016 {
Kojto 122:f9eeca106725 1017 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
Kojto 122:f9eeca106725 1018 }
Kojto 122:f9eeca106725 1019
Kojto 122:f9eeca106725 1020 /**
Kojto 122:f9eeca106725 1021 * @brief Enable Overrun detection
Kojto 122:f9eeca106725 1022 * @rmtoll CR3 OVRDIS LL_LPUART_EnableOverrunDetect
Kojto 122:f9eeca106725 1023 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1024 * @retval None
Kojto 122:f9eeca106725 1025 */
Kojto 122:f9eeca106725 1026 __STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1027 {
Kojto 122:f9eeca106725 1028 CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
Kojto 122:f9eeca106725 1029 }
Kojto 122:f9eeca106725 1030
Kojto 122:f9eeca106725 1031 /**
Kojto 122:f9eeca106725 1032 * @brief Disable Overrun detection
Kojto 122:f9eeca106725 1033 * @rmtoll CR3 OVRDIS LL_LPUART_DisableOverrunDetect
Kojto 122:f9eeca106725 1034 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1035 * @retval None
Kojto 122:f9eeca106725 1036 */
Kojto 122:f9eeca106725 1037 __STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1038 {
Kojto 122:f9eeca106725 1039 SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
Kojto 122:f9eeca106725 1040 }
Kojto 122:f9eeca106725 1041
Kojto 122:f9eeca106725 1042 /**
Kojto 122:f9eeca106725 1043 * @brief Indicate if Overrun detection is enabled
Kojto 122:f9eeca106725 1044 * @rmtoll CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect
Kojto 122:f9eeca106725 1045 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1046 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1047 */
Kojto 122:f9eeca106725 1048 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1049 {
Kojto 122:f9eeca106725 1050 return (READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS);
Kojto 122:f9eeca106725 1051 }
Kojto 122:f9eeca106725 1052
Kojto 122:f9eeca106725 1053 /**
Kojto 122:f9eeca106725 1054 * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
Kojto 122:f9eeca106725 1055 * @rmtoll CR3 WUS LL_LPUART_SetWKUPType
Kojto 122:f9eeca106725 1056 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1057 * @param Type This parameter can be one of the following values:
Kojto 122:f9eeca106725 1058 * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
Kojto 122:f9eeca106725 1059 * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
Kojto 122:f9eeca106725 1060 * @arg @ref LL_LPUART_WAKEUP_ON_RXNE
Kojto 122:f9eeca106725 1061 * @retval None
Kojto 122:f9eeca106725 1062 */
Kojto 122:f9eeca106725 1063 __STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type)
Kojto 122:f9eeca106725 1064 {
Kojto 122:f9eeca106725 1065 MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type);
Kojto 122:f9eeca106725 1066 }
Kojto 122:f9eeca106725 1067
Kojto 122:f9eeca106725 1068 /**
Kojto 122:f9eeca106725 1069 * @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits)
Kojto 122:f9eeca106725 1070 * @rmtoll CR3 WUS LL_LPUART_GetWKUPType
Kojto 122:f9eeca106725 1071 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1072 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 1073 * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
Kojto 122:f9eeca106725 1074 * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
Kojto 122:f9eeca106725 1075 * @arg @ref LL_LPUART_WAKEUP_ON_RXNE
Kojto 122:f9eeca106725 1076 */
Kojto 122:f9eeca106725 1077 __STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1078 {
Kojto 122:f9eeca106725 1079 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS));
Kojto 122:f9eeca106725 1080 }
Kojto 122:f9eeca106725 1081
Kojto 122:f9eeca106725 1082 /**
Kojto 122:f9eeca106725 1083 * @brief Configure LPUART BRR register for achieving expected Baud Rate value.
Kojto 122:f9eeca106725 1084 *
Kojto 122:f9eeca106725 1085 * @note Compute and set LPUARTDIV value in BRR Register (full BRR content)
Kojto 122:f9eeca106725 1086 * according to used Peripheral Clock and expected Baud Rate values
Kojto 122:f9eeca106725 1087 * @note Peripheral clock and Baud Rate values provided as function parameters should be valid
Kojto 122:f9eeca106725 1088 * (Baud rate value != 0).
Kojto 122:f9eeca106725 1089 * @note Provided that LPUARTx_BRR must be > = 0x300 and LPUART_BRR is 20-bit,
Kojto 122:f9eeca106725 1090 * a care should be taken when generating high baud rates using high PeriphClk
Kojto 122:f9eeca106725 1091 * values. PeriphClk must be in the range [3 x BaudRate, 4096 x BaudRate].
Kojto 122:f9eeca106725 1092 * @rmtoll BRR BRR LL_LPUART_SetBaudRate
Kojto 122:f9eeca106725 1093 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1094 * @param PeriphClk Peripheral Clock
Kojto 122:f9eeca106725 1095 * @param BaudRate Baud Rate
Kojto 122:f9eeca106725 1096 * @retval None
Kojto 122:f9eeca106725 1097 */
Kojto 122:f9eeca106725 1098 __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t BaudRate)
Kojto 122:f9eeca106725 1099 {
Kojto 122:f9eeca106725 1100 LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
Kojto 122:f9eeca106725 1101 }
Kojto 122:f9eeca106725 1102
Kojto 122:f9eeca106725 1103 /**
Kojto 122:f9eeca106725 1104 * @brief Return current Baud Rate value, according to LPUARTDIV present in BRR register
Kojto 122:f9eeca106725 1105 * (full BRR content), and to used Peripheral Clock values
Kojto 122:f9eeca106725 1106 * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
Kojto 122:f9eeca106725 1107 * @rmtoll BRR BRR LL_LPUART_GetBaudRate
Kojto 122:f9eeca106725 1108 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1109 * @param PeriphClk Peripheral Clock
Kojto 122:f9eeca106725 1110 * @retval Baud Rate
Kojto 122:f9eeca106725 1111 */
Kojto 122:f9eeca106725 1112 __STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk)
Kojto 122:f9eeca106725 1113 {
Kojto 122:f9eeca106725 1114 register uint32_t lpuartdiv = 0x0U;
Kojto 122:f9eeca106725 1115 register uint32_t brrresult = 0x0U;
Kojto 122:f9eeca106725 1116
Kojto 122:f9eeca106725 1117 lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK;
Kojto 122:f9eeca106725 1118
Kojto 122:f9eeca106725 1119 if (lpuartdiv >= LPUART_BRR_MIN_VALUE)
Kojto 122:f9eeca106725 1120 {
Kojto 122:f9eeca106725 1121 brrresult = (uint32_t)(((uint64_t)(PeriphClk) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
Kojto 122:f9eeca106725 1122 }
Kojto 122:f9eeca106725 1123
Kojto 122:f9eeca106725 1124 return (brrresult);
Kojto 122:f9eeca106725 1125 }
Kojto 122:f9eeca106725 1126
Kojto 122:f9eeca106725 1127 /**
Kojto 122:f9eeca106725 1128 * @}
Kojto 122:f9eeca106725 1129 */
Kojto 122:f9eeca106725 1130
Kojto 122:f9eeca106725 1131 /** @defgroup LPUART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
Kojto 122:f9eeca106725 1132 * @{
Kojto 122:f9eeca106725 1133 */
Kojto 122:f9eeca106725 1134
Kojto 122:f9eeca106725 1135 /**
Kojto 122:f9eeca106725 1136 * @brief Enable Single Wire Half-Duplex mode
Kojto 122:f9eeca106725 1137 * @rmtoll CR3 HDSEL LL_LPUART_EnableHalfDuplex
Kojto 122:f9eeca106725 1138 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1139 * @retval None
Kojto 122:f9eeca106725 1140 */
Kojto 122:f9eeca106725 1141 __STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1142 {
Kojto 122:f9eeca106725 1143 SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
Kojto 122:f9eeca106725 1144 }
Kojto 122:f9eeca106725 1145
Kojto 122:f9eeca106725 1146 /**
Kojto 122:f9eeca106725 1147 * @brief Disable Single Wire Half-Duplex mode
Kojto 122:f9eeca106725 1148 * @rmtoll CR3 HDSEL LL_LPUART_DisableHalfDuplex
Kojto 122:f9eeca106725 1149 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1150 * @retval None
Kojto 122:f9eeca106725 1151 */
Kojto 122:f9eeca106725 1152 __STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1153 {
Kojto 122:f9eeca106725 1154 CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
Kojto 122:f9eeca106725 1155 }
Kojto 122:f9eeca106725 1156
Kojto 122:f9eeca106725 1157 /**
Kojto 122:f9eeca106725 1158 * @brief Indicate if Single Wire Half-Duplex mode is enabled
Kojto 122:f9eeca106725 1159 * @rmtoll CR3 HDSEL LL_LPUART_IsEnabledHalfDuplex
Kojto 122:f9eeca106725 1160 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1161 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1162 */
Kojto 122:f9eeca106725 1163 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1164 {
Kojto 122:f9eeca106725 1165 return (READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
Kojto 122:f9eeca106725 1166 }
Kojto 122:f9eeca106725 1167
Kojto 122:f9eeca106725 1168 /**
Kojto 122:f9eeca106725 1169 * @}
Kojto 122:f9eeca106725 1170 */
Kojto 122:f9eeca106725 1171
Kojto 122:f9eeca106725 1172 /** @defgroup LPUART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
Kojto 122:f9eeca106725 1173 * @{
Kojto 122:f9eeca106725 1174 */
Kojto 122:f9eeca106725 1175
Kojto 122:f9eeca106725 1176 /**
Kojto 122:f9eeca106725 1177 * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits).
Kojto 122:f9eeca106725 1178 * @rmtoll CR1 DEDT LL_LPUART_SetDEDeassertionTime
Kojto 122:f9eeca106725 1179 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1180 * @param Time Value between Min_Data=0 and Max_Data=31
Kojto 122:f9eeca106725 1181 * @retval None
Kojto 122:f9eeca106725 1182 */
Kojto 122:f9eeca106725 1183 __STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
Kojto 122:f9eeca106725 1184 {
Kojto 122:f9eeca106725 1185 MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << LPUART_POSITION_CR1_DEDT);
Kojto 122:f9eeca106725 1186 }
Kojto 122:f9eeca106725 1187
Kojto 122:f9eeca106725 1188 /**
Kojto 122:f9eeca106725 1189 * @brief Return DEDT (Driver Enable De-Assertion Time)
Kojto 122:f9eeca106725 1190 * @rmtoll CR1 DEDT LL_LPUART_GetDEDeassertionTime
Kojto 122:f9eeca106725 1191 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1192 * @retval Time value expressed on 5 bits ([4:0] bits) : c
Kojto 122:f9eeca106725 1193 */
Kojto 122:f9eeca106725 1194 __STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1195 {
Kojto 122:f9eeca106725 1196 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> LPUART_POSITION_CR1_DEDT);
Kojto 122:f9eeca106725 1197 }
Kojto 122:f9eeca106725 1198
Kojto 122:f9eeca106725 1199 /**
Kojto 122:f9eeca106725 1200 * @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits).
Kojto 122:f9eeca106725 1201 * @rmtoll CR1 DEAT LL_LPUART_SetDEAssertionTime
Kojto 122:f9eeca106725 1202 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1203 * @param Time Value between Min_Data=0 and Max_Data=31
Kojto 122:f9eeca106725 1204 * @retval None
Kojto 122:f9eeca106725 1205 */
Kojto 122:f9eeca106725 1206 __STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
Kojto 122:f9eeca106725 1207 {
Kojto 122:f9eeca106725 1208 MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << LPUART_POSITION_CR1_DEAT);
Kojto 122:f9eeca106725 1209 }
Kojto 122:f9eeca106725 1210
Kojto 122:f9eeca106725 1211 /**
Kojto 122:f9eeca106725 1212 * @brief Return DEAT (Driver Enable Assertion Time)
Kojto 122:f9eeca106725 1213 * @rmtoll CR1 DEAT LL_LPUART_GetDEAssertionTime
Kojto 122:f9eeca106725 1214 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1215 * @retval Time value expressed on 5 bits ([4:0] bits) : Time Value between Min_Data=0 and Max_Data=31
Kojto 122:f9eeca106725 1216 */
Kojto 122:f9eeca106725 1217 __STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1218 {
Kojto 122:f9eeca106725 1219 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> LPUART_POSITION_CR1_DEAT);
Kojto 122:f9eeca106725 1220 }
Kojto 122:f9eeca106725 1221
Kojto 122:f9eeca106725 1222 /**
Kojto 122:f9eeca106725 1223 * @brief Enable Driver Enable (DE) Mode
Kojto 122:f9eeca106725 1224 * @rmtoll CR3 DEM LL_LPUART_EnableDEMode
Kojto 122:f9eeca106725 1225 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1226 * @retval None
Kojto 122:f9eeca106725 1227 */
Kojto 122:f9eeca106725 1228 __STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1229 {
Kojto 122:f9eeca106725 1230 SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
Kojto 122:f9eeca106725 1231 }
Kojto 122:f9eeca106725 1232
Kojto 122:f9eeca106725 1233 /**
Kojto 122:f9eeca106725 1234 * @brief Disable Driver Enable (DE) Mode
Kojto 122:f9eeca106725 1235 * @rmtoll CR3 DEM LL_LPUART_DisableDEMode
Kojto 122:f9eeca106725 1236 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1237 * @retval None
Kojto 122:f9eeca106725 1238 */
Kojto 122:f9eeca106725 1239 __STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1240 {
Kojto 122:f9eeca106725 1241 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DEM);
Kojto 122:f9eeca106725 1242 }
Kojto 122:f9eeca106725 1243
Kojto 122:f9eeca106725 1244 /**
Kojto 122:f9eeca106725 1245 * @brief Indicate if Driver Enable (DE) Mode is enabled
Kojto 122:f9eeca106725 1246 * @rmtoll CR3 DEM LL_LPUART_IsEnabledDEMode
Kojto 122:f9eeca106725 1247 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1248 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1249 */
Kojto 122:f9eeca106725 1250 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1251 {
Kojto 122:f9eeca106725 1252 return (READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM));
Kojto 122:f9eeca106725 1253 }
Kojto 122:f9eeca106725 1254
Kojto 122:f9eeca106725 1255 /**
Kojto 122:f9eeca106725 1256 * @brief Select Driver Enable Polarity
Kojto 122:f9eeca106725 1257 * @rmtoll CR3 DEP LL_LPUART_SetDESignalPolarity
Kojto 122:f9eeca106725 1258 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1259 * @param Polarity This parameter can be one of the following values:
Kojto 122:f9eeca106725 1260 * @arg @ref LL_LPUART_DE_POLARITY_HIGH
Kojto 122:f9eeca106725 1261 * @arg @ref LL_LPUART_DE_POLARITY_LOW
Kojto 122:f9eeca106725 1262 * @retval None
Kojto 122:f9eeca106725 1263 */
Kojto 122:f9eeca106725 1264 __STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
Kojto 122:f9eeca106725 1265 {
Kojto 122:f9eeca106725 1266 MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
Kojto 122:f9eeca106725 1267 }
Kojto 122:f9eeca106725 1268
Kojto 122:f9eeca106725 1269 /**
Kojto 122:f9eeca106725 1270 * @brief Return Driver Enable Polarity
Kojto 122:f9eeca106725 1271 * @rmtoll CR3 DEP LL_LPUART_GetDESignalPolarity
Kojto 122:f9eeca106725 1272 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1273 * @retval Returned value can be one of the following values:
Kojto 122:f9eeca106725 1274 * @arg @ref LL_LPUART_DE_POLARITY_HIGH
Kojto 122:f9eeca106725 1275 * @arg @ref LL_LPUART_DE_POLARITY_LOW
Kojto 122:f9eeca106725 1276 */
Kojto 122:f9eeca106725 1277 __STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1278 {
Kojto 122:f9eeca106725 1279 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP));
Kojto 122:f9eeca106725 1280 }
Kojto 122:f9eeca106725 1281
Kojto 122:f9eeca106725 1282 /**
Kojto 122:f9eeca106725 1283 * @}
Kojto 122:f9eeca106725 1284 */
Kojto 122:f9eeca106725 1285
Kojto 122:f9eeca106725 1286 /** @defgroup LPUART_LL_EF_FLAG_Management FLAG_Management
Kojto 122:f9eeca106725 1287 * @{
Kojto 122:f9eeca106725 1288 */
Kojto 122:f9eeca106725 1289
Kojto 122:f9eeca106725 1290 /**
Kojto 122:f9eeca106725 1291 * @brief Check if the LPUART Parity Error Flag is set or not
Kojto 122:f9eeca106725 1292 * @rmtoll ISR PE LL_LPUART_IsActiveFlag_PE
Kojto 122:f9eeca106725 1293 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1294 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1295 */
Kojto 122:f9eeca106725 1296 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1297 {
Kojto 122:f9eeca106725 1298 return (READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE));
Kojto 122:f9eeca106725 1299 }
Kojto 122:f9eeca106725 1300
Kojto 122:f9eeca106725 1301 /**
Kojto 122:f9eeca106725 1302 * @brief Check if the LPUART Framing Error Flag is set or not
Kojto 122:f9eeca106725 1303 * @rmtoll ISR FE LL_LPUART_IsActiveFlag_FE
Kojto 122:f9eeca106725 1304 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1305 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1306 */
Kojto 122:f9eeca106725 1307 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1308 {
Kojto 122:f9eeca106725 1309 return (READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE));
Kojto 122:f9eeca106725 1310 }
Kojto 122:f9eeca106725 1311
Kojto 122:f9eeca106725 1312 /**
Kojto 122:f9eeca106725 1313 * @brief Check if the LPUART Noise detected Flag is set or not
Kojto 122:f9eeca106725 1314 * @rmtoll ISR NE LL_LPUART_IsActiveFlag_NE
Kojto 122:f9eeca106725 1315 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1316 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1317 */
Kojto 122:f9eeca106725 1318 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1319 {
Kojto 122:f9eeca106725 1320 return (READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE));
Kojto 122:f9eeca106725 1321 }
Kojto 122:f9eeca106725 1322
Kojto 122:f9eeca106725 1323 /**
Kojto 122:f9eeca106725 1324 * @brief Check if the LPUART OverRun Error Flag is set or not
Kojto 122:f9eeca106725 1325 * @rmtoll ISR ORE LL_LPUART_IsActiveFlag_ORE
Kojto 122:f9eeca106725 1326 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1327 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1328 */
Kojto 122:f9eeca106725 1329 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1330 {
Kojto 122:f9eeca106725 1331 return (READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE));
Kojto 122:f9eeca106725 1332 }
Kojto 122:f9eeca106725 1333
Kojto 122:f9eeca106725 1334 /**
Kojto 122:f9eeca106725 1335 * @brief Check if the LPUART IDLE line detected Flag is set or not
Kojto 122:f9eeca106725 1336 * @rmtoll ISR IDLE LL_LPUART_IsActiveFlag_IDLE
Kojto 122:f9eeca106725 1337 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1338 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1339 */
Kojto 122:f9eeca106725 1340 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1341 {
Kojto 122:f9eeca106725 1342 return (READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE));
Kojto 122:f9eeca106725 1343 }
Kojto 122:f9eeca106725 1344
Kojto 122:f9eeca106725 1345 /**
Kojto 122:f9eeca106725 1346 * @brief Check if the LPUART Read Data Register Not Empty Flag is set or not
Kojto 122:f9eeca106725 1347 * @rmtoll ISR RXNE LL_LPUART_IsActiveFlag_RXNE
Kojto 122:f9eeca106725 1348 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1349 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1350 */
Kojto 122:f9eeca106725 1351 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1352 {
Kojto 122:f9eeca106725 1353 return (READ_BIT(LPUARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE));
Kojto 122:f9eeca106725 1354 }
Kojto 122:f9eeca106725 1355
Kojto 122:f9eeca106725 1356 /**
Kojto 122:f9eeca106725 1357 * @brief Check if the LPUART Transmission Complete Flag is set or not
Kojto 122:f9eeca106725 1358 * @rmtoll ISR TC LL_LPUART_IsActiveFlag_TC
Kojto 122:f9eeca106725 1359 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1360 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1361 */
Kojto 122:f9eeca106725 1362 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1363 {
Kojto 122:f9eeca106725 1364 return (READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC));
Kojto 122:f9eeca106725 1365 }
Kojto 122:f9eeca106725 1366
Kojto 122:f9eeca106725 1367 /**
Kojto 122:f9eeca106725 1368 * @brief Check if the LPUART Transmit Data Register Empty Flag is set or not
Kojto 122:f9eeca106725 1369 * @rmtoll ISR TXE LL_LPUART_IsActiveFlag_TXE
Kojto 122:f9eeca106725 1370 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1371 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1372 */
Kojto 122:f9eeca106725 1373 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1374 {
Kojto 122:f9eeca106725 1375 return (READ_BIT(LPUARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE));
Kojto 122:f9eeca106725 1376 }
Kojto 122:f9eeca106725 1377
Kojto 122:f9eeca106725 1378 /**
Kojto 122:f9eeca106725 1379 * @brief Check if the LPUART CTS interrupt Flag is set or not
Kojto 122:f9eeca106725 1380 * @rmtoll ISR CTSIF LL_LPUART_IsActiveFlag_nCTS
Kojto 122:f9eeca106725 1381 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1382 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1383 */
Kojto 122:f9eeca106725 1384 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1385 {
Kojto 122:f9eeca106725 1386 return (READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF));
Kojto 122:f9eeca106725 1387 }
Kojto 122:f9eeca106725 1388
Kojto 122:f9eeca106725 1389 /**
Kojto 122:f9eeca106725 1390 * @brief Check if the LPUART CTS Flag is set or not
Kojto 122:f9eeca106725 1391 * @rmtoll ISR CTS LL_LPUART_IsActiveFlag_CTS
Kojto 122:f9eeca106725 1392 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1393 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1394 */
Kojto 122:f9eeca106725 1395 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1396 {
Kojto 122:f9eeca106725 1397 return (READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS));
Kojto 122:f9eeca106725 1398 }
Kojto 122:f9eeca106725 1399
Kojto 122:f9eeca106725 1400 /**
Kojto 122:f9eeca106725 1401 * @brief Check if the LPUART Busy Flag is set or not
Kojto 122:f9eeca106725 1402 * @rmtoll ISR BUSY LL_LPUART_IsActiveFlag_BUSY
Kojto 122:f9eeca106725 1403 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1404 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1405 */
Kojto 122:f9eeca106725 1406 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1407 {
Kojto 122:f9eeca106725 1408 return (READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY));
Kojto 122:f9eeca106725 1409 }
Kojto 122:f9eeca106725 1410
Kojto 122:f9eeca106725 1411 /**
Kojto 122:f9eeca106725 1412 * @brief Check if the LPUART Character Match Flag is set or not
Kojto 122:f9eeca106725 1413 * @rmtoll ISR CMF LL_LPUART_IsActiveFlag_CM
Kojto 122:f9eeca106725 1414 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1415 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1416 */
Kojto 122:f9eeca106725 1417 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1418 {
Kojto 122:f9eeca106725 1419 return (READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF));
Kojto 122:f9eeca106725 1420 }
Kojto 122:f9eeca106725 1421
Kojto 122:f9eeca106725 1422 /**
Kojto 122:f9eeca106725 1423 * @brief Check if the LPUART Send Break Flag is set or not
Kojto 122:f9eeca106725 1424 * @rmtoll ISR SBKF LL_LPUART_IsActiveFlag_SBK
Kojto 122:f9eeca106725 1425 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1426 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1427 */
Kojto 122:f9eeca106725 1428 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1429 {
Kojto 122:f9eeca106725 1430 return (READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF));
Kojto 122:f9eeca106725 1431 }
Kojto 122:f9eeca106725 1432
Kojto 122:f9eeca106725 1433 /**
Kojto 122:f9eeca106725 1434 * @brief Check if the LPUART Receive Wake Up from mute mode Flag is set or not
Kojto 122:f9eeca106725 1435 * @rmtoll ISR RWU LL_LPUART_IsActiveFlag_RWU
Kojto 122:f9eeca106725 1436 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1437 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1438 */
Kojto 122:f9eeca106725 1439 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1440 {
Kojto 122:f9eeca106725 1441 return (READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU));
Kojto 122:f9eeca106725 1442 }
Kojto 122:f9eeca106725 1443
Kojto 122:f9eeca106725 1444 /**
Kojto 122:f9eeca106725 1445 * @brief Check if the LPUART Wake Up from stop mode Flag is set or not
Kojto 122:f9eeca106725 1446 * @rmtoll ISR WUF LL_LPUART_IsActiveFlag_WKUP
Kojto 122:f9eeca106725 1447 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1448 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1449 */
Kojto 122:f9eeca106725 1450 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1451 {
Kojto 122:f9eeca106725 1452 return (READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF));
Kojto 122:f9eeca106725 1453 }
Kojto 122:f9eeca106725 1454
Kojto 122:f9eeca106725 1455 /**
Kojto 122:f9eeca106725 1456 * @brief Check if the LPUART Transmit Enable Acknowledge Flag is set or not
Kojto 122:f9eeca106725 1457 * @rmtoll ISR TEACK LL_LPUART_IsActiveFlag_TEACK
Kojto 122:f9eeca106725 1458 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1459 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1460 */
Kojto 122:f9eeca106725 1461 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1462 {
Kojto 122:f9eeca106725 1463 return (READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK));
Kojto 122:f9eeca106725 1464 }
Kojto 122:f9eeca106725 1465
Kojto 122:f9eeca106725 1466 /**
Kojto 122:f9eeca106725 1467 * @brief Check if the LPUART Receive Enable Acknowledge Flag is set or not
Kojto 122:f9eeca106725 1468 * @rmtoll ISR REACK LL_LPUART_IsActiveFlag_REACK
Kojto 122:f9eeca106725 1469 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1470 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1471 */
Kojto 122:f9eeca106725 1472 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1473 {
Kojto 122:f9eeca106725 1474 return (READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK));
Kojto 122:f9eeca106725 1475 }
Kojto 122:f9eeca106725 1476
Kojto 122:f9eeca106725 1477 /**
Kojto 122:f9eeca106725 1478 * @brief Clear Parity Error Flag
Kojto 122:f9eeca106725 1479 * @rmtoll ICR PECF LL_LPUART_ClearFlag_PE
Kojto 122:f9eeca106725 1480 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1481 * @retval None
Kojto 122:f9eeca106725 1482 */
Kojto 122:f9eeca106725 1483 __STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1484 {
Kojto 122:f9eeca106725 1485 WRITE_REG(LPUARTx->ICR, USART_ICR_PECF);
Kojto 122:f9eeca106725 1486 }
Kojto 122:f9eeca106725 1487
Kojto 122:f9eeca106725 1488 /**
Kojto 122:f9eeca106725 1489 * @brief Clear Framing Error Flag
Kojto 122:f9eeca106725 1490 * @rmtoll ICR FECF LL_LPUART_ClearFlag_FE
Kojto 122:f9eeca106725 1491 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1492 * @retval None
Kojto 122:f9eeca106725 1493 */
Kojto 122:f9eeca106725 1494 __STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1495 {
Kojto 122:f9eeca106725 1496 WRITE_REG(LPUARTx->ICR, USART_ICR_FECF);
Kojto 122:f9eeca106725 1497 }
Kojto 122:f9eeca106725 1498
Kojto 122:f9eeca106725 1499 /**
Kojto 122:f9eeca106725 1500 * @brief Clear Noise detected Flag
Kojto 122:f9eeca106725 1501 * @rmtoll ICR NCF LL_LPUART_ClearFlag_NE
Kojto 122:f9eeca106725 1502 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1503 * @retval None
Kojto 122:f9eeca106725 1504 */
Kojto 122:f9eeca106725 1505 __STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1506 {
Kojto 122:f9eeca106725 1507 WRITE_REG(LPUARTx->ICR, USART_ICR_NCF);
Kojto 122:f9eeca106725 1508 }
Kojto 122:f9eeca106725 1509
Kojto 122:f9eeca106725 1510 /**
Kojto 122:f9eeca106725 1511 * @brief Clear OverRun Error Flag
Kojto 122:f9eeca106725 1512 * @rmtoll ICR ORECF LL_LPUART_ClearFlag_ORE
Kojto 122:f9eeca106725 1513 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1514 * @retval None
Kojto 122:f9eeca106725 1515 */
Kojto 122:f9eeca106725 1516 __STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1517 {
Kojto 122:f9eeca106725 1518 WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF);
Kojto 122:f9eeca106725 1519 }
Kojto 122:f9eeca106725 1520
Kojto 122:f9eeca106725 1521 /**
Kojto 122:f9eeca106725 1522 * @brief Clear IDLE line detected Flag
Kojto 122:f9eeca106725 1523 * @rmtoll ICR IDLECF LL_LPUART_ClearFlag_IDLE
Kojto 122:f9eeca106725 1524 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1525 * @retval None
Kojto 122:f9eeca106725 1526 */
Kojto 122:f9eeca106725 1527 __STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1528 {
Kojto 122:f9eeca106725 1529 WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF);
Kojto 122:f9eeca106725 1530 }
Kojto 122:f9eeca106725 1531
Kojto 122:f9eeca106725 1532 /**
Kojto 122:f9eeca106725 1533 * @brief Clear Transmission Complete Flag
Kojto 122:f9eeca106725 1534 * @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC
Kojto 122:f9eeca106725 1535 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1536 * @retval None
Kojto 122:f9eeca106725 1537 */
Kojto 122:f9eeca106725 1538 __STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1539 {
Kojto 122:f9eeca106725 1540 WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF);
Kojto 122:f9eeca106725 1541 }
Kojto 122:f9eeca106725 1542
Kojto 122:f9eeca106725 1543 /**
Kojto 122:f9eeca106725 1544 * @brief Clear CTS Interrupt Flag
Kojto 122:f9eeca106725 1545 * @rmtoll ICR CTSCF LL_LPUART_ClearFlag_nCTS
Kojto 122:f9eeca106725 1546 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1547 * @retval None
Kojto 122:f9eeca106725 1548 */
Kojto 122:f9eeca106725 1549 __STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1550 {
Kojto 122:f9eeca106725 1551 WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF);
Kojto 122:f9eeca106725 1552 }
Kojto 122:f9eeca106725 1553
Kojto 122:f9eeca106725 1554 /**
Kojto 122:f9eeca106725 1555 * @brief Clear Character Match Flag
Kojto 122:f9eeca106725 1556 * @rmtoll ICR CMCF LL_LPUART_ClearFlag_CM
Kojto 122:f9eeca106725 1557 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1558 * @retval None
Kojto 122:f9eeca106725 1559 */
Kojto 122:f9eeca106725 1560 __STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1561 {
Kojto 122:f9eeca106725 1562 WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF);
Kojto 122:f9eeca106725 1563 }
Kojto 122:f9eeca106725 1564
Kojto 122:f9eeca106725 1565 /**
Kojto 122:f9eeca106725 1566 * @brief Clear Wake Up from stop mode Flag
Kojto 122:f9eeca106725 1567 * @rmtoll ICR WUCF LL_LPUART_ClearFlag_WKUP
Kojto 122:f9eeca106725 1568 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1569 * @retval None
Kojto 122:f9eeca106725 1570 */
Kojto 122:f9eeca106725 1571 __STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1572 {
Kojto 122:f9eeca106725 1573 WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF);
Kojto 122:f9eeca106725 1574 }
Kojto 122:f9eeca106725 1575
Kojto 122:f9eeca106725 1576 /**
Kojto 122:f9eeca106725 1577 * @}
Kojto 122:f9eeca106725 1578 */
Kojto 122:f9eeca106725 1579
Kojto 122:f9eeca106725 1580 /** @defgroup LPUART_LL_EF_IT_Management IT_Management
Kojto 122:f9eeca106725 1581 * @{
Kojto 122:f9eeca106725 1582 */
Kojto 122:f9eeca106725 1583
Kojto 122:f9eeca106725 1584 /**
Kojto 122:f9eeca106725 1585 * @brief Enable IDLE Interrupt
Kojto 122:f9eeca106725 1586 * @rmtoll CR1 IDLEIE LL_LPUART_EnableIT_IDLE
Kojto 122:f9eeca106725 1587 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1588 * @retval None
Kojto 122:f9eeca106725 1589 */
Kojto 122:f9eeca106725 1590 __STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1591 {
Kojto 122:f9eeca106725 1592 SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
Kojto 122:f9eeca106725 1593 }
Kojto 122:f9eeca106725 1594
Kojto 122:f9eeca106725 1595 /**
Kojto 122:f9eeca106725 1596 * @brief Enable RX Not Empty Interrupt
Kojto 122:f9eeca106725 1597 * @rmtoll CR1 RXNEIE LL_LPUART_EnableIT_RXNE
Kojto 122:f9eeca106725 1598 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1599 * @retval None
Kojto 122:f9eeca106725 1600 */
Kojto 122:f9eeca106725 1601 __STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1602 {
Kojto 122:f9eeca106725 1603 SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
Kojto 122:f9eeca106725 1604 }
Kojto 122:f9eeca106725 1605
Kojto 122:f9eeca106725 1606 /**
Kojto 122:f9eeca106725 1607 * @brief Enable Transmission Complete Interrupt
Kojto 122:f9eeca106725 1608 * @rmtoll CR1 TCIE LL_LPUART_EnableIT_TC
Kojto 122:f9eeca106725 1609 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1610 * @retval None
Kojto 122:f9eeca106725 1611 */
Kojto 122:f9eeca106725 1612 __STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1613 {
Kojto 122:f9eeca106725 1614 SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
Kojto 122:f9eeca106725 1615 }
Kojto 122:f9eeca106725 1616
Kojto 122:f9eeca106725 1617 /**
Kojto 122:f9eeca106725 1618 * @brief Enable TX Empty Interrupt
Kojto 122:f9eeca106725 1619 * @rmtoll CR1 TXEIE LL_LPUART_EnableIT_TXE
Kojto 122:f9eeca106725 1620 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1621 * @retval None
Kojto 122:f9eeca106725 1622 */
Kojto 122:f9eeca106725 1623 __STATIC_INLINE void LL_LPUART_EnableIT_TXE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1624 {
Kojto 122:f9eeca106725 1625 SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
Kojto 122:f9eeca106725 1626 }
Kojto 122:f9eeca106725 1627
Kojto 122:f9eeca106725 1628 /**
Kojto 122:f9eeca106725 1629 * @brief Enable Parity Error Interrupt
Kojto 122:f9eeca106725 1630 * @rmtoll CR1 PEIE LL_LPUART_EnableIT_PE
Kojto 122:f9eeca106725 1631 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1632 * @retval None
Kojto 122:f9eeca106725 1633 */
Kojto 122:f9eeca106725 1634 __STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1635 {
Kojto 122:f9eeca106725 1636 SET_BIT(LPUARTx->CR1, USART_CR1_PEIE);
Kojto 122:f9eeca106725 1637 }
Kojto 122:f9eeca106725 1638
Kojto 122:f9eeca106725 1639 /**
Kojto 122:f9eeca106725 1640 * @brief Enable Character Match Interrupt
Kojto 122:f9eeca106725 1641 * @rmtoll CR1 CMIE LL_LPUART_EnableIT_CM
Kojto 122:f9eeca106725 1642 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1643 * @retval None
Kojto 122:f9eeca106725 1644 */
Kojto 122:f9eeca106725 1645 __STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1646 {
Kojto 122:f9eeca106725 1647 SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
Kojto 122:f9eeca106725 1648 }
Kojto 122:f9eeca106725 1649
Kojto 122:f9eeca106725 1650 /**
Kojto 122:f9eeca106725 1651 * @brief Enable Error Interrupt
Kojto 122:f9eeca106725 1652 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
Kojto 122:f9eeca106725 1653 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
Kojto 122:f9eeca106725 1654 * - 0: Interrupt is inhibited
Kojto 122:f9eeca106725 1655 * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
Kojto 122:f9eeca106725 1656 * @rmtoll CR3 EIE LL_LPUART_EnableIT_ERROR
Kojto 122:f9eeca106725 1657 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1658 * @retval None
Kojto 122:f9eeca106725 1659 */
Kojto 122:f9eeca106725 1660 __STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1661 {
Kojto 122:f9eeca106725 1662 SET_BIT(LPUARTx->CR3, USART_CR3_EIE);
Kojto 122:f9eeca106725 1663 }
Kojto 122:f9eeca106725 1664
Kojto 122:f9eeca106725 1665 /**
Kojto 122:f9eeca106725 1666 * @brief Enable CTS Interrupt
Kojto 122:f9eeca106725 1667 * @rmtoll CR3 CTSIE LL_LPUART_EnableIT_CTS
Kojto 122:f9eeca106725 1668 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1669 * @retval None
Kojto 122:f9eeca106725 1670 */
Kojto 122:f9eeca106725 1671 __STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1672 {
Kojto 122:f9eeca106725 1673 SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
Kojto 122:f9eeca106725 1674 }
Kojto 122:f9eeca106725 1675
Kojto 122:f9eeca106725 1676 /**
Kojto 122:f9eeca106725 1677 * @brief Enable Wake Up from Stop Mode Interrupt
Kojto 122:f9eeca106725 1678 * @rmtoll CR3 WUFIE LL_LPUART_EnableIT_WKUP
Kojto 122:f9eeca106725 1679 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1680 * @retval None
Kojto 122:f9eeca106725 1681 */
Kojto 122:f9eeca106725 1682 __STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1683 {
Kojto 122:f9eeca106725 1684 SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
Kojto 122:f9eeca106725 1685 }
Kojto 122:f9eeca106725 1686
Kojto 122:f9eeca106725 1687 /**
Kojto 122:f9eeca106725 1688 * @brief Disable IDLE Interrupt
Kojto 122:f9eeca106725 1689 * @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE
Kojto 122:f9eeca106725 1690 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1691 * @retval None
Kojto 122:f9eeca106725 1692 */
Kojto 122:f9eeca106725 1693 __STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1694 {
Kojto 122:f9eeca106725 1695 CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
Kojto 122:f9eeca106725 1696 }
Kojto 122:f9eeca106725 1697
Kojto 122:f9eeca106725 1698 /**
Kojto 122:f9eeca106725 1699 * @brief Disable RX Not Empty Interrupt
Kojto 122:f9eeca106725 1700 * @rmtoll CR1 RXNEIE LL_LPUART_DisableIT_RXNE
Kojto 122:f9eeca106725 1701 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1702 * @retval None
Kojto 122:f9eeca106725 1703 */
Kojto 122:f9eeca106725 1704 __STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1705 {
Kojto 122:f9eeca106725 1706 CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
Kojto 122:f9eeca106725 1707 }
Kojto 122:f9eeca106725 1708
Kojto 122:f9eeca106725 1709 /**
Kojto 122:f9eeca106725 1710 * @brief Disable Transmission Complete Interrupt
Kojto 122:f9eeca106725 1711 * @rmtoll CR1 TCIE LL_LPUART_DisableIT_TC
Kojto 122:f9eeca106725 1712 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1713 * @retval None
Kojto 122:f9eeca106725 1714 */
Kojto 122:f9eeca106725 1715 __STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1716 {
Kojto 122:f9eeca106725 1717 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
Kojto 122:f9eeca106725 1718 }
Kojto 122:f9eeca106725 1719
Kojto 122:f9eeca106725 1720 /**
Kojto 122:f9eeca106725 1721 * @brief Disable TX Empty Interrupt
Kojto 122:f9eeca106725 1722 * @rmtoll CR1 TXEIE LL_LPUART_DisableIT_TXE
Kojto 122:f9eeca106725 1723 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1724 * @retval None
Kojto 122:f9eeca106725 1725 */
Kojto 122:f9eeca106725 1726 __STATIC_INLINE void LL_LPUART_DisableIT_TXE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1727 {
Kojto 122:f9eeca106725 1728 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
Kojto 122:f9eeca106725 1729 }
Kojto 122:f9eeca106725 1730
Kojto 122:f9eeca106725 1731 /**
Kojto 122:f9eeca106725 1732 * @brief Disable Parity Error Interrupt
Kojto 122:f9eeca106725 1733 * @rmtoll CR1 PEIE LL_LPUART_DisableIT_PE
Kojto 122:f9eeca106725 1734 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1735 * @retval None
Kojto 122:f9eeca106725 1736 */
Kojto 122:f9eeca106725 1737 __STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1738 {
Kojto 122:f9eeca106725 1739 CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE);
Kojto 122:f9eeca106725 1740 }
Kojto 122:f9eeca106725 1741
Kojto 122:f9eeca106725 1742 /**
Kojto 122:f9eeca106725 1743 * @brief Disable Character Match Interrupt
Kojto 122:f9eeca106725 1744 * @rmtoll CR1 CMIE LL_LPUART_DisableIT_CM
Kojto 122:f9eeca106725 1745 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1746 * @retval None
Kojto 122:f9eeca106725 1747 */
Kojto 122:f9eeca106725 1748 __STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1749 {
Kojto 122:f9eeca106725 1750 CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
Kojto 122:f9eeca106725 1751 }
Kojto 122:f9eeca106725 1752
Kojto 122:f9eeca106725 1753 /**
Kojto 122:f9eeca106725 1754 * @brief Disable Error Interrupt
Kojto 122:f9eeca106725 1755 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
Kojto 122:f9eeca106725 1756 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
Kojto 122:f9eeca106725 1757 * - 0: Interrupt is inhibited
Kojto 122:f9eeca106725 1758 * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
Kojto 122:f9eeca106725 1759 * @rmtoll CR3 EIE LL_LPUART_DisableIT_ERROR
Kojto 122:f9eeca106725 1760 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1761 * @retval None
Kojto 122:f9eeca106725 1762 */
Kojto 122:f9eeca106725 1763 __STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1764 {
Kojto 122:f9eeca106725 1765 CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE);
Kojto 122:f9eeca106725 1766 }
Kojto 122:f9eeca106725 1767
Kojto 122:f9eeca106725 1768 /**
Kojto 122:f9eeca106725 1769 * @brief Disable CTS Interrupt
Kojto 122:f9eeca106725 1770 * @rmtoll CR3 CTSIE LL_LPUART_DisableIT_CTS
Kojto 122:f9eeca106725 1771 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1772 * @retval None
Kojto 122:f9eeca106725 1773 */
Kojto 122:f9eeca106725 1774 __STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1775 {
Kojto 122:f9eeca106725 1776 CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
Kojto 122:f9eeca106725 1777 }
Kojto 122:f9eeca106725 1778
Kojto 122:f9eeca106725 1779 /**
Kojto 122:f9eeca106725 1780 * @brief Disable Wake Up from Stop Mode Interrupt
Kojto 122:f9eeca106725 1781 * @rmtoll CR3 WUFIE LL_LPUART_DisableIT_WKUP
Kojto 122:f9eeca106725 1782 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1783 * @retval None
Kojto 122:f9eeca106725 1784 */
Kojto 122:f9eeca106725 1785 __STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1786 {
Kojto 122:f9eeca106725 1787 CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
Kojto 122:f9eeca106725 1788 }
Kojto 122:f9eeca106725 1789
Kojto 122:f9eeca106725 1790 /**
Kojto 122:f9eeca106725 1791 * @brief Check if the LPUART IDLE Interrupt source is enabled or disabled.
Kojto 122:f9eeca106725 1792 * @rmtoll CR1 IDLEIE LL_LPUART_IsEnabledIT_IDLE
Kojto 122:f9eeca106725 1793 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1794 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1795 */
Kojto 122:f9eeca106725 1796 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1797 {
Kojto 122:f9eeca106725 1798 return (READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
Kojto 122:f9eeca106725 1799 }
Kojto 122:f9eeca106725 1800
Kojto 122:f9eeca106725 1801 /**
Kojto 122:f9eeca106725 1802 * @brief Check if the LPUART RX Not Empty Interrupt is enabled or disabled.
Kojto 122:f9eeca106725 1803 * @rmtoll CR1 RXNEIE LL_LPUART_IsEnabledIT_RXNE
Kojto 122:f9eeca106725 1804 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1805 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1806 */
Kojto 122:f9eeca106725 1807 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1808 {
Kojto 122:f9eeca106725 1809 return (READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
Kojto 122:f9eeca106725 1810 }
Kojto 122:f9eeca106725 1811
Kojto 122:f9eeca106725 1812 /**
Kojto 122:f9eeca106725 1813 * @brief Check if the LPUART Transmission Complete Interrupt is enabled or disabled.
Kojto 122:f9eeca106725 1814 * @rmtoll CR1 TCIE LL_LPUART_IsEnabledIT_TC
Kojto 122:f9eeca106725 1815 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1816 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1817 */
Kojto 122:f9eeca106725 1818 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1819 {
Kojto 122:f9eeca106725 1820 return (READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
Kojto 122:f9eeca106725 1821 }
Kojto 122:f9eeca106725 1822
Kojto 122:f9eeca106725 1823 /**
Kojto 122:f9eeca106725 1824 * @brief Check if the LPUART TX Empty Interrupt is enabled or disabled.
Kojto 122:f9eeca106725 1825 * @rmtoll CR1 TXEIE LL_LPUART_IsEnabledIT_TXE
Kojto 122:f9eeca106725 1826 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1827 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1828 */
Kojto 122:f9eeca106725 1829 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1830 {
Kojto 122:f9eeca106725 1831 return (READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
Kojto 122:f9eeca106725 1832 }
Kojto 122:f9eeca106725 1833
Kojto 122:f9eeca106725 1834 /**
Kojto 122:f9eeca106725 1835 * @brief Check if the LPUART Parity Error Interrupt is enabled or disabled.
Kojto 122:f9eeca106725 1836 * @rmtoll CR1 PEIE LL_LPUART_IsEnabledIT_PE
Kojto 122:f9eeca106725 1837 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1838 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1839 */
Kojto 122:f9eeca106725 1840 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1841 {
Kojto 122:f9eeca106725 1842 return (READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
Kojto 122:f9eeca106725 1843 }
Kojto 122:f9eeca106725 1844
Kojto 122:f9eeca106725 1845 /**
Kojto 122:f9eeca106725 1846 * @brief Check if the LPUART Character Match Interrupt is enabled or disabled.
Kojto 122:f9eeca106725 1847 * @rmtoll CR1 CMIE LL_LPUART_IsEnabledIT_CM
Kojto 122:f9eeca106725 1848 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1849 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1850 */
Kojto 122:f9eeca106725 1851 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1852 {
Kojto 122:f9eeca106725 1853 return (READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE));
Kojto 122:f9eeca106725 1854 }
Kojto 122:f9eeca106725 1855
Kojto 122:f9eeca106725 1856 /**
Kojto 122:f9eeca106725 1857 * @brief Check if the LPUART Error Interrupt is enabled or disabled.
Kojto 122:f9eeca106725 1858 * @rmtoll CR3 EIE LL_LPUART_IsEnabledIT_ERROR
Kojto 122:f9eeca106725 1859 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1860 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1861 */
Kojto 122:f9eeca106725 1862 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1863 {
Kojto 122:f9eeca106725 1864 return (READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
Kojto 122:f9eeca106725 1865 }
Kojto 122:f9eeca106725 1866
Kojto 122:f9eeca106725 1867 /**
Kojto 122:f9eeca106725 1868 * @brief Check if the LPUART CTS Interrupt is enabled or disabled.
Kojto 122:f9eeca106725 1869 * @rmtoll CR3 CTSIE LL_LPUART_IsEnabledIT_CTS
Kojto 122:f9eeca106725 1870 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1871 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1872 */
Kojto 122:f9eeca106725 1873 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1874 {
Kojto 122:f9eeca106725 1875 return (READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
Kojto 122:f9eeca106725 1876 }
Kojto 122:f9eeca106725 1877
Kojto 122:f9eeca106725 1878 /**
Kojto 122:f9eeca106725 1879 * @brief Check if the LPUART Wake Up from Stop Mode Interrupt is enabled or disabled.
Kojto 122:f9eeca106725 1880 * @rmtoll CR3 WUFIE LL_LPUART_IsEnabledIT_WKUP
Kojto 122:f9eeca106725 1881 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1882 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1883 */
Kojto 122:f9eeca106725 1884 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1885 {
Kojto 122:f9eeca106725 1886 return (READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE));
Kojto 122:f9eeca106725 1887 }
Kojto 122:f9eeca106725 1888
Kojto 122:f9eeca106725 1889 /**
Kojto 122:f9eeca106725 1890 * @}
Kojto 122:f9eeca106725 1891 */
Kojto 122:f9eeca106725 1892
Kojto 122:f9eeca106725 1893 /** @defgroup LPUART_LL_EF_DMA_Management DMA_Management
Kojto 122:f9eeca106725 1894 * @{
Kojto 122:f9eeca106725 1895 */
Kojto 122:f9eeca106725 1896
Kojto 122:f9eeca106725 1897 /**
Kojto 122:f9eeca106725 1898 * @brief Enable DMA Mode for reception
Kojto 122:f9eeca106725 1899 * @rmtoll CR3 DMAR LL_LPUART_EnableDMAReq_RX
Kojto 122:f9eeca106725 1900 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1901 * @retval None
Kojto 122:f9eeca106725 1902 */
Kojto 122:f9eeca106725 1903 __STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1904 {
Kojto 122:f9eeca106725 1905 SET_BIT(LPUARTx->CR3, USART_CR3_DMAR);
Kojto 122:f9eeca106725 1906 }
Kojto 122:f9eeca106725 1907
Kojto 122:f9eeca106725 1908 /**
Kojto 122:f9eeca106725 1909 * @brief Disable DMA Mode for reception
Kojto 122:f9eeca106725 1910 * @rmtoll CR3 DMAR LL_LPUART_DisableDMAReq_RX
Kojto 122:f9eeca106725 1911 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1912 * @retval None
Kojto 122:f9eeca106725 1913 */
Kojto 122:f9eeca106725 1914 __STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1915 {
Kojto 122:f9eeca106725 1916 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR);
Kojto 122:f9eeca106725 1917 }
Kojto 122:f9eeca106725 1918
Kojto 122:f9eeca106725 1919 /**
Kojto 122:f9eeca106725 1920 * @brief Check if DMA Mode is enabled for reception
Kojto 122:f9eeca106725 1921 * @rmtoll CR3 DMAR LL_LPUART_IsEnabledDMAReq_RX
Kojto 122:f9eeca106725 1922 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1923 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1924 */
Kojto 122:f9eeca106725 1925 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1926 {
Kojto 122:f9eeca106725 1927 return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
Kojto 122:f9eeca106725 1928 }
Kojto 122:f9eeca106725 1929
Kojto 122:f9eeca106725 1930 /**
Kojto 122:f9eeca106725 1931 * @brief Enable DMA Mode for transmission
Kojto 122:f9eeca106725 1932 * @rmtoll CR3 DMAT LL_LPUART_EnableDMAReq_TX
Kojto 122:f9eeca106725 1933 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1934 * @retval None
Kojto 122:f9eeca106725 1935 */
Kojto 122:f9eeca106725 1936 __STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1937 {
Kojto 122:f9eeca106725 1938 SET_BIT(LPUARTx->CR3, USART_CR3_DMAT);
Kojto 122:f9eeca106725 1939 }
Kojto 122:f9eeca106725 1940
Kojto 122:f9eeca106725 1941 /**
Kojto 122:f9eeca106725 1942 * @brief Disable DMA Mode for transmission
Kojto 122:f9eeca106725 1943 * @rmtoll CR3 DMAT LL_LPUART_DisableDMAReq_TX
Kojto 122:f9eeca106725 1944 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1945 * @retval None
Kojto 122:f9eeca106725 1946 */
Kojto 122:f9eeca106725 1947 __STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1948 {
Kojto 122:f9eeca106725 1949 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT);
Kojto 122:f9eeca106725 1950 }
Kojto 122:f9eeca106725 1951
Kojto 122:f9eeca106725 1952 /**
Kojto 122:f9eeca106725 1953 * @brief Check if DMA Mode is enabled for transmission
Kojto 122:f9eeca106725 1954 * @rmtoll CR3 DMAT LL_LPUART_IsEnabledDMAReq_TX
Kojto 122:f9eeca106725 1955 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1956 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1957 */
Kojto 122:f9eeca106725 1958 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1959 {
Kojto 122:f9eeca106725 1960 return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
Kojto 122:f9eeca106725 1961 }
Kojto 122:f9eeca106725 1962
Kojto 122:f9eeca106725 1963 /**
Kojto 122:f9eeca106725 1964 * @brief Enable DMA Disabling on Reception Error
Kojto 122:f9eeca106725 1965 * @rmtoll CR3 DDRE LL_LPUART_EnableDMADeactOnRxErr
Kojto 122:f9eeca106725 1966 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1967 * @retval None
Kojto 122:f9eeca106725 1968 */
Kojto 122:f9eeca106725 1969 __STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1970 {
Kojto 122:f9eeca106725 1971 SET_BIT(LPUARTx->CR3, USART_CR3_DDRE);
Kojto 122:f9eeca106725 1972 }
Kojto 122:f9eeca106725 1973
Kojto 122:f9eeca106725 1974 /**
Kojto 122:f9eeca106725 1975 * @brief Disable DMA Disabling on Reception Error
Kojto 122:f9eeca106725 1976 * @rmtoll CR3 DDRE LL_LPUART_DisableDMADeactOnRxErr
Kojto 122:f9eeca106725 1977 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1978 * @retval None
Kojto 122:f9eeca106725 1979 */
Kojto 122:f9eeca106725 1980 __STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1981 {
Kojto 122:f9eeca106725 1982 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE);
Kojto 122:f9eeca106725 1983 }
Kojto 122:f9eeca106725 1984
Kojto 122:f9eeca106725 1985 /**
Kojto 122:f9eeca106725 1986 * @brief Indicate if DMA Disabling on Reception Error is disabled
Kojto 122:f9eeca106725 1987 * @rmtoll CR3 DDRE LL_LPUART_IsEnabledDMADeactOnRxErr
Kojto 122:f9eeca106725 1988 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 1989 * @retval State of bit (1 or 0).
Kojto 122:f9eeca106725 1990 */
Kojto 122:f9eeca106725 1991 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 1992 {
Kojto 122:f9eeca106725 1993 return (READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE));
Kojto 122:f9eeca106725 1994 }
Kojto 122:f9eeca106725 1995
Kojto 122:f9eeca106725 1996 /**
Kojto 122:f9eeca106725 1997 * @brief Get the LPUART data register address used for DMA transfer
Kojto 122:f9eeca106725 1998 * @rmtoll RDR RDR LL_LPUART_DMA_GetRegAddr\n
Kojto 122:f9eeca106725 1999 * @rmtoll TDR TDR LL_LPUART_DMA_GetRegAddr
Kojto 122:f9eeca106725 2000 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 2001 * @param Direction This parameter can be one of the following values:
Kojto 122:f9eeca106725 2002 * @arg @ref LL_LPUART_DMA_REG_DATA_TRANSMIT
Kojto 122:f9eeca106725 2003 * @arg @ref LL_LPUART_DMA_REG_DATA_RECEIVE
Kojto 122:f9eeca106725 2004 * @retval Address of data register
Kojto 122:f9eeca106725 2005 */
Kojto 122:f9eeca106725 2006 __STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(USART_TypeDef *LPUARTx, uint32_t Direction)
Kojto 122:f9eeca106725 2007 {
Kojto 122:f9eeca106725 2008 register uint32_t data_reg_addr = 0U;
Kojto 122:f9eeca106725 2009
Kojto 122:f9eeca106725 2010 if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT)
Kojto 122:f9eeca106725 2011 {
Kojto 122:f9eeca106725 2012 /* return address of TDR register */
Kojto 122:f9eeca106725 2013 data_reg_addr = (uint32_t) &(LPUARTx->TDR);
Kojto 122:f9eeca106725 2014 }
Kojto 122:f9eeca106725 2015 else
Kojto 122:f9eeca106725 2016 {
Kojto 122:f9eeca106725 2017 /* return address of RDR register */
Kojto 122:f9eeca106725 2018 data_reg_addr = (uint32_t) &(LPUARTx->RDR);
Kojto 122:f9eeca106725 2019 }
Kojto 122:f9eeca106725 2020
Kojto 122:f9eeca106725 2021 return data_reg_addr;
Kojto 122:f9eeca106725 2022 }
Kojto 122:f9eeca106725 2023
Kojto 122:f9eeca106725 2024 /**
Kojto 122:f9eeca106725 2025 * @}
Kojto 122:f9eeca106725 2026 */
Kojto 122:f9eeca106725 2027
Kojto 122:f9eeca106725 2028 /** @defgroup LPUART_LL_EF_Data_Management Data_Management
Kojto 122:f9eeca106725 2029 * @{
Kojto 122:f9eeca106725 2030 */
Kojto 122:f9eeca106725 2031
Kojto 122:f9eeca106725 2032 /**
Kojto 122:f9eeca106725 2033 * @brief Read Receiver Data register (Receive Data value, 8 bits)
Kojto 122:f9eeca106725 2034 * @rmtoll RDR RDR LL_LPUART_ReceiveData8
Kojto 122:f9eeca106725 2035 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 2036 * @retval Time Value between Min_Data=0x00 and Max_Data=0xFF
Kojto 122:f9eeca106725 2037 */
Kojto 122:f9eeca106725 2038 __STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 2039 {
Kojto 122:f9eeca106725 2040 return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
Kojto 122:f9eeca106725 2041 }
Kojto 122:f9eeca106725 2042
Kojto 122:f9eeca106725 2043 /**
Kojto 122:f9eeca106725 2044 * @brief Read Receiver Data register (Receive Data value, 9 bits)
Kojto 122:f9eeca106725 2045 * @rmtoll RDR RDR LL_LPUART_ReceiveData9
Kojto 122:f9eeca106725 2046 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 2047 * @retval Time Value between Min_Data=0x00 and Max_Data=0x1FF
Kojto 122:f9eeca106725 2048 */
Kojto 122:f9eeca106725 2049 __STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 2050 {
Kojto 122:f9eeca106725 2051 return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
Kojto 122:f9eeca106725 2052 }
Kojto 122:f9eeca106725 2053
Kojto 122:f9eeca106725 2054 /**
Kojto 122:f9eeca106725 2055 * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
Kojto 122:f9eeca106725 2056 * @rmtoll TDR TDR LL_LPUART_TransmitData8
Kojto 122:f9eeca106725 2057 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 2058 * @param Value between Min_Data=0x00 and Max_Data=0xFF
Kojto 122:f9eeca106725 2059 * @retval None
Kojto 122:f9eeca106725 2060 */
Kojto 122:f9eeca106725 2061 __STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value)
Kojto 122:f9eeca106725 2062 {
Kojto 122:f9eeca106725 2063 LPUARTx->TDR = Value;
Kojto 122:f9eeca106725 2064 }
Kojto 122:f9eeca106725 2065
Kojto 122:f9eeca106725 2066 /**
Kojto 122:f9eeca106725 2067 * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
Kojto 122:f9eeca106725 2068 * @rmtoll TDR TDR LL_LPUART_TransmitData9
Kojto 122:f9eeca106725 2069 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 2070 * @param Value between Min_Data=0x00 and Max_Data=0x1FF
Kojto 122:f9eeca106725 2071 * @retval None
Kojto 122:f9eeca106725 2072 */
Kojto 122:f9eeca106725 2073 __STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value)
Kojto 122:f9eeca106725 2074 {
Kojto 122:f9eeca106725 2075 LPUARTx->TDR = Value & 0x1FFU;
Kojto 122:f9eeca106725 2076 }
Kojto 122:f9eeca106725 2077
Kojto 122:f9eeca106725 2078 /**
Kojto 122:f9eeca106725 2079 * @}
Kojto 122:f9eeca106725 2080 */
Kojto 122:f9eeca106725 2081
Kojto 122:f9eeca106725 2082 /** @defgroup LPUART_LL_EF_Execution Execution
Kojto 122:f9eeca106725 2083 * @{
Kojto 122:f9eeca106725 2084 */
Kojto 122:f9eeca106725 2085
Kojto 122:f9eeca106725 2086 /**
Kojto 122:f9eeca106725 2087 * @brief Request Break sending
Kojto 122:f9eeca106725 2088 * @rmtoll RQR SBKRQ LL_LPUART_RequestBreakSending
Kojto 122:f9eeca106725 2089 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 2090 * @retval None
Kojto 122:f9eeca106725 2091 */
Kojto 122:f9eeca106725 2092 __STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 2093 {
Kojto 122:f9eeca106725 2094 SET_BIT(LPUARTx->RQR, USART_RQR_SBKRQ);
Kojto 122:f9eeca106725 2095 }
Kojto 122:f9eeca106725 2096
Kojto 122:f9eeca106725 2097 /**
Kojto 122:f9eeca106725 2098 * @brief Put LPUART in mute mode and set the RWU flag
Kojto 122:f9eeca106725 2099 * @rmtoll RQR MMRQ LL_LPUART_RequestEnterMuteMode
Kojto 122:f9eeca106725 2100 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 2101 * @retval None
Kojto 122:f9eeca106725 2102 */
Kojto 122:f9eeca106725 2103 __STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 2104 {
Kojto 122:f9eeca106725 2105 SET_BIT(LPUARTx->RQR, USART_RQR_MMRQ);
Kojto 122:f9eeca106725 2106 }
Kojto 122:f9eeca106725 2107
Kojto 122:f9eeca106725 2108 /**
Kojto 122:f9eeca106725 2109 * @brief Request a Receive Data flush
Kojto 122:f9eeca106725 2110 * @rmtoll RQR RXFRQ LL_LPUART_RequestRxDataFlush
Kojto 122:f9eeca106725 2111 * @param LPUARTx LPUART Instance
Kojto 122:f9eeca106725 2112 * @retval None
Kojto 122:f9eeca106725 2113 */
Kojto 122:f9eeca106725 2114 __STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx)
Kojto 122:f9eeca106725 2115 {
Kojto 122:f9eeca106725 2116 SET_BIT(LPUARTx->RQR, USART_RQR_RXFRQ);
Kojto 122:f9eeca106725 2117 }
Kojto 122:f9eeca106725 2118
Kojto 122:f9eeca106725 2119 /**
Kojto 122:f9eeca106725 2120 * @}
Kojto 122:f9eeca106725 2121 */
Kojto 122:f9eeca106725 2122
Kojto 122:f9eeca106725 2123 #if defined(USE_FULL_LL_DRIVER)
Kojto 122:f9eeca106725 2124 /** @defgroup LPUART_LL_EF_Init Initialization and de-initialization functions
Kojto 122:f9eeca106725 2125 * @{
Kojto 122:f9eeca106725 2126 */
Kojto 122:f9eeca106725 2127 ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx);
Kojto 122:f9eeca106725 2128 ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct);
Kojto 122:f9eeca106725 2129 void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct);
Kojto 122:f9eeca106725 2130 /**
Kojto 122:f9eeca106725 2131 * @}
Kojto 122:f9eeca106725 2132 */
Kojto 122:f9eeca106725 2133 #endif /* USE_FULL_LL_DRIVER */
Kojto 122:f9eeca106725 2134
Kojto 122:f9eeca106725 2135 /**
Kojto 122:f9eeca106725 2136 * @}
Kojto 122:f9eeca106725 2137 */
Kojto 122:f9eeca106725 2138
Kojto 122:f9eeca106725 2139 /**
Kojto 122:f9eeca106725 2140 * @}
Kojto 122:f9eeca106725 2141 */
Kojto 122:f9eeca106725 2142
Kojto 122:f9eeca106725 2143 #endif /* LPUART1 */
Kojto 122:f9eeca106725 2144
Kojto 122:f9eeca106725 2145 /**
Kojto 122:f9eeca106725 2146 * @}
Kojto 122:f9eeca106725 2147 */
Kojto 122:f9eeca106725 2148
Kojto 122:f9eeca106725 2149 #ifdef __cplusplus
Kojto 122:f9eeca106725 2150 }
Kojto 122:f9eeca106725 2151 #endif
Kojto 122:f9eeca106725 2152
Kojto 122:f9eeca106725 2153 #endif /* __STM32L4xx_LL_LPUART_H */
Kojto 122:f9eeca106725 2154
Kojto 122:f9eeca106725 2155 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/