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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_L486RG/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_dma.h@140:97feb9bacc10, 2017-04-12 (annotated)

Committer:
<>
Date:
Wed Apr 12 16:07:08 2017 +0100
Revision:
140:97feb9bacc10
Parent:
128:9bcdf88f62b0
Child:
145:64910690c574
Release 140 of the mbed library



Ports for Upcoming Targets



3841: Add nRf52840 target https://github.com/ARMmbed/mbed-os/pull/3841

3992: Introducing UBLOX_C030 platform. https://github.com/ARMmbed/mbed-os/pull/3992



Fixes and Changes



3951: [NUCLEO_F303ZE] Correct ARDUINO pin https://github.com/ARMmbed/mbed-os/pull/3951

4021: Fixing a macro to detect when RTOS was in use for the NRF52840_DK https://github.com/ARMmbed/mbed-os/pull/4021

3979: KW24D: Add missing SPI defines and Arduino connector definitions https://github.com/ARMmbed/mbed-os/pull/3979

3990: UBLOX_C027: construct a ticker-based wait, rather than calling wait_ms(), in the  https://github.com/ARMmbed/mbed-os/pull/3990

4003: Fixed OBOE in async serial tx for NRF52 target, fixes #4002 https://github.com/ARMmbed/mbed-os/pull/4003

4012: STM32: Correct I2C master error handling https://github.com/ARMmbed/mbed-os/pull/4012

4020: NUCLEO_L011K4 remove unsupported tool chain files https://github.com/ARMmbed/mbed-os/pull/4020

4065: K66F: Move bss section to m_data_2 Section https://github.com/ARMmbed/mbed-os/pull/4065

4014: Issue 3763: Reduce heap allocation in the GCC linker file https://github.com/ARMmbed/mbed-os/pull/4014

4030: [STM32L0] reduce IAR heap and stack size for small targets https://github.com/ARMmbed/mbed-os/pull/4030

4109: NUCLEO_L476RG : minor serial pin update https://github.com/ARMmbed/mbed-os/pull/4109

3982: Ticker - kl25z bugfix for handling events in the past https://github.com/ARMmbed/mbed-os/pull/3982

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 122:f9eeca106725 1 /**
Kojto 122:f9eeca106725 2 ******************************************************************************
Kojto 122:f9eeca106725 3 * @file stm32l4xx_hal_dma.h
Kojto 122:f9eeca106725 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.1
Kojto 122:f9eeca106725 6 * @date 31-May-2016
Kojto 122:f9eeca106725 7 * @brief Header file of DMA HAL module.
Kojto 122:f9eeca106725 8 ******************************************************************************
Kojto 122:f9eeca106725 9 * @attention
Kojto 122:f9eeca106725 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 122:f9eeca106725 12 *
Kojto 122:f9eeca106725 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 122:f9eeca106725 14 * are permitted provided that the following conditions are met:
Kojto 122:f9eeca106725 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 122:f9eeca106725 16 * this list of conditions and the following disclaimer.
Kojto 122:f9eeca106725 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 122:f9eeca106725 18 * this list of conditions and the following disclaimer in the documentation
Kojto 122:f9eeca106725 19 * and/or other materials provided with the distribution.
Kojto 122:f9eeca106725 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 122:f9eeca106725 21 * may be used to endorse or promote products derived from this software
Kojto 122:f9eeca106725 22 * without specific prior written permission.
Kojto 122:f9eeca106725 23 *
Kojto 122:f9eeca106725 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 122:f9eeca106725 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 122:f9eeca106725 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 122:f9eeca106725 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 122:f9eeca106725 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 122:f9eeca106725 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 122:f9eeca106725 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 122:f9eeca106725 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 122:f9eeca106725 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 122:f9eeca106725 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 122:f9eeca106725 34 *
Kojto 122:f9eeca106725 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
Kojto 122:f9eeca106725 37
Kojto 122:f9eeca106725 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 122:f9eeca106725 39 #ifndef __STM32L4xx_HAL_DMA_H
Kojto 122:f9eeca106725 40 #define __STM32L4xx_HAL_DMA_H
Kojto 122:f9eeca106725 41
Kojto 122:f9eeca106725 42 #ifdef __cplusplus
Kojto 122:f9eeca106725 43 extern "C" {
Kojto 122:f9eeca106725 44 #endif
Kojto 122:f9eeca106725 45
Kojto 122:f9eeca106725 46 /* Includes ------------------------------------------------------------------*/
Kojto 122:f9eeca106725 47 #include "stm32l4xx_hal_def.h"
Kojto 122:f9eeca106725 48
Kojto 122:f9eeca106725 49 /** @addtogroup STM32L4xx_HAL_Driver
Kojto 122:f9eeca106725 50 * @{
Kojto 122:f9eeca106725 51 */
Kojto 122:f9eeca106725 52
Kojto 122:f9eeca106725 53 /** @addtogroup DMA
Kojto 122:f9eeca106725 54 * @{
Kojto 122:f9eeca106725 55 */
Kojto 122:f9eeca106725 56
Kojto 122:f9eeca106725 57 /* Exported types ------------------------------------------------------------*/
Kojto 122:f9eeca106725 58
Kojto 122:f9eeca106725 59 /** @defgroup DMA_Exported_Types DMA Exported Types
Kojto 122:f9eeca106725 60 * @{
Kojto 122:f9eeca106725 61 */
Kojto 122:f9eeca106725 62
Kojto 122:f9eeca106725 63 /**
Kojto 122:f9eeca106725 64 * @brief DMA Configuration Structure definition
Kojto 122:f9eeca106725 65 */
Kojto 122:f9eeca106725 66 typedef struct
Kojto 122:f9eeca106725 67 {
Kojto 122:f9eeca106725 68 uint32_t Request; /*!< Specifies the request selected for the specified channel.
Kojto 122:f9eeca106725 69 This parameter can be a value of @ref DMA_request */
Kojto 122:f9eeca106725 70
Kojto 122:f9eeca106725 71 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
Kojto 122:f9eeca106725 72 from memory to memory or from peripheral to memory.
Kojto 122:f9eeca106725 73 This parameter can be a value of @ref DMA_Data_transfer_direction */
Kojto 122:f9eeca106725 74
Kojto 122:f9eeca106725 75 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
Kojto 122:f9eeca106725 76 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
Kojto 122:f9eeca106725 77
Kojto 122:f9eeca106725 78 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
Kojto 122:f9eeca106725 79 This parameter can be a value of @ref DMA_Memory_incremented_mode */
Kojto 122:f9eeca106725 80
Kojto 122:f9eeca106725 81 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
Kojto 122:f9eeca106725 82 This parameter can be a value of @ref DMA_Peripheral_data_size */
Kojto 122:f9eeca106725 83
Kojto 122:f9eeca106725 84 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
Kojto 122:f9eeca106725 85 This parameter can be a value of @ref DMA_Memory_data_size */
Kojto 122:f9eeca106725 86
Kojto 122:f9eeca106725 87 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
Kojto 122:f9eeca106725 88 This parameter can be a value of @ref DMA_mode
Kojto 122:f9eeca106725 89 @note The circular buffer mode cannot be used if the memory-to-memory
Kojto 122:f9eeca106725 90 data transfer is configured on the selected Channel */
Kojto 122:f9eeca106725 91
Kojto 122:f9eeca106725 92 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
Kojto 122:f9eeca106725 93 This parameter can be a value of @ref DMA_Priority_level */
Kojto 122:f9eeca106725 94 } DMA_InitTypeDef;
Kojto 122:f9eeca106725 95
Kojto 122:f9eeca106725 96 /**
Kojto 122:f9eeca106725 97 * @brief HAL DMA State structures definition
Kojto 122:f9eeca106725 98 */
Kojto 122:f9eeca106725 99 typedef enum
Kojto 122:f9eeca106725 100 {
Kojto 122:f9eeca106725 101 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
Kojto 122:f9eeca106725 102 HAL_DMA_STATE_READY = 0x01, /*!< DMA initialized and ready for use */
Kojto 122:f9eeca106725 103 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
Kojto 122:f9eeca106725 104 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
Kojto 122:f9eeca106725 105 }HAL_DMA_StateTypeDef;
Kojto 122:f9eeca106725 106
Kojto 122:f9eeca106725 107 /**
Kojto 122:f9eeca106725 108 * @brief HAL DMA Error Code structure definition
Kojto 122:f9eeca106725 109 */
Kojto 122:f9eeca106725 110 typedef enum
Kojto 122:f9eeca106725 111 {
Kojto 122:f9eeca106725 112 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
Kojto 122:f9eeca106725 113 HAL_DMA_HALF_TRANSFER = 0x01 /*!< Half Transfer */
Kojto 122:f9eeca106725 114 }HAL_DMA_LevelCompleteTypeDef;
Kojto 122:f9eeca106725 115
Kojto 122:f9eeca106725 116
Kojto 122:f9eeca106725 117 /**
Kojto 122:f9eeca106725 118 * @brief HAL DMA Callback ID structure definition
Kojto 122:f9eeca106725 119 */
Kojto 122:f9eeca106725 120 typedef enum
Kojto 122:f9eeca106725 121 {
Kojto 122:f9eeca106725 122 HAL_DMA_XFER_CPLT_CB_ID = 0x00, /*!< Full transfer */
Kojto 122:f9eeca106725 123 HAL_DMA_XFER_HALFCPLT_CB_ID = 0x01, /*!< Half transfer */
Kojto 122:f9eeca106725 124 HAL_DMA_XFER_ERROR_CB_ID = 0x02, /*!< Error */
Kojto 122:f9eeca106725 125 HAL_DMA_XFER_ABORT_CB_ID = 0x03, /*!< Abort */
Kojto 122:f9eeca106725 126 HAL_DMA_XFER_ALL_CB_ID = 0x04 /*!< All */
Kojto 122:f9eeca106725 127
Kojto 122:f9eeca106725 128 }HAL_DMA_CallbackIDTypeDef;
Kojto 122:f9eeca106725 129
Kojto 122:f9eeca106725 130 /**
Kojto 122:f9eeca106725 131 * @brief DMA handle Structure definition
Kojto 122:f9eeca106725 132 */
Kojto 122:f9eeca106725 133 typedef struct __DMA_HandleTypeDef
Kojto 122:f9eeca106725 134 {
Kojto 122:f9eeca106725 135 DMA_Channel_TypeDef *Instance; /*!< Register base address */
Kojto 122:f9eeca106725 136
Kojto 122:f9eeca106725 137 DMA_InitTypeDef Init; /*!< DMA communication parameters */
Kojto 122:f9eeca106725 138
Kojto 122:f9eeca106725 139 HAL_LockTypeDef Lock; /*!< DMA locking object */
Kojto 122:f9eeca106725 140
Kojto 122:f9eeca106725 141 __IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
Kojto 122:f9eeca106725 142
Kojto 122:f9eeca106725 143 void *Parent; /*!< Parent object state */
Kojto 122:f9eeca106725 144
Kojto 122:f9eeca106725 145 void (* XferCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
Kojto 122:f9eeca106725 146
Kojto 122:f9eeca106725 147 void (* XferHalfCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
Kojto 122:f9eeca106725 148
Kojto 122:f9eeca106725 149 void (* XferErrorCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
Kojto 122:f9eeca106725 150
Kojto 122:f9eeca106725 151 void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */
Kojto 122:f9eeca106725 152
Kojto 122:f9eeca106725 153 __IO uint32_t ErrorCode; /*!< DMA Error code */
Kojto 122:f9eeca106725 154
Kojto 122:f9eeca106725 155 DMA_TypeDef *DmaBaseAddress; /*!< DMA Channel Base Address */
Kojto 122:f9eeca106725 156
Kojto 122:f9eeca106725 157 uint32_t ChannelIndex; /*!< DMA Channel Index */
Kojto 122:f9eeca106725 158 }DMA_HandleTypeDef;
Kojto 122:f9eeca106725 159 /**
Kojto 122:f9eeca106725 160 * @}
Kojto 122:f9eeca106725 161 */
Kojto 122:f9eeca106725 162
Kojto 122:f9eeca106725 163 /* Exported constants --------------------------------------------------------*/
Kojto 122:f9eeca106725 164
Kojto 122:f9eeca106725 165 /** @defgroup DMA_Exported_Constants DMA Exported Constants
Kojto 122:f9eeca106725 166 * @{
Kojto 122:f9eeca106725 167 */
Kojto 122:f9eeca106725 168
Kojto 122:f9eeca106725 169 /** @defgroup DMA_Error_Code DMA Error Code
Kojto 122:f9eeca106725 170 * @{
Kojto 122:f9eeca106725 171 */
Kojto 122:f9eeca106725 172 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 122:f9eeca106725 173 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
Kojto 122:f9eeca106725 174 #define HAL_DMA_ERROR_NO_XFER ((uint32_t)0x00000004) /*!< no ongoing transfer */
Kojto 122:f9eeca106725 175 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
Kojto 122:f9eeca106725 176 #define HAL_DMA_ERROR_NOT_SUPPORTED ((uint32_t)0x00000100) /*!< Not supported mode */
Kojto 122:f9eeca106725 177 /**
Kojto 122:f9eeca106725 178 * @}
Kojto 122:f9eeca106725 179 */
Kojto 122:f9eeca106725 180
Kojto 122:f9eeca106725 181 /** @defgroup DMA_request DMA request
Kojto 122:f9eeca106725 182 * @{
Kojto 122:f9eeca106725 183 */
Kojto 122:f9eeca106725 184 #define DMA_REQUEST_0 ((uint32_t)0x00000000)
Kojto 122:f9eeca106725 185 #define DMA_REQUEST_1 ((uint32_t)0x00000001)
Kojto 122:f9eeca106725 186 #define DMA_REQUEST_2 ((uint32_t)0x00000002)
Kojto 122:f9eeca106725 187 #define DMA_REQUEST_3 ((uint32_t)0x00000003)
Kojto 122:f9eeca106725 188 #define DMA_REQUEST_4 ((uint32_t)0x00000004)
Kojto 122:f9eeca106725 189 #define DMA_REQUEST_5 ((uint32_t)0x00000005)
Kojto 122:f9eeca106725 190 #define DMA_REQUEST_6 ((uint32_t)0x00000006)
Kojto 122:f9eeca106725 191 #define DMA_REQUEST_7 ((uint32_t)0x00000007)
Kojto 122:f9eeca106725 192
Kojto 122:f9eeca106725 193 /**
Kojto 122:f9eeca106725 194 * @}
Kojto 122:f9eeca106725 195 */
Kojto 122:f9eeca106725 196
Kojto 122:f9eeca106725 197 /** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
Kojto 122:f9eeca106725 198 * @{
Kojto 122:f9eeca106725 199 */
Kojto 122:f9eeca106725 200 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
Kojto 122:f9eeca106725 201 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
Kojto 122:f9eeca106725 202 #define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction */
Kojto 122:f9eeca106725 203
Kojto 122:f9eeca106725 204 /**
Kojto 122:f9eeca106725 205 * @}
Kojto 122:f9eeca106725 206 */
Kojto 122:f9eeca106725 207
Kojto 122:f9eeca106725 208 /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
Kojto 122:f9eeca106725 209 * @{
Kojto 122:f9eeca106725 210 */
Kojto 122:f9eeca106725 211 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
Kojto 122:f9eeca106725 212 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
Kojto 122:f9eeca106725 213 /**
Kojto 122:f9eeca106725 214 * @}
Kojto 122:f9eeca106725 215 */
Kojto 122:f9eeca106725 216
Kojto 122:f9eeca106725 217 /** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
Kojto 122:f9eeca106725 218 * @{
Kojto 122:f9eeca106725 219 */
Kojto 122:f9eeca106725 220 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
Kojto 122:f9eeca106725 221 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
Kojto 122:f9eeca106725 222 /**
Kojto 122:f9eeca106725 223 * @}
Kojto 122:f9eeca106725 224 */
Kojto 122:f9eeca106725 225
Kojto 122:f9eeca106725 226 /** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
Kojto 122:f9eeca106725 227 * @{
Kojto 122:f9eeca106725 228 */
Kojto 122:f9eeca106725 229 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */
Kojto 122:f9eeca106725 230 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */
Kojto 122:f9eeca106725 231 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */
Kojto 122:f9eeca106725 232 /**
Kojto 122:f9eeca106725 233 * @}
Kojto 122:f9eeca106725 234 */
Kojto 122:f9eeca106725 235
Kojto 122:f9eeca106725 236 /** @defgroup DMA_Memory_data_size DMA Memory data size
Kojto 122:f9eeca106725 237 * @{
Kojto 122:f9eeca106725 238 */
Kojto 122:f9eeca106725 239 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */
Kojto 122:f9eeca106725 240 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */
Kojto 122:f9eeca106725 241 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */
Kojto 122:f9eeca106725 242 /**
Kojto 122:f9eeca106725 243 * @}
Kojto 122:f9eeca106725 244 */
Kojto 122:f9eeca106725 245
Kojto 122:f9eeca106725 246 /** @defgroup DMA_mode DMA mode
Kojto 122:f9eeca106725 247 * @{
Kojto 122:f9eeca106725 248 */
Kojto 122:f9eeca106725 249 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
Kojto 122:f9eeca106725 250 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular mode */
Kojto 122:f9eeca106725 251 /**
Kojto 122:f9eeca106725 252 * @}
Kojto 122:f9eeca106725 253 */
Kojto 122:f9eeca106725 254
Kojto 122:f9eeca106725 255 /** @defgroup DMA_Priority_level DMA Priority level
Kojto 122:f9eeca106725 256 * @{
Kojto 122:f9eeca106725 257 */
Kojto 122:f9eeca106725 258 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
Kojto 122:f9eeca106725 259 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
Kojto 122:f9eeca106725 260 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
Kojto 122:f9eeca106725 261 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
Kojto 122:f9eeca106725 262 /**
Kojto 122:f9eeca106725 263 * @}
Kojto 122:f9eeca106725 264 */
Kojto 122:f9eeca106725 265
Kojto 122:f9eeca106725 266
Kojto 122:f9eeca106725 267 /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
Kojto 122:f9eeca106725 268 * @{
Kojto 122:f9eeca106725 269 */
Kojto 122:f9eeca106725 270 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
Kojto 122:f9eeca106725 271 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
Kojto 122:f9eeca106725 272 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
Kojto 122:f9eeca106725 273 /**
Kojto 122:f9eeca106725 274 * @}
Kojto 122:f9eeca106725 275 */
Kojto 122:f9eeca106725 276
Kojto 122:f9eeca106725 277 /** @defgroup DMA_flag_definitions DMA flag definitions
Kojto 122:f9eeca106725 278 * @{
Kojto 122:f9eeca106725 279 */
Kojto 122:f9eeca106725 280 #define DMA_FLAG_GL1 ((uint32_t)0x00000001)
Kojto 122:f9eeca106725 281 #define DMA_FLAG_TC1 ((uint32_t)0x00000002)
Kojto 122:f9eeca106725 282 #define DMA_FLAG_HT1 ((uint32_t)0x00000004)
Kojto 122:f9eeca106725 283 #define DMA_FLAG_TE1 ((uint32_t)0x00000008)
Kojto 122:f9eeca106725 284 #define DMA_FLAG_GL2 ((uint32_t)0x00000010)
Kojto 122:f9eeca106725 285 #define DMA_FLAG_TC2 ((uint32_t)0x00000020)
Kojto 122:f9eeca106725 286 #define DMA_FLAG_HT2 ((uint32_t)0x00000040)
Kojto 122:f9eeca106725 287 #define DMA_FLAG_TE2 ((uint32_t)0x00000080)
Kojto 122:f9eeca106725 288 #define DMA_FLAG_GL3 ((uint32_t)0x00000100)
Kojto 122:f9eeca106725 289 #define DMA_FLAG_TC3 ((uint32_t)0x00000200)
Kojto 122:f9eeca106725 290 #define DMA_FLAG_HT3 ((uint32_t)0x00000400)
Kojto 122:f9eeca106725 291 #define DMA_FLAG_TE3 ((uint32_t)0x00000800)
Kojto 122:f9eeca106725 292 #define DMA_FLAG_GL4 ((uint32_t)0x00001000)
Kojto 122:f9eeca106725 293 #define DMA_FLAG_TC4 ((uint32_t)0x00002000)
Kojto 122:f9eeca106725 294 #define DMA_FLAG_HT4 ((uint32_t)0x00004000)
Kojto 122:f9eeca106725 295 #define DMA_FLAG_TE4 ((uint32_t)0x00008000)
Kojto 122:f9eeca106725 296 #define DMA_FLAG_GL5 ((uint32_t)0x00010000)
Kojto 122:f9eeca106725 297 #define DMA_FLAG_TC5 ((uint32_t)0x00020000)
Kojto 122:f9eeca106725 298 #define DMA_FLAG_HT5 ((uint32_t)0x00040000)
Kojto 122:f9eeca106725 299 #define DMA_FLAG_TE5 ((uint32_t)0x00080000)
Kojto 122:f9eeca106725 300 #define DMA_FLAG_GL6 ((uint32_t)0x00100000)
Kojto 122:f9eeca106725 301 #define DMA_FLAG_TC6 ((uint32_t)0x00200000)
Kojto 122:f9eeca106725 302 #define DMA_FLAG_HT6 ((uint32_t)0x00400000)
Kojto 122:f9eeca106725 303 #define DMA_FLAG_TE6 ((uint32_t)0x00800000)
Kojto 122:f9eeca106725 304 #define DMA_FLAG_GL7 ((uint32_t)0x01000000)
Kojto 122:f9eeca106725 305 #define DMA_FLAG_TC7 ((uint32_t)0x02000000)
Kojto 122:f9eeca106725 306 #define DMA_FLAG_HT7 ((uint32_t)0x04000000)
Kojto 122:f9eeca106725 307 #define DMA_FLAG_TE7 ((uint32_t)0x08000000)
Kojto 122:f9eeca106725 308 /**
Kojto 122:f9eeca106725 309 * @}
Kojto 122:f9eeca106725 310 */
Kojto 122:f9eeca106725 311
Kojto 122:f9eeca106725 312 /**
Kojto 122:f9eeca106725 313 * @}
Kojto 122:f9eeca106725 314 */
Kojto 122:f9eeca106725 315
Kojto 122:f9eeca106725 316 /* Exported macros -----------------------------------------------------------*/
Kojto 122:f9eeca106725 317 /** @defgroup DMA_Exported_Macros DMA Exported Macros
Kojto 122:f9eeca106725 318 * @{
Kojto 122:f9eeca106725 319 */
Kojto 122:f9eeca106725 320
Kojto 122:f9eeca106725 321 /** @brief Reset DMA handle state.
Kojto 122:f9eeca106725 322 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 323 * @retval None
Kojto 122:f9eeca106725 324 */
Kojto 122:f9eeca106725 325 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
Kojto 122:f9eeca106725 326
Kojto 122:f9eeca106725 327 /**
Kojto 122:f9eeca106725 328 * @brief Enable the specified DMA Channel.
Kojto 122:f9eeca106725 329 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 330 * @retval None
Kojto 122:f9eeca106725 331 */
Kojto 122:f9eeca106725 332 #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN)
Kojto 122:f9eeca106725 333
Kojto 122:f9eeca106725 334 /**
Kojto 122:f9eeca106725 335 * @brief Disable the specified DMA Channel.
Kojto 122:f9eeca106725 336 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 337 * @retval None
Kojto 122:f9eeca106725 338 */
Kojto 122:f9eeca106725 339 #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN)
Kojto 122:f9eeca106725 340
Kojto 122:f9eeca106725 341
Kojto 122:f9eeca106725 342 /* Interrupt & Flag management */
Kojto 122:f9eeca106725 343
Kojto 122:f9eeca106725 344 /**
Kojto 122:f9eeca106725 345 * @brief Return the current DMA Channel transfer complete flag.
Kojto 122:f9eeca106725 346 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 347 * @retval The specified transfer complete flag index.
Kojto 122:f9eeca106725 348 */
Kojto 122:f9eeca106725 349
Kojto 122:f9eeca106725 350 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
Kojto 122:f9eeca106725 351 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
Kojto 122:f9eeca106725 352 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
Kojto 122:f9eeca106725 353 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
Kojto 122:f9eeca106725 354 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
Kojto 122:f9eeca106725 355 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
Kojto 122:f9eeca106725 356 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
Kojto 122:f9eeca106725 357 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
Kojto 122:f9eeca106725 358 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
Kojto 122:f9eeca106725 359 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
Kojto 122:f9eeca106725 360 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TC5 :\
Kojto 122:f9eeca106725 361 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
Kojto 122:f9eeca106725 362 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TC6 :\
Kojto 122:f9eeca106725 363 DMA_FLAG_TC7)
Kojto 122:f9eeca106725 364
Kojto 122:f9eeca106725 365 /**
Kojto 122:f9eeca106725 366 * @brief Return the current DMA Channel half transfer complete flag.
Kojto 122:f9eeca106725 367 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 368 * @retval The specified half transfer complete flag index.
Kojto 122:f9eeca106725 369 */
Kojto 122:f9eeca106725 370 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
Kojto 122:f9eeca106725 371 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
Kojto 122:f9eeca106725 372 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
Kojto 122:f9eeca106725 373 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
Kojto 122:f9eeca106725 374 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
Kojto 122:f9eeca106725 375 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
Kojto 122:f9eeca106725 376 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
Kojto 122:f9eeca106725 377 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
Kojto 122:f9eeca106725 378 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
Kojto 122:f9eeca106725 379 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
Kojto 122:f9eeca106725 380 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_HT5 :\
Kojto 122:f9eeca106725 381 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
Kojto 122:f9eeca106725 382 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_HT6 :\
Kojto 122:f9eeca106725 383 DMA_FLAG_HT7)
Kojto 122:f9eeca106725 384
Kojto 122:f9eeca106725 385 /**
Kojto 122:f9eeca106725 386 * @brief Return the current DMA Channel transfer error flag.
Kojto 122:f9eeca106725 387 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 388 * @retval The specified transfer error flag index.
Kojto 122:f9eeca106725 389 */
Kojto 122:f9eeca106725 390 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
Kojto 122:f9eeca106725 391 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
Kojto 122:f9eeca106725 392 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
Kojto 122:f9eeca106725 393 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
Kojto 122:f9eeca106725 394 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
Kojto 122:f9eeca106725 395 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
Kojto 122:f9eeca106725 396 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
Kojto 122:f9eeca106725 397 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
Kojto 122:f9eeca106725 398 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
Kojto 122:f9eeca106725 399 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
Kojto 122:f9eeca106725 400 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TE5 :\
Kojto 122:f9eeca106725 401 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
Kojto 122:f9eeca106725 402 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TE6 :\
Kojto 122:f9eeca106725 403 DMA_FLAG_TE7)
Kojto 122:f9eeca106725 404
Kojto 122:f9eeca106725 405 /**
Kojto 122:f9eeca106725 406 * @brief Return the current DMA Channel Global interrupt flag.
Kojto 122:f9eeca106725 407 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 408 * @retval The specified transfer error flag index.
Kojto 122:f9eeca106725 409 */
Kojto 122:f9eeca106725 410 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
Kojto 122:f9eeca106725 411 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\
Kojto 122:f9eeca106725 412 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_ISR_GIF1 :\
Kojto 122:f9eeca106725 413 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\
Kojto 122:f9eeca106725 414 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_ISR_GIF2 :\
Kojto 122:f9eeca106725 415 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\
Kojto 122:f9eeca106725 416 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_ISR_GIF3 :\
Kojto 122:f9eeca106725 417 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\
Kojto 122:f9eeca106725 418 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_ISR_GIF4 :\
Kojto 122:f9eeca106725 419 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_ISR_GIF5 :\
Kojto 122:f9eeca106725 420 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_ISR_GIF5 :\
Kojto 122:f9eeca106725 421 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_ISR_GIF6 :\
Kojto 122:f9eeca106725 422 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_ISR_GIF6 :\
Kojto 122:f9eeca106725 423 DMA_ISR_GIF7)
Kojto 122:f9eeca106725 424
Kojto 122:f9eeca106725 425 /**
Kojto 122:f9eeca106725 426 * @brief Get the DMA Channel pending flags.
Kojto 122:f9eeca106725 427 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 428 * @param __FLAG__: Get the specified flag.
Kojto 122:f9eeca106725 429 * This parameter can be any combination of the following values:
Kojto 122:f9eeca106725 430 * @arg DMA_FLAG_TCx: Transfer complete flag
Kojto 122:f9eeca106725 431 * @arg DMA_FLAG_HTx: Half transfer complete flag
Kojto 122:f9eeca106725 432 * @arg DMA_FLAG_TEx: Transfer error flag
Kojto 122:f9eeca106725 433 * @arg DMA_FLAG_GLx: Global interrupt flag
Kojto 122:f9eeca106725 434 * Where x can be from 1 to 7 to select the DMA Channel x flag.
Kojto 122:f9eeca106725 435 * @retval The state of FLAG (SET or RESET).
Kojto 122:f9eeca106725 436 */
Kojto 122:f9eeca106725 437 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \
Kojto 122:f9eeca106725 438 (DMA2->ISR & (__FLAG__)) : (DMA1->ISR & (__FLAG__)))
Kojto 122:f9eeca106725 439
Kojto 122:f9eeca106725 440 /**
Kojto 122:f9eeca106725 441 * @brief Clear the DMA Channel pending flags.
Kojto 122:f9eeca106725 442 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 443 * @param __FLAG__: specifies the flag to clear.
Kojto 122:f9eeca106725 444 * This parameter can be any combination of the following values:
Kojto 122:f9eeca106725 445 * @arg DMA_FLAG_TCx: Transfer complete flag
Kojto 122:f9eeca106725 446 * @arg DMA_FLAG_HTx: Half transfer complete flag
Kojto 122:f9eeca106725 447 * @arg DMA_FLAG_TEx: Transfer error flag
Kojto 122:f9eeca106725 448 * @arg DMA_FLAG_GLx: Global interrupt flag
Kojto 122:f9eeca106725 449 * Where x can be from 1 to 7 to select the DMA Channel x flag.
Kojto 122:f9eeca106725 450 * @retval None
Kojto 122:f9eeca106725 451 */
Kojto 122:f9eeca106725 452 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \
Kojto 122:f9eeca106725 453 (DMA2->IFCR |= (__FLAG__)) : (DMA1->IFCR |= (__FLAG__)))
Kojto 122:f9eeca106725 454
Kojto 122:f9eeca106725 455 /**
Kojto 122:f9eeca106725 456 * @brief Enable the specified DMA Channel interrupts.
Kojto 122:f9eeca106725 457 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 458 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 122:f9eeca106725 459 * This parameter can be any combination of the following values:
Kojto 122:f9eeca106725 460 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 122:f9eeca106725 461 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 122:f9eeca106725 462 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 122:f9eeca106725 463 * @retval None
Kojto 122:f9eeca106725 464 */
Kojto 122:f9eeca106725 465 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__))
Kojto 122:f9eeca106725 466
Kojto 122:f9eeca106725 467 /**
Kojto 122:f9eeca106725 468 * @brief Disable the specified DMA Channel interrupts.
Kojto 122:f9eeca106725 469 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 470 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 122:f9eeca106725 471 * This parameter can be any combination of the following values:
Kojto 122:f9eeca106725 472 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 122:f9eeca106725 473 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 122:f9eeca106725 474 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 122:f9eeca106725 475 * @retval None
Kojto 122:f9eeca106725 476 */
Kojto 122:f9eeca106725 477 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__))
Kojto 122:f9eeca106725 478
Kojto 122:f9eeca106725 479 /**
Kojto 122:f9eeca106725 480 * @brief Check whether the specified DMA Channel interrupt is enabled or not.
Kojto 122:f9eeca106725 481 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 482 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
Kojto 122:f9eeca106725 483 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 484 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 122:f9eeca106725 485 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 122:f9eeca106725 486 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 122:f9eeca106725 487 * @retval The state of DMA_IT (SET or RESET).
Kojto 122:f9eeca106725 488 */
Kojto 122:f9eeca106725 489 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__)))
Kojto 122:f9eeca106725 490
Kojto 122:f9eeca106725 491 /**
Kojto 122:f9eeca106725 492 * @brief Return the number of remaining data units in the current DMA Channel transfer.
Kojto 122:f9eeca106725 493 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 494 * @retval The number of remaining data units in the current DMA Channel transfer.
Kojto 122:f9eeca106725 495 */
Kojto 122:f9eeca106725 496 #define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR)
Kojto 122:f9eeca106725 497
Kojto 122:f9eeca106725 498 /**
Kojto 122:f9eeca106725 499 * @}
Kojto 122:f9eeca106725 500 */
Kojto 122:f9eeca106725 501
Kojto 122:f9eeca106725 502 /* Exported functions --------------------------------------------------------*/
Kojto 122:f9eeca106725 503
Kojto 122:f9eeca106725 504 /** @addtogroup DMA_Exported_Functions
Kojto 122:f9eeca106725 505 * @{
Kojto 122:f9eeca106725 506 */
Kojto 122:f9eeca106725 507
Kojto 122:f9eeca106725 508 /** @addtogroup DMA_Exported_Functions_Group1
Kojto 122:f9eeca106725 509 * @{
Kojto 122:f9eeca106725 510 */
Kojto 122:f9eeca106725 511 /* Initialization and de-initialization functions *****************************/
Kojto 122:f9eeca106725 512 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
Kojto 122:f9eeca106725 513 HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
Kojto 122:f9eeca106725 514 /**
Kojto 122:f9eeca106725 515 * @}
Kojto 122:f9eeca106725 516 */
Kojto 122:f9eeca106725 517
Kojto 122:f9eeca106725 518 /** @addtogroup DMA_Exported_Functions_Group2
Kojto 122:f9eeca106725 519 * @{
Kojto 122:f9eeca106725 520 */
Kojto 122:f9eeca106725 521 /* IO operation functions *****************************************************/
Kojto 122:f9eeca106725 522 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 122:f9eeca106725 523 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 122:f9eeca106725 524 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
Kojto 122:f9eeca106725 525 HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
Kojto 122:f9eeca106725 526 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
Kojto 122:f9eeca106725 527 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
Kojto 122:f9eeca106725 528 HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma));
Kojto 122:f9eeca106725 529 HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID);
Kojto 122:f9eeca106725 530
Kojto 122:f9eeca106725 531 /**
Kojto 122:f9eeca106725 532 * @}
Kojto 122:f9eeca106725 533 */
Kojto 122:f9eeca106725 534
Kojto 122:f9eeca106725 535 /** @addtogroup DMA_Exported_Functions_Group3
Kojto 122:f9eeca106725 536 * @{
Kojto 122:f9eeca106725 537 */
Kojto 122:f9eeca106725 538 /* Peripheral State and Error functions ***************************************/
Kojto 122:f9eeca106725 539 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
Kojto 122:f9eeca106725 540 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
Kojto 122:f9eeca106725 541 /**
Kojto 122:f9eeca106725 542 * @}
Kojto 122:f9eeca106725 543 */
Kojto 122:f9eeca106725 544
Kojto 122:f9eeca106725 545 /**
Kojto 122:f9eeca106725 546 * @}
Kojto 122:f9eeca106725 547 */
Kojto 122:f9eeca106725 548
Kojto 122:f9eeca106725 549 /* Private macros ------------------------------------------------------------*/
Kojto 122:f9eeca106725 550 /** @defgroup DMA_Private_Macros DMA Private Macros
Kojto 122:f9eeca106725 551 * @{
Kojto 122:f9eeca106725 552 */
Kojto 122:f9eeca106725 553
Kojto 122:f9eeca106725 554 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
Kojto 122:f9eeca106725 555 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
Kojto 122:f9eeca106725 556 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
Kojto 122:f9eeca106725 557
Kojto 122:f9eeca106725 558 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
Kojto 122:f9eeca106725 559
Kojto 122:f9eeca106725 560 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
Kojto 122:f9eeca106725 561 ((STATE) == DMA_PINC_DISABLE))
Kojto 122:f9eeca106725 562
Kojto 122:f9eeca106725 563 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
Kojto 122:f9eeca106725 564 ((STATE) == DMA_MINC_DISABLE))
Kojto 122:f9eeca106725 565
Kojto 122:f9eeca106725 566 #define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \
Kojto 122:f9eeca106725 567 ((REQUEST) == DMA_REQUEST_1) || \
Kojto 122:f9eeca106725 568 ((REQUEST) == DMA_REQUEST_2) || \
Kojto 122:f9eeca106725 569 ((REQUEST) == DMA_REQUEST_3) || \
Kojto 122:f9eeca106725 570 ((REQUEST) == DMA_REQUEST_4) || \
Kojto 122:f9eeca106725 571 ((REQUEST) == DMA_REQUEST_5) || \
Kojto 122:f9eeca106725 572 ((REQUEST) == DMA_REQUEST_6) || \
Kojto 122:f9eeca106725 573 ((REQUEST) == DMA_REQUEST_7))
Kojto 122:f9eeca106725 574
Kojto 122:f9eeca106725 575 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
Kojto 122:f9eeca106725 576 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
Kojto 122:f9eeca106725 577 ((SIZE) == DMA_PDATAALIGN_WORD))
Kojto 122:f9eeca106725 578
Kojto 122:f9eeca106725 579 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
Kojto 122:f9eeca106725 580 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
Kojto 122:f9eeca106725 581 ((SIZE) == DMA_MDATAALIGN_WORD ))
Kojto 122:f9eeca106725 582
Kojto 122:f9eeca106725 583 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
Kojto 122:f9eeca106725 584 ((MODE) == DMA_CIRCULAR))
Kojto 122:f9eeca106725 585
Kojto 122:f9eeca106725 586 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
Kojto 122:f9eeca106725 587 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
Kojto 122:f9eeca106725 588 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
Kojto 122:f9eeca106725 589 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
Kojto 122:f9eeca106725 590
Kojto 122:f9eeca106725 591 /**
Kojto 122:f9eeca106725 592 * @}
Kojto 122:f9eeca106725 593 */
Kojto 122:f9eeca106725 594
Kojto 122:f9eeca106725 595 /* Private functions ---------------------------------------------------------*/
Kojto 122:f9eeca106725 596
Kojto 122:f9eeca106725 597 /**
Kojto 122:f9eeca106725 598 * @}
Kojto 122:f9eeca106725 599 */
Kojto 122:f9eeca106725 600
Kojto 122:f9eeca106725 601 /**
Kojto 122:f9eeca106725 602 * @}
Kojto 122:f9eeca106725 603 */
Kojto 122:f9eeca106725 604
Kojto 122:f9eeca106725 605 #ifdef __cplusplus
Kojto 122:f9eeca106725 606 }
Kojto 122:f9eeca106725 607 #endif
Kojto 122:f9eeca106725 608
Kojto 122:f9eeca106725 609 #endif /* __STM32L4xx_HAL_DMA_H */
Kojto 122:f9eeca106725 610
Kojto 122:f9eeca106725 611 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/