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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_EFM32PG12_STK3402/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/efm32pg12b_wdog.h@140:97feb9bacc10, 2017-04-12 (annotated)

Committer:
<>
Date:
Wed Apr 12 16:07:08 2017 +0100
Revision:
140:97feb9bacc10
Parent:
139:856d2700e60b 
Release 140 of the mbed library



Ports for Upcoming Targets



3841: Add nRf52840 target https://github.com/ARMmbed/mbed-os/pull/3841

3992: Introducing UBLOX_C030 platform. https://github.com/ARMmbed/mbed-os/pull/3992



Fixes and Changes



3951: [NUCLEO_F303ZE] Correct ARDUINO pin https://github.com/ARMmbed/mbed-os/pull/3951

4021: Fixing a macro to detect when RTOS was in use for the NRF52840_DK https://github.com/ARMmbed/mbed-os/pull/4021

3979: KW24D: Add missing SPI defines and Arduino connector definitions https://github.com/ARMmbed/mbed-os/pull/3979

3990: UBLOX_C027: construct a ticker-based wait, rather than calling wait_ms(), in the  https://github.com/ARMmbed/mbed-os/pull/3990

4003: Fixed OBOE in async serial tx for NRF52 target, fixes #4002 https://github.com/ARMmbed/mbed-os/pull/4003

4012: STM32: Correct I2C master error handling https://github.com/ARMmbed/mbed-os/pull/4012

4020: NUCLEO_L011K4 remove unsupported tool chain files https://github.com/ARMmbed/mbed-os/pull/4020

4065: K66F: Move bss section to m_data_2 Section https://github.com/ARMmbed/mbed-os/pull/4065

4014: Issue 3763: Reduce heap allocation in the GCC linker file https://github.com/ARMmbed/mbed-os/pull/4014

4030: [STM32L0] reduce IAR heap and stack size for small targets https://github.com/ARMmbed/mbed-os/pull/4030

4109: NUCLEO_L476RG : minor serial pin update https://github.com/ARMmbed/mbed-os/pull/4109

3982: Ticker - kl25z bugfix for handling events in the past https://github.com/ARMmbed/mbed-os/pull/3982

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 139:856d2700e60b 1 /**************************************************************************//**
<> 139:856d2700e60b 2 * @file efm32pg12b_wdog.h
<> 139:856d2700e60b 3 * @brief EFM32PG12B_WDOG register and bit field definitions
<> 139:856d2700e60b 4 * @version 5.1.2
<> 139:856d2700e60b 5 ******************************************************************************
<> 139:856d2700e60b 6 * @section License
<> 139:856d2700e60b 7 * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
<> 139:856d2700e60b 8 ******************************************************************************
<> 139:856d2700e60b 9 *
<> 139:856d2700e60b 10 * Permission is granted to anyone to use this software for any purpose,
<> 139:856d2700e60b 11 * including commercial applications, and to alter it and redistribute it
<> 139:856d2700e60b 12 * freely, subject to the following restrictions:
<> 139:856d2700e60b 13 *
<> 139:856d2700e60b 14 * 1. The origin of this software must not be misrepresented; you must not
<> 139:856d2700e60b 15 * claim that you wrote the original software.@n
<> 139:856d2700e60b 16 * 2. Altered source versions must be plainly marked as such, and must not be
<> 139:856d2700e60b 17 * misrepresented as being the original software.@n
<> 139:856d2700e60b 18 * 3. This notice may not be removed or altered from any source distribution.
<> 139:856d2700e60b 19 *
<> 139:856d2700e60b 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
<> 139:856d2700e60b 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
<> 139:856d2700e60b 22 * providing the Software "AS IS", with no express or implied warranties of any
<> 139:856d2700e60b 23 * kind, including, but not limited to, any implied warranties of
<> 139:856d2700e60b 24 * merchantability or fitness for any particular purpose or warranties against
<> 139:856d2700e60b 25 * infringement of any proprietary rights of a third party.
<> 139:856d2700e60b 26 *
<> 139:856d2700e60b 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
<> 139:856d2700e60b 28 * incidental, or special damages, or any other relief, or for any claim by
<> 139:856d2700e60b 29 * any third party, arising from your use of this Software.
<> 139:856d2700e60b 30 *
<> 139:856d2700e60b 31 *****************************************************************************/
<> 139:856d2700e60b 32 /**************************************************************************//**
<> 139:856d2700e60b 33 * @addtogroup Parts
<> 139:856d2700e60b 34 * @{
<> 139:856d2700e60b 35 ******************************************************************************/
<> 139:856d2700e60b 36 /**************************************************************************//**
<> 139:856d2700e60b 37 * @defgroup EFM32PG12B_WDOG
<> 139:856d2700e60b 38 * @{
<> 139:856d2700e60b 39 * @brief EFM32PG12B_WDOG Register Declaration
<> 139:856d2700e60b 40 *****************************************************************************/
<> 139:856d2700e60b 41 typedef struct
<> 139:856d2700e60b 42 {
<> 139:856d2700e60b 43 __IOM uint32_t CTRL; /**< Control Register */
<> 139:856d2700e60b 44 __IOM uint32_t CMD; /**< Command Register */
<> 139:856d2700e60b 45
<> 139:856d2700e60b 46 __IM uint32_t SYNCBUSY; /**< Synchronization Busy Register */
<> 139:856d2700e60b 47
<> 139:856d2700e60b 48 WDOG_PCH_TypeDef PCH[2]; /**< PCH */
<> 139:856d2700e60b 49
<> 139:856d2700e60b 50 uint32_t RESERVED0[2]; /**< Reserved for future use **/
<> 139:856d2700e60b 51 __IM uint32_t IF; /**< Watchdog Interrupt Flags */
<> 139:856d2700e60b 52 __IOM uint32_t IFS; /**< Interrupt Flag Set Register */
<> 139:856d2700e60b 53 __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */
<> 139:856d2700e60b 54 __IOM uint32_t IEN; /**< Interrupt Enable Register */
<> 139:856d2700e60b 55 } WDOG_TypeDef; /** @} */
<> 139:856d2700e60b 56
<> 139:856d2700e60b 57 /**************************************************************************//**
<> 139:856d2700e60b 58 * @defgroup EFM32PG12B_WDOG_BitFields
<> 139:856d2700e60b 59 * @{
<> 139:856d2700e60b 60 *****************************************************************************/
<> 139:856d2700e60b 61
<> 139:856d2700e60b 62 /* Bit fields for WDOG CTRL */
<> 139:856d2700e60b 63 #define _WDOG_CTRL_RESETVALUE 0x00000F00UL /**< Default value for WDOG_CTRL */
<> 139:856d2700e60b 64 #define _WDOG_CTRL_MASK 0xC7033F7FUL /**< Mask for WDOG_CTRL */
<> 139:856d2700e60b 65 #define WDOG_CTRL_EN (0x1UL << 0) /**< Watchdog Timer Enable */
<> 139:856d2700e60b 66 #define _WDOG_CTRL_EN_SHIFT 0 /**< Shift value for WDOG_EN */
<> 139:856d2700e60b 67 #define _WDOG_CTRL_EN_MASK 0x1UL /**< Bit mask for WDOG_EN */
<> 139:856d2700e60b 68 #define _WDOG_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 69 #define WDOG_CTRL_EN_DEFAULT (_WDOG_CTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 70 #define WDOG_CTRL_DEBUGRUN (0x1UL << 1) /**< Debug Mode Run Enable */
<> 139:856d2700e60b 71 #define _WDOG_CTRL_DEBUGRUN_SHIFT 1 /**< Shift value for WDOG_DEBUGRUN */
<> 139:856d2700e60b 72 #define _WDOG_CTRL_DEBUGRUN_MASK 0x2UL /**< Bit mask for WDOG_DEBUGRUN */
<> 139:856d2700e60b 73 #define _WDOG_CTRL_DEBUGRUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 74 #define WDOG_CTRL_DEBUGRUN_DEFAULT (_WDOG_CTRL_DEBUGRUN_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 75 #define WDOG_CTRL_EM2RUN (0x1UL << 2) /**< Energy Mode 2 Run Enable */
<> 139:856d2700e60b 76 #define _WDOG_CTRL_EM2RUN_SHIFT 2 /**< Shift value for WDOG_EM2RUN */
<> 139:856d2700e60b 77 #define _WDOG_CTRL_EM2RUN_MASK 0x4UL /**< Bit mask for WDOG_EM2RUN */
<> 139:856d2700e60b 78 #define _WDOG_CTRL_EM2RUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 79 #define WDOG_CTRL_EM2RUN_DEFAULT (_WDOG_CTRL_EM2RUN_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 80 #define WDOG_CTRL_EM3RUN (0x1UL << 3) /**< Energy Mode 3 Run Enable */
<> 139:856d2700e60b 81 #define _WDOG_CTRL_EM3RUN_SHIFT 3 /**< Shift value for WDOG_EM3RUN */
<> 139:856d2700e60b 82 #define _WDOG_CTRL_EM3RUN_MASK 0x8UL /**< Bit mask for WDOG_EM3RUN */
<> 139:856d2700e60b 83 #define _WDOG_CTRL_EM3RUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 84 #define WDOG_CTRL_EM3RUN_DEFAULT (_WDOG_CTRL_EM3RUN_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 85 #define WDOG_CTRL_LOCK (0x1UL << 4) /**< Configuration lock */
<> 139:856d2700e60b 86 #define _WDOG_CTRL_LOCK_SHIFT 4 /**< Shift value for WDOG_LOCK */
<> 139:856d2700e60b 87 #define _WDOG_CTRL_LOCK_MASK 0x10UL /**< Bit mask for WDOG_LOCK */
<> 139:856d2700e60b 88 #define _WDOG_CTRL_LOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 89 #define WDOG_CTRL_LOCK_DEFAULT (_WDOG_CTRL_LOCK_DEFAULT << 4) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 90 #define WDOG_CTRL_EM4BLOCK (0x1UL << 5) /**< Energy Mode 4 Block */
<> 139:856d2700e60b 91 #define _WDOG_CTRL_EM4BLOCK_SHIFT 5 /**< Shift value for WDOG_EM4BLOCK */
<> 139:856d2700e60b 92 #define _WDOG_CTRL_EM4BLOCK_MASK 0x20UL /**< Bit mask for WDOG_EM4BLOCK */
<> 139:856d2700e60b 93 #define _WDOG_CTRL_EM4BLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 94 #define WDOG_CTRL_EM4BLOCK_DEFAULT (_WDOG_CTRL_EM4BLOCK_DEFAULT << 5) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 95 #define WDOG_CTRL_SWOSCBLOCK (0x1UL << 6) /**< Software Oscillator Disable Block */
<> 139:856d2700e60b 96 #define _WDOG_CTRL_SWOSCBLOCK_SHIFT 6 /**< Shift value for WDOG_SWOSCBLOCK */
<> 139:856d2700e60b 97 #define _WDOG_CTRL_SWOSCBLOCK_MASK 0x40UL /**< Bit mask for WDOG_SWOSCBLOCK */
<> 139:856d2700e60b 98 #define _WDOG_CTRL_SWOSCBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 99 #define WDOG_CTRL_SWOSCBLOCK_DEFAULT (_WDOG_CTRL_SWOSCBLOCK_DEFAULT << 6) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 100 #define _WDOG_CTRL_PERSEL_SHIFT 8 /**< Shift value for WDOG_PERSEL */
<> 139:856d2700e60b 101 #define _WDOG_CTRL_PERSEL_MASK 0xF00UL /**< Bit mask for WDOG_PERSEL */
<> 139:856d2700e60b 102 #define _WDOG_CTRL_PERSEL_DEFAULT 0x0000000FUL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 103 #define WDOG_CTRL_PERSEL_DEFAULT (_WDOG_CTRL_PERSEL_DEFAULT << 8) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 104 #define _WDOG_CTRL_CLKSEL_SHIFT 12 /**< Shift value for WDOG_CLKSEL */
<> 139:856d2700e60b 105 #define _WDOG_CTRL_CLKSEL_MASK 0x3000UL /**< Bit mask for WDOG_CLKSEL */
<> 139:856d2700e60b 106 #define _WDOG_CTRL_CLKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 107 #define _WDOG_CTRL_CLKSEL_ULFRCO 0x00000000UL /**< Mode ULFRCO for WDOG_CTRL */
<> 139:856d2700e60b 108 #define _WDOG_CTRL_CLKSEL_LFRCO 0x00000001UL /**< Mode LFRCO for WDOG_CTRL */
<> 139:856d2700e60b 109 #define _WDOG_CTRL_CLKSEL_LFXO 0x00000002UL /**< Mode LFXO for WDOG_CTRL */
<> 139:856d2700e60b 110 #define _WDOG_CTRL_CLKSEL_HFCORECLK 0x00000003UL /**< Mode HFCORECLK for WDOG_CTRL */
<> 139:856d2700e60b 111 #define WDOG_CTRL_CLKSEL_DEFAULT (_WDOG_CTRL_CLKSEL_DEFAULT << 12) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 112 #define WDOG_CTRL_CLKSEL_ULFRCO (_WDOG_CTRL_CLKSEL_ULFRCO << 12) /**< Shifted mode ULFRCO for WDOG_CTRL */
<> 139:856d2700e60b 113 #define WDOG_CTRL_CLKSEL_LFRCO (_WDOG_CTRL_CLKSEL_LFRCO << 12) /**< Shifted mode LFRCO for WDOG_CTRL */
<> 139:856d2700e60b 114 #define WDOG_CTRL_CLKSEL_LFXO (_WDOG_CTRL_CLKSEL_LFXO << 12) /**< Shifted mode LFXO for WDOG_CTRL */
<> 139:856d2700e60b 115 #define WDOG_CTRL_CLKSEL_HFCORECLK (_WDOG_CTRL_CLKSEL_HFCORECLK << 12) /**< Shifted mode HFCORECLK for WDOG_CTRL */
<> 139:856d2700e60b 116 #define _WDOG_CTRL_WARNSEL_SHIFT 16 /**< Shift value for WDOG_WARNSEL */
<> 139:856d2700e60b 117 #define _WDOG_CTRL_WARNSEL_MASK 0x30000UL /**< Bit mask for WDOG_WARNSEL */
<> 139:856d2700e60b 118 #define _WDOG_CTRL_WARNSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 119 #define WDOG_CTRL_WARNSEL_DEFAULT (_WDOG_CTRL_WARNSEL_DEFAULT << 16) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 120 #define _WDOG_CTRL_WINSEL_SHIFT 24 /**< Shift value for WDOG_WINSEL */
<> 139:856d2700e60b 121 #define _WDOG_CTRL_WINSEL_MASK 0x7000000UL /**< Bit mask for WDOG_WINSEL */
<> 139:856d2700e60b 122 #define _WDOG_CTRL_WINSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 123 #define WDOG_CTRL_WINSEL_DEFAULT (_WDOG_CTRL_WINSEL_DEFAULT << 24) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 124 #define WDOG_CTRL_CLRSRC (0x1UL << 30) /**< Watchdog Clear Source */
<> 139:856d2700e60b 125 #define _WDOG_CTRL_CLRSRC_SHIFT 30 /**< Shift value for WDOG_CLRSRC */
<> 139:856d2700e60b 126 #define _WDOG_CTRL_CLRSRC_MASK 0x40000000UL /**< Bit mask for WDOG_CLRSRC */
<> 139:856d2700e60b 127 #define _WDOG_CTRL_CLRSRC_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 128 #define _WDOG_CTRL_CLRSRC_SW 0x00000000UL /**< Mode SW for WDOG_CTRL */
<> 139:856d2700e60b 129 #define _WDOG_CTRL_CLRSRC_PCH0 0x00000001UL /**< Mode PCH0 for WDOG_CTRL */
<> 139:856d2700e60b 130 #define WDOG_CTRL_CLRSRC_DEFAULT (_WDOG_CTRL_CLRSRC_DEFAULT << 30) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 131 #define WDOG_CTRL_CLRSRC_SW (_WDOG_CTRL_CLRSRC_SW << 30) /**< Shifted mode SW for WDOG_CTRL */
<> 139:856d2700e60b 132 #define WDOG_CTRL_CLRSRC_PCH0 (_WDOG_CTRL_CLRSRC_PCH0 << 30) /**< Shifted mode PCH0 for WDOG_CTRL */
<> 139:856d2700e60b 133 #define WDOG_CTRL_WDOGRSTDIS (0x1UL << 31) /**< Watchdog Reset Disable */
<> 139:856d2700e60b 134 #define _WDOG_CTRL_WDOGRSTDIS_SHIFT 31 /**< Shift value for WDOG_WDOGRSTDIS */
<> 139:856d2700e60b 135 #define _WDOG_CTRL_WDOGRSTDIS_MASK 0x80000000UL /**< Bit mask for WDOG_WDOGRSTDIS */
<> 139:856d2700e60b 136 #define _WDOG_CTRL_WDOGRSTDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 137 #define _WDOG_CTRL_WDOGRSTDIS_EN 0x00000000UL /**< Mode EN for WDOG_CTRL */
<> 139:856d2700e60b 138 #define _WDOG_CTRL_WDOGRSTDIS_DIS 0x00000001UL /**< Mode DIS for WDOG_CTRL */
<> 139:856d2700e60b 139 #define WDOG_CTRL_WDOGRSTDIS_DEFAULT (_WDOG_CTRL_WDOGRSTDIS_DEFAULT << 31) /**< Shifted mode DEFAULT for WDOG_CTRL */
<> 139:856d2700e60b 140 #define WDOG_CTRL_WDOGRSTDIS_EN (_WDOG_CTRL_WDOGRSTDIS_EN << 31) /**< Shifted mode EN for WDOG_CTRL */
<> 139:856d2700e60b 141 #define WDOG_CTRL_WDOGRSTDIS_DIS (_WDOG_CTRL_WDOGRSTDIS_DIS << 31) /**< Shifted mode DIS for WDOG_CTRL */
<> 139:856d2700e60b 142
<> 139:856d2700e60b 143 /* Bit fields for WDOG CMD */
<> 139:856d2700e60b 144 #define _WDOG_CMD_RESETVALUE 0x00000000UL /**< Default value for WDOG_CMD */
<> 139:856d2700e60b 145 #define _WDOG_CMD_MASK 0x00000001UL /**< Mask for WDOG_CMD */
<> 139:856d2700e60b 146 #define WDOG_CMD_CLEAR (0x1UL << 0) /**< Watchdog Timer Clear */
<> 139:856d2700e60b 147 #define _WDOG_CMD_CLEAR_SHIFT 0 /**< Shift value for WDOG_CLEAR */
<> 139:856d2700e60b 148 #define _WDOG_CMD_CLEAR_MASK 0x1UL /**< Bit mask for WDOG_CLEAR */
<> 139:856d2700e60b 149 #define _WDOG_CMD_CLEAR_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CMD */
<> 139:856d2700e60b 150 #define _WDOG_CMD_CLEAR_UNCHANGED 0x00000000UL /**< Mode UNCHANGED for WDOG_CMD */
<> 139:856d2700e60b 151 #define _WDOG_CMD_CLEAR_CLEARED 0x00000001UL /**< Mode CLEARED for WDOG_CMD */
<> 139:856d2700e60b 152 #define WDOG_CMD_CLEAR_DEFAULT (_WDOG_CMD_CLEAR_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_CMD */
<> 139:856d2700e60b 153 #define WDOG_CMD_CLEAR_UNCHANGED (_WDOG_CMD_CLEAR_UNCHANGED << 0) /**< Shifted mode UNCHANGED for WDOG_CMD */
<> 139:856d2700e60b 154 #define WDOG_CMD_CLEAR_CLEARED (_WDOG_CMD_CLEAR_CLEARED << 0) /**< Shifted mode CLEARED for WDOG_CMD */
<> 139:856d2700e60b 155
<> 139:856d2700e60b 156 /* Bit fields for WDOG SYNCBUSY */
<> 139:856d2700e60b 157 #define _WDOG_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for WDOG_SYNCBUSY */
<> 139:856d2700e60b 158 #define _WDOG_SYNCBUSY_MASK 0x0000000FUL /**< Mask for WDOG_SYNCBUSY */
<> 139:856d2700e60b 159 #define WDOG_SYNCBUSY_CTRL (0x1UL << 0) /**< CTRL Register Busy */
<> 139:856d2700e60b 160 #define _WDOG_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for WDOG_CTRL */
<> 139:856d2700e60b 161 #define _WDOG_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for WDOG_CTRL */
<> 139:856d2700e60b 162 #define _WDOG_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
<> 139:856d2700e60b 163 #define WDOG_SYNCBUSY_CTRL_DEFAULT (_WDOG_SYNCBUSY_CTRL_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
<> 139:856d2700e60b 164 #define WDOG_SYNCBUSY_CMD (0x1UL << 1) /**< CMD Register Busy */
<> 139:856d2700e60b 165 #define _WDOG_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for WDOG_CMD */
<> 139:856d2700e60b 166 #define _WDOG_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for WDOG_CMD */
<> 139:856d2700e60b 167 #define _WDOG_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
<> 139:856d2700e60b 168 #define WDOG_SYNCBUSY_CMD_DEFAULT (_WDOG_SYNCBUSY_CMD_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
<> 139:856d2700e60b 169 #define WDOG_SYNCBUSY_PCH0_PRSCTRL (0x1UL << 2) /**< PCH0_PRSCTRL Register Busy */
<> 139:856d2700e60b 170 #define _WDOG_SYNCBUSY_PCH0_PRSCTRL_SHIFT 2 /**< Shift value for WDOG_PCH0_PRSCTRL */
<> 139:856d2700e60b 171 #define _WDOG_SYNCBUSY_PCH0_PRSCTRL_MASK 0x4UL /**< Bit mask for WDOG_PCH0_PRSCTRL */
<> 139:856d2700e60b 172 #define _WDOG_SYNCBUSY_PCH0_PRSCTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
<> 139:856d2700e60b 173 #define WDOG_SYNCBUSY_PCH0_PRSCTRL_DEFAULT (_WDOG_SYNCBUSY_PCH0_PRSCTRL_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
<> 139:856d2700e60b 174 #define WDOG_SYNCBUSY_PCH1_PRSCTRL (0x1UL << 3) /**< PCH1_PRSCTRL Register Busy */
<> 139:856d2700e60b 175 #define _WDOG_SYNCBUSY_PCH1_PRSCTRL_SHIFT 3 /**< Shift value for WDOG_PCH1_PRSCTRL */
<> 139:856d2700e60b 176 #define _WDOG_SYNCBUSY_PCH1_PRSCTRL_MASK 0x8UL /**< Bit mask for WDOG_PCH1_PRSCTRL */
<> 139:856d2700e60b 177 #define _WDOG_SYNCBUSY_PCH1_PRSCTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
<> 139:856d2700e60b 178 #define WDOG_SYNCBUSY_PCH1_PRSCTRL_DEFAULT (_WDOG_SYNCBUSY_PCH1_PRSCTRL_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
<> 139:856d2700e60b 179
<> 139:856d2700e60b 180 /* Bit fields for WDOG PCH_PRSCTRL */
<> 139:856d2700e60b 181 #define _WDOG_PCH_PRSCTRL_RESETVALUE 0x00000000UL /**< Default value for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 182 #define _WDOG_PCH_PRSCTRL_MASK 0x0000010FUL /**< Mask for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 183 #define _WDOG_PCH_PRSCTRL_PRSSEL_SHIFT 0 /**< Shift value for WDOG_PRSSEL */
<> 139:856d2700e60b 184 #define _WDOG_PCH_PRSCTRL_PRSSEL_MASK 0xFUL /**< Bit mask for WDOG_PRSSEL */
<> 139:856d2700e60b 185 #define _WDOG_PCH_PRSCTRL_PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 186 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 187 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 188 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 189 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 190 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 191 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 192 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 193 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 194 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 195 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 196 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 197 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 198 #define WDOG_PCH_PRSCTRL_PRSSEL_DEFAULT (_WDOG_PCH_PRSCTRL_PRSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 199 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH0 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH0 << 0) /**< Shifted mode PRSCH0 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 200 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH1 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH1 << 0) /**< Shifted mode PRSCH1 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 201 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH2 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH2 << 0) /**< Shifted mode PRSCH2 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 202 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH3 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH3 << 0) /**< Shifted mode PRSCH3 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 203 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH4 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH4 << 0) /**< Shifted mode PRSCH4 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 204 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH5 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH5 << 0) /**< Shifted mode PRSCH5 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 205 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH6 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH6 << 0) /**< Shifted mode PRSCH6 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 206 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH7 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH7 << 0) /**< Shifted mode PRSCH7 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 207 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH8 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH8 << 0) /**< Shifted mode PRSCH8 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 208 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH9 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH9 << 0) /**< Shifted mode PRSCH9 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 209 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH10 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH10 << 0) /**< Shifted mode PRSCH10 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 210 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH11 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH11 << 0) /**< Shifted mode PRSCH11 for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 211 #define WDOG_PCH_PRSCTRL_PRSMISSRSTEN (0x1UL << 8) /**< PRS missing event will trigger a watchdog reset */
<> 139:856d2700e60b 212 #define _WDOG_PCH_PRSCTRL_PRSMISSRSTEN_SHIFT 8 /**< Shift value for WDOG_PRSMISSRSTEN */
<> 139:856d2700e60b 213 #define _WDOG_PCH_PRSCTRL_PRSMISSRSTEN_MASK 0x100UL /**< Bit mask for WDOG_PRSMISSRSTEN */
<> 139:856d2700e60b 214 #define _WDOG_PCH_PRSCTRL_PRSMISSRSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 215 #define WDOG_PCH_PRSCTRL_PRSMISSRSTEN_DEFAULT (_WDOG_PCH_PRSCTRL_PRSMISSRSTEN_DEFAULT << 8) /**< Shifted mode DEFAULT for WDOG_PCH_PRSCTRL */
<> 139:856d2700e60b 216
<> 139:856d2700e60b 217 /* Bit fields for WDOG IF */
<> 139:856d2700e60b 218 #define _WDOG_IF_RESETVALUE 0x00000000UL /**< Default value for WDOG_IF */
<> 139:856d2700e60b 219 #define _WDOG_IF_MASK 0x0000001FUL /**< Mask for WDOG_IF */
<> 139:856d2700e60b 220 #define WDOG_IF_TOUT (0x1UL << 0) /**< WDOG Timeout Interrupt Flag */
<> 139:856d2700e60b 221 #define _WDOG_IF_TOUT_SHIFT 0 /**< Shift value for WDOG_TOUT */
<> 139:856d2700e60b 222 #define _WDOG_IF_TOUT_MASK 0x1UL /**< Bit mask for WDOG_TOUT */
<> 139:856d2700e60b 223 #define _WDOG_IF_TOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IF */
<> 139:856d2700e60b 224 #define WDOG_IF_TOUT_DEFAULT (_WDOG_IF_TOUT_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_IF */
<> 139:856d2700e60b 225 #define WDOG_IF_WARN (0x1UL << 1) /**< WDOG Warning Timeout Interrupt Flag */
<> 139:856d2700e60b 226 #define _WDOG_IF_WARN_SHIFT 1 /**< Shift value for WDOG_WARN */
<> 139:856d2700e60b 227 #define _WDOG_IF_WARN_MASK 0x2UL /**< Bit mask for WDOG_WARN */
<> 139:856d2700e60b 228 #define _WDOG_IF_WARN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IF */
<> 139:856d2700e60b 229 #define WDOG_IF_WARN_DEFAULT (_WDOG_IF_WARN_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_IF */
<> 139:856d2700e60b 230 #define WDOG_IF_WIN (0x1UL << 2) /**< WDOG Window Interrupt Flag */
<> 139:856d2700e60b 231 #define _WDOG_IF_WIN_SHIFT 2 /**< Shift value for WDOG_WIN */
<> 139:856d2700e60b 232 #define _WDOG_IF_WIN_MASK 0x4UL /**< Bit mask for WDOG_WIN */
<> 139:856d2700e60b 233 #define _WDOG_IF_WIN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IF */
<> 139:856d2700e60b 234 #define WDOG_IF_WIN_DEFAULT (_WDOG_IF_WIN_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_IF */
<> 139:856d2700e60b 235 #define WDOG_IF_PEM0 (0x1UL << 3) /**< PRS Channel Zero Event Missing Interrupt Flag */
<> 139:856d2700e60b 236 #define _WDOG_IF_PEM0_SHIFT 3 /**< Shift value for WDOG_PEM0 */
<> 139:856d2700e60b 237 #define _WDOG_IF_PEM0_MASK 0x8UL /**< Bit mask for WDOG_PEM0 */
<> 139:856d2700e60b 238 #define _WDOG_IF_PEM0_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IF */
<> 139:856d2700e60b 239 #define WDOG_IF_PEM0_DEFAULT (_WDOG_IF_PEM0_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_IF */
<> 139:856d2700e60b 240 #define WDOG_IF_PEM1 (0x1UL << 4) /**< PRS Channel One Event Missing Interrupt Flag */
<> 139:856d2700e60b 241 #define _WDOG_IF_PEM1_SHIFT 4 /**< Shift value for WDOG_PEM1 */
<> 139:856d2700e60b 242 #define _WDOG_IF_PEM1_MASK 0x10UL /**< Bit mask for WDOG_PEM1 */
<> 139:856d2700e60b 243 #define _WDOG_IF_PEM1_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IF */
<> 139:856d2700e60b 244 #define WDOG_IF_PEM1_DEFAULT (_WDOG_IF_PEM1_DEFAULT << 4) /**< Shifted mode DEFAULT for WDOG_IF */
<> 139:856d2700e60b 245
<> 139:856d2700e60b 246 /* Bit fields for WDOG IFS */
<> 139:856d2700e60b 247 #define _WDOG_IFS_RESETVALUE 0x00000000UL /**< Default value for WDOG_IFS */
<> 139:856d2700e60b 248 #define _WDOG_IFS_MASK 0x0000001FUL /**< Mask for WDOG_IFS */
<> 139:856d2700e60b 249 #define WDOG_IFS_TOUT (0x1UL << 0) /**< Set TOUT Interrupt Flag */
<> 139:856d2700e60b 250 #define _WDOG_IFS_TOUT_SHIFT 0 /**< Shift value for WDOG_TOUT */
<> 139:856d2700e60b 251 #define _WDOG_IFS_TOUT_MASK 0x1UL /**< Bit mask for WDOG_TOUT */
<> 139:856d2700e60b 252 #define _WDOG_IFS_TOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFS */
<> 139:856d2700e60b 253 #define WDOG_IFS_TOUT_DEFAULT (_WDOG_IFS_TOUT_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_IFS */
<> 139:856d2700e60b 254 #define WDOG_IFS_WARN (0x1UL << 1) /**< Set WARN Interrupt Flag */
<> 139:856d2700e60b 255 #define _WDOG_IFS_WARN_SHIFT 1 /**< Shift value for WDOG_WARN */
<> 139:856d2700e60b 256 #define _WDOG_IFS_WARN_MASK 0x2UL /**< Bit mask for WDOG_WARN */
<> 139:856d2700e60b 257 #define _WDOG_IFS_WARN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFS */
<> 139:856d2700e60b 258 #define WDOG_IFS_WARN_DEFAULT (_WDOG_IFS_WARN_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_IFS */
<> 139:856d2700e60b 259 #define WDOG_IFS_WIN (0x1UL << 2) /**< Set WIN Interrupt Flag */
<> 139:856d2700e60b 260 #define _WDOG_IFS_WIN_SHIFT 2 /**< Shift value for WDOG_WIN */
<> 139:856d2700e60b 261 #define _WDOG_IFS_WIN_MASK 0x4UL /**< Bit mask for WDOG_WIN */
<> 139:856d2700e60b 262 #define _WDOG_IFS_WIN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFS */
<> 139:856d2700e60b 263 #define WDOG_IFS_WIN_DEFAULT (_WDOG_IFS_WIN_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_IFS */
<> 139:856d2700e60b 264 #define WDOG_IFS_PEM0 (0x1UL << 3) /**< Set PEM0 Interrupt Flag */
<> 139:856d2700e60b 265 #define _WDOG_IFS_PEM0_SHIFT 3 /**< Shift value for WDOG_PEM0 */
<> 139:856d2700e60b 266 #define _WDOG_IFS_PEM0_MASK 0x8UL /**< Bit mask for WDOG_PEM0 */
<> 139:856d2700e60b 267 #define _WDOG_IFS_PEM0_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFS */
<> 139:856d2700e60b 268 #define WDOG_IFS_PEM0_DEFAULT (_WDOG_IFS_PEM0_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_IFS */
<> 139:856d2700e60b 269 #define WDOG_IFS_PEM1 (0x1UL << 4) /**< Set PEM1 Interrupt Flag */
<> 139:856d2700e60b 270 #define _WDOG_IFS_PEM1_SHIFT 4 /**< Shift value for WDOG_PEM1 */
<> 139:856d2700e60b 271 #define _WDOG_IFS_PEM1_MASK 0x10UL /**< Bit mask for WDOG_PEM1 */
<> 139:856d2700e60b 272 #define _WDOG_IFS_PEM1_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFS */
<> 139:856d2700e60b 273 #define WDOG_IFS_PEM1_DEFAULT (_WDOG_IFS_PEM1_DEFAULT << 4) /**< Shifted mode DEFAULT for WDOG_IFS */
<> 139:856d2700e60b 274
<> 139:856d2700e60b 275 /* Bit fields for WDOG IFC */
<> 139:856d2700e60b 276 #define _WDOG_IFC_RESETVALUE 0x00000000UL /**< Default value for WDOG_IFC */
<> 139:856d2700e60b 277 #define _WDOG_IFC_MASK 0x0000001FUL /**< Mask for WDOG_IFC */
<> 139:856d2700e60b 278 #define WDOG_IFC_TOUT (0x1UL << 0) /**< Clear TOUT Interrupt Flag */
<> 139:856d2700e60b 279 #define _WDOG_IFC_TOUT_SHIFT 0 /**< Shift value for WDOG_TOUT */
<> 139:856d2700e60b 280 #define _WDOG_IFC_TOUT_MASK 0x1UL /**< Bit mask for WDOG_TOUT */
<> 139:856d2700e60b 281 #define _WDOG_IFC_TOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFC */
<> 139:856d2700e60b 282 #define WDOG_IFC_TOUT_DEFAULT (_WDOG_IFC_TOUT_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_IFC */
<> 139:856d2700e60b 283 #define WDOG_IFC_WARN (0x1UL << 1) /**< Clear WARN Interrupt Flag */
<> 139:856d2700e60b 284 #define _WDOG_IFC_WARN_SHIFT 1 /**< Shift value for WDOG_WARN */
<> 139:856d2700e60b 285 #define _WDOG_IFC_WARN_MASK 0x2UL /**< Bit mask for WDOG_WARN */
<> 139:856d2700e60b 286 #define _WDOG_IFC_WARN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFC */
<> 139:856d2700e60b 287 #define WDOG_IFC_WARN_DEFAULT (_WDOG_IFC_WARN_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_IFC */
<> 139:856d2700e60b 288 #define WDOG_IFC_WIN (0x1UL << 2) /**< Clear WIN Interrupt Flag */
<> 139:856d2700e60b 289 #define _WDOG_IFC_WIN_SHIFT 2 /**< Shift value for WDOG_WIN */
<> 139:856d2700e60b 290 #define _WDOG_IFC_WIN_MASK 0x4UL /**< Bit mask for WDOG_WIN */
<> 139:856d2700e60b 291 #define _WDOG_IFC_WIN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFC */
<> 139:856d2700e60b 292 #define WDOG_IFC_WIN_DEFAULT (_WDOG_IFC_WIN_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_IFC */
<> 139:856d2700e60b 293 #define WDOG_IFC_PEM0 (0x1UL << 3) /**< Clear PEM0 Interrupt Flag */
<> 139:856d2700e60b 294 #define _WDOG_IFC_PEM0_SHIFT 3 /**< Shift value for WDOG_PEM0 */
<> 139:856d2700e60b 295 #define _WDOG_IFC_PEM0_MASK 0x8UL /**< Bit mask for WDOG_PEM0 */
<> 139:856d2700e60b 296 #define _WDOG_IFC_PEM0_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFC */
<> 139:856d2700e60b 297 #define WDOG_IFC_PEM0_DEFAULT (_WDOG_IFC_PEM0_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_IFC */
<> 139:856d2700e60b 298 #define WDOG_IFC_PEM1 (0x1UL << 4) /**< Clear PEM1 Interrupt Flag */
<> 139:856d2700e60b 299 #define _WDOG_IFC_PEM1_SHIFT 4 /**< Shift value for WDOG_PEM1 */
<> 139:856d2700e60b 300 #define _WDOG_IFC_PEM1_MASK 0x10UL /**< Bit mask for WDOG_PEM1 */
<> 139:856d2700e60b 301 #define _WDOG_IFC_PEM1_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFC */
<> 139:856d2700e60b 302 #define WDOG_IFC_PEM1_DEFAULT (_WDOG_IFC_PEM1_DEFAULT << 4) /**< Shifted mode DEFAULT for WDOG_IFC */
<> 139:856d2700e60b 303
<> 139:856d2700e60b 304 /* Bit fields for WDOG IEN */
<> 139:856d2700e60b 305 #define _WDOG_IEN_RESETVALUE 0x00000000UL /**< Default value for WDOG_IEN */
<> 139:856d2700e60b 306 #define _WDOG_IEN_MASK 0x0000001FUL /**< Mask for WDOG_IEN */
<> 139:856d2700e60b 307 #define WDOG_IEN_TOUT (0x1UL << 0) /**< TOUT Interrupt Enable */
<> 139:856d2700e60b 308 #define _WDOG_IEN_TOUT_SHIFT 0 /**< Shift value for WDOG_TOUT */
<> 139:856d2700e60b 309 #define _WDOG_IEN_TOUT_MASK 0x1UL /**< Bit mask for WDOG_TOUT */
<> 139:856d2700e60b 310 #define _WDOG_IEN_TOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IEN */
<> 139:856d2700e60b 311 #define WDOG_IEN_TOUT_DEFAULT (_WDOG_IEN_TOUT_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_IEN */
<> 139:856d2700e60b 312 #define WDOG_IEN_WARN (0x1UL << 1) /**< WARN Interrupt Enable */
<> 139:856d2700e60b 313 #define _WDOG_IEN_WARN_SHIFT 1 /**< Shift value for WDOG_WARN */
<> 139:856d2700e60b 314 #define _WDOG_IEN_WARN_MASK 0x2UL /**< Bit mask for WDOG_WARN */
<> 139:856d2700e60b 315 #define _WDOG_IEN_WARN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IEN */
<> 139:856d2700e60b 316 #define WDOG_IEN_WARN_DEFAULT (_WDOG_IEN_WARN_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_IEN */
<> 139:856d2700e60b 317 #define WDOG_IEN_WIN (0x1UL << 2) /**< WIN Interrupt Enable */
<> 139:856d2700e60b 318 #define _WDOG_IEN_WIN_SHIFT 2 /**< Shift value for WDOG_WIN */
<> 139:856d2700e60b 319 #define _WDOG_IEN_WIN_MASK 0x4UL /**< Bit mask for WDOG_WIN */
<> 139:856d2700e60b 320 #define _WDOG_IEN_WIN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IEN */
<> 139:856d2700e60b 321 #define WDOG_IEN_WIN_DEFAULT (_WDOG_IEN_WIN_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_IEN */
<> 139:856d2700e60b 322 #define WDOG_IEN_PEM0 (0x1UL << 3) /**< PEM0 Interrupt Enable */
<> 139:856d2700e60b 323 #define _WDOG_IEN_PEM0_SHIFT 3 /**< Shift value for WDOG_PEM0 */
<> 139:856d2700e60b 324 #define _WDOG_IEN_PEM0_MASK 0x8UL /**< Bit mask for WDOG_PEM0 */
<> 139:856d2700e60b 325 #define _WDOG_IEN_PEM0_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IEN */
<> 139:856d2700e60b 326 #define WDOG_IEN_PEM0_DEFAULT (_WDOG_IEN_PEM0_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_IEN */
<> 139:856d2700e60b 327 #define WDOG_IEN_PEM1 (0x1UL << 4) /**< PEM1 Interrupt Enable */
<> 139:856d2700e60b 328 #define _WDOG_IEN_PEM1_SHIFT 4 /**< Shift value for WDOG_PEM1 */
<> 139:856d2700e60b 329 #define _WDOG_IEN_PEM1_MASK 0x10UL /**< Bit mask for WDOG_PEM1 */
<> 139:856d2700e60b 330 #define _WDOG_IEN_PEM1_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IEN */
<> 139:856d2700e60b 331 #define WDOG_IEN_PEM1_DEFAULT (_WDOG_IEN_PEM1_DEFAULT << 4) /**< Shifted mode DEFAULT for WDOG_IEN */
<> 139:856d2700e60b 332
<> 139:856d2700e60b 333 /** @} End of group EFM32PG12B_WDOG */
<> 139:856d2700e60b 334 /** @} End of group Parts */
<> 139:856d2700e60b 335