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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_EFM32PG12_STK3402/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/efm32pg12b_prs_signals.h@140:97feb9bacc10, 2017-04-12 (annotated)

Committer:
<>
Date:
Wed Apr 12 16:07:08 2017 +0100
Revision:
140:97feb9bacc10
Parent:
139:856d2700e60b 
Release 140 of the mbed library



Ports for Upcoming Targets



3841: Add nRf52840 target https://github.com/ARMmbed/mbed-os/pull/3841

3992: Introducing UBLOX_C030 platform. https://github.com/ARMmbed/mbed-os/pull/3992



Fixes and Changes



3951: [NUCLEO_F303ZE] Correct ARDUINO pin https://github.com/ARMmbed/mbed-os/pull/3951

4021: Fixing a macro to detect when RTOS was in use for the NRF52840_DK https://github.com/ARMmbed/mbed-os/pull/4021

3979: KW24D: Add missing SPI defines and Arduino connector definitions https://github.com/ARMmbed/mbed-os/pull/3979

3990: UBLOX_C027: construct a ticker-based wait, rather than calling wait_ms(), in the  https://github.com/ARMmbed/mbed-os/pull/3990

4003: Fixed OBOE in async serial tx for NRF52 target, fixes #4002 https://github.com/ARMmbed/mbed-os/pull/4003

4012: STM32: Correct I2C master error handling https://github.com/ARMmbed/mbed-os/pull/4012

4020: NUCLEO_L011K4 remove unsupported tool chain files https://github.com/ARMmbed/mbed-os/pull/4020

4065: K66F: Move bss section to m_data_2 Section https://github.com/ARMmbed/mbed-os/pull/4065

4014: Issue 3763: Reduce heap allocation in the GCC linker file https://github.com/ARMmbed/mbed-os/pull/4014

4030: [STM32L0] reduce IAR heap and stack size for small targets https://github.com/ARMmbed/mbed-os/pull/4030

4109: NUCLEO_L476RG : minor serial pin update https://github.com/ARMmbed/mbed-os/pull/4109

3982: Ticker - kl25z bugfix for handling events in the past https://github.com/ARMmbed/mbed-os/pull/3982

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 139:856d2700e60b 1 /**************************************************************************//**
<> 139:856d2700e60b 2 * @file efm32pg12b_prs_signals.h
<> 139:856d2700e60b 3 * @brief EFM32PG12B_PRS_SIGNALS register and bit field definitions
<> 139:856d2700e60b 4 * @version 5.1.2
<> 139:856d2700e60b 5 ******************************************************************************
<> 139:856d2700e60b 6 * @section License
<> 139:856d2700e60b 7 * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
<> 139:856d2700e60b 8 ******************************************************************************
<> 139:856d2700e60b 9 *
<> 139:856d2700e60b 10 * Permission is granted to anyone to use this software for any purpose,
<> 139:856d2700e60b 11 * including commercial applications, and to alter it and redistribute it
<> 139:856d2700e60b 12 * freely, subject to the following restrictions:
<> 139:856d2700e60b 13 *
<> 139:856d2700e60b 14 * 1. The origin of this software must not be misrepresented; you must not
<> 139:856d2700e60b 15 * claim that you wrote the original software.@n
<> 139:856d2700e60b 16 * 2. Altered source versions must be plainly marked as such, and must not be
<> 139:856d2700e60b 17 * misrepresented as being the original software.@n
<> 139:856d2700e60b 18 * 3. This notice may not be removed or altered from any source distribution.
<> 139:856d2700e60b 19 *
<> 139:856d2700e60b 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
<> 139:856d2700e60b 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
<> 139:856d2700e60b 22 * providing the Software "AS IS", with no express or implied warranties of any
<> 139:856d2700e60b 23 * kind, including, but not limited to, any implied warranties of
<> 139:856d2700e60b 24 * merchantability or fitness for any particular purpose or warranties against
<> 139:856d2700e60b 25 * infringement of any proprietary rights of a third party.
<> 139:856d2700e60b 26 *
<> 139:856d2700e60b 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
<> 139:856d2700e60b 28 * incidental, or special damages, or any other relief, or for any claim by
<> 139:856d2700e60b 29 * any third party, arising from your use of this Software.
<> 139:856d2700e60b 30 *
<> 139:856d2700e60b 31 *****************************************************************************/
<> 139:856d2700e60b 32 /**************************************************************************//**
<> 139:856d2700e60b 33 * @addtogroup Parts
<> 139:856d2700e60b 34 * @{
<> 139:856d2700e60b 35 ******************************************************************************/
<> 139:856d2700e60b 36 /**************************************************************************//**
<> 139:856d2700e60b 37 * @addtogroup EFM32PG12B_PRS_Signals
<> 139:856d2700e60b 38 * @{
<> 139:856d2700e60b 39 * @brief PRS Signal names
<> 139:856d2700e60b 40 *****************************************************************************/
<> 139:856d2700e60b 41 #define PRS_PRS_CH0 ((1 << 8) + 0) /**< PRS PRS channel 0 */
<> 139:856d2700e60b 42 #define PRS_PRS_CH1 ((1 << 8) + 1) /**< PRS PRS channel 1 */
<> 139:856d2700e60b 43 #define PRS_PRS_CH2 ((1 << 8) + 2) /**< PRS PRS channel 2 */
<> 139:856d2700e60b 44 #define PRS_PRS_CH3 ((1 << 8) + 3) /**< PRS PRS channel 3 */
<> 139:856d2700e60b 45 #define PRS_PRS_CH4 ((1 << 8) + 4) /**< PRS PRS channel 4 */
<> 139:856d2700e60b 46 #define PRS_PRS_CH5 ((1 << 8) + 5) /**< PRS PRS channel 5 */
<> 139:856d2700e60b 47 #define PRS_PRS_CH6 ((1 << 8) + 6) /**< PRS PRS channel 6 */
<> 139:856d2700e60b 48 #define PRS_PRS_CH7 ((1 << 8) + 7) /**< PRS PRS channel 7 */
<> 139:856d2700e60b 49 #define PRS_PRS_CH8 ((2 << 8) + 0) /**< PRS PRS channel 8 */
<> 139:856d2700e60b 50 #define PRS_PRS_CH9 ((2 << 8) + 1) /**< PRS PRS channel 9 */
<> 139:856d2700e60b 51 #define PRS_PRS_CH10 ((2 << 8) + 2) /**< PRS PRS channel 10 */
<> 139:856d2700e60b 52 #define PRS_PRS_CH11 ((2 << 8) + 3) /**< PRS PRS channel 11 */
<> 139:856d2700e60b 53 #define PRS_ACMP0_OUT ((3 << 8) + 0) /**< PRS Analog comparator output */
<> 139:856d2700e60b 54 #define PRS_ACMP1_OUT ((4 << 8) + 0) /**< PRS Analog comparator output */
<> 139:856d2700e60b 55 #define PRS_ADC0_SINGLE ((5 << 8) + 0) /**< PRS ADC single conversion done */
<> 139:856d2700e60b 56 #define PRS_ADC0_SCAN ((5 << 8) + 1) /**< PRS ADC scan conversion done */
<> 139:856d2700e60b 57 #define PRS_LESENSE_SCANRES0 ((7 << 8) + 0) /**< PRS LESENSE SCANRES register, bit 0 */
<> 139:856d2700e60b 58 #define PRS_LESENSE_SCANRES1 ((7 << 8) + 1) /**< PRS LESENSE SCANRES register, bit 1 */
<> 139:856d2700e60b 59 #define PRS_LESENSE_SCANRES2 ((7 << 8) + 2) /**< PRS LESENSE SCANRES register, bit 2 */
<> 139:856d2700e60b 60 #define PRS_LESENSE_SCANRES3 ((7 << 8) + 3) /**< PRS LESENSE SCANRES register, bit 3 */
<> 139:856d2700e60b 61 #define PRS_LESENSE_SCANRES4 ((7 << 8) + 4) /**< PRS LESENSE SCANRES register, bit 4 */
<> 139:856d2700e60b 62 #define PRS_LESENSE_SCANRES5 ((7 << 8) + 5) /**< PRS LESENSE SCANRES register, bit 5 */
<> 139:856d2700e60b 63 #define PRS_LESENSE_SCANRES6 ((7 << 8) + 6) /**< PRS LESENSE SCANRES register, bit 6 */
<> 139:856d2700e60b 64 #define PRS_LESENSE_SCANRES7 ((7 << 8) + 7) /**< PRS LESENSE SCANRES register, bit 7 */
<> 139:856d2700e60b 65 #define PRS_LESENSE_SCANRES8 ((8 << 8) + 0) /**< PRS LESENSE SCANRES register, bit 8 */
<> 139:856d2700e60b 66 #define PRS_LESENSE_SCANRES9 ((8 << 8) + 1) /**< PRS LESENSE SCANRES register, bit 9 */
<> 139:856d2700e60b 67 #define PRS_LESENSE_SCANRES10 ((8 << 8) + 2) /**< PRS LESENSE SCANRES register, bit 10 */
<> 139:856d2700e60b 68 #define PRS_LESENSE_SCANRES11 ((8 << 8) + 3) /**< PRS LESENSE SCANRES register, bit 11 */
<> 139:856d2700e60b 69 #define PRS_LESENSE_SCANRES12 ((8 << 8) + 4) /**< PRS LESENSE SCANRES register, bit 12 */
<> 139:856d2700e60b 70 #define PRS_LESENSE_SCANRES13 ((8 << 8) + 5) /**< PRS LESENSE SCANRES register, bit 13 */
<> 139:856d2700e60b 71 #define PRS_LESENSE_SCANRES14 ((8 << 8) + 6) /**< PRS LESENSE SCANRES register, bit 14 */
<> 139:856d2700e60b 72 #define PRS_LESENSE_SCANRES15 ((8 << 8) + 7) /**< PRS LESENSE SCANRES register, bit 15 */
<> 139:856d2700e60b 73 #define PRS_LESENSE_DEC0 ((9 << 8) + 0) /**< PRS LESENSE Decoder PRS out 0 */
<> 139:856d2700e60b 74 #define PRS_LESENSE_DEC1 ((9 << 8) + 1) /**< PRS LESENSE Decoder PRS out 1 */
<> 139:856d2700e60b 75 #define PRS_LESENSE_DEC2 ((9 << 8) + 2) /**< PRS LESENSE Decoder PRS out 2 */
<> 139:856d2700e60b 76 #define PRS_LESENSE_DECCMP ((9 << 8) + 3) /**< PRS LESENSE Decoder PRS compare value match channel */
<> 139:856d2700e60b 77 #define PRS_LESENSE_MEASACT ((10 << 8) + 0) /**< PRS LESENSE Measurement active */
<> 139:856d2700e60b 78 #define PRS_RTCC_CCV0 ((11 << 8) + 1) /**< PRS RTCC Compare 0 */
<> 139:856d2700e60b 79 #define PRS_RTCC_CCV1 ((11 << 8) + 2) /**< PRS RTCC Compare 1 */
<> 139:856d2700e60b 80 #define PRS_RTCC_CCV2 ((11 << 8) + 3) /**< PRS RTCC Compare 2 */
<> 139:856d2700e60b 81 #define PRS_GPIO_PIN0 ((12 << 8) + 0) /**< PRS GPIO pin 0 */
<> 139:856d2700e60b 82 #define PRS_GPIO_PIN1 ((12 << 8) + 1) /**< PRS GPIO pin 1 */
<> 139:856d2700e60b 83 #define PRS_GPIO_PIN2 ((12 << 8) + 2) /**< PRS GPIO pin 2 */
<> 139:856d2700e60b 84 #define PRS_GPIO_PIN3 ((12 << 8) + 3) /**< PRS GPIO pin 3 */
<> 139:856d2700e60b 85 #define PRS_GPIO_PIN4 ((12 << 8) + 4) /**< PRS GPIO pin 4 */
<> 139:856d2700e60b 86 #define PRS_GPIO_PIN5 ((12 << 8) + 5) /**< PRS GPIO pin 5 */
<> 139:856d2700e60b 87 #define PRS_GPIO_PIN6 ((12 << 8) + 6) /**< PRS GPIO pin 6 */
<> 139:856d2700e60b 88 #define PRS_GPIO_PIN7 ((12 << 8) + 7) /**< PRS GPIO pin 7 */
<> 139:856d2700e60b 89 #define PRS_GPIO_PIN8 ((13 << 8) + 0) /**< PRS GPIO pin 8 */
<> 139:856d2700e60b 90 #define PRS_GPIO_PIN9 ((13 << 8) + 1) /**< PRS GPIO pin 9 */
<> 139:856d2700e60b 91 #define PRS_GPIO_PIN10 ((13 << 8) + 2) /**< PRS GPIO pin 10 */
<> 139:856d2700e60b 92 #define PRS_GPIO_PIN11 ((13 << 8) + 3) /**< PRS GPIO pin 11 */
<> 139:856d2700e60b 93 #define PRS_GPIO_PIN12 ((13 << 8) + 4) /**< PRS GPIO pin 12 */
<> 139:856d2700e60b 94 #define PRS_GPIO_PIN13 ((13 << 8) + 5) /**< PRS GPIO pin 13 */
<> 139:856d2700e60b 95 #define PRS_GPIO_PIN14 ((13 << 8) + 6) /**< PRS GPIO pin 14 */
<> 139:856d2700e60b 96 #define PRS_GPIO_PIN15 ((13 << 8) + 7) /**< PRS GPIO pin 15 */
<> 139:856d2700e60b 97 #define PRS_LETIMER0_CH0 ((14 << 8) + 0) /**< PRS LETIMER CH0 Out */
<> 139:856d2700e60b 98 #define PRS_LETIMER0_CH1 ((14 << 8) + 1) /**< PRS LETIMER CH1 Out */
<> 139:856d2700e60b 99 #define PRS_PCNT0_TCC ((15 << 8) + 0) /**< PRS PCNT0 Triggered compare match */
<> 139:856d2700e60b 100 #define PRS_PCNT0_UFOF ((15 << 8) + 1) /**< PRS PCNT0 Counter overflow or underflow */
<> 139:856d2700e60b 101 #define PRS_PCNT0_DIR ((15 << 8) + 2) /**< PRS PCNT0 Counter direction */
<> 139:856d2700e60b 102 #define PRS_PCNT1_TCC ((16 << 8) + 0) /**< PRS PCNT1 Triggered compare match */
<> 139:856d2700e60b 103 #define PRS_PCNT1_UFOF ((16 << 8) + 1) /**< PRS PCNT1 Counter overflow or underflow */
<> 139:856d2700e60b 104 #define PRS_PCNT1_DIR ((16 << 8) + 2) /**< PRS PCNT1 Counter direction */
<> 139:856d2700e60b 105 #define PRS_PCNT2_TCC ((17 << 8) + 0) /**< PRS PCNT2 Triggered compare match */
<> 139:856d2700e60b 106 #define PRS_PCNT2_UFOF ((17 << 8) + 1) /**< PRS PCNT2 Counter overflow or underflow */
<> 139:856d2700e60b 107 #define PRS_PCNT2_DIR ((17 << 8) + 2) /**< PRS PCNT2 Counter direction */
<> 139:856d2700e60b 108 #define PRS_CMU_CLKOUT0 ((18 << 8) + 0) /**< PRS Clock Output 0 */
<> 139:856d2700e60b 109 #define PRS_CMU_CLKOUT1 ((18 << 8) + 1) /**< PRS Clock Output 1 */
<> 139:856d2700e60b 110 #define PRS_VDAC0_CH0 ((24 << 8) + 0) /**< PRS DAC ch0 conversion done */
<> 139:856d2700e60b 111 #define PRS_VDAC0_CH1 ((24 << 8) + 1) /**< PRS DAC ch1 conversion done */
<> 139:856d2700e60b 112 #define PRS_VDAC0_OPA0 ((24 << 8) + 2) /**< PRS OPA0 warmedup or outputvalid based on OPA0PRSOUTMODE mode in OPACTRL. */
<> 139:856d2700e60b 113 #define PRS_VDAC0_OPA1 ((24 << 8) + 3) /**< PRS OPA1 warmedup or outputvalid based on OPA1PRSOUTMODE mode in OPACTRL. */
<> 139:856d2700e60b 114 #define PRS_VDAC0_OPA2 ((24 << 8) + 4) /**< PRS OPA2 warmedup or outputvalid based on OPA2PRSOUTMODE mode in OPACTRL. */
<> 139:856d2700e60b 115 #define PRS_CRYOTIMER_PERIOD ((26 << 8) + 0) /**< PRS CRYOTIMER Output */
<> 139:856d2700e60b 116 #define PRS_USART0_IRTX ((48 << 8) + 0) /**< PRS USART 0 IRDA out */
<> 139:856d2700e60b 117 #define PRS_USART0_TXC ((48 << 8) + 1) /**< PRS USART 0 TX complete */
<> 139:856d2700e60b 118 #define PRS_USART0_RXDATAV ((48 << 8) + 2) /**< PRS USART 0 RX Data Valid */
<> 139:856d2700e60b 119 #define PRS_USART0_RTS ((48 << 8) + 3) /**< PRS USART 0 RTS */
<> 139:856d2700e60b 120 #define PRS_USART0_TX ((48 << 8) + 5) /**< PRS USART 0 TX */
<> 139:856d2700e60b 121 #define PRS_USART0_CS ((48 << 8) + 6) /**< PRS USART 0 CS */
<> 139:856d2700e60b 122 #define PRS_USART1_TXC ((49 << 8) + 1) /**< PRS USART 1 TX complete */
<> 139:856d2700e60b 123 #define PRS_USART1_RXDATAV ((49 << 8) + 2) /**< PRS USART 1 RX Data Valid */
<> 139:856d2700e60b 124 #define PRS_USART1_RTS ((49 << 8) + 3) /**< PRS USART 1 RTS */
<> 139:856d2700e60b 125 #define PRS_USART1_TX ((49 << 8) + 5) /**< PRS USART 1 TX */
<> 139:856d2700e60b 126 #define PRS_USART1_CS ((49 << 8) + 6) /**< PRS USART 1 CS */
<> 139:856d2700e60b 127 #define PRS_USART2_IRTX ((50 << 8) + 0) /**< PRS USART 2 IRDA out */
<> 139:856d2700e60b 128 #define PRS_USART2_TXC ((50 << 8) + 1) /**< PRS USART 2 TX complete */
<> 139:856d2700e60b 129 #define PRS_USART2_RXDATAV ((50 << 8) + 2) /**< PRS USART 2 RX Data Valid */
<> 139:856d2700e60b 130 #define PRS_USART2_RTS ((50 << 8) + 3) /**< PRS USART 2 RTS */
<> 139:856d2700e60b 131 #define PRS_USART2_TX ((50 << 8) + 5) /**< PRS USART 2 TX */
<> 139:856d2700e60b 132 #define PRS_USART2_CS ((50 << 8) + 6) /**< PRS USART 2 CS */
<> 139:856d2700e60b 133 #define PRS_USART3_TXC ((51 << 8) + 1) /**< PRS USART 3 TX complete */
<> 139:856d2700e60b 134 #define PRS_USART3_RXDATAV ((51 << 8) + 2) /**< PRS USART 3 RX Data Valid */
<> 139:856d2700e60b 135 #define PRS_USART3_RTS ((51 << 8) + 3) /**< PRS USART 3 RTS */
<> 139:856d2700e60b 136 #define PRS_USART3_TX ((51 << 8) + 5) /**< PRS USART 3 TX */
<> 139:856d2700e60b 137 #define PRS_USART3_CS ((51 << 8) + 6) /**< PRS USART 3 CS */
<> 139:856d2700e60b 138 #define PRS_TIMER0_UF ((60 << 8) + 0) /**< PRS Timer 0 Underflow */
<> 139:856d2700e60b 139 #define PRS_TIMER0_OF ((60 << 8) + 1) /**< PRS Timer 0 Overflow */
<> 139:856d2700e60b 140 #define PRS_TIMER0_CC0 ((60 << 8) + 2) /**< PRS Timer 0 Compare/Capture 0 */
<> 139:856d2700e60b 141 #define PRS_TIMER0_CC1 ((60 << 8) + 3) /**< PRS Timer 0 Compare/Capture 1 */
<> 139:856d2700e60b 142 #define PRS_TIMER0_CC2 ((60 << 8) + 4) /**< PRS Timer 0 Compare/Capture 2 */
<> 139:856d2700e60b 143 #define PRS_TIMER1_UF ((61 << 8) + 0) /**< PRS Timer 1 Underflow */
<> 139:856d2700e60b 144 #define PRS_TIMER1_OF ((61 << 8) + 1) /**< PRS Timer 1 Overflow */
<> 139:856d2700e60b 145 #define PRS_TIMER1_CC0 ((61 << 8) + 2) /**< PRS Timer 1 Compare/Capture 0 */
<> 139:856d2700e60b 146 #define PRS_TIMER1_CC1 ((61 << 8) + 3) /**< PRS Timer 1 Compare/Capture 1 */
<> 139:856d2700e60b 147 #define PRS_TIMER1_CC2 ((61 << 8) + 4) /**< PRS Timer 1 Compare/Capture 2 */
<> 139:856d2700e60b 148 #define PRS_TIMER1_CC3 ((61 << 8) + 5) /**< PRS Timer 1 Compare/Capture 3 */
<> 139:856d2700e60b 149 #define PRS_WTIMER0_UF ((62 << 8) + 0) /**< PRS Timer 2 Underflow */
<> 139:856d2700e60b 150 #define PRS_WTIMER0_OF ((62 << 8) + 1) /**< PRS Timer 2 Overflow */
<> 139:856d2700e60b 151 #define PRS_WTIMER0_CC0 ((62 << 8) + 2) /**< PRS Timer 2 Compare/Capture 0 */
<> 139:856d2700e60b 152 #define PRS_WTIMER0_CC1 ((62 << 8) + 3) /**< PRS Timer 2 Compare/Capture 1 */
<> 139:856d2700e60b 153 #define PRS_WTIMER0_CC2 ((62 << 8) + 4) /**< PRS Timer 2 Compare/Capture 2 */
<> 139:856d2700e60b 154 #define PRS_WTIMER1_UF ((63 << 8) + 0) /**< PRS Timer 3 Underflow */
<> 139:856d2700e60b 155 #define PRS_WTIMER1_OF ((63 << 8) + 1) /**< PRS Timer 3 Overflow */
<> 139:856d2700e60b 156 #define PRS_WTIMER1_CC0 ((63 << 8) + 2) /**< PRS Timer 3 Compare/Capture 0 */
<> 139:856d2700e60b 157 #define PRS_WTIMER1_CC1 ((63 << 8) + 3) /**< PRS Timer 3 Compare/Capture 1 */
<> 139:856d2700e60b 158 #define PRS_WTIMER1_CC2 ((63 << 8) + 4) /**< PRS Timer 3 Compare/Capture 2 */
<> 139:856d2700e60b 159 #define PRS_WTIMER1_CC3 ((63 << 8) + 5) /**< PRS Timer 3 Compare/Capture 3 */
<> 139:856d2700e60b 160 #define PRS_CM4_TXEV ((67 << 8) + 0) /**< PRS */
<> 139:856d2700e60b 161 #define PRS_CM4_ICACHEPCHITSOF ((67 << 8) + 1) /**< PRS */
<> 139:856d2700e60b 162 #define PRS_CM4_ICACHEPCMISSESOF ((67 << 8) + 2) /**< PRS */
<> 139:856d2700e60b 163
<> 139:856d2700e60b 164 /** @} End of group EFM32PG12B_PRS */
<> 139:856d2700e60b 165 /** @} End of group Parts */
<> 139:856d2700e60b 166