mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_EFM32PG12_STK3402/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/efm32pg12b_leuart.h@140:97feb9bacc10, 2017-04-12 (annotated)

Committer:
<>
Date:
Wed Apr 12 16:07:08 2017 +0100
Revision:
140:97feb9bacc10
Parent:
139:856d2700e60b 
Release 140 of the mbed library



Ports for Upcoming Targets



3841: Add nRf52840 target https://github.com/ARMmbed/mbed-os/pull/3841

3992: Introducing UBLOX_C030 platform. https://github.com/ARMmbed/mbed-os/pull/3992



Fixes and Changes



3951: [NUCLEO_F303ZE] Correct ARDUINO pin https://github.com/ARMmbed/mbed-os/pull/3951

4021: Fixing a macro to detect when RTOS was in use for the NRF52840_DK https://github.com/ARMmbed/mbed-os/pull/4021

3979: KW24D: Add missing SPI defines and Arduino connector definitions https://github.com/ARMmbed/mbed-os/pull/3979

3990: UBLOX_C027: construct a ticker-based wait, rather than calling wait_ms(), in the  https://github.com/ARMmbed/mbed-os/pull/3990

4003: Fixed OBOE in async serial tx for NRF52 target, fixes #4002 https://github.com/ARMmbed/mbed-os/pull/4003

4012: STM32: Correct I2C master error handling https://github.com/ARMmbed/mbed-os/pull/4012

4020: NUCLEO_L011K4 remove unsupported tool chain files https://github.com/ARMmbed/mbed-os/pull/4020

4065: K66F: Move bss section to m_data_2 Section https://github.com/ARMmbed/mbed-os/pull/4065

4014: Issue 3763: Reduce heap allocation in the GCC linker file https://github.com/ARMmbed/mbed-os/pull/4014

4030: [STM32L0] reduce IAR heap and stack size for small targets https://github.com/ARMmbed/mbed-os/pull/4030

4109: NUCLEO_L476RG : minor serial pin update https://github.com/ARMmbed/mbed-os/pull/4109

3982: Ticker - kl25z bugfix for handling events in the past https://github.com/ARMmbed/mbed-os/pull/3982

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 139:856d2700e60b 1 /**************************************************************************//**
<> 139:856d2700e60b 2 * @file efm32pg12b_leuart.h
<> 139:856d2700e60b 3 * @brief EFM32PG12B_LEUART register and bit field definitions
<> 139:856d2700e60b 4 * @version 5.1.2
<> 139:856d2700e60b 5 ******************************************************************************
<> 139:856d2700e60b 6 * @section License
<> 139:856d2700e60b 7 * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
<> 139:856d2700e60b 8 ******************************************************************************
<> 139:856d2700e60b 9 *
<> 139:856d2700e60b 10 * Permission is granted to anyone to use this software for any purpose,
<> 139:856d2700e60b 11 * including commercial applications, and to alter it and redistribute it
<> 139:856d2700e60b 12 * freely, subject to the following restrictions:
<> 139:856d2700e60b 13 *
<> 139:856d2700e60b 14 * 1. The origin of this software must not be misrepresented; you must not
<> 139:856d2700e60b 15 * claim that you wrote the original software.@n
<> 139:856d2700e60b 16 * 2. Altered source versions must be plainly marked as such, and must not be
<> 139:856d2700e60b 17 * misrepresented as being the original software.@n
<> 139:856d2700e60b 18 * 3. This notice may not be removed or altered from any source distribution.
<> 139:856d2700e60b 19 *
<> 139:856d2700e60b 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
<> 139:856d2700e60b 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
<> 139:856d2700e60b 22 * providing the Software "AS IS", with no express or implied warranties of any
<> 139:856d2700e60b 23 * kind, including, but not limited to, any implied warranties of
<> 139:856d2700e60b 24 * merchantability or fitness for any particular purpose or warranties against
<> 139:856d2700e60b 25 * infringement of any proprietary rights of a third party.
<> 139:856d2700e60b 26 *
<> 139:856d2700e60b 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
<> 139:856d2700e60b 28 * incidental, or special damages, or any other relief, or for any claim by
<> 139:856d2700e60b 29 * any third party, arising from your use of this Software.
<> 139:856d2700e60b 30 *
<> 139:856d2700e60b 31 *****************************************************************************/
<> 139:856d2700e60b 32 /**************************************************************************//**
<> 139:856d2700e60b 33 * @addtogroup Parts
<> 139:856d2700e60b 34 * @{
<> 139:856d2700e60b 35 ******************************************************************************/
<> 139:856d2700e60b 36 /**************************************************************************//**
<> 139:856d2700e60b 37 * @defgroup EFM32PG12B_LEUART
<> 139:856d2700e60b 38 * @{
<> 139:856d2700e60b 39 * @brief EFM32PG12B_LEUART Register Declaration
<> 139:856d2700e60b 40 *****************************************************************************/
<> 139:856d2700e60b 41 typedef struct
<> 139:856d2700e60b 42 {
<> 139:856d2700e60b 43 __IOM uint32_t CTRL; /**< Control Register */
<> 139:856d2700e60b 44 __IOM uint32_t CMD; /**< Command Register */
<> 139:856d2700e60b 45 __IM uint32_t STATUS; /**< Status Register */
<> 139:856d2700e60b 46 __IOM uint32_t CLKDIV; /**< Clock Control Register */
<> 139:856d2700e60b 47 __IOM uint32_t STARTFRAME; /**< Start Frame Register */
<> 139:856d2700e60b 48 __IOM uint32_t SIGFRAME; /**< Signal Frame Register */
<> 139:856d2700e60b 49 __IM uint32_t RXDATAX; /**< Receive Buffer Data Extended Register */
<> 139:856d2700e60b 50 __IM uint32_t RXDATA; /**< Receive Buffer Data Register */
<> 139:856d2700e60b 51 __IM uint32_t RXDATAXP; /**< Receive Buffer Data Extended Peek Register */
<> 139:856d2700e60b 52 __IOM uint32_t TXDATAX; /**< Transmit Buffer Data Extended Register */
<> 139:856d2700e60b 53 __IOM uint32_t TXDATA; /**< Transmit Buffer Data Register */
<> 139:856d2700e60b 54 __IM uint32_t IF; /**< Interrupt Flag Register */
<> 139:856d2700e60b 55 __IOM uint32_t IFS; /**< Interrupt Flag Set Register */
<> 139:856d2700e60b 56 __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */
<> 139:856d2700e60b 57 __IOM uint32_t IEN; /**< Interrupt Enable Register */
<> 139:856d2700e60b 58 __IOM uint32_t PULSECTRL; /**< Pulse Control Register */
<> 139:856d2700e60b 59
<> 139:856d2700e60b 60 __IOM uint32_t FREEZE; /**< Freeze Register */
<> 139:856d2700e60b 61 __IM uint32_t SYNCBUSY; /**< Synchronization Busy Register */
<> 139:856d2700e60b 62
<> 139:856d2700e60b 63 uint32_t RESERVED0[3]; /**< Reserved for future use **/
<> 139:856d2700e60b 64 __IOM uint32_t ROUTEPEN; /**< I/O Routing Pin Enable Register */
<> 139:856d2700e60b 65 __IOM uint32_t ROUTELOC0; /**< I/O Routing Location Register */
<> 139:856d2700e60b 66 uint32_t RESERVED1[2]; /**< Reserved for future use **/
<> 139:856d2700e60b 67 __IOM uint32_t INPUT; /**< LEUART Input Register */
<> 139:856d2700e60b 68 } LEUART_TypeDef; /** @} */
<> 139:856d2700e60b 69
<> 139:856d2700e60b 70 /**************************************************************************//**
<> 139:856d2700e60b 71 * @defgroup EFM32PG12B_LEUART_BitFields
<> 139:856d2700e60b 72 * @{
<> 139:856d2700e60b 73 *****************************************************************************/
<> 139:856d2700e60b 74
<> 139:856d2700e60b 75 /* Bit fields for LEUART CTRL */
<> 139:856d2700e60b 76 #define _LEUART_CTRL_RESETVALUE 0x00000000UL /**< Default value for LEUART_CTRL */
<> 139:856d2700e60b 77 #define _LEUART_CTRL_MASK 0x0000FFFFUL /**< Mask for LEUART_CTRL */
<> 139:856d2700e60b 78 #define LEUART_CTRL_AUTOTRI (0x1UL << 0) /**< Automatic Transmitter Tristate */
<> 139:856d2700e60b 79 #define _LEUART_CTRL_AUTOTRI_SHIFT 0 /**< Shift value for LEUART_AUTOTRI */
<> 139:856d2700e60b 80 #define _LEUART_CTRL_AUTOTRI_MASK 0x1UL /**< Bit mask for LEUART_AUTOTRI */
<> 139:856d2700e60b 81 #define _LEUART_CTRL_AUTOTRI_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 82 #define LEUART_CTRL_AUTOTRI_DEFAULT (_LEUART_CTRL_AUTOTRI_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 83 #define LEUART_CTRL_DATABITS (0x1UL << 1) /**< Data-Bit Mode */
<> 139:856d2700e60b 84 #define _LEUART_CTRL_DATABITS_SHIFT 1 /**< Shift value for LEUART_DATABITS */
<> 139:856d2700e60b 85 #define _LEUART_CTRL_DATABITS_MASK 0x2UL /**< Bit mask for LEUART_DATABITS */
<> 139:856d2700e60b 86 #define _LEUART_CTRL_DATABITS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 87 #define _LEUART_CTRL_DATABITS_EIGHT 0x00000000UL /**< Mode EIGHT for LEUART_CTRL */
<> 139:856d2700e60b 88 #define _LEUART_CTRL_DATABITS_NINE 0x00000001UL /**< Mode NINE for LEUART_CTRL */
<> 139:856d2700e60b 89 #define LEUART_CTRL_DATABITS_DEFAULT (_LEUART_CTRL_DATABITS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 90 #define LEUART_CTRL_DATABITS_EIGHT (_LEUART_CTRL_DATABITS_EIGHT << 1) /**< Shifted mode EIGHT for LEUART_CTRL */
<> 139:856d2700e60b 91 #define LEUART_CTRL_DATABITS_NINE (_LEUART_CTRL_DATABITS_NINE << 1) /**< Shifted mode NINE for LEUART_CTRL */
<> 139:856d2700e60b 92 #define _LEUART_CTRL_PARITY_SHIFT 2 /**< Shift value for LEUART_PARITY */
<> 139:856d2700e60b 93 #define _LEUART_CTRL_PARITY_MASK 0xCUL /**< Bit mask for LEUART_PARITY */
<> 139:856d2700e60b 94 #define _LEUART_CTRL_PARITY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 95 #define _LEUART_CTRL_PARITY_NONE 0x00000000UL /**< Mode NONE for LEUART_CTRL */
<> 139:856d2700e60b 96 #define _LEUART_CTRL_PARITY_EVEN 0x00000002UL /**< Mode EVEN for LEUART_CTRL */
<> 139:856d2700e60b 97 #define _LEUART_CTRL_PARITY_ODD 0x00000003UL /**< Mode ODD for LEUART_CTRL */
<> 139:856d2700e60b 98 #define LEUART_CTRL_PARITY_DEFAULT (_LEUART_CTRL_PARITY_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 99 #define LEUART_CTRL_PARITY_NONE (_LEUART_CTRL_PARITY_NONE << 2) /**< Shifted mode NONE for LEUART_CTRL */
<> 139:856d2700e60b 100 #define LEUART_CTRL_PARITY_EVEN (_LEUART_CTRL_PARITY_EVEN << 2) /**< Shifted mode EVEN for LEUART_CTRL */
<> 139:856d2700e60b 101 #define LEUART_CTRL_PARITY_ODD (_LEUART_CTRL_PARITY_ODD << 2) /**< Shifted mode ODD for LEUART_CTRL */
<> 139:856d2700e60b 102 #define LEUART_CTRL_STOPBITS (0x1UL << 4) /**< Stop-Bit Mode */
<> 139:856d2700e60b 103 #define _LEUART_CTRL_STOPBITS_SHIFT 4 /**< Shift value for LEUART_STOPBITS */
<> 139:856d2700e60b 104 #define _LEUART_CTRL_STOPBITS_MASK 0x10UL /**< Bit mask for LEUART_STOPBITS */
<> 139:856d2700e60b 105 #define _LEUART_CTRL_STOPBITS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 106 #define _LEUART_CTRL_STOPBITS_ONE 0x00000000UL /**< Mode ONE for LEUART_CTRL */
<> 139:856d2700e60b 107 #define _LEUART_CTRL_STOPBITS_TWO 0x00000001UL /**< Mode TWO for LEUART_CTRL */
<> 139:856d2700e60b 108 #define LEUART_CTRL_STOPBITS_DEFAULT (_LEUART_CTRL_STOPBITS_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 109 #define LEUART_CTRL_STOPBITS_ONE (_LEUART_CTRL_STOPBITS_ONE << 4) /**< Shifted mode ONE for LEUART_CTRL */
<> 139:856d2700e60b 110 #define LEUART_CTRL_STOPBITS_TWO (_LEUART_CTRL_STOPBITS_TWO << 4) /**< Shifted mode TWO for LEUART_CTRL */
<> 139:856d2700e60b 111 #define LEUART_CTRL_INV (0x1UL << 5) /**< Invert Input And Output */
<> 139:856d2700e60b 112 #define _LEUART_CTRL_INV_SHIFT 5 /**< Shift value for LEUART_INV */
<> 139:856d2700e60b 113 #define _LEUART_CTRL_INV_MASK 0x20UL /**< Bit mask for LEUART_INV */
<> 139:856d2700e60b 114 #define _LEUART_CTRL_INV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 115 #define LEUART_CTRL_INV_DEFAULT (_LEUART_CTRL_INV_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 116 #define LEUART_CTRL_ERRSDMA (0x1UL << 6) /**< Clear RX DMA On Error */
<> 139:856d2700e60b 117 #define _LEUART_CTRL_ERRSDMA_SHIFT 6 /**< Shift value for LEUART_ERRSDMA */
<> 139:856d2700e60b 118 #define _LEUART_CTRL_ERRSDMA_MASK 0x40UL /**< Bit mask for LEUART_ERRSDMA */
<> 139:856d2700e60b 119 #define _LEUART_CTRL_ERRSDMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 120 #define LEUART_CTRL_ERRSDMA_DEFAULT (_LEUART_CTRL_ERRSDMA_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 121 #define LEUART_CTRL_LOOPBK (0x1UL << 7) /**< Loopback Enable */
<> 139:856d2700e60b 122 #define _LEUART_CTRL_LOOPBK_SHIFT 7 /**< Shift value for LEUART_LOOPBK */
<> 139:856d2700e60b 123 #define _LEUART_CTRL_LOOPBK_MASK 0x80UL /**< Bit mask for LEUART_LOOPBK */
<> 139:856d2700e60b 124 #define _LEUART_CTRL_LOOPBK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 125 #define LEUART_CTRL_LOOPBK_DEFAULT (_LEUART_CTRL_LOOPBK_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 126 #define LEUART_CTRL_SFUBRX (0x1UL << 8) /**< Start-Frame UnBlock RX */
<> 139:856d2700e60b 127 #define _LEUART_CTRL_SFUBRX_SHIFT 8 /**< Shift value for LEUART_SFUBRX */
<> 139:856d2700e60b 128 #define _LEUART_CTRL_SFUBRX_MASK 0x100UL /**< Bit mask for LEUART_SFUBRX */
<> 139:856d2700e60b 129 #define _LEUART_CTRL_SFUBRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 130 #define LEUART_CTRL_SFUBRX_DEFAULT (_LEUART_CTRL_SFUBRX_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 131 #define LEUART_CTRL_MPM (0x1UL << 9) /**< Multi-Processor Mode */
<> 139:856d2700e60b 132 #define _LEUART_CTRL_MPM_SHIFT 9 /**< Shift value for LEUART_MPM */
<> 139:856d2700e60b 133 #define _LEUART_CTRL_MPM_MASK 0x200UL /**< Bit mask for LEUART_MPM */
<> 139:856d2700e60b 134 #define _LEUART_CTRL_MPM_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 135 #define LEUART_CTRL_MPM_DEFAULT (_LEUART_CTRL_MPM_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 136 #define LEUART_CTRL_MPAB (0x1UL << 10) /**< Multi-Processor Address-Bit */
<> 139:856d2700e60b 137 #define _LEUART_CTRL_MPAB_SHIFT 10 /**< Shift value for LEUART_MPAB */
<> 139:856d2700e60b 138 #define _LEUART_CTRL_MPAB_MASK 0x400UL /**< Bit mask for LEUART_MPAB */
<> 139:856d2700e60b 139 #define _LEUART_CTRL_MPAB_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 140 #define LEUART_CTRL_MPAB_DEFAULT (_LEUART_CTRL_MPAB_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 141 #define LEUART_CTRL_BIT8DV (0x1UL << 11) /**< Bit 8 Default Value */
<> 139:856d2700e60b 142 #define _LEUART_CTRL_BIT8DV_SHIFT 11 /**< Shift value for LEUART_BIT8DV */
<> 139:856d2700e60b 143 #define _LEUART_CTRL_BIT8DV_MASK 0x800UL /**< Bit mask for LEUART_BIT8DV */
<> 139:856d2700e60b 144 #define _LEUART_CTRL_BIT8DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 145 #define LEUART_CTRL_BIT8DV_DEFAULT (_LEUART_CTRL_BIT8DV_DEFAULT << 11) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 146 #define LEUART_CTRL_RXDMAWU (0x1UL << 12) /**< RX DMA Wakeup */
<> 139:856d2700e60b 147 #define _LEUART_CTRL_RXDMAWU_SHIFT 12 /**< Shift value for LEUART_RXDMAWU */
<> 139:856d2700e60b 148 #define _LEUART_CTRL_RXDMAWU_MASK 0x1000UL /**< Bit mask for LEUART_RXDMAWU */
<> 139:856d2700e60b 149 #define _LEUART_CTRL_RXDMAWU_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 150 #define LEUART_CTRL_RXDMAWU_DEFAULT (_LEUART_CTRL_RXDMAWU_DEFAULT << 12) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 151 #define LEUART_CTRL_TXDMAWU (0x1UL << 13) /**< TX DMA Wakeup */
<> 139:856d2700e60b 152 #define _LEUART_CTRL_TXDMAWU_SHIFT 13 /**< Shift value for LEUART_TXDMAWU */
<> 139:856d2700e60b 153 #define _LEUART_CTRL_TXDMAWU_MASK 0x2000UL /**< Bit mask for LEUART_TXDMAWU */
<> 139:856d2700e60b 154 #define _LEUART_CTRL_TXDMAWU_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 155 #define LEUART_CTRL_TXDMAWU_DEFAULT (_LEUART_CTRL_TXDMAWU_DEFAULT << 13) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 156 #define _LEUART_CTRL_TXDELAY_SHIFT 14 /**< Shift value for LEUART_TXDELAY */
<> 139:856d2700e60b 157 #define _LEUART_CTRL_TXDELAY_MASK 0xC000UL /**< Bit mask for LEUART_TXDELAY */
<> 139:856d2700e60b 158 #define _LEUART_CTRL_TXDELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 159 #define _LEUART_CTRL_TXDELAY_NONE 0x00000000UL /**< Mode NONE for LEUART_CTRL */
<> 139:856d2700e60b 160 #define _LEUART_CTRL_TXDELAY_SINGLE 0x00000001UL /**< Mode SINGLE for LEUART_CTRL */
<> 139:856d2700e60b 161 #define _LEUART_CTRL_TXDELAY_DOUBLE 0x00000002UL /**< Mode DOUBLE for LEUART_CTRL */
<> 139:856d2700e60b 162 #define _LEUART_CTRL_TXDELAY_TRIPLE 0x00000003UL /**< Mode TRIPLE for LEUART_CTRL */
<> 139:856d2700e60b 163 #define LEUART_CTRL_TXDELAY_DEFAULT (_LEUART_CTRL_TXDELAY_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_CTRL */
<> 139:856d2700e60b 164 #define LEUART_CTRL_TXDELAY_NONE (_LEUART_CTRL_TXDELAY_NONE << 14) /**< Shifted mode NONE for LEUART_CTRL */
<> 139:856d2700e60b 165 #define LEUART_CTRL_TXDELAY_SINGLE (_LEUART_CTRL_TXDELAY_SINGLE << 14) /**< Shifted mode SINGLE for LEUART_CTRL */
<> 139:856d2700e60b 166 #define LEUART_CTRL_TXDELAY_DOUBLE (_LEUART_CTRL_TXDELAY_DOUBLE << 14) /**< Shifted mode DOUBLE for LEUART_CTRL */
<> 139:856d2700e60b 167 #define LEUART_CTRL_TXDELAY_TRIPLE (_LEUART_CTRL_TXDELAY_TRIPLE << 14) /**< Shifted mode TRIPLE for LEUART_CTRL */
<> 139:856d2700e60b 168
<> 139:856d2700e60b 169 /* Bit fields for LEUART CMD */
<> 139:856d2700e60b 170 #define _LEUART_CMD_RESETVALUE 0x00000000UL /**< Default value for LEUART_CMD */
<> 139:856d2700e60b 171 #define _LEUART_CMD_MASK 0x000000FFUL /**< Mask for LEUART_CMD */
<> 139:856d2700e60b 172 #define LEUART_CMD_RXEN (0x1UL << 0) /**< Receiver Enable */
<> 139:856d2700e60b 173 #define _LEUART_CMD_RXEN_SHIFT 0 /**< Shift value for LEUART_RXEN */
<> 139:856d2700e60b 174 #define _LEUART_CMD_RXEN_MASK 0x1UL /**< Bit mask for LEUART_RXEN */
<> 139:856d2700e60b 175 #define _LEUART_CMD_RXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 176 #define LEUART_CMD_RXEN_DEFAULT (_LEUART_CMD_RXEN_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 177 #define LEUART_CMD_RXDIS (0x1UL << 1) /**< Receiver Disable */
<> 139:856d2700e60b 178 #define _LEUART_CMD_RXDIS_SHIFT 1 /**< Shift value for LEUART_RXDIS */
<> 139:856d2700e60b 179 #define _LEUART_CMD_RXDIS_MASK 0x2UL /**< Bit mask for LEUART_RXDIS */
<> 139:856d2700e60b 180 #define _LEUART_CMD_RXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 181 #define LEUART_CMD_RXDIS_DEFAULT (_LEUART_CMD_RXDIS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 182 #define LEUART_CMD_TXEN (0x1UL << 2) /**< Transmitter Enable */
<> 139:856d2700e60b 183 #define _LEUART_CMD_TXEN_SHIFT 2 /**< Shift value for LEUART_TXEN */
<> 139:856d2700e60b 184 #define _LEUART_CMD_TXEN_MASK 0x4UL /**< Bit mask for LEUART_TXEN */
<> 139:856d2700e60b 185 #define _LEUART_CMD_TXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 186 #define LEUART_CMD_TXEN_DEFAULT (_LEUART_CMD_TXEN_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 187 #define LEUART_CMD_TXDIS (0x1UL << 3) /**< Transmitter Disable */
<> 139:856d2700e60b 188 #define _LEUART_CMD_TXDIS_SHIFT 3 /**< Shift value for LEUART_TXDIS */
<> 139:856d2700e60b 189 #define _LEUART_CMD_TXDIS_MASK 0x8UL /**< Bit mask for LEUART_TXDIS */
<> 139:856d2700e60b 190 #define _LEUART_CMD_TXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 191 #define LEUART_CMD_TXDIS_DEFAULT (_LEUART_CMD_TXDIS_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 192 #define LEUART_CMD_RXBLOCKEN (0x1UL << 4) /**< Receiver Block Enable */
<> 139:856d2700e60b 193 #define _LEUART_CMD_RXBLOCKEN_SHIFT 4 /**< Shift value for LEUART_RXBLOCKEN */
<> 139:856d2700e60b 194 #define _LEUART_CMD_RXBLOCKEN_MASK 0x10UL /**< Bit mask for LEUART_RXBLOCKEN */
<> 139:856d2700e60b 195 #define _LEUART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 196 #define LEUART_CMD_RXBLOCKEN_DEFAULT (_LEUART_CMD_RXBLOCKEN_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 197 #define LEUART_CMD_RXBLOCKDIS (0x1UL << 5) /**< Receiver Block Disable */
<> 139:856d2700e60b 198 #define _LEUART_CMD_RXBLOCKDIS_SHIFT 5 /**< Shift value for LEUART_RXBLOCKDIS */
<> 139:856d2700e60b 199 #define _LEUART_CMD_RXBLOCKDIS_MASK 0x20UL /**< Bit mask for LEUART_RXBLOCKDIS */
<> 139:856d2700e60b 200 #define _LEUART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 201 #define LEUART_CMD_RXBLOCKDIS_DEFAULT (_LEUART_CMD_RXBLOCKDIS_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 202 #define LEUART_CMD_CLEARTX (0x1UL << 6) /**< Clear TX */
<> 139:856d2700e60b 203 #define _LEUART_CMD_CLEARTX_SHIFT 6 /**< Shift value for LEUART_CLEARTX */
<> 139:856d2700e60b 204 #define _LEUART_CMD_CLEARTX_MASK 0x40UL /**< Bit mask for LEUART_CLEARTX */
<> 139:856d2700e60b 205 #define _LEUART_CMD_CLEARTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 206 #define LEUART_CMD_CLEARTX_DEFAULT (_LEUART_CMD_CLEARTX_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 207 #define LEUART_CMD_CLEARRX (0x1UL << 7) /**< Clear RX */
<> 139:856d2700e60b 208 #define _LEUART_CMD_CLEARRX_SHIFT 7 /**< Shift value for LEUART_CLEARRX */
<> 139:856d2700e60b 209 #define _LEUART_CMD_CLEARRX_MASK 0x80UL /**< Bit mask for LEUART_CLEARRX */
<> 139:856d2700e60b 210 #define _LEUART_CMD_CLEARRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 211 #define LEUART_CMD_CLEARRX_DEFAULT (_LEUART_CMD_CLEARRX_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_CMD */
<> 139:856d2700e60b 212
<> 139:856d2700e60b 213 /* Bit fields for LEUART STATUS */
<> 139:856d2700e60b 214 #define _LEUART_STATUS_RESETVALUE 0x00000050UL /**< Default value for LEUART_STATUS */
<> 139:856d2700e60b 215 #define _LEUART_STATUS_MASK 0x0000007FUL /**< Mask for LEUART_STATUS */
<> 139:856d2700e60b 216 #define LEUART_STATUS_RXENS (0x1UL << 0) /**< Receiver Enable Status */
<> 139:856d2700e60b 217 #define _LEUART_STATUS_RXENS_SHIFT 0 /**< Shift value for LEUART_RXENS */
<> 139:856d2700e60b 218 #define _LEUART_STATUS_RXENS_MASK 0x1UL /**< Bit mask for LEUART_RXENS */
<> 139:856d2700e60b 219 #define _LEUART_STATUS_RXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 220 #define LEUART_STATUS_RXENS_DEFAULT (_LEUART_STATUS_RXENS_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 221 #define LEUART_STATUS_TXENS (0x1UL << 1) /**< Transmitter Enable Status */
<> 139:856d2700e60b 222 #define _LEUART_STATUS_TXENS_SHIFT 1 /**< Shift value for LEUART_TXENS */
<> 139:856d2700e60b 223 #define _LEUART_STATUS_TXENS_MASK 0x2UL /**< Bit mask for LEUART_TXENS */
<> 139:856d2700e60b 224 #define _LEUART_STATUS_TXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 225 #define LEUART_STATUS_TXENS_DEFAULT (_LEUART_STATUS_TXENS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 226 #define LEUART_STATUS_RXBLOCK (0x1UL << 2) /**< Block Incoming Data */
<> 139:856d2700e60b 227 #define _LEUART_STATUS_RXBLOCK_SHIFT 2 /**< Shift value for LEUART_RXBLOCK */
<> 139:856d2700e60b 228 #define _LEUART_STATUS_RXBLOCK_MASK 0x4UL /**< Bit mask for LEUART_RXBLOCK */
<> 139:856d2700e60b 229 #define _LEUART_STATUS_RXBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 230 #define LEUART_STATUS_RXBLOCK_DEFAULT (_LEUART_STATUS_RXBLOCK_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 231 #define LEUART_STATUS_TXC (0x1UL << 3) /**< TX Complete */
<> 139:856d2700e60b 232 #define _LEUART_STATUS_TXC_SHIFT 3 /**< Shift value for LEUART_TXC */
<> 139:856d2700e60b 233 #define _LEUART_STATUS_TXC_MASK 0x8UL /**< Bit mask for LEUART_TXC */
<> 139:856d2700e60b 234 #define _LEUART_STATUS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 235 #define LEUART_STATUS_TXC_DEFAULT (_LEUART_STATUS_TXC_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 236 #define LEUART_STATUS_TXBL (0x1UL << 4) /**< TX Buffer Level */
<> 139:856d2700e60b 237 #define _LEUART_STATUS_TXBL_SHIFT 4 /**< Shift value for LEUART_TXBL */
<> 139:856d2700e60b 238 #define _LEUART_STATUS_TXBL_MASK 0x10UL /**< Bit mask for LEUART_TXBL */
<> 139:856d2700e60b 239 #define _LEUART_STATUS_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 240 #define LEUART_STATUS_TXBL_DEFAULT (_LEUART_STATUS_TXBL_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 241 #define LEUART_STATUS_RXDATAV (0x1UL << 5) /**< RX Data Valid */
<> 139:856d2700e60b 242 #define _LEUART_STATUS_RXDATAV_SHIFT 5 /**< Shift value for LEUART_RXDATAV */
<> 139:856d2700e60b 243 #define _LEUART_STATUS_RXDATAV_MASK 0x20UL /**< Bit mask for LEUART_RXDATAV */
<> 139:856d2700e60b 244 #define _LEUART_STATUS_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 245 #define LEUART_STATUS_RXDATAV_DEFAULT (_LEUART_STATUS_RXDATAV_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 246 #define LEUART_STATUS_TXIDLE (0x1UL << 6) /**< TX Idle */
<> 139:856d2700e60b 247 #define _LEUART_STATUS_TXIDLE_SHIFT 6 /**< Shift value for LEUART_TXIDLE */
<> 139:856d2700e60b 248 #define _LEUART_STATUS_TXIDLE_MASK 0x40UL /**< Bit mask for LEUART_TXIDLE */
<> 139:856d2700e60b 249 #define _LEUART_STATUS_TXIDLE_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 250 #define LEUART_STATUS_TXIDLE_DEFAULT (_LEUART_STATUS_TXIDLE_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_STATUS */
<> 139:856d2700e60b 251
<> 139:856d2700e60b 252 /* Bit fields for LEUART CLKDIV */
<> 139:856d2700e60b 253 #define _LEUART_CLKDIV_RESETVALUE 0x00000000UL /**< Default value for LEUART_CLKDIV */
<> 139:856d2700e60b 254 #define _LEUART_CLKDIV_MASK 0x0001FFF8UL /**< Mask for LEUART_CLKDIV */
<> 139:856d2700e60b 255 #define _LEUART_CLKDIV_DIV_SHIFT 3 /**< Shift value for LEUART_DIV */
<> 139:856d2700e60b 256 #define _LEUART_CLKDIV_DIV_MASK 0x1FFF8UL /**< Bit mask for LEUART_DIV */
<> 139:856d2700e60b 257 #define _LEUART_CLKDIV_DIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CLKDIV */
<> 139:856d2700e60b 258 #define LEUART_CLKDIV_DIV_DEFAULT (_LEUART_CLKDIV_DIV_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_CLKDIV */
<> 139:856d2700e60b 259
<> 139:856d2700e60b 260 /* Bit fields for LEUART STARTFRAME */
<> 139:856d2700e60b 261 #define _LEUART_STARTFRAME_RESETVALUE 0x00000000UL /**< Default value for LEUART_STARTFRAME */
<> 139:856d2700e60b 262 #define _LEUART_STARTFRAME_MASK 0x000001FFUL /**< Mask for LEUART_STARTFRAME */
<> 139:856d2700e60b 263 #define _LEUART_STARTFRAME_STARTFRAME_SHIFT 0 /**< Shift value for LEUART_STARTFRAME */
<> 139:856d2700e60b 264 #define _LEUART_STARTFRAME_STARTFRAME_MASK 0x1FFUL /**< Bit mask for LEUART_STARTFRAME */
<> 139:856d2700e60b 265 #define _LEUART_STARTFRAME_STARTFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STARTFRAME */
<> 139:856d2700e60b 266 #define LEUART_STARTFRAME_STARTFRAME_DEFAULT (_LEUART_STARTFRAME_STARTFRAME_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_STARTFRAME */
<> 139:856d2700e60b 267
<> 139:856d2700e60b 268 /* Bit fields for LEUART SIGFRAME */
<> 139:856d2700e60b 269 #define _LEUART_SIGFRAME_RESETVALUE 0x00000000UL /**< Default value for LEUART_SIGFRAME */
<> 139:856d2700e60b 270 #define _LEUART_SIGFRAME_MASK 0x000001FFUL /**< Mask for LEUART_SIGFRAME */
<> 139:856d2700e60b 271 #define _LEUART_SIGFRAME_SIGFRAME_SHIFT 0 /**< Shift value for LEUART_SIGFRAME */
<> 139:856d2700e60b 272 #define _LEUART_SIGFRAME_SIGFRAME_MASK 0x1FFUL /**< Bit mask for LEUART_SIGFRAME */
<> 139:856d2700e60b 273 #define _LEUART_SIGFRAME_SIGFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SIGFRAME */
<> 139:856d2700e60b 274 #define LEUART_SIGFRAME_SIGFRAME_DEFAULT (_LEUART_SIGFRAME_SIGFRAME_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_SIGFRAME */
<> 139:856d2700e60b 275
<> 139:856d2700e60b 276 /* Bit fields for LEUART RXDATAX */
<> 139:856d2700e60b 277 #define _LEUART_RXDATAX_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATAX */
<> 139:856d2700e60b 278 #define _LEUART_RXDATAX_MASK 0x0000C1FFUL /**< Mask for LEUART_RXDATAX */
<> 139:856d2700e60b 279 #define _LEUART_RXDATAX_RXDATA_SHIFT 0 /**< Shift value for LEUART_RXDATA */
<> 139:856d2700e60b 280 #define _LEUART_RXDATAX_RXDATA_MASK 0x1FFUL /**< Bit mask for LEUART_RXDATA */
<> 139:856d2700e60b 281 #define _LEUART_RXDATAX_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
<> 139:856d2700e60b 282 #define LEUART_RXDATAX_RXDATA_DEFAULT (_LEUART_RXDATAX_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
<> 139:856d2700e60b 283 #define LEUART_RXDATAX_PERR (0x1UL << 14) /**< Receive Data Parity Error */
<> 139:856d2700e60b 284 #define _LEUART_RXDATAX_PERR_SHIFT 14 /**< Shift value for LEUART_PERR */
<> 139:856d2700e60b 285 #define _LEUART_RXDATAX_PERR_MASK 0x4000UL /**< Bit mask for LEUART_PERR */
<> 139:856d2700e60b 286 #define _LEUART_RXDATAX_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
<> 139:856d2700e60b 287 #define LEUART_RXDATAX_PERR_DEFAULT (_LEUART_RXDATAX_PERR_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
<> 139:856d2700e60b 288 #define LEUART_RXDATAX_FERR (0x1UL << 15) /**< Receive Data Framing Error */
<> 139:856d2700e60b 289 #define _LEUART_RXDATAX_FERR_SHIFT 15 /**< Shift value for LEUART_FERR */
<> 139:856d2700e60b 290 #define _LEUART_RXDATAX_FERR_MASK 0x8000UL /**< Bit mask for LEUART_FERR */
<> 139:856d2700e60b 291 #define _LEUART_RXDATAX_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
<> 139:856d2700e60b 292 #define LEUART_RXDATAX_FERR_DEFAULT (_LEUART_RXDATAX_FERR_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
<> 139:856d2700e60b 293
<> 139:856d2700e60b 294 /* Bit fields for LEUART RXDATA */
<> 139:856d2700e60b 295 #define _LEUART_RXDATA_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATA */
<> 139:856d2700e60b 296 #define _LEUART_RXDATA_MASK 0x000000FFUL /**< Mask for LEUART_RXDATA */
<> 139:856d2700e60b 297 #define _LEUART_RXDATA_RXDATA_SHIFT 0 /**< Shift value for LEUART_RXDATA */
<> 139:856d2700e60b 298 #define _LEUART_RXDATA_RXDATA_MASK 0xFFUL /**< Bit mask for LEUART_RXDATA */
<> 139:856d2700e60b 299 #define _LEUART_RXDATA_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATA */
<> 139:856d2700e60b 300 #define LEUART_RXDATA_RXDATA_DEFAULT (_LEUART_RXDATA_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATA */
<> 139:856d2700e60b 301
<> 139:856d2700e60b 302 /* Bit fields for LEUART RXDATAXP */
<> 139:856d2700e60b 303 #define _LEUART_RXDATAXP_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATAXP */
<> 139:856d2700e60b 304 #define _LEUART_RXDATAXP_MASK 0x0000C1FFUL /**< Mask for LEUART_RXDATAXP */
<> 139:856d2700e60b 305 #define _LEUART_RXDATAXP_RXDATAP_SHIFT 0 /**< Shift value for LEUART_RXDATAP */
<> 139:856d2700e60b 306 #define _LEUART_RXDATAXP_RXDATAP_MASK 0x1FFUL /**< Bit mask for LEUART_RXDATAP */
<> 139:856d2700e60b 307 #define _LEUART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
<> 139:856d2700e60b 308 #define LEUART_RXDATAXP_RXDATAP_DEFAULT (_LEUART_RXDATAXP_RXDATAP_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
<> 139:856d2700e60b 309 #define LEUART_RXDATAXP_PERRP (0x1UL << 14) /**< Receive Data Parity Error Peek */
<> 139:856d2700e60b 310 #define _LEUART_RXDATAXP_PERRP_SHIFT 14 /**< Shift value for LEUART_PERRP */
<> 139:856d2700e60b 311 #define _LEUART_RXDATAXP_PERRP_MASK 0x4000UL /**< Bit mask for LEUART_PERRP */
<> 139:856d2700e60b 312 #define _LEUART_RXDATAXP_PERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
<> 139:856d2700e60b 313 #define LEUART_RXDATAXP_PERRP_DEFAULT (_LEUART_RXDATAXP_PERRP_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
<> 139:856d2700e60b 314 #define LEUART_RXDATAXP_FERRP (0x1UL << 15) /**< Receive Data Framing Error Peek */
<> 139:856d2700e60b 315 #define _LEUART_RXDATAXP_FERRP_SHIFT 15 /**< Shift value for LEUART_FERRP */
<> 139:856d2700e60b 316 #define _LEUART_RXDATAXP_FERRP_MASK 0x8000UL /**< Bit mask for LEUART_FERRP */
<> 139:856d2700e60b 317 #define _LEUART_RXDATAXP_FERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
<> 139:856d2700e60b 318 #define LEUART_RXDATAXP_FERRP_DEFAULT (_LEUART_RXDATAXP_FERRP_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
<> 139:856d2700e60b 319
<> 139:856d2700e60b 320 /* Bit fields for LEUART TXDATAX */
<> 139:856d2700e60b 321 #define _LEUART_TXDATAX_RESETVALUE 0x00000000UL /**< Default value for LEUART_TXDATAX */
<> 139:856d2700e60b 322 #define _LEUART_TXDATAX_MASK 0x0000E1FFUL /**< Mask for LEUART_TXDATAX */
<> 139:856d2700e60b 323 #define _LEUART_TXDATAX_TXDATA_SHIFT 0 /**< Shift value for LEUART_TXDATA */
<> 139:856d2700e60b 324 #define _LEUART_TXDATAX_TXDATA_MASK 0x1FFUL /**< Bit mask for LEUART_TXDATA */
<> 139:856d2700e60b 325 #define _LEUART_TXDATAX_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
<> 139:856d2700e60b 326 #define LEUART_TXDATAX_TXDATA_DEFAULT (_LEUART_TXDATAX_TXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
<> 139:856d2700e60b 327 #define LEUART_TXDATAX_TXBREAK (0x1UL << 13) /**< Transmit Data As Break */
<> 139:856d2700e60b 328 #define _LEUART_TXDATAX_TXBREAK_SHIFT 13 /**< Shift value for LEUART_TXBREAK */
<> 139:856d2700e60b 329 #define _LEUART_TXDATAX_TXBREAK_MASK 0x2000UL /**< Bit mask for LEUART_TXBREAK */
<> 139:856d2700e60b 330 #define _LEUART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
<> 139:856d2700e60b 331 #define LEUART_TXDATAX_TXBREAK_DEFAULT (_LEUART_TXDATAX_TXBREAK_DEFAULT << 13) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
<> 139:856d2700e60b 332 #define LEUART_TXDATAX_TXDISAT (0x1UL << 14) /**< Disable TX After Transmission */
<> 139:856d2700e60b 333 #define _LEUART_TXDATAX_TXDISAT_SHIFT 14 /**< Shift value for LEUART_TXDISAT */
<> 139:856d2700e60b 334 #define _LEUART_TXDATAX_TXDISAT_MASK 0x4000UL /**< Bit mask for LEUART_TXDISAT */
<> 139:856d2700e60b 335 #define _LEUART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
<> 139:856d2700e60b 336 #define LEUART_TXDATAX_TXDISAT_DEFAULT (_LEUART_TXDATAX_TXDISAT_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
<> 139:856d2700e60b 337 #define LEUART_TXDATAX_RXENAT (0x1UL << 15) /**< Enable RX After Transmission */
<> 139:856d2700e60b 338 #define _LEUART_TXDATAX_RXENAT_SHIFT 15 /**< Shift value for LEUART_RXENAT */
<> 139:856d2700e60b 339 #define _LEUART_TXDATAX_RXENAT_MASK 0x8000UL /**< Bit mask for LEUART_RXENAT */
<> 139:856d2700e60b 340 #define _LEUART_TXDATAX_RXENAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
<> 139:856d2700e60b 341 #define LEUART_TXDATAX_RXENAT_DEFAULT (_LEUART_TXDATAX_RXENAT_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
<> 139:856d2700e60b 342
<> 139:856d2700e60b 343 /* Bit fields for LEUART TXDATA */
<> 139:856d2700e60b 344 #define _LEUART_TXDATA_RESETVALUE 0x00000000UL /**< Default value for LEUART_TXDATA */
<> 139:856d2700e60b 345 #define _LEUART_TXDATA_MASK 0x000000FFUL /**< Mask for LEUART_TXDATA */
<> 139:856d2700e60b 346 #define _LEUART_TXDATA_TXDATA_SHIFT 0 /**< Shift value for LEUART_TXDATA */
<> 139:856d2700e60b 347 #define _LEUART_TXDATA_TXDATA_MASK 0xFFUL /**< Bit mask for LEUART_TXDATA */
<> 139:856d2700e60b 348 #define _LEUART_TXDATA_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATA */
<> 139:856d2700e60b 349 #define LEUART_TXDATA_TXDATA_DEFAULT (_LEUART_TXDATA_TXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_TXDATA */
<> 139:856d2700e60b 350
<> 139:856d2700e60b 351 /* Bit fields for LEUART IF */
<> 139:856d2700e60b 352 #define _LEUART_IF_RESETVALUE 0x00000002UL /**< Default value for LEUART_IF */
<> 139:856d2700e60b 353 #define _LEUART_IF_MASK 0x000007FFUL /**< Mask for LEUART_IF */
<> 139:856d2700e60b 354 #define LEUART_IF_TXC (0x1UL << 0) /**< TX Complete Interrupt Flag */
<> 139:856d2700e60b 355 #define _LEUART_IF_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
<> 139:856d2700e60b 356 #define _LEUART_IF_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
<> 139:856d2700e60b 357 #define _LEUART_IF_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 358 #define LEUART_IF_TXC_DEFAULT (_LEUART_IF_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 359 #define LEUART_IF_TXBL (0x1UL << 1) /**< TX Buffer Level Interrupt Flag */
<> 139:856d2700e60b 360 #define _LEUART_IF_TXBL_SHIFT 1 /**< Shift value for LEUART_TXBL */
<> 139:856d2700e60b 361 #define _LEUART_IF_TXBL_MASK 0x2UL /**< Bit mask for LEUART_TXBL */
<> 139:856d2700e60b 362 #define _LEUART_IF_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 363 #define LEUART_IF_TXBL_DEFAULT (_LEUART_IF_TXBL_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 364 #define LEUART_IF_RXDATAV (0x1UL << 2) /**< RX Data Valid Interrupt Flag */
<> 139:856d2700e60b 365 #define _LEUART_IF_RXDATAV_SHIFT 2 /**< Shift value for LEUART_RXDATAV */
<> 139:856d2700e60b 366 #define _LEUART_IF_RXDATAV_MASK 0x4UL /**< Bit mask for LEUART_RXDATAV */
<> 139:856d2700e60b 367 #define _LEUART_IF_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 368 #define LEUART_IF_RXDATAV_DEFAULT (_LEUART_IF_RXDATAV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 369 #define LEUART_IF_RXOF (0x1UL << 3) /**< RX Overflow Interrupt Flag */
<> 139:856d2700e60b 370 #define _LEUART_IF_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
<> 139:856d2700e60b 371 #define _LEUART_IF_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
<> 139:856d2700e60b 372 #define _LEUART_IF_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 373 #define LEUART_IF_RXOF_DEFAULT (_LEUART_IF_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 374 #define LEUART_IF_RXUF (0x1UL << 4) /**< RX Underflow Interrupt Flag */
<> 139:856d2700e60b 375 #define _LEUART_IF_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
<> 139:856d2700e60b 376 #define _LEUART_IF_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
<> 139:856d2700e60b 377 #define _LEUART_IF_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 378 #define LEUART_IF_RXUF_DEFAULT (_LEUART_IF_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 379 #define LEUART_IF_TXOF (0x1UL << 5) /**< TX Overflow Interrupt Flag */
<> 139:856d2700e60b 380 #define _LEUART_IF_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
<> 139:856d2700e60b 381 #define _LEUART_IF_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
<> 139:856d2700e60b 382 #define _LEUART_IF_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 383 #define LEUART_IF_TXOF_DEFAULT (_LEUART_IF_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 384 #define LEUART_IF_PERR (0x1UL << 6) /**< Parity Error Interrupt Flag */
<> 139:856d2700e60b 385 #define _LEUART_IF_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
<> 139:856d2700e60b 386 #define _LEUART_IF_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
<> 139:856d2700e60b 387 #define _LEUART_IF_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 388 #define LEUART_IF_PERR_DEFAULT (_LEUART_IF_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 389 #define LEUART_IF_FERR (0x1UL << 7) /**< Framing Error Interrupt Flag */
<> 139:856d2700e60b 390 #define _LEUART_IF_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
<> 139:856d2700e60b 391 #define _LEUART_IF_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
<> 139:856d2700e60b 392 #define _LEUART_IF_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 393 #define LEUART_IF_FERR_DEFAULT (_LEUART_IF_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 394 #define LEUART_IF_MPAF (0x1UL << 8) /**< Multi-Processor Address Frame Interrupt Flag */
<> 139:856d2700e60b 395 #define _LEUART_IF_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
<> 139:856d2700e60b 396 #define _LEUART_IF_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
<> 139:856d2700e60b 397 #define _LEUART_IF_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 398 #define LEUART_IF_MPAF_DEFAULT (_LEUART_IF_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 399 #define LEUART_IF_STARTF (0x1UL << 9) /**< Start Frame Interrupt Flag */
<> 139:856d2700e60b 400 #define _LEUART_IF_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
<> 139:856d2700e60b 401 #define _LEUART_IF_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
<> 139:856d2700e60b 402 #define _LEUART_IF_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 403 #define LEUART_IF_STARTF_DEFAULT (_LEUART_IF_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 404 #define LEUART_IF_SIGF (0x1UL << 10) /**< Signal Frame Interrupt Flag */
<> 139:856d2700e60b 405 #define _LEUART_IF_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
<> 139:856d2700e60b 406 #define _LEUART_IF_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
<> 139:856d2700e60b 407 #define _LEUART_IF_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 408 #define LEUART_IF_SIGF_DEFAULT (_LEUART_IF_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IF */
<> 139:856d2700e60b 409
<> 139:856d2700e60b 410 /* Bit fields for LEUART IFS */
<> 139:856d2700e60b 411 #define _LEUART_IFS_RESETVALUE 0x00000000UL /**< Default value for LEUART_IFS */
<> 139:856d2700e60b 412 #define _LEUART_IFS_MASK 0x000007F9UL /**< Mask for LEUART_IFS */
<> 139:856d2700e60b 413 #define LEUART_IFS_TXC (0x1UL << 0) /**< Set TXC Interrupt Flag */
<> 139:856d2700e60b 414 #define _LEUART_IFS_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
<> 139:856d2700e60b 415 #define _LEUART_IFS_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
<> 139:856d2700e60b 416 #define _LEUART_IFS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 417 #define LEUART_IFS_TXC_DEFAULT (_LEUART_IFS_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 418 #define LEUART_IFS_RXOF (0x1UL << 3) /**< Set RXOF Interrupt Flag */
<> 139:856d2700e60b 419 #define _LEUART_IFS_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
<> 139:856d2700e60b 420 #define _LEUART_IFS_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
<> 139:856d2700e60b 421 #define _LEUART_IFS_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 422 #define LEUART_IFS_RXOF_DEFAULT (_LEUART_IFS_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 423 #define LEUART_IFS_RXUF (0x1UL << 4) /**< Set RXUF Interrupt Flag */
<> 139:856d2700e60b 424 #define _LEUART_IFS_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
<> 139:856d2700e60b 425 #define _LEUART_IFS_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
<> 139:856d2700e60b 426 #define _LEUART_IFS_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 427 #define LEUART_IFS_RXUF_DEFAULT (_LEUART_IFS_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 428 #define LEUART_IFS_TXOF (0x1UL << 5) /**< Set TXOF Interrupt Flag */
<> 139:856d2700e60b 429 #define _LEUART_IFS_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
<> 139:856d2700e60b 430 #define _LEUART_IFS_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
<> 139:856d2700e60b 431 #define _LEUART_IFS_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 432 #define LEUART_IFS_TXOF_DEFAULT (_LEUART_IFS_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 433 #define LEUART_IFS_PERR (0x1UL << 6) /**< Set PERR Interrupt Flag */
<> 139:856d2700e60b 434 #define _LEUART_IFS_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
<> 139:856d2700e60b 435 #define _LEUART_IFS_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
<> 139:856d2700e60b 436 #define _LEUART_IFS_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 437 #define LEUART_IFS_PERR_DEFAULT (_LEUART_IFS_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 438 #define LEUART_IFS_FERR (0x1UL << 7) /**< Set FERR Interrupt Flag */
<> 139:856d2700e60b 439 #define _LEUART_IFS_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
<> 139:856d2700e60b 440 #define _LEUART_IFS_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
<> 139:856d2700e60b 441 #define _LEUART_IFS_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 442 #define LEUART_IFS_FERR_DEFAULT (_LEUART_IFS_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 443 #define LEUART_IFS_MPAF (0x1UL << 8) /**< Set MPAF Interrupt Flag */
<> 139:856d2700e60b 444 #define _LEUART_IFS_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
<> 139:856d2700e60b 445 #define _LEUART_IFS_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
<> 139:856d2700e60b 446 #define _LEUART_IFS_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 447 #define LEUART_IFS_MPAF_DEFAULT (_LEUART_IFS_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 448 #define LEUART_IFS_STARTF (0x1UL << 9) /**< Set STARTF Interrupt Flag */
<> 139:856d2700e60b 449 #define _LEUART_IFS_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
<> 139:856d2700e60b 450 #define _LEUART_IFS_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
<> 139:856d2700e60b 451 #define _LEUART_IFS_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 452 #define LEUART_IFS_STARTF_DEFAULT (_LEUART_IFS_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 453 #define LEUART_IFS_SIGF (0x1UL << 10) /**< Set SIGF Interrupt Flag */
<> 139:856d2700e60b 454 #define _LEUART_IFS_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
<> 139:856d2700e60b 455 #define _LEUART_IFS_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
<> 139:856d2700e60b 456 #define _LEUART_IFS_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 457 #define LEUART_IFS_SIGF_DEFAULT (_LEUART_IFS_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IFS */
<> 139:856d2700e60b 458
<> 139:856d2700e60b 459 /* Bit fields for LEUART IFC */
<> 139:856d2700e60b 460 #define _LEUART_IFC_RESETVALUE 0x00000000UL /**< Default value for LEUART_IFC */
<> 139:856d2700e60b 461 #define _LEUART_IFC_MASK 0x000007F9UL /**< Mask for LEUART_IFC */
<> 139:856d2700e60b 462 #define LEUART_IFC_TXC (0x1UL << 0) /**< Clear TXC Interrupt Flag */
<> 139:856d2700e60b 463 #define _LEUART_IFC_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
<> 139:856d2700e60b 464 #define _LEUART_IFC_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
<> 139:856d2700e60b 465 #define _LEUART_IFC_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 466 #define LEUART_IFC_TXC_DEFAULT (_LEUART_IFC_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 467 #define LEUART_IFC_RXOF (0x1UL << 3) /**< Clear RXOF Interrupt Flag */
<> 139:856d2700e60b 468 #define _LEUART_IFC_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
<> 139:856d2700e60b 469 #define _LEUART_IFC_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
<> 139:856d2700e60b 470 #define _LEUART_IFC_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 471 #define LEUART_IFC_RXOF_DEFAULT (_LEUART_IFC_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 472 #define LEUART_IFC_RXUF (0x1UL << 4) /**< Clear RXUF Interrupt Flag */
<> 139:856d2700e60b 473 #define _LEUART_IFC_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
<> 139:856d2700e60b 474 #define _LEUART_IFC_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
<> 139:856d2700e60b 475 #define _LEUART_IFC_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 476 #define LEUART_IFC_RXUF_DEFAULT (_LEUART_IFC_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 477 #define LEUART_IFC_TXOF (0x1UL << 5) /**< Clear TXOF Interrupt Flag */
<> 139:856d2700e60b 478 #define _LEUART_IFC_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
<> 139:856d2700e60b 479 #define _LEUART_IFC_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
<> 139:856d2700e60b 480 #define _LEUART_IFC_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 481 #define LEUART_IFC_TXOF_DEFAULT (_LEUART_IFC_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 482 #define LEUART_IFC_PERR (0x1UL << 6) /**< Clear PERR Interrupt Flag */
<> 139:856d2700e60b 483 #define _LEUART_IFC_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
<> 139:856d2700e60b 484 #define _LEUART_IFC_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
<> 139:856d2700e60b 485 #define _LEUART_IFC_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 486 #define LEUART_IFC_PERR_DEFAULT (_LEUART_IFC_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 487 #define LEUART_IFC_FERR (0x1UL << 7) /**< Clear FERR Interrupt Flag */
<> 139:856d2700e60b 488 #define _LEUART_IFC_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
<> 139:856d2700e60b 489 #define _LEUART_IFC_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
<> 139:856d2700e60b 490 #define _LEUART_IFC_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 491 #define LEUART_IFC_FERR_DEFAULT (_LEUART_IFC_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 492 #define LEUART_IFC_MPAF (0x1UL << 8) /**< Clear MPAF Interrupt Flag */
<> 139:856d2700e60b 493 #define _LEUART_IFC_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
<> 139:856d2700e60b 494 #define _LEUART_IFC_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
<> 139:856d2700e60b 495 #define _LEUART_IFC_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 496 #define LEUART_IFC_MPAF_DEFAULT (_LEUART_IFC_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 497 #define LEUART_IFC_STARTF (0x1UL << 9) /**< Clear STARTF Interrupt Flag */
<> 139:856d2700e60b 498 #define _LEUART_IFC_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
<> 139:856d2700e60b 499 #define _LEUART_IFC_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
<> 139:856d2700e60b 500 #define _LEUART_IFC_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 501 #define LEUART_IFC_STARTF_DEFAULT (_LEUART_IFC_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 502 #define LEUART_IFC_SIGF (0x1UL << 10) /**< Clear SIGF Interrupt Flag */
<> 139:856d2700e60b 503 #define _LEUART_IFC_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
<> 139:856d2700e60b 504 #define _LEUART_IFC_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
<> 139:856d2700e60b 505 #define _LEUART_IFC_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 506 #define LEUART_IFC_SIGF_DEFAULT (_LEUART_IFC_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IFC */
<> 139:856d2700e60b 507
<> 139:856d2700e60b 508 /* Bit fields for LEUART IEN */
<> 139:856d2700e60b 509 #define _LEUART_IEN_RESETVALUE 0x00000000UL /**< Default value for LEUART_IEN */
<> 139:856d2700e60b 510 #define _LEUART_IEN_MASK 0x000007FFUL /**< Mask for LEUART_IEN */
<> 139:856d2700e60b 511 #define LEUART_IEN_TXC (0x1UL << 0) /**< TXC Interrupt Enable */
<> 139:856d2700e60b 512 #define _LEUART_IEN_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
<> 139:856d2700e60b 513 #define _LEUART_IEN_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
<> 139:856d2700e60b 514 #define _LEUART_IEN_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 515 #define LEUART_IEN_TXC_DEFAULT (_LEUART_IEN_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 516 #define LEUART_IEN_TXBL (0x1UL << 1) /**< TXBL Interrupt Enable */
<> 139:856d2700e60b 517 #define _LEUART_IEN_TXBL_SHIFT 1 /**< Shift value for LEUART_TXBL */
<> 139:856d2700e60b 518 #define _LEUART_IEN_TXBL_MASK 0x2UL /**< Bit mask for LEUART_TXBL */
<> 139:856d2700e60b 519 #define _LEUART_IEN_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 520 #define LEUART_IEN_TXBL_DEFAULT (_LEUART_IEN_TXBL_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 521 #define LEUART_IEN_RXDATAV (0x1UL << 2) /**< RXDATAV Interrupt Enable */
<> 139:856d2700e60b 522 #define _LEUART_IEN_RXDATAV_SHIFT 2 /**< Shift value for LEUART_RXDATAV */
<> 139:856d2700e60b 523 #define _LEUART_IEN_RXDATAV_MASK 0x4UL /**< Bit mask for LEUART_RXDATAV */
<> 139:856d2700e60b 524 #define _LEUART_IEN_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 525 #define LEUART_IEN_RXDATAV_DEFAULT (_LEUART_IEN_RXDATAV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 526 #define LEUART_IEN_RXOF (0x1UL << 3) /**< RXOF Interrupt Enable */
<> 139:856d2700e60b 527 #define _LEUART_IEN_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
<> 139:856d2700e60b 528 #define _LEUART_IEN_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
<> 139:856d2700e60b 529 #define _LEUART_IEN_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 530 #define LEUART_IEN_RXOF_DEFAULT (_LEUART_IEN_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 531 #define LEUART_IEN_RXUF (0x1UL << 4) /**< RXUF Interrupt Enable */
<> 139:856d2700e60b 532 #define _LEUART_IEN_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
<> 139:856d2700e60b 533 #define _LEUART_IEN_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
<> 139:856d2700e60b 534 #define _LEUART_IEN_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 535 #define LEUART_IEN_RXUF_DEFAULT (_LEUART_IEN_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 536 #define LEUART_IEN_TXOF (0x1UL << 5) /**< TXOF Interrupt Enable */
<> 139:856d2700e60b 537 #define _LEUART_IEN_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
<> 139:856d2700e60b 538 #define _LEUART_IEN_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
<> 139:856d2700e60b 539 #define _LEUART_IEN_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 540 #define LEUART_IEN_TXOF_DEFAULT (_LEUART_IEN_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 541 #define LEUART_IEN_PERR (0x1UL << 6) /**< PERR Interrupt Enable */
<> 139:856d2700e60b 542 #define _LEUART_IEN_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
<> 139:856d2700e60b 543 #define _LEUART_IEN_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
<> 139:856d2700e60b 544 #define _LEUART_IEN_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 545 #define LEUART_IEN_PERR_DEFAULT (_LEUART_IEN_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 546 #define LEUART_IEN_FERR (0x1UL << 7) /**< FERR Interrupt Enable */
<> 139:856d2700e60b 547 #define _LEUART_IEN_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
<> 139:856d2700e60b 548 #define _LEUART_IEN_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
<> 139:856d2700e60b 549 #define _LEUART_IEN_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 550 #define LEUART_IEN_FERR_DEFAULT (_LEUART_IEN_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 551 #define LEUART_IEN_MPAF (0x1UL << 8) /**< MPAF Interrupt Enable */
<> 139:856d2700e60b 552 #define _LEUART_IEN_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
<> 139:856d2700e60b 553 #define _LEUART_IEN_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
<> 139:856d2700e60b 554 #define _LEUART_IEN_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 555 #define LEUART_IEN_MPAF_DEFAULT (_LEUART_IEN_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 556 #define LEUART_IEN_STARTF (0x1UL << 9) /**< STARTF Interrupt Enable */
<> 139:856d2700e60b 557 #define _LEUART_IEN_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
<> 139:856d2700e60b 558 #define _LEUART_IEN_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
<> 139:856d2700e60b 559 #define _LEUART_IEN_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 560 #define LEUART_IEN_STARTF_DEFAULT (_LEUART_IEN_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 561 #define LEUART_IEN_SIGF (0x1UL << 10) /**< SIGF Interrupt Enable */
<> 139:856d2700e60b 562 #define _LEUART_IEN_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
<> 139:856d2700e60b 563 #define _LEUART_IEN_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
<> 139:856d2700e60b 564 #define _LEUART_IEN_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 565 #define LEUART_IEN_SIGF_DEFAULT (_LEUART_IEN_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IEN */
<> 139:856d2700e60b 566
<> 139:856d2700e60b 567 /* Bit fields for LEUART PULSECTRL */
<> 139:856d2700e60b 568 #define _LEUART_PULSECTRL_RESETVALUE 0x00000000UL /**< Default value for LEUART_PULSECTRL */
<> 139:856d2700e60b 569 #define _LEUART_PULSECTRL_MASK 0x0000003FUL /**< Mask for LEUART_PULSECTRL */
<> 139:856d2700e60b 570 #define _LEUART_PULSECTRL_PULSEW_SHIFT 0 /**< Shift value for LEUART_PULSEW */
<> 139:856d2700e60b 571 #define _LEUART_PULSECTRL_PULSEW_MASK 0xFUL /**< Bit mask for LEUART_PULSEW */
<> 139:856d2700e60b 572 #define _LEUART_PULSECTRL_PULSEW_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
<> 139:856d2700e60b 573 #define LEUART_PULSECTRL_PULSEW_DEFAULT (_LEUART_PULSECTRL_PULSEW_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
<> 139:856d2700e60b 574 #define LEUART_PULSECTRL_PULSEEN (0x1UL << 4) /**< Pulse Generator/Extender Enable */
<> 139:856d2700e60b 575 #define _LEUART_PULSECTRL_PULSEEN_SHIFT 4 /**< Shift value for LEUART_PULSEEN */
<> 139:856d2700e60b 576 #define _LEUART_PULSECTRL_PULSEEN_MASK 0x10UL /**< Bit mask for LEUART_PULSEEN */
<> 139:856d2700e60b 577 #define _LEUART_PULSECTRL_PULSEEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
<> 139:856d2700e60b 578 #define LEUART_PULSECTRL_PULSEEN_DEFAULT (_LEUART_PULSECTRL_PULSEEN_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
<> 139:856d2700e60b 579 #define LEUART_PULSECTRL_PULSEFILT (0x1UL << 5) /**< Pulse Filter */
<> 139:856d2700e60b 580 #define _LEUART_PULSECTRL_PULSEFILT_SHIFT 5 /**< Shift value for LEUART_PULSEFILT */
<> 139:856d2700e60b 581 #define _LEUART_PULSECTRL_PULSEFILT_MASK 0x20UL /**< Bit mask for LEUART_PULSEFILT */
<> 139:856d2700e60b 582 #define _LEUART_PULSECTRL_PULSEFILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
<> 139:856d2700e60b 583 #define LEUART_PULSECTRL_PULSEFILT_DEFAULT (_LEUART_PULSECTRL_PULSEFILT_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
<> 139:856d2700e60b 584
<> 139:856d2700e60b 585 /* Bit fields for LEUART FREEZE */
<> 139:856d2700e60b 586 #define _LEUART_FREEZE_RESETVALUE 0x00000000UL /**< Default value for LEUART_FREEZE */
<> 139:856d2700e60b 587 #define _LEUART_FREEZE_MASK 0x00000001UL /**< Mask for LEUART_FREEZE */
<> 139:856d2700e60b 588 #define LEUART_FREEZE_REGFREEZE (0x1UL << 0) /**< Register Update Freeze */
<> 139:856d2700e60b 589 #define _LEUART_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for LEUART_REGFREEZE */
<> 139:856d2700e60b 590 #define _LEUART_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for LEUART_REGFREEZE */
<> 139:856d2700e60b 591 #define _LEUART_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_FREEZE */
<> 139:856d2700e60b 592 #define _LEUART_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for LEUART_FREEZE */
<> 139:856d2700e60b 593 #define _LEUART_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for LEUART_FREEZE */
<> 139:856d2700e60b 594 #define LEUART_FREEZE_REGFREEZE_DEFAULT (_LEUART_FREEZE_REGFREEZE_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_FREEZE */
<> 139:856d2700e60b 595 #define LEUART_FREEZE_REGFREEZE_UPDATE (_LEUART_FREEZE_REGFREEZE_UPDATE << 0) /**< Shifted mode UPDATE for LEUART_FREEZE */
<> 139:856d2700e60b 596 #define LEUART_FREEZE_REGFREEZE_FREEZE (_LEUART_FREEZE_REGFREEZE_FREEZE << 0) /**< Shifted mode FREEZE for LEUART_FREEZE */
<> 139:856d2700e60b 597
<> 139:856d2700e60b 598 /* Bit fields for LEUART SYNCBUSY */
<> 139:856d2700e60b 599 #define _LEUART_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for LEUART_SYNCBUSY */
<> 139:856d2700e60b 600 #define _LEUART_SYNCBUSY_MASK 0x000000FFUL /**< Mask for LEUART_SYNCBUSY */
<> 139:856d2700e60b 601 #define LEUART_SYNCBUSY_CTRL (0x1UL << 0) /**< CTRL Register Busy */
<> 139:856d2700e60b 602 #define _LEUART_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for LEUART_CTRL */
<> 139:856d2700e60b 603 #define _LEUART_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for LEUART_CTRL */
<> 139:856d2700e60b 604 #define _LEUART_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 605 #define LEUART_SYNCBUSY_CTRL_DEFAULT (_LEUART_SYNCBUSY_CTRL_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 606 #define LEUART_SYNCBUSY_CMD (0x1UL << 1) /**< CMD Register Busy */
<> 139:856d2700e60b 607 #define _LEUART_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for LEUART_CMD */
<> 139:856d2700e60b 608 #define _LEUART_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for LEUART_CMD */
<> 139:856d2700e60b 609 #define _LEUART_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 610 #define LEUART_SYNCBUSY_CMD_DEFAULT (_LEUART_SYNCBUSY_CMD_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 611 #define LEUART_SYNCBUSY_CLKDIV (0x1UL << 2) /**< CLKDIV Register Busy */
<> 139:856d2700e60b 612 #define _LEUART_SYNCBUSY_CLKDIV_SHIFT 2 /**< Shift value for LEUART_CLKDIV */
<> 139:856d2700e60b 613 #define _LEUART_SYNCBUSY_CLKDIV_MASK 0x4UL /**< Bit mask for LEUART_CLKDIV */
<> 139:856d2700e60b 614 #define _LEUART_SYNCBUSY_CLKDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 615 #define LEUART_SYNCBUSY_CLKDIV_DEFAULT (_LEUART_SYNCBUSY_CLKDIV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 616 #define LEUART_SYNCBUSY_STARTFRAME (0x1UL << 3) /**< STARTFRAME Register Busy */
<> 139:856d2700e60b 617 #define _LEUART_SYNCBUSY_STARTFRAME_SHIFT 3 /**< Shift value for LEUART_STARTFRAME */
<> 139:856d2700e60b 618 #define _LEUART_SYNCBUSY_STARTFRAME_MASK 0x8UL /**< Bit mask for LEUART_STARTFRAME */
<> 139:856d2700e60b 619 #define _LEUART_SYNCBUSY_STARTFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 620 #define LEUART_SYNCBUSY_STARTFRAME_DEFAULT (_LEUART_SYNCBUSY_STARTFRAME_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 621 #define LEUART_SYNCBUSY_SIGFRAME (0x1UL << 4) /**< SIGFRAME Register Busy */
<> 139:856d2700e60b 622 #define _LEUART_SYNCBUSY_SIGFRAME_SHIFT 4 /**< Shift value for LEUART_SIGFRAME */
<> 139:856d2700e60b 623 #define _LEUART_SYNCBUSY_SIGFRAME_MASK 0x10UL /**< Bit mask for LEUART_SIGFRAME */
<> 139:856d2700e60b 624 #define _LEUART_SYNCBUSY_SIGFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 625 #define LEUART_SYNCBUSY_SIGFRAME_DEFAULT (_LEUART_SYNCBUSY_SIGFRAME_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 626 #define LEUART_SYNCBUSY_TXDATAX (0x1UL << 5) /**< TXDATAX Register Busy */
<> 139:856d2700e60b 627 #define _LEUART_SYNCBUSY_TXDATAX_SHIFT 5 /**< Shift value for LEUART_TXDATAX */
<> 139:856d2700e60b 628 #define _LEUART_SYNCBUSY_TXDATAX_MASK 0x20UL /**< Bit mask for LEUART_TXDATAX */
<> 139:856d2700e60b 629 #define _LEUART_SYNCBUSY_TXDATAX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 630 #define LEUART_SYNCBUSY_TXDATAX_DEFAULT (_LEUART_SYNCBUSY_TXDATAX_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 631 #define LEUART_SYNCBUSY_TXDATA (0x1UL << 6) /**< TXDATA Register Busy */
<> 139:856d2700e60b 632 #define _LEUART_SYNCBUSY_TXDATA_SHIFT 6 /**< Shift value for LEUART_TXDATA */
<> 139:856d2700e60b 633 #define _LEUART_SYNCBUSY_TXDATA_MASK 0x40UL /**< Bit mask for LEUART_TXDATA */
<> 139:856d2700e60b 634 #define _LEUART_SYNCBUSY_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 635 #define LEUART_SYNCBUSY_TXDATA_DEFAULT (_LEUART_SYNCBUSY_TXDATA_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 636 #define LEUART_SYNCBUSY_PULSECTRL (0x1UL << 7) /**< PULSECTRL Register Busy */
<> 139:856d2700e60b 637 #define _LEUART_SYNCBUSY_PULSECTRL_SHIFT 7 /**< Shift value for LEUART_PULSECTRL */
<> 139:856d2700e60b 638 #define _LEUART_SYNCBUSY_PULSECTRL_MASK 0x80UL /**< Bit mask for LEUART_PULSECTRL */
<> 139:856d2700e60b 639 #define _LEUART_SYNCBUSY_PULSECTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 640 #define LEUART_SYNCBUSY_PULSECTRL_DEFAULT (_LEUART_SYNCBUSY_PULSECTRL_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
<> 139:856d2700e60b 641
<> 139:856d2700e60b 642 /* Bit fields for LEUART ROUTEPEN */
<> 139:856d2700e60b 643 #define _LEUART_ROUTEPEN_RESETVALUE 0x00000000UL /**< Default value for LEUART_ROUTEPEN */
<> 139:856d2700e60b 644 #define _LEUART_ROUTEPEN_MASK 0x00000003UL /**< Mask for LEUART_ROUTEPEN */
<> 139:856d2700e60b 645 #define LEUART_ROUTEPEN_RXPEN (0x1UL << 0) /**< RX Pin Enable */
<> 139:856d2700e60b 646 #define _LEUART_ROUTEPEN_RXPEN_SHIFT 0 /**< Shift value for LEUART_RXPEN */
<> 139:856d2700e60b 647 #define _LEUART_ROUTEPEN_RXPEN_MASK 0x1UL /**< Bit mask for LEUART_RXPEN */
<> 139:856d2700e60b 648 #define _LEUART_ROUTEPEN_RXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTEPEN */
<> 139:856d2700e60b 649 #define LEUART_ROUTEPEN_RXPEN_DEFAULT (_LEUART_ROUTEPEN_RXPEN_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_ROUTEPEN */
<> 139:856d2700e60b 650 #define LEUART_ROUTEPEN_TXPEN (0x1UL << 1) /**< TX Pin Enable */
<> 139:856d2700e60b 651 #define _LEUART_ROUTEPEN_TXPEN_SHIFT 1 /**< Shift value for LEUART_TXPEN */
<> 139:856d2700e60b 652 #define _LEUART_ROUTEPEN_TXPEN_MASK 0x2UL /**< Bit mask for LEUART_TXPEN */
<> 139:856d2700e60b 653 #define _LEUART_ROUTEPEN_TXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTEPEN */
<> 139:856d2700e60b 654 #define LEUART_ROUTEPEN_TXPEN_DEFAULT (_LEUART_ROUTEPEN_TXPEN_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_ROUTEPEN */
<> 139:856d2700e60b 655
<> 139:856d2700e60b 656 /* Bit fields for LEUART ROUTELOC0 */
<> 139:856d2700e60b 657 #define _LEUART_ROUTELOC0_RESETVALUE 0x00000000UL /**< Default value for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 658 #define _LEUART_ROUTELOC0_MASK 0x00001F1FUL /**< Mask for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 659 #define _LEUART_ROUTELOC0_RXLOC_SHIFT 0 /**< Shift value for LEUART_RXLOC */
<> 139:856d2700e60b 660 #define _LEUART_ROUTELOC0_RXLOC_MASK 0x1FUL /**< Bit mask for LEUART_RXLOC */
<> 139:856d2700e60b 661 #define _LEUART_ROUTELOC0_RXLOC_LOC0 0x00000000UL /**< Mode LOC0 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 662 #define _LEUART_ROUTELOC0_RXLOC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 663 #define _LEUART_ROUTELOC0_RXLOC_LOC1 0x00000001UL /**< Mode LOC1 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 664 #define _LEUART_ROUTELOC0_RXLOC_LOC2 0x00000002UL /**< Mode LOC2 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 665 #define _LEUART_ROUTELOC0_RXLOC_LOC3 0x00000003UL /**< Mode LOC3 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 666 #define _LEUART_ROUTELOC0_RXLOC_LOC4 0x00000004UL /**< Mode LOC4 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 667 #define _LEUART_ROUTELOC0_RXLOC_LOC5 0x00000005UL /**< Mode LOC5 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 668 #define _LEUART_ROUTELOC0_RXLOC_LOC6 0x00000006UL /**< Mode LOC6 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 669 #define _LEUART_ROUTELOC0_RXLOC_LOC7 0x00000007UL /**< Mode LOC7 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 670 #define _LEUART_ROUTELOC0_RXLOC_LOC8 0x00000008UL /**< Mode LOC8 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 671 #define _LEUART_ROUTELOC0_RXLOC_LOC9 0x00000009UL /**< Mode LOC9 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 672 #define _LEUART_ROUTELOC0_RXLOC_LOC10 0x0000000AUL /**< Mode LOC10 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 673 #define _LEUART_ROUTELOC0_RXLOC_LOC11 0x0000000BUL /**< Mode LOC11 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 674 #define _LEUART_ROUTELOC0_RXLOC_LOC12 0x0000000CUL /**< Mode LOC12 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 675 #define _LEUART_ROUTELOC0_RXLOC_LOC13 0x0000000DUL /**< Mode LOC13 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 676 #define _LEUART_ROUTELOC0_RXLOC_LOC14 0x0000000EUL /**< Mode LOC14 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 677 #define _LEUART_ROUTELOC0_RXLOC_LOC15 0x0000000FUL /**< Mode LOC15 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 678 #define _LEUART_ROUTELOC0_RXLOC_LOC16 0x00000010UL /**< Mode LOC16 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 679 #define _LEUART_ROUTELOC0_RXLOC_LOC17 0x00000011UL /**< Mode LOC17 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 680 #define _LEUART_ROUTELOC0_RXLOC_LOC18 0x00000012UL /**< Mode LOC18 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 681 #define _LEUART_ROUTELOC0_RXLOC_LOC19 0x00000013UL /**< Mode LOC19 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 682 #define _LEUART_ROUTELOC0_RXLOC_LOC20 0x00000014UL /**< Mode LOC20 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 683 #define _LEUART_ROUTELOC0_RXLOC_LOC21 0x00000015UL /**< Mode LOC21 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 684 #define _LEUART_ROUTELOC0_RXLOC_LOC22 0x00000016UL /**< Mode LOC22 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 685 #define _LEUART_ROUTELOC0_RXLOC_LOC23 0x00000017UL /**< Mode LOC23 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 686 #define _LEUART_ROUTELOC0_RXLOC_LOC24 0x00000018UL /**< Mode LOC24 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 687 #define _LEUART_ROUTELOC0_RXLOC_LOC25 0x00000019UL /**< Mode LOC25 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 688 #define _LEUART_ROUTELOC0_RXLOC_LOC26 0x0000001AUL /**< Mode LOC26 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 689 #define _LEUART_ROUTELOC0_RXLOC_LOC27 0x0000001BUL /**< Mode LOC27 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 690 #define _LEUART_ROUTELOC0_RXLOC_LOC28 0x0000001CUL /**< Mode LOC28 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 691 #define _LEUART_ROUTELOC0_RXLOC_LOC29 0x0000001DUL /**< Mode LOC29 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 692 #define _LEUART_ROUTELOC0_RXLOC_LOC30 0x0000001EUL /**< Mode LOC30 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 693 #define _LEUART_ROUTELOC0_RXLOC_LOC31 0x0000001FUL /**< Mode LOC31 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 694 #define LEUART_ROUTELOC0_RXLOC_LOC0 (_LEUART_ROUTELOC0_RXLOC_LOC0 << 0) /**< Shifted mode LOC0 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 695 #define LEUART_ROUTELOC0_RXLOC_DEFAULT (_LEUART_ROUTELOC0_RXLOC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 696 #define LEUART_ROUTELOC0_RXLOC_LOC1 (_LEUART_ROUTELOC0_RXLOC_LOC1 << 0) /**< Shifted mode LOC1 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 697 #define LEUART_ROUTELOC0_RXLOC_LOC2 (_LEUART_ROUTELOC0_RXLOC_LOC2 << 0) /**< Shifted mode LOC2 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 698 #define LEUART_ROUTELOC0_RXLOC_LOC3 (_LEUART_ROUTELOC0_RXLOC_LOC3 << 0) /**< Shifted mode LOC3 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 699 #define LEUART_ROUTELOC0_RXLOC_LOC4 (_LEUART_ROUTELOC0_RXLOC_LOC4 << 0) /**< Shifted mode LOC4 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 700 #define LEUART_ROUTELOC0_RXLOC_LOC5 (_LEUART_ROUTELOC0_RXLOC_LOC5 << 0) /**< Shifted mode LOC5 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 701 #define LEUART_ROUTELOC0_RXLOC_LOC6 (_LEUART_ROUTELOC0_RXLOC_LOC6 << 0) /**< Shifted mode LOC6 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 702 #define LEUART_ROUTELOC0_RXLOC_LOC7 (_LEUART_ROUTELOC0_RXLOC_LOC7 << 0) /**< Shifted mode LOC7 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 703 #define LEUART_ROUTELOC0_RXLOC_LOC8 (_LEUART_ROUTELOC0_RXLOC_LOC8 << 0) /**< Shifted mode LOC8 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 704 #define LEUART_ROUTELOC0_RXLOC_LOC9 (_LEUART_ROUTELOC0_RXLOC_LOC9 << 0) /**< Shifted mode LOC9 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 705 #define LEUART_ROUTELOC0_RXLOC_LOC10 (_LEUART_ROUTELOC0_RXLOC_LOC10 << 0) /**< Shifted mode LOC10 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 706 #define LEUART_ROUTELOC0_RXLOC_LOC11 (_LEUART_ROUTELOC0_RXLOC_LOC11 << 0) /**< Shifted mode LOC11 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 707 #define LEUART_ROUTELOC0_RXLOC_LOC12 (_LEUART_ROUTELOC0_RXLOC_LOC12 << 0) /**< Shifted mode LOC12 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 708 #define LEUART_ROUTELOC0_RXLOC_LOC13 (_LEUART_ROUTELOC0_RXLOC_LOC13 << 0) /**< Shifted mode LOC13 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 709 #define LEUART_ROUTELOC0_RXLOC_LOC14 (_LEUART_ROUTELOC0_RXLOC_LOC14 << 0) /**< Shifted mode LOC14 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 710 #define LEUART_ROUTELOC0_RXLOC_LOC15 (_LEUART_ROUTELOC0_RXLOC_LOC15 << 0) /**< Shifted mode LOC15 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 711 #define LEUART_ROUTELOC0_RXLOC_LOC16 (_LEUART_ROUTELOC0_RXLOC_LOC16 << 0) /**< Shifted mode LOC16 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 712 #define LEUART_ROUTELOC0_RXLOC_LOC17 (_LEUART_ROUTELOC0_RXLOC_LOC17 << 0) /**< Shifted mode LOC17 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 713 #define LEUART_ROUTELOC0_RXLOC_LOC18 (_LEUART_ROUTELOC0_RXLOC_LOC18 << 0) /**< Shifted mode LOC18 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 714 #define LEUART_ROUTELOC0_RXLOC_LOC19 (_LEUART_ROUTELOC0_RXLOC_LOC19 << 0) /**< Shifted mode LOC19 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 715 #define LEUART_ROUTELOC0_RXLOC_LOC20 (_LEUART_ROUTELOC0_RXLOC_LOC20 << 0) /**< Shifted mode LOC20 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 716 #define LEUART_ROUTELOC0_RXLOC_LOC21 (_LEUART_ROUTELOC0_RXLOC_LOC21 << 0) /**< Shifted mode LOC21 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 717 #define LEUART_ROUTELOC0_RXLOC_LOC22 (_LEUART_ROUTELOC0_RXLOC_LOC22 << 0) /**< Shifted mode LOC22 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 718 #define LEUART_ROUTELOC0_RXLOC_LOC23 (_LEUART_ROUTELOC0_RXLOC_LOC23 << 0) /**< Shifted mode LOC23 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 719 #define LEUART_ROUTELOC0_RXLOC_LOC24 (_LEUART_ROUTELOC0_RXLOC_LOC24 << 0) /**< Shifted mode LOC24 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 720 #define LEUART_ROUTELOC0_RXLOC_LOC25 (_LEUART_ROUTELOC0_RXLOC_LOC25 << 0) /**< Shifted mode LOC25 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 721 #define LEUART_ROUTELOC0_RXLOC_LOC26 (_LEUART_ROUTELOC0_RXLOC_LOC26 << 0) /**< Shifted mode LOC26 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 722 #define LEUART_ROUTELOC0_RXLOC_LOC27 (_LEUART_ROUTELOC0_RXLOC_LOC27 << 0) /**< Shifted mode LOC27 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 723 #define LEUART_ROUTELOC0_RXLOC_LOC28 (_LEUART_ROUTELOC0_RXLOC_LOC28 << 0) /**< Shifted mode LOC28 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 724 #define LEUART_ROUTELOC0_RXLOC_LOC29 (_LEUART_ROUTELOC0_RXLOC_LOC29 << 0) /**< Shifted mode LOC29 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 725 #define LEUART_ROUTELOC0_RXLOC_LOC30 (_LEUART_ROUTELOC0_RXLOC_LOC30 << 0) /**< Shifted mode LOC30 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 726 #define LEUART_ROUTELOC0_RXLOC_LOC31 (_LEUART_ROUTELOC0_RXLOC_LOC31 << 0) /**< Shifted mode LOC31 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 727 #define _LEUART_ROUTELOC0_TXLOC_SHIFT 8 /**< Shift value for LEUART_TXLOC */
<> 139:856d2700e60b 728 #define _LEUART_ROUTELOC0_TXLOC_MASK 0x1F00UL /**< Bit mask for LEUART_TXLOC */
<> 139:856d2700e60b 729 #define _LEUART_ROUTELOC0_TXLOC_LOC0 0x00000000UL /**< Mode LOC0 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 730 #define _LEUART_ROUTELOC0_TXLOC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 731 #define _LEUART_ROUTELOC0_TXLOC_LOC1 0x00000001UL /**< Mode LOC1 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 732 #define _LEUART_ROUTELOC0_TXLOC_LOC2 0x00000002UL /**< Mode LOC2 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 733 #define _LEUART_ROUTELOC0_TXLOC_LOC3 0x00000003UL /**< Mode LOC3 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 734 #define _LEUART_ROUTELOC0_TXLOC_LOC4 0x00000004UL /**< Mode LOC4 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 735 #define _LEUART_ROUTELOC0_TXLOC_LOC5 0x00000005UL /**< Mode LOC5 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 736 #define _LEUART_ROUTELOC0_TXLOC_LOC6 0x00000006UL /**< Mode LOC6 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 737 #define _LEUART_ROUTELOC0_TXLOC_LOC7 0x00000007UL /**< Mode LOC7 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 738 #define _LEUART_ROUTELOC0_TXLOC_LOC8 0x00000008UL /**< Mode LOC8 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 739 #define _LEUART_ROUTELOC0_TXLOC_LOC9 0x00000009UL /**< Mode LOC9 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 740 #define _LEUART_ROUTELOC0_TXLOC_LOC10 0x0000000AUL /**< Mode LOC10 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 741 #define _LEUART_ROUTELOC0_TXLOC_LOC11 0x0000000BUL /**< Mode LOC11 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 742 #define _LEUART_ROUTELOC0_TXLOC_LOC12 0x0000000CUL /**< Mode LOC12 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 743 #define _LEUART_ROUTELOC0_TXLOC_LOC13 0x0000000DUL /**< Mode LOC13 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 744 #define _LEUART_ROUTELOC0_TXLOC_LOC14 0x0000000EUL /**< Mode LOC14 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 745 #define _LEUART_ROUTELOC0_TXLOC_LOC15 0x0000000FUL /**< Mode LOC15 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 746 #define _LEUART_ROUTELOC0_TXLOC_LOC16 0x00000010UL /**< Mode LOC16 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 747 #define _LEUART_ROUTELOC0_TXLOC_LOC17 0x00000011UL /**< Mode LOC17 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 748 #define _LEUART_ROUTELOC0_TXLOC_LOC18 0x00000012UL /**< Mode LOC18 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 749 #define _LEUART_ROUTELOC0_TXLOC_LOC19 0x00000013UL /**< Mode LOC19 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 750 #define _LEUART_ROUTELOC0_TXLOC_LOC20 0x00000014UL /**< Mode LOC20 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 751 #define _LEUART_ROUTELOC0_TXLOC_LOC21 0x00000015UL /**< Mode LOC21 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 752 #define _LEUART_ROUTELOC0_TXLOC_LOC22 0x00000016UL /**< Mode LOC22 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 753 #define _LEUART_ROUTELOC0_TXLOC_LOC23 0x00000017UL /**< Mode LOC23 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 754 #define _LEUART_ROUTELOC0_TXLOC_LOC24 0x00000018UL /**< Mode LOC24 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 755 #define _LEUART_ROUTELOC0_TXLOC_LOC25 0x00000019UL /**< Mode LOC25 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 756 #define _LEUART_ROUTELOC0_TXLOC_LOC26 0x0000001AUL /**< Mode LOC26 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 757 #define _LEUART_ROUTELOC0_TXLOC_LOC27 0x0000001BUL /**< Mode LOC27 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 758 #define _LEUART_ROUTELOC0_TXLOC_LOC28 0x0000001CUL /**< Mode LOC28 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 759 #define _LEUART_ROUTELOC0_TXLOC_LOC29 0x0000001DUL /**< Mode LOC29 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 760 #define _LEUART_ROUTELOC0_TXLOC_LOC30 0x0000001EUL /**< Mode LOC30 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 761 #define _LEUART_ROUTELOC0_TXLOC_LOC31 0x0000001FUL /**< Mode LOC31 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 762 #define LEUART_ROUTELOC0_TXLOC_LOC0 (_LEUART_ROUTELOC0_TXLOC_LOC0 << 8) /**< Shifted mode LOC0 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 763 #define LEUART_ROUTELOC0_TXLOC_DEFAULT (_LEUART_ROUTELOC0_TXLOC_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 764 #define LEUART_ROUTELOC0_TXLOC_LOC1 (_LEUART_ROUTELOC0_TXLOC_LOC1 << 8) /**< Shifted mode LOC1 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 765 #define LEUART_ROUTELOC0_TXLOC_LOC2 (_LEUART_ROUTELOC0_TXLOC_LOC2 << 8) /**< Shifted mode LOC2 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 766 #define LEUART_ROUTELOC0_TXLOC_LOC3 (_LEUART_ROUTELOC0_TXLOC_LOC3 << 8) /**< Shifted mode LOC3 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 767 #define LEUART_ROUTELOC0_TXLOC_LOC4 (_LEUART_ROUTELOC0_TXLOC_LOC4 << 8) /**< Shifted mode LOC4 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 768 #define LEUART_ROUTELOC0_TXLOC_LOC5 (_LEUART_ROUTELOC0_TXLOC_LOC5 << 8) /**< Shifted mode LOC5 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 769 #define LEUART_ROUTELOC0_TXLOC_LOC6 (_LEUART_ROUTELOC0_TXLOC_LOC6 << 8) /**< Shifted mode LOC6 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 770 #define LEUART_ROUTELOC0_TXLOC_LOC7 (_LEUART_ROUTELOC0_TXLOC_LOC7 << 8) /**< Shifted mode LOC7 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 771 #define LEUART_ROUTELOC0_TXLOC_LOC8 (_LEUART_ROUTELOC0_TXLOC_LOC8 << 8) /**< Shifted mode LOC8 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 772 #define LEUART_ROUTELOC0_TXLOC_LOC9 (_LEUART_ROUTELOC0_TXLOC_LOC9 << 8) /**< Shifted mode LOC9 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 773 #define LEUART_ROUTELOC0_TXLOC_LOC10 (_LEUART_ROUTELOC0_TXLOC_LOC10 << 8) /**< Shifted mode LOC10 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 774 #define LEUART_ROUTELOC0_TXLOC_LOC11 (_LEUART_ROUTELOC0_TXLOC_LOC11 << 8) /**< Shifted mode LOC11 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 775 #define LEUART_ROUTELOC0_TXLOC_LOC12 (_LEUART_ROUTELOC0_TXLOC_LOC12 << 8) /**< Shifted mode LOC12 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 776 #define LEUART_ROUTELOC0_TXLOC_LOC13 (_LEUART_ROUTELOC0_TXLOC_LOC13 << 8) /**< Shifted mode LOC13 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 777 #define LEUART_ROUTELOC0_TXLOC_LOC14 (_LEUART_ROUTELOC0_TXLOC_LOC14 << 8) /**< Shifted mode LOC14 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 778 #define LEUART_ROUTELOC0_TXLOC_LOC15 (_LEUART_ROUTELOC0_TXLOC_LOC15 << 8) /**< Shifted mode LOC15 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 779 #define LEUART_ROUTELOC0_TXLOC_LOC16 (_LEUART_ROUTELOC0_TXLOC_LOC16 << 8) /**< Shifted mode LOC16 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 780 #define LEUART_ROUTELOC0_TXLOC_LOC17 (_LEUART_ROUTELOC0_TXLOC_LOC17 << 8) /**< Shifted mode LOC17 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 781 #define LEUART_ROUTELOC0_TXLOC_LOC18 (_LEUART_ROUTELOC0_TXLOC_LOC18 << 8) /**< Shifted mode LOC18 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 782 #define LEUART_ROUTELOC0_TXLOC_LOC19 (_LEUART_ROUTELOC0_TXLOC_LOC19 << 8) /**< Shifted mode LOC19 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 783 #define LEUART_ROUTELOC0_TXLOC_LOC20 (_LEUART_ROUTELOC0_TXLOC_LOC20 << 8) /**< Shifted mode LOC20 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 784 #define LEUART_ROUTELOC0_TXLOC_LOC21 (_LEUART_ROUTELOC0_TXLOC_LOC21 << 8) /**< Shifted mode LOC21 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 785 #define LEUART_ROUTELOC0_TXLOC_LOC22 (_LEUART_ROUTELOC0_TXLOC_LOC22 << 8) /**< Shifted mode LOC22 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 786 #define LEUART_ROUTELOC0_TXLOC_LOC23 (_LEUART_ROUTELOC0_TXLOC_LOC23 << 8) /**< Shifted mode LOC23 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 787 #define LEUART_ROUTELOC0_TXLOC_LOC24 (_LEUART_ROUTELOC0_TXLOC_LOC24 << 8) /**< Shifted mode LOC24 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 788 #define LEUART_ROUTELOC0_TXLOC_LOC25 (_LEUART_ROUTELOC0_TXLOC_LOC25 << 8) /**< Shifted mode LOC25 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 789 #define LEUART_ROUTELOC0_TXLOC_LOC26 (_LEUART_ROUTELOC0_TXLOC_LOC26 << 8) /**< Shifted mode LOC26 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 790 #define LEUART_ROUTELOC0_TXLOC_LOC27 (_LEUART_ROUTELOC0_TXLOC_LOC27 << 8) /**< Shifted mode LOC27 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 791 #define LEUART_ROUTELOC0_TXLOC_LOC28 (_LEUART_ROUTELOC0_TXLOC_LOC28 << 8) /**< Shifted mode LOC28 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 792 #define LEUART_ROUTELOC0_TXLOC_LOC29 (_LEUART_ROUTELOC0_TXLOC_LOC29 << 8) /**< Shifted mode LOC29 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 793 #define LEUART_ROUTELOC0_TXLOC_LOC30 (_LEUART_ROUTELOC0_TXLOC_LOC30 << 8) /**< Shifted mode LOC30 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 794 #define LEUART_ROUTELOC0_TXLOC_LOC31 (_LEUART_ROUTELOC0_TXLOC_LOC31 << 8) /**< Shifted mode LOC31 for LEUART_ROUTELOC0 */
<> 139:856d2700e60b 795
<> 139:856d2700e60b 796 /* Bit fields for LEUART INPUT */
<> 139:856d2700e60b 797 #define _LEUART_INPUT_RESETVALUE 0x00000000UL /**< Default value for LEUART_INPUT */
<> 139:856d2700e60b 798 #define _LEUART_INPUT_MASK 0x0000002FUL /**< Mask for LEUART_INPUT */
<> 139:856d2700e60b 799 #define _LEUART_INPUT_RXPRSSEL_SHIFT 0 /**< Shift value for LEUART_RXPRSSEL */
<> 139:856d2700e60b 800 #define _LEUART_INPUT_RXPRSSEL_MASK 0xFUL /**< Bit mask for LEUART_RXPRSSEL */
<> 139:856d2700e60b 801 #define _LEUART_INPUT_RXPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_INPUT */
<> 139:856d2700e60b 802 #define _LEUART_INPUT_RXPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for LEUART_INPUT */
<> 139:856d2700e60b 803 #define _LEUART_INPUT_RXPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for LEUART_INPUT */
<> 139:856d2700e60b 804 #define _LEUART_INPUT_RXPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for LEUART_INPUT */
<> 139:856d2700e60b 805 #define _LEUART_INPUT_RXPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for LEUART_INPUT */
<> 139:856d2700e60b 806 #define _LEUART_INPUT_RXPRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for LEUART_INPUT */
<> 139:856d2700e60b 807 #define _LEUART_INPUT_RXPRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for LEUART_INPUT */
<> 139:856d2700e60b 808 #define _LEUART_INPUT_RXPRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for LEUART_INPUT */
<> 139:856d2700e60b 809 #define _LEUART_INPUT_RXPRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for LEUART_INPUT */
<> 139:856d2700e60b 810 #define _LEUART_INPUT_RXPRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for LEUART_INPUT */
<> 139:856d2700e60b 811 #define _LEUART_INPUT_RXPRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for LEUART_INPUT */
<> 139:856d2700e60b 812 #define _LEUART_INPUT_RXPRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for LEUART_INPUT */
<> 139:856d2700e60b 813 #define _LEUART_INPUT_RXPRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for LEUART_INPUT */
<> 139:856d2700e60b 814 #define LEUART_INPUT_RXPRSSEL_DEFAULT (_LEUART_INPUT_RXPRSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_INPUT */
<> 139:856d2700e60b 815 #define LEUART_INPUT_RXPRSSEL_PRSCH0 (_LEUART_INPUT_RXPRSSEL_PRSCH0 << 0) /**< Shifted mode PRSCH0 for LEUART_INPUT */
<> 139:856d2700e60b 816 #define LEUART_INPUT_RXPRSSEL_PRSCH1 (_LEUART_INPUT_RXPRSSEL_PRSCH1 << 0) /**< Shifted mode PRSCH1 for LEUART_INPUT */
<> 139:856d2700e60b 817 #define LEUART_INPUT_RXPRSSEL_PRSCH2 (_LEUART_INPUT_RXPRSSEL_PRSCH2 << 0) /**< Shifted mode PRSCH2 for LEUART_INPUT */
<> 139:856d2700e60b 818 #define LEUART_INPUT_RXPRSSEL_PRSCH3 (_LEUART_INPUT_RXPRSSEL_PRSCH3 << 0) /**< Shifted mode PRSCH3 for LEUART_INPUT */
<> 139:856d2700e60b 819 #define LEUART_INPUT_RXPRSSEL_PRSCH4 (_LEUART_INPUT_RXPRSSEL_PRSCH4 << 0) /**< Shifted mode PRSCH4 for LEUART_INPUT */
<> 139:856d2700e60b 820 #define LEUART_INPUT_RXPRSSEL_PRSCH5 (_LEUART_INPUT_RXPRSSEL_PRSCH5 << 0) /**< Shifted mode PRSCH5 for LEUART_INPUT */
<> 139:856d2700e60b 821 #define LEUART_INPUT_RXPRSSEL_PRSCH6 (_LEUART_INPUT_RXPRSSEL_PRSCH6 << 0) /**< Shifted mode PRSCH6 for LEUART_INPUT */
<> 139:856d2700e60b 822 #define LEUART_INPUT_RXPRSSEL_PRSCH7 (_LEUART_INPUT_RXPRSSEL_PRSCH7 << 0) /**< Shifted mode PRSCH7 for LEUART_INPUT */
<> 139:856d2700e60b 823 #define LEUART_INPUT_RXPRSSEL_PRSCH8 (_LEUART_INPUT_RXPRSSEL_PRSCH8 << 0) /**< Shifted mode PRSCH8 for LEUART_INPUT */
<> 139:856d2700e60b 824 #define LEUART_INPUT_RXPRSSEL_PRSCH9 (_LEUART_INPUT_RXPRSSEL_PRSCH9 << 0) /**< Shifted mode PRSCH9 for LEUART_INPUT */
<> 139:856d2700e60b 825 #define LEUART_INPUT_RXPRSSEL_PRSCH10 (_LEUART_INPUT_RXPRSSEL_PRSCH10 << 0) /**< Shifted mode PRSCH10 for LEUART_INPUT */
<> 139:856d2700e60b 826 #define LEUART_INPUT_RXPRSSEL_PRSCH11 (_LEUART_INPUT_RXPRSSEL_PRSCH11 << 0) /**< Shifted mode PRSCH11 for LEUART_INPUT */
<> 139:856d2700e60b 827 #define LEUART_INPUT_RXPRS (0x1UL << 5) /**< PRS RX Enable */
<> 139:856d2700e60b 828 #define _LEUART_INPUT_RXPRS_SHIFT 5 /**< Shift value for LEUART_RXPRS */
<> 139:856d2700e60b 829 #define _LEUART_INPUT_RXPRS_MASK 0x20UL /**< Bit mask for LEUART_RXPRS */
<> 139:856d2700e60b 830 #define _LEUART_INPUT_RXPRS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_INPUT */
<> 139:856d2700e60b 831 #define LEUART_INPUT_RXPRS_DEFAULT (_LEUART_INPUT_RXPRS_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_INPUT */
<> 139:856d2700e60b 832
<> 139:856d2700e60b 833 /** @} End of group EFM32PG12B_LEUART */
<> 139:856d2700e60b 834 /** @} End of group Parts */
<> 139:856d2700e60b 835