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TARGET_NUCLEO_F334R8/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_ll_gpio.h@143:86740a56073b, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Parent:
135:176b8275d35d
Child:
168:b9e159c1930a
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 135:176b8275d35d 1 /**
<> 135:176b8275d35d 2 ******************************************************************************
<> 135:176b8275d35d 3 * @file stm32f3xx_ll_gpio.h
<> 135:176b8275d35d 4 * @author MCD Application Team
<> 135:176b8275d35d 5 * @version V1.4.0
<> 135:176b8275d35d 6 * @date 16-December-2016
<> 135:176b8275d35d 7 * @brief Header file of GPIO LL module.
<> 135:176b8275d35d 8 ******************************************************************************
<> 135:176b8275d35d 9 * @attention
<> 135:176b8275d35d 10 *
<> 135:176b8275d35d 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 135:176b8275d35d 12 *
<> 135:176b8275d35d 13 * Redistribution and use in source and binary forms, with or without modification,
<> 135:176b8275d35d 14 * are permitted provided that the following conditions are met:
<> 135:176b8275d35d 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 135:176b8275d35d 16 * this list of conditions and the following disclaimer.
<> 135:176b8275d35d 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 135:176b8275d35d 18 * this list of conditions and the following disclaimer in the documentation
<> 135:176b8275d35d 19 * and/or other materials provided with the distribution.
<> 135:176b8275d35d 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 135:176b8275d35d 21 * may be used to endorse or promote products derived from this software
<> 135:176b8275d35d 22 * without specific prior written permission.
<> 135:176b8275d35d 23 *
<> 135:176b8275d35d 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 135:176b8275d35d 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 135:176b8275d35d 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 135:176b8275d35d 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 135:176b8275d35d 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 135:176b8275d35d 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 135:176b8275d35d 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 135:176b8275d35d 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 135:176b8275d35d 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 135:176b8275d35d 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 135:176b8275d35d 34 *
<> 135:176b8275d35d 35 ******************************************************************************
<> 135:176b8275d35d 36 */
<> 135:176b8275d35d 37
<> 135:176b8275d35d 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 135:176b8275d35d 39 #ifndef __STM32F3xx_LL_GPIO_H
<> 135:176b8275d35d 40 #define __STM32F3xx_LL_GPIO_H
<> 135:176b8275d35d 41
<> 135:176b8275d35d 42 #ifdef __cplusplus
<> 135:176b8275d35d 43 extern "C" {
<> 135:176b8275d35d 44 #endif
<> 135:176b8275d35d 45
<> 135:176b8275d35d 46 /* Includes ------------------------------------------------------------------*/
<> 135:176b8275d35d 47 #include "stm32f3xx.h"
<> 135:176b8275d35d 48
<> 135:176b8275d35d 49 /** @addtogroup STM32F3xx_LL_Driver
<> 135:176b8275d35d 50 * @{
<> 135:176b8275d35d 51 */
<> 135:176b8275d35d 52
<> 135:176b8275d35d 53 #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH)
<> 135:176b8275d35d 54
<> 135:176b8275d35d 55 /** @defgroup GPIO_LL GPIO
<> 135:176b8275d35d 56 * @{
<> 135:176b8275d35d 57 */
<> 135:176b8275d35d 58
<> 135:176b8275d35d 59 /* Private types -------------------------------------------------------------*/
<> 135:176b8275d35d 60 /* Private variables ---------------------------------------------------------*/
<> 135:176b8275d35d 61 /* Private constants ---------------------------------------------------------*/
<> 135:176b8275d35d 62 /* Private macros ------------------------------------------------------------*/
<> 135:176b8275d35d 63 #if defined(USE_FULL_LL_DRIVER)
<> 135:176b8275d35d 64 /** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
<> 135:176b8275d35d 65 * @{
<> 135:176b8275d35d 66 */
<> 135:176b8275d35d 67
<> 135:176b8275d35d 68 /**
<> 135:176b8275d35d 69 * @}
<> 135:176b8275d35d 70 */
<> 135:176b8275d35d 71 #endif /*USE_FULL_LL_DRIVER*/
<> 135:176b8275d35d 72
<> 135:176b8275d35d 73 /* Exported types ------------------------------------------------------------*/
<> 135:176b8275d35d 74 #if defined(USE_FULL_LL_DRIVER)
<> 135:176b8275d35d 75 /** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
<> 135:176b8275d35d 76 * @{
<> 135:176b8275d35d 77 */
<> 135:176b8275d35d 78
<> 135:176b8275d35d 79 /**
<> 135:176b8275d35d 80 * @brief LL GPIO Init Structure definition
<> 135:176b8275d35d 81 */
<> 135:176b8275d35d 82 typedef struct
<> 135:176b8275d35d 83 {
<> 135:176b8275d35d 84 uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
<> 135:176b8275d35d 85 This parameter can be any value of @ref GPIO_LL_EC_PIN */
<> 135:176b8275d35d 86
<> 135:176b8275d35d 87 uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
<> 135:176b8275d35d 88 This parameter can be a value of @ref GPIO_LL_EC_MODE.
<> 135:176b8275d35d 89
<> 135:176b8275d35d 90 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/
<> 135:176b8275d35d 91
<> 135:176b8275d35d 92 uint32_t Speed; /*!< Specifies the speed for the selected pins.
<> 135:176b8275d35d 93 This parameter can be a value of @ref GPIO_LL_EC_SPEED.
<> 135:176b8275d35d 94
<> 135:176b8275d35d 95 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/
<> 135:176b8275d35d 96
<> 135:176b8275d35d 97 uint32_t OutputType; /*!< Specifies the operating output type for the selected pins.
<> 135:176b8275d35d 98 This parameter can be a value of @ref GPIO_LL_EC_OUTPUT.
<> 135:176b8275d35d 99
<> 135:176b8275d35d 100 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/
<> 135:176b8275d35d 101
<> 135:176b8275d35d 102 uint32_t Pull; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
<> 135:176b8275d35d 103 This parameter can be a value of @ref GPIO_LL_EC_PULL.
<> 135:176b8275d35d 104
<> 135:176b8275d35d 105 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/
<> 135:176b8275d35d 106
<> 135:176b8275d35d 107 uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins.
<> 135:176b8275d35d 108 This parameter can be a value of @ref GPIO_LL_EC_AF.
<> 135:176b8275d35d 109
<> 135:176b8275d35d 110 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/
<> 135:176b8275d35d 111 } LL_GPIO_InitTypeDef;
<> 135:176b8275d35d 112
<> 135:176b8275d35d 113 /**
<> 135:176b8275d35d 114 * @}
<> 135:176b8275d35d 115 */
<> 135:176b8275d35d 116 #endif /* USE_FULL_LL_DRIVER */
<> 135:176b8275d35d 117
<> 135:176b8275d35d 118 /* Exported constants --------------------------------------------------------*/
<> 135:176b8275d35d 119 /** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
<> 135:176b8275d35d 120 * @{
<> 135:176b8275d35d 121 */
<> 135:176b8275d35d 122
<> 135:176b8275d35d 123 /** @defgroup GPIO_LL_EC_PIN PIN
<> 135:176b8275d35d 124 * @{
<> 135:176b8275d35d 125 */
<> 135:176b8275d35d 126 #define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */
<> 135:176b8275d35d 127 #define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */
<> 135:176b8275d35d 128 #define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */
<> 135:176b8275d35d 129 #define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */
<> 135:176b8275d35d 130 #define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */
<> 135:176b8275d35d 131 #define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */
<> 135:176b8275d35d 132 #define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */
<> 135:176b8275d35d 133 #define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */
<> 135:176b8275d35d 134 #define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */
<> 135:176b8275d35d 135 #define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */
<> 135:176b8275d35d 136 #define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */
<> 135:176b8275d35d 137 #define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */
<> 135:176b8275d35d 138 #define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */
<> 135:176b8275d35d 139 #define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */
<> 135:176b8275d35d 140 #define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */
<> 135:176b8275d35d 141 #define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */
<> 135:176b8275d35d 142 #define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \
<> 135:176b8275d35d 143 GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
<> 135:176b8275d35d 144 GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
<> 135:176b8275d35d 145 GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
<> 135:176b8275d35d 146 GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
<> 135:176b8275d35d 147 GPIO_BSRR_BS_15) /*!< Select all pins */
<> 135:176b8275d35d 148 /**
<> 135:176b8275d35d 149 * @}
<> 135:176b8275d35d 150 */
<> 135:176b8275d35d 151
<> 135:176b8275d35d 152 /** @defgroup GPIO_LL_EC_MODE Mode
<> 135:176b8275d35d 153 * @{
<> 135:176b8275d35d 154 */
<> 135:176b8275d35d 155 #define LL_GPIO_MODE_INPUT ((uint32_t)0x00000000U) /*!< Select input mode */
<> 135:176b8275d35d 156 #define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0 /*!< Select output mode */
<> 135:176b8275d35d 157 #define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1 /*!< Select alternate function mode */
<> 135:176b8275d35d 158 #define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0 /*!< Select analog mode */
<> 135:176b8275d35d 159 /**
<> 135:176b8275d35d 160 * @}
<> 135:176b8275d35d 161 */
<> 135:176b8275d35d 162
<> 135:176b8275d35d 163 /** @defgroup GPIO_LL_EC_OUTPUT Output Type
<> 135:176b8275d35d 164 * @{
<> 135:176b8275d35d 165 */
<> 135:176b8275d35d 166 #define LL_GPIO_OUTPUT_PUSHPULL ((uint32_t)0x00000000U) /*!< Select push-pull as output type */
<> 135:176b8275d35d 167 #define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
<> 135:176b8275d35d 168 /**
<> 135:176b8275d35d 169 * @}
<> 135:176b8275d35d 170 */
<> 135:176b8275d35d 171
<> 135:176b8275d35d 172 /** @defgroup GPIO_LL_EC_SPEED Output Speed
<> 135:176b8275d35d 173 * @{
<> 135:176b8275d35d 174 */
<> 135:176b8275d35d 175 #define LL_GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000U) /*!< Select I/O low output speed */
<> 135:176b8275d35d 176 #define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEEDR0_0 /*!< Select I/O medium output speed */
<> 135:176b8275d35d 177 #define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEEDR0 /*!< Select I/O high output speed */
<> 135:176b8275d35d 178 /**
<> 135:176b8275d35d 179 * @}
<> 135:176b8275d35d 180 */
<> 135:176b8275d35d 181
<> 135:176b8275d35d 182 /** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
<> 135:176b8275d35d 183 * @{
<> 135:176b8275d35d 184 */
<> 135:176b8275d35d 185 #define LL_GPIO_PULL_NO ((uint32_t)0x00000000U) /*!< Select I/O no pull */
<> 135:176b8275d35d 186 #define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0 /*!< Select I/O pull up */
<> 135:176b8275d35d 187 #define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1 /*!< Select I/O pull down */
<> 135:176b8275d35d 188 /**
<> 135:176b8275d35d 189 * @}
<> 135:176b8275d35d 190 */
<> 135:176b8275d35d 191
<> 135:176b8275d35d 192 /** @defgroup GPIO_LL_EC_AF Alternate Function
<> 135:176b8275d35d 193 * @{
<> 135:176b8275d35d 194 */
<> 135:176b8275d35d 195 #define LL_GPIO_AF_0 ((uint32_t)0x0000000U) /*!< Select alternate function 0 */
<> 135:176b8275d35d 196 #define LL_GPIO_AF_1 ((uint32_t)0x0000001U) /*!< Select alternate function 1 */
<> 135:176b8275d35d 197 #define LL_GPIO_AF_2 ((uint32_t)0x0000002U) /*!< Select alternate function 2 */
<> 135:176b8275d35d 198 #define LL_GPIO_AF_3 ((uint32_t)0x0000003U) /*!< Select alternate function 3 */
<> 135:176b8275d35d 199 #define LL_GPIO_AF_4 ((uint32_t)0x0000004U) /*!< Select alternate function 4 */
<> 135:176b8275d35d 200 #define LL_GPIO_AF_5 ((uint32_t)0x0000005U) /*!< Select alternate function 5 */
<> 135:176b8275d35d 201 #define LL_GPIO_AF_6 ((uint32_t)0x0000006U) /*!< Select alternate function 6 */
<> 135:176b8275d35d 202 #define LL_GPIO_AF_7 ((uint32_t)0x0000007U) /*!< Select alternate function 7 */
<> 135:176b8275d35d 203 #define LL_GPIO_AF_8 ((uint32_t)0x0000008U) /*!< Select alternate function 8 */
<> 135:176b8275d35d 204 #define LL_GPIO_AF_9 ((uint32_t)0x0000009U) /*!< Select alternate function 9 */
<> 135:176b8275d35d 205 #define LL_GPIO_AF_10 ((uint32_t)0x000000AU) /*!< Select alternate function 10 */
<> 135:176b8275d35d 206 #define LL_GPIO_AF_11 ((uint32_t)0x000000BU) /*!< Select alternate function 11 */
<> 135:176b8275d35d 207 #define LL_GPIO_AF_12 ((uint32_t)0x000000CU) /*!< Select alternate function 12 */
<> 135:176b8275d35d 208 #define LL_GPIO_AF_13 ((uint32_t)0x000000DU) /*!< Select alternate function 13 */
<> 135:176b8275d35d 209 #define LL_GPIO_AF_14 ((uint32_t)0x000000EU) /*!< Select alternate function 14 */
<> 135:176b8275d35d 210 #define LL_GPIO_AF_15 ((uint32_t)0x000000FU) /*!< Select alternate function 15 */
<> 135:176b8275d35d 211 /**
<> 135:176b8275d35d 212 * @}
<> 135:176b8275d35d 213 */
<> 135:176b8275d35d 214
<> 135:176b8275d35d 215 /**
<> 135:176b8275d35d 216 * @}
<> 135:176b8275d35d 217 */
<> 135:176b8275d35d 218
<> 135:176b8275d35d 219 /* Exported macro ------------------------------------------------------------*/
<> 135:176b8275d35d 220 /** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
<> 135:176b8275d35d 221 * @{
<> 135:176b8275d35d 222 */
<> 135:176b8275d35d 223
<> 135:176b8275d35d 224 /** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
<> 135:176b8275d35d 225 * @{
<> 135:176b8275d35d 226 */
<> 135:176b8275d35d 227
<> 135:176b8275d35d 228 /**
<> 135:176b8275d35d 229 * @brief Write a value in GPIO register
<> 135:176b8275d35d 230 * @param __INSTANCE__ GPIO Instance
<> 135:176b8275d35d 231 * @param __REG__ Register to be written
<> 135:176b8275d35d 232 * @param __VALUE__ Value to be written in the register
<> 135:176b8275d35d 233 * @retval None
<> 135:176b8275d35d 234 */
<> 135:176b8275d35d 235 #define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 135:176b8275d35d 236
<> 135:176b8275d35d 237 /**
<> 135:176b8275d35d 238 * @brief Read a value in GPIO register
<> 135:176b8275d35d 239 * @param __INSTANCE__ GPIO Instance
<> 135:176b8275d35d 240 * @param __REG__ Register to be read
<> 135:176b8275d35d 241 * @retval Register value
<> 135:176b8275d35d 242 */
<> 135:176b8275d35d 243 #define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 135:176b8275d35d 244 /**
<> 135:176b8275d35d 245 * @}
<> 135:176b8275d35d 246 */
<> 135:176b8275d35d 247
<> 135:176b8275d35d 248 /**
<> 135:176b8275d35d 249 * @}
<> 135:176b8275d35d 250 */
<> 135:176b8275d35d 251
<> 135:176b8275d35d 252 /* Exported functions --------------------------------------------------------*/
<> 135:176b8275d35d 253 /** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
<> 135:176b8275d35d 254 * @{
<> 135:176b8275d35d 255 */
<> 135:176b8275d35d 256
<> 135:176b8275d35d 257 /** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
<> 135:176b8275d35d 258 * @{
<> 135:176b8275d35d 259 */
<> 135:176b8275d35d 260
<> 135:176b8275d35d 261 /**
<> 135:176b8275d35d 262 * @brief Configure gpio mode for a dedicated pin on dedicated port.
<> 135:176b8275d35d 263 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 135:176b8275d35d 264 * @note Warning: only one pin can be passed as parameter.
<> 135:176b8275d35d 265 * @rmtoll MODER MODEy LL_GPIO_SetPinMode
<> 135:176b8275d35d 266 * @param GPIOx GPIO Port
<> 135:176b8275d35d 267 * @param Pin This parameter can be one of the following values:
<> 135:176b8275d35d 268 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 269 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 270 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 271 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 272 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 273 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 274 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 275 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 276 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 277 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 278 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 279 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 280 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 281 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 282 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 283 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 284 * @param Mode This parameter can be one of the following values:
<> 135:176b8275d35d 285 * @arg @ref LL_GPIO_MODE_INPUT
<> 135:176b8275d35d 286 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 135:176b8275d35d 287 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 135:176b8275d35d 288 * @arg @ref LL_GPIO_MODE_ANALOG
<> 135:176b8275d35d 289 * @retval None
<> 135:176b8275d35d 290 */
<> 135:176b8275d35d 291 __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
<> 135:176b8275d35d 292 {
<> 135:176b8275d35d 293 MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
<> 135:176b8275d35d 294 }
<> 135:176b8275d35d 295
<> 135:176b8275d35d 296 /**
<> 135:176b8275d35d 297 * @brief Return gpio mode for a dedicated pin on dedicated port.
<> 135:176b8275d35d 298 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 135:176b8275d35d 299 * @note Warning: only one pin can be passed as parameter.
<> 135:176b8275d35d 300 * @rmtoll MODER MODEy LL_GPIO_GetPinMode
<> 135:176b8275d35d 301 * @param GPIOx GPIO Port
<> 135:176b8275d35d 302 * @param Pin This parameter can be one of the following values:
<> 135:176b8275d35d 303 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 304 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 305 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 306 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 307 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 308 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 309 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 310 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 311 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 312 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 313 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 314 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 315 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 316 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 317 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 318 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 319 * @retval Returned value can be one of the following values:
<> 135:176b8275d35d 320 * @arg @ref LL_GPIO_MODE_INPUT
<> 135:176b8275d35d 321 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 135:176b8275d35d 322 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 135:176b8275d35d 323 * @arg @ref LL_GPIO_MODE_ANALOG
<> 135:176b8275d35d 324 */
<> 135:176b8275d35d 325 __STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 135:176b8275d35d 326 {
<> 135:176b8275d35d 327 return (uint32_t)(READ_BIT(GPIOx->MODER,
<> 135:176b8275d35d 328 (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
<> 135:176b8275d35d 329 }
<> 135:176b8275d35d 330
<> 135:176b8275d35d 331 /**
<> 135:176b8275d35d 332 * @brief Configure gpio output type for several pins on dedicated port.
<> 135:176b8275d35d 333 * @note Output type as to be set when gpio pin is in output or
<> 135:176b8275d35d 334 * alternate modes. Possible type are Push-pull or Open-drain.
<> 135:176b8275d35d 335 * @rmtoll OTYPER OTy LL_GPIO_SetPinOutputType
<> 135:176b8275d35d 336 * @param GPIOx GPIO Port
<> 135:176b8275d35d 337 * @param PinMask This parameter can be a combination of the following values:
<> 135:176b8275d35d 338 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 339 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 340 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 341 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 342 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 343 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 344 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 345 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 346 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 347 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 348 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 349 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 350 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 351 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 352 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 353 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 354 * @arg @ref LL_GPIO_PIN_ALL
<> 135:176b8275d35d 355 * @param OutputType This parameter can be one of the following values:
<> 135:176b8275d35d 356 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 135:176b8275d35d 357 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 135:176b8275d35d 358 * @retval None
<> 135:176b8275d35d 359 */
<> 135:176b8275d35d 360 __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
<> 135:176b8275d35d 361 {
<> 135:176b8275d35d 362 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
<> 135:176b8275d35d 363 }
<> 135:176b8275d35d 364
<> 135:176b8275d35d 365 /**
<> 135:176b8275d35d 366 * @brief Return gpio output type for several pins on dedicated port.
<> 135:176b8275d35d 367 * @note Output type as to be set when gpio pin is in output or
<> 135:176b8275d35d 368 * alternate modes. Possible type are Push-pull or Open-drain.
<> 135:176b8275d35d 369 * @note Warning: only one pin can be passed as parameter.
<> 135:176b8275d35d 370 * @rmtoll OTYPER OTy LL_GPIO_GetPinOutputType
<> 135:176b8275d35d 371 * @param GPIOx GPIO Port
<> 135:176b8275d35d 372 * @param Pin This parameter can be one of the following values:
<> 135:176b8275d35d 373 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 374 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 375 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 376 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 377 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 378 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 379 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 380 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 381 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 382 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 383 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 384 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 385 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 386 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 387 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 388 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 389 * @arg @ref LL_GPIO_PIN_ALL
<> 135:176b8275d35d 390 * @retval Returned value can be one of the following values:
<> 135:176b8275d35d 391 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 135:176b8275d35d 392 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 135:176b8275d35d 393 */
<> 135:176b8275d35d 394 __STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 135:176b8275d35d 395 {
<> 135:176b8275d35d 396 return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin));
<> 135:176b8275d35d 397 }
<> 135:176b8275d35d 398
<> 135:176b8275d35d 399 /**
<> 135:176b8275d35d 400 * @brief Configure gpio speed for a dedicated pin on dedicated port.
<> 135:176b8275d35d 401 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 135:176b8275d35d 402 * @note Warning: only one pin can be passed as parameter.
<> 135:176b8275d35d 403 * @note Refer to datasheet for frequency specifications and the power
<> 135:176b8275d35d 404 * supply and load conditions for each speed.
<> 135:176b8275d35d 405 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_SetPinSpeed
<> 135:176b8275d35d 406 * @param GPIOx GPIO Port
<> 135:176b8275d35d 407 * @param Pin This parameter can be one of the following values:
<> 135:176b8275d35d 408 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 409 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 410 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 411 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 412 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 413 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 414 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 415 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 416 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 417 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 418 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 419 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 420 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 421 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 422 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 423 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 424 * @param Speed This parameter can be one of the following values:
<> 135:176b8275d35d 425 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 135:176b8275d35d 426 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 135:176b8275d35d 427 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 135:176b8275d35d 428 * @retval None
<> 135:176b8275d35d 429 */
<> 135:176b8275d35d 430 __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
<> 135:176b8275d35d 431 {
<> 135:176b8275d35d 432 MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
<> 135:176b8275d35d 433 (Speed << (POSITION_VAL(Pin) * 2U)));
<> 135:176b8275d35d 434 }
<> 135:176b8275d35d 435
<> 135:176b8275d35d 436 /**
<> 135:176b8275d35d 437 * @brief Return gpio speed for a dedicated pin on dedicated port.
<> 135:176b8275d35d 438 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 135:176b8275d35d 439 * @note Warning: only one pin can be passed as parameter.
<> 135:176b8275d35d 440 * @note Refer to datasheet for frequency specifications and the power
<> 135:176b8275d35d 441 * supply and load conditions for each speed.
<> 135:176b8275d35d 442 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_GetPinSpeed
<> 135:176b8275d35d 443 * @param GPIOx GPIO Port
<> 135:176b8275d35d 444 * @param Pin This parameter can be one of the following values:
<> 135:176b8275d35d 445 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 446 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 447 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 448 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 449 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 450 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 451 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 452 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 453 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 454 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 455 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 456 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 457 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 458 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 459 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 460 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 461 * @retval Returned value can be one of the following values:
<> 135:176b8275d35d 462 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 135:176b8275d35d 463 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 135:176b8275d35d 464 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 135:176b8275d35d 465 */
<> 135:176b8275d35d 466 __STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 135:176b8275d35d 467 {
<> 135:176b8275d35d 468 return (uint32_t)(READ_BIT(GPIOx->OSPEEDR,
<> 135:176b8275d35d 469 (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
<> 135:176b8275d35d 470 }
<> 135:176b8275d35d 471
<> 135:176b8275d35d 472 /**
<> 135:176b8275d35d 473 * @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
<> 135:176b8275d35d 474 * @note Warning: only one pin can be passed as parameter.
<> 135:176b8275d35d 475 * @rmtoll PUPDR PUPDy LL_GPIO_SetPinPull
<> 135:176b8275d35d 476 * @param GPIOx GPIO Port
<> 135:176b8275d35d 477 * @param Pin This parameter can be one of the following values:
<> 135:176b8275d35d 478 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 479 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 480 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 481 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 482 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 483 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 484 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 485 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 486 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 487 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 488 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 489 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 490 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 491 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 492 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 493 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 494 * @param Pull This parameter can be one of the following values:
<> 135:176b8275d35d 495 * @arg @ref LL_GPIO_PULL_NO
<> 135:176b8275d35d 496 * @arg @ref LL_GPIO_PULL_UP
<> 135:176b8275d35d 497 * @arg @ref LL_GPIO_PULL_DOWN
<> 135:176b8275d35d 498 * @retval None
<> 135:176b8275d35d 499 */
<> 135:176b8275d35d 500 __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
<> 135:176b8275d35d 501 {
<> 135:176b8275d35d 502 MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
<> 135:176b8275d35d 503 }
<> 135:176b8275d35d 504
<> 135:176b8275d35d 505 /**
<> 135:176b8275d35d 506 * @brief Return gpio pull-up or pull-down for a dedicated pin on a dedicated port
<> 135:176b8275d35d 507 * @note Warning: only one pin can be passed as parameter.
<> 135:176b8275d35d 508 * @rmtoll PUPDR PUPDy LL_GPIO_GetPinPull
<> 135:176b8275d35d 509 * @param GPIOx GPIO Port
<> 135:176b8275d35d 510 * @param Pin This parameter can be one of the following values:
<> 135:176b8275d35d 511 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 512 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 513 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 514 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 515 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 516 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 517 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 518 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 519 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 520 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 521 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 522 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 523 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 524 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 525 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 526 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 527 * @retval Returned value can be one of the following values:
<> 135:176b8275d35d 528 * @arg @ref LL_GPIO_PULL_NO
<> 135:176b8275d35d 529 * @arg @ref LL_GPIO_PULL_UP
<> 135:176b8275d35d 530 * @arg @ref LL_GPIO_PULL_DOWN
<> 135:176b8275d35d 531 */
<> 135:176b8275d35d 532 __STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 135:176b8275d35d 533 {
<> 135:176b8275d35d 534 return (uint32_t)(READ_BIT(GPIOx->PUPDR,
<> 135:176b8275d35d 535 (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
<> 135:176b8275d35d 536 }
<> 135:176b8275d35d 537
<> 135:176b8275d35d 538 /**
<> 135:176b8275d35d 539 * @brief Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 135:176b8275d35d 540 * @note Possible values are from AF0 to AF15 depending on target.
<> 135:176b8275d35d 541 * @note Warning: only one pin can be passed as parameter.
<> 135:176b8275d35d 542 * @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7
<> 135:176b8275d35d 543 * @param GPIOx GPIO Port
<> 135:176b8275d35d 544 * @param Pin This parameter can be one of the following values:
<> 135:176b8275d35d 545 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 546 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 547 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 548 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 549 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 550 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 551 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 552 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 553 * @param Alternate This parameter can be one of the following values:
<> 135:176b8275d35d 554 * @arg @ref LL_GPIO_AF_0
<> 135:176b8275d35d 555 * @arg @ref LL_GPIO_AF_1
<> 135:176b8275d35d 556 * @arg @ref LL_GPIO_AF_2
<> 135:176b8275d35d 557 * @arg @ref LL_GPIO_AF_3
<> 135:176b8275d35d 558 * @arg @ref LL_GPIO_AF_4
<> 135:176b8275d35d 559 * @arg @ref LL_GPIO_AF_5
<> 135:176b8275d35d 560 * @arg @ref LL_GPIO_AF_6
<> 135:176b8275d35d 561 * @arg @ref LL_GPIO_AF_7
<> 135:176b8275d35d 562 * @arg @ref LL_GPIO_AF_8
<> 135:176b8275d35d 563 * @arg @ref LL_GPIO_AF_9
<> 135:176b8275d35d 564 * @arg @ref LL_GPIO_AF_10
<> 135:176b8275d35d 565 * @arg @ref LL_GPIO_AF_11
<> 135:176b8275d35d 566 * @arg @ref LL_GPIO_AF_12
<> 135:176b8275d35d 567 * @arg @ref LL_GPIO_AF_13
<> 135:176b8275d35d 568 * @arg @ref LL_GPIO_AF_14
<> 135:176b8275d35d 569 * @arg @ref LL_GPIO_AF_15
<> 135:176b8275d35d 570 * @retval None
<> 135:176b8275d35d 571 */
<> 135:176b8275d35d 572 __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 135:176b8275d35d 573 {
<> 135:176b8275d35d 574 MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFRL0 << (POSITION_VAL(Pin) * 4U)),
<> 135:176b8275d35d 575 (Alternate << (POSITION_VAL(Pin) * 4U)));
<> 135:176b8275d35d 576 }
<> 135:176b8275d35d 577
<> 135:176b8275d35d 578 /**
<> 135:176b8275d35d 579 * @brief Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 135:176b8275d35d 580 * @rmtoll AFRL AFSELy LL_GPIO_GetAFPin_0_7
<> 135:176b8275d35d 581 * @param GPIOx GPIO Port
<> 135:176b8275d35d 582 * @param Pin This parameter can be one of the following values:
<> 135:176b8275d35d 583 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 584 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 585 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 586 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 587 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 588 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 589 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 590 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 591 * @retval Returned value can be one of the following values:
<> 135:176b8275d35d 592 * @arg @ref LL_GPIO_AF_0
<> 135:176b8275d35d 593 * @arg @ref LL_GPIO_AF_1
<> 135:176b8275d35d 594 * @arg @ref LL_GPIO_AF_2
<> 135:176b8275d35d 595 * @arg @ref LL_GPIO_AF_3
<> 135:176b8275d35d 596 * @arg @ref LL_GPIO_AF_4
<> 135:176b8275d35d 597 * @arg @ref LL_GPIO_AF_5
<> 135:176b8275d35d 598 * @arg @ref LL_GPIO_AF_6
<> 135:176b8275d35d 599 * @arg @ref LL_GPIO_AF_7
<> 135:176b8275d35d 600 * @arg @ref LL_GPIO_AF_8
<> 135:176b8275d35d 601 * @arg @ref LL_GPIO_AF_9
<> 135:176b8275d35d 602 * @arg @ref LL_GPIO_AF_10
<> 135:176b8275d35d 603 * @arg @ref LL_GPIO_AF_11
<> 135:176b8275d35d 604 * @arg @ref LL_GPIO_AF_12
<> 135:176b8275d35d 605 * @arg @ref LL_GPIO_AF_13
<> 135:176b8275d35d 606 * @arg @ref LL_GPIO_AF_14
<> 135:176b8275d35d 607 * @arg @ref LL_GPIO_AF_15
<> 135:176b8275d35d 608 */
<> 135:176b8275d35d 609 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 135:176b8275d35d 610 {
<> 135:176b8275d35d 611 return (uint32_t)(READ_BIT(GPIOx->AFR[0],
<> 135:176b8275d35d 612 (GPIO_AFRL_AFRL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
<> 135:176b8275d35d 613 }
<> 135:176b8275d35d 614
<> 135:176b8275d35d 615 /**
<> 135:176b8275d35d 616 * @brief Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 135:176b8275d35d 617 * @note Possible values are from AF0 to AF15 depending on target.
<> 135:176b8275d35d 618 * @note Warning: only one pin can be passed as parameter.
<> 135:176b8275d35d 619 * @rmtoll AFRH AFSELy LL_GPIO_SetAFPin_8_15
<> 135:176b8275d35d 620 * @param GPIOx GPIO Port
<> 135:176b8275d35d 621 * @param Pin This parameter can be one of the following values:
<> 135:176b8275d35d 622 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 623 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 624 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 625 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 626 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 627 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 628 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 629 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 630 * @param Alternate This parameter can be one of the following values:
<> 135:176b8275d35d 631 * @arg @ref LL_GPIO_AF_0
<> 135:176b8275d35d 632 * @arg @ref LL_GPIO_AF_1
<> 135:176b8275d35d 633 * @arg @ref LL_GPIO_AF_2
<> 135:176b8275d35d 634 * @arg @ref LL_GPIO_AF_3
<> 135:176b8275d35d 635 * @arg @ref LL_GPIO_AF_4
<> 135:176b8275d35d 636 * @arg @ref LL_GPIO_AF_5
<> 135:176b8275d35d 637 * @arg @ref LL_GPIO_AF_6
<> 135:176b8275d35d 638 * @arg @ref LL_GPIO_AF_7
<> 135:176b8275d35d 639 * @arg @ref LL_GPIO_AF_8
<> 135:176b8275d35d 640 * @arg @ref LL_GPIO_AF_9
<> 135:176b8275d35d 641 * @arg @ref LL_GPIO_AF_10
<> 135:176b8275d35d 642 * @arg @ref LL_GPIO_AF_11
<> 135:176b8275d35d 643 * @arg @ref LL_GPIO_AF_12
<> 135:176b8275d35d 644 * @arg @ref LL_GPIO_AF_13
<> 135:176b8275d35d 645 * @arg @ref LL_GPIO_AF_14
<> 135:176b8275d35d 646 * @arg @ref LL_GPIO_AF_15
<> 135:176b8275d35d 647 * @retval None
<> 135:176b8275d35d 648 */
<> 135:176b8275d35d 649 __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 135:176b8275d35d 650 {
<> 135:176b8275d35d 651 MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFRH0 << (POSITION_VAL(Pin >> 8U) * 4U)),
<> 135:176b8275d35d 652 (Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
<> 135:176b8275d35d 653 }
<> 135:176b8275d35d 654
<> 135:176b8275d35d 655 /**
<> 135:176b8275d35d 656 * @brief Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 135:176b8275d35d 657 * @note Possible values are from AF0 to AF15 depending on target.
<> 135:176b8275d35d 658 * @rmtoll AFRH AFSELy LL_GPIO_GetAFPin_8_15
<> 135:176b8275d35d 659 * @param GPIOx GPIO Port
<> 135:176b8275d35d 660 * @param Pin This parameter can be one of the following values:
<> 135:176b8275d35d 661 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 662 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 663 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 664 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 665 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 666 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 667 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 668 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 669 * @retval Returned value can be one of the following values:
<> 135:176b8275d35d 670 * @arg @ref LL_GPIO_AF_0
<> 135:176b8275d35d 671 * @arg @ref LL_GPIO_AF_1
<> 135:176b8275d35d 672 * @arg @ref LL_GPIO_AF_2
<> 135:176b8275d35d 673 * @arg @ref LL_GPIO_AF_3
<> 135:176b8275d35d 674 * @arg @ref LL_GPIO_AF_4
<> 135:176b8275d35d 675 * @arg @ref LL_GPIO_AF_5
<> 135:176b8275d35d 676 * @arg @ref LL_GPIO_AF_6
<> 135:176b8275d35d 677 * @arg @ref LL_GPIO_AF_7
<> 135:176b8275d35d 678 * @arg @ref LL_GPIO_AF_8
<> 135:176b8275d35d 679 * @arg @ref LL_GPIO_AF_9
<> 135:176b8275d35d 680 * @arg @ref LL_GPIO_AF_10
<> 135:176b8275d35d 681 * @arg @ref LL_GPIO_AF_11
<> 135:176b8275d35d 682 * @arg @ref LL_GPIO_AF_12
<> 135:176b8275d35d 683 * @arg @ref LL_GPIO_AF_13
<> 135:176b8275d35d 684 * @arg @ref LL_GPIO_AF_14
<> 135:176b8275d35d 685 * @arg @ref LL_GPIO_AF_15
<> 135:176b8275d35d 686 */
<> 135:176b8275d35d 687 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 135:176b8275d35d 688 {
<> 135:176b8275d35d 689 return (uint32_t)(READ_BIT(GPIOx->AFR[1],
<> 135:176b8275d35d 690 (GPIO_AFRH_AFRH0 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U));
<> 135:176b8275d35d 691 }
<> 135:176b8275d35d 692
<> 135:176b8275d35d 693
<> 135:176b8275d35d 694 /**
<> 135:176b8275d35d 695 * @brief Lock configuration of several pins for a dedicated port.
<> 135:176b8275d35d 696 * @note When the lock sequence has been applied on a port bit, the
<> 135:176b8275d35d 697 * value of this port bit can no longer be modified until the
<> 135:176b8275d35d 698 * next reset.
<> 135:176b8275d35d 699 * @note Each lock bit freezes a specific configuration register
<> 135:176b8275d35d 700 * (control and alternate function registers).
<> 135:176b8275d35d 701 * @rmtoll LCKR LCKK LL_GPIO_LockPin
<> 135:176b8275d35d 702 * @param GPIOx GPIO Port
<> 135:176b8275d35d 703 * @param PinMask This parameter can be a combination of the following values:
<> 135:176b8275d35d 704 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 705 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 706 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 707 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 708 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 709 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 710 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 711 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 712 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 713 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 714 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 715 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 716 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 717 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 718 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 719 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 720 * @arg @ref LL_GPIO_PIN_ALL
<> 135:176b8275d35d 721 * @retval None
<> 135:176b8275d35d 722 */
<> 135:176b8275d35d 723 __STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 135:176b8275d35d 724 {
<> 135:176b8275d35d 725 __IO uint32_t temp;
<> 135:176b8275d35d 726 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 135:176b8275d35d 727 WRITE_REG(GPIOx->LCKR, PinMask);
<> 135:176b8275d35d 728 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 135:176b8275d35d 729 temp = READ_REG(GPIOx->LCKR);
<> 135:176b8275d35d 730 (void) temp;
<> 135:176b8275d35d 731 }
<> 135:176b8275d35d 732
<> 135:176b8275d35d 733 /**
<> 135:176b8275d35d 734 * @brief Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0.
<> 135:176b8275d35d 735 * @rmtoll LCKR LCKy LL_GPIO_IsPinLocked
<> 135:176b8275d35d 736 * @param GPIOx GPIO Port
<> 135:176b8275d35d 737 * @param PinMask This parameter can be a combination of the following values:
<> 135:176b8275d35d 738 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 739 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 740 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 741 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 742 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 743 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 744 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 745 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 746 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 747 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 748 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 749 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 750 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 751 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 752 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 753 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 754 * @arg @ref LL_GPIO_PIN_ALL
<> 135:176b8275d35d 755 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 756 */
<> 135:176b8275d35d 757 __STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 135:176b8275d35d 758 {
<> 135:176b8275d35d 759 return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
<> 135:176b8275d35d 760 }
<> 135:176b8275d35d 761
<> 135:176b8275d35d 762 /**
<> 135:176b8275d35d 763 * @brief Return 1 if one of the pin of a dedicated port is locked. else return 0.
<> 135:176b8275d35d 764 * @rmtoll LCKR LCKK LL_GPIO_IsAnyPinLocked
<> 135:176b8275d35d 765 * @param GPIOx GPIO Port
<> 135:176b8275d35d 766 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 767 */
<> 135:176b8275d35d 768 __STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
<> 135:176b8275d35d 769 {
<> 135:176b8275d35d 770 return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
<> 135:176b8275d35d 771 }
<> 135:176b8275d35d 772
<> 135:176b8275d35d 773 /**
<> 135:176b8275d35d 774 * @}
<> 135:176b8275d35d 775 */
<> 135:176b8275d35d 776
<> 135:176b8275d35d 777 /** @defgroup GPIO_LL_EF_Data_Access Data Access
<> 135:176b8275d35d 778 * @{
<> 135:176b8275d35d 779 */
<> 135:176b8275d35d 780
<> 135:176b8275d35d 781 /**
<> 135:176b8275d35d 782 * @brief Return full input data register value for a dedicated port.
<> 135:176b8275d35d 783 * @rmtoll IDR IDy LL_GPIO_ReadInputPort
<> 135:176b8275d35d 784 * @param GPIOx GPIO Port
<> 135:176b8275d35d 785 * @retval Input data register value of port
<> 135:176b8275d35d 786 */
<> 135:176b8275d35d 787 __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
<> 135:176b8275d35d 788 {
<> 135:176b8275d35d 789 return (uint32_t)(READ_REG(GPIOx->IDR));
<> 135:176b8275d35d 790 }
<> 135:176b8275d35d 791
<> 135:176b8275d35d 792 /**
<> 135:176b8275d35d 793 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 135:176b8275d35d 794 * @rmtoll IDR IDy LL_GPIO_IsInputPinSet
<> 135:176b8275d35d 795 * @param GPIOx GPIO Port
<> 135:176b8275d35d 796 * @param PinMask This parameter can be a combination of the following values:
<> 135:176b8275d35d 797 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 798 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 799 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 800 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 801 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 802 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 803 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 804 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 805 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 806 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 807 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 808 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 809 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 810 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 811 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 812 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 813 * @arg @ref LL_GPIO_PIN_ALL
<> 135:176b8275d35d 814 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 815 */
<> 135:176b8275d35d 816 __STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 135:176b8275d35d 817 {
<> 135:176b8275d35d 818 return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
<> 135:176b8275d35d 819 }
<> 135:176b8275d35d 820
<> 135:176b8275d35d 821 /**
<> 135:176b8275d35d 822 * @brief Write output data register for the port.
<> 135:176b8275d35d 823 * @rmtoll ODR ODy LL_GPIO_WriteOutputPort
<> 135:176b8275d35d 824 * @param GPIOx GPIO Port
<> 135:176b8275d35d 825 * @param PortValue Level value for each pin of the port
<> 135:176b8275d35d 826 * @retval None
<> 135:176b8275d35d 827 */
<> 135:176b8275d35d 828 __STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
<> 135:176b8275d35d 829 {
<> 135:176b8275d35d 830 WRITE_REG(GPIOx->ODR, PortValue);
<> 135:176b8275d35d 831 }
<> 135:176b8275d35d 832
<> 135:176b8275d35d 833 /**
<> 135:176b8275d35d 834 * @brief Return full output data register value for a dedicated port.
<> 135:176b8275d35d 835 * @rmtoll ODR ODy LL_GPIO_ReadOutputPort
<> 135:176b8275d35d 836 * @param GPIOx GPIO Port
<> 135:176b8275d35d 837 * @retval Output data register value of port
<> 135:176b8275d35d 838 */
<> 135:176b8275d35d 839 __STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
<> 135:176b8275d35d 840 {
<> 135:176b8275d35d 841 return (uint32_t)(READ_REG(GPIOx->ODR));
<> 135:176b8275d35d 842 }
<> 135:176b8275d35d 843
<> 135:176b8275d35d 844 /**
<> 135:176b8275d35d 845 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 135:176b8275d35d 846 * @rmtoll ODR ODy LL_GPIO_IsOutputPinSet
<> 135:176b8275d35d 847 * @param GPIOx GPIO Port
<> 135:176b8275d35d 848 * @param PinMask This parameter can be a combination of the following values:
<> 135:176b8275d35d 849 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 850 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 851 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 852 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 853 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 854 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 855 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 856 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 857 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 858 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 859 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 860 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 861 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 862 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 863 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 864 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 865 * @arg @ref LL_GPIO_PIN_ALL
<> 135:176b8275d35d 866 * @retval State of bit (1 or 0).
<> 135:176b8275d35d 867 */
<> 135:176b8275d35d 868 __STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 135:176b8275d35d 869 {
<> 135:176b8275d35d 870 return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
<> 135:176b8275d35d 871 }
<> 135:176b8275d35d 872
<> 135:176b8275d35d 873 /**
<> 135:176b8275d35d 874 * @brief Set several pins to high level on dedicated gpio port.
<> 135:176b8275d35d 875 * @rmtoll BSRR BSy LL_GPIO_SetOutputPin
<> 135:176b8275d35d 876 * @param GPIOx GPIO Port
<> 135:176b8275d35d 877 * @param PinMask This parameter can be a combination of the following values:
<> 135:176b8275d35d 878 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 879 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 880 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 881 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 882 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 883 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 884 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 885 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 886 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 887 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 888 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 889 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 890 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 891 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 892 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 893 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 894 * @arg @ref LL_GPIO_PIN_ALL
<> 135:176b8275d35d 895 * @retval None
<> 135:176b8275d35d 896 */
<> 135:176b8275d35d 897 __STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 135:176b8275d35d 898 {
<> 135:176b8275d35d 899 WRITE_REG(GPIOx->BSRR, PinMask);
<> 135:176b8275d35d 900 }
<> 135:176b8275d35d 901
<> 135:176b8275d35d 902 /**
<> 135:176b8275d35d 903 * @brief Set several pins to low level on dedicated gpio port.
<> 135:176b8275d35d 904 * @rmtoll BRR BRy LL_GPIO_ResetOutputPin
<> 135:176b8275d35d 905 * @param GPIOx GPIO Port
<> 135:176b8275d35d 906 * @param PinMask This parameter can be a combination of the following values:
<> 135:176b8275d35d 907 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 908 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 909 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 910 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 911 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 912 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 913 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 914 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 915 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 916 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 917 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 918 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 919 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 920 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 921 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 922 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 923 * @arg @ref LL_GPIO_PIN_ALL
<> 135:176b8275d35d 924 * @retval None
<> 135:176b8275d35d 925 */
<> 135:176b8275d35d 926 __STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 135:176b8275d35d 927 {
<> 135:176b8275d35d 928 WRITE_REG(GPIOx->BRR, PinMask);
<> 135:176b8275d35d 929 }
<> 135:176b8275d35d 930
<> 135:176b8275d35d 931 /**
<> 135:176b8275d35d 932 * @brief Toggle data value for several pin of dedicated port.
<> 135:176b8275d35d 933 * @rmtoll ODR ODy LL_GPIO_TogglePin
<> 135:176b8275d35d 934 * @param GPIOx GPIO Port
<> 135:176b8275d35d 935 * @param PinMask This parameter can be a combination of the following values:
<> 135:176b8275d35d 936 * @arg @ref LL_GPIO_PIN_0
<> 135:176b8275d35d 937 * @arg @ref LL_GPIO_PIN_1
<> 135:176b8275d35d 938 * @arg @ref LL_GPIO_PIN_2
<> 135:176b8275d35d 939 * @arg @ref LL_GPIO_PIN_3
<> 135:176b8275d35d 940 * @arg @ref LL_GPIO_PIN_4
<> 135:176b8275d35d 941 * @arg @ref LL_GPIO_PIN_5
<> 135:176b8275d35d 942 * @arg @ref LL_GPIO_PIN_6
<> 135:176b8275d35d 943 * @arg @ref LL_GPIO_PIN_7
<> 135:176b8275d35d 944 * @arg @ref LL_GPIO_PIN_8
<> 135:176b8275d35d 945 * @arg @ref LL_GPIO_PIN_9
<> 135:176b8275d35d 946 * @arg @ref LL_GPIO_PIN_10
<> 135:176b8275d35d 947 * @arg @ref LL_GPIO_PIN_11
<> 135:176b8275d35d 948 * @arg @ref LL_GPIO_PIN_12
<> 135:176b8275d35d 949 * @arg @ref LL_GPIO_PIN_13
<> 135:176b8275d35d 950 * @arg @ref LL_GPIO_PIN_14
<> 135:176b8275d35d 951 * @arg @ref LL_GPIO_PIN_15
<> 135:176b8275d35d 952 * @arg @ref LL_GPIO_PIN_ALL
<> 135:176b8275d35d 953 * @retval None
<> 135:176b8275d35d 954 */
<> 135:176b8275d35d 955 __STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 135:176b8275d35d 956 {
<> 135:176b8275d35d 957 WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask);
<> 135:176b8275d35d 958 }
<> 135:176b8275d35d 959
<> 135:176b8275d35d 960 /**
<> 135:176b8275d35d 961 * @}
<> 135:176b8275d35d 962 */
<> 135:176b8275d35d 963
<> 135:176b8275d35d 964 #if defined(USE_FULL_LL_DRIVER)
<> 135:176b8275d35d 965 /** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
<> 135:176b8275d35d 966 * @{
<> 135:176b8275d35d 967 */
<> 135:176b8275d35d 968
<> 135:176b8275d35d 969 ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
<> 135:176b8275d35d 970 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 135:176b8275d35d 971 void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 135:176b8275d35d 972
<> 135:176b8275d35d 973 /**
<> 135:176b8275d35d 974 * @}
<> 135:176b8275d35d 975 */
<> 135:176b8275d35d 976 #endif /* USE_FULL_LL_DRIVER */
<> 135:176b8275d35d 977
<> 135:176b8275d35d 978 /**
<> 135:176b8275d35d 979 * @}
<> 135:176b8275d35d 980 */
<> 135:176b8275d35d 981
<> 135:176b8275d35d 982 /**
<> 135:176b8275d35d 983 * @}
<> 135:176b8275d35d 984 */
<> 135:176b8275d35d 985
<> 135:176b8275d35d 986 #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) */
<> 135:176b8275d35d 987 /**
<> 135:176b8275d35d 988 * @}
<> 135:176b8275d35d 989 */
<> 135:176b8275d35d 990
<> 135:176b8275d35d 991 #ifdef __cplusplus
<> 135:176b8275d35d 992 }
<> 135:176b8275d35d 993 #endif
<> 135:176b8275d35d 994
<> 135:176b8275d35d 995 #endif /* __STM32F3xx_LL_GPIO_H */
<> 135:176b8275d35d 996
<> 135:176b8275d35d 997 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/