The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Parent:
135:176b8275d35d
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 126:abea610beb85 1 /**
AnnaBridge 126:abea610beb85 2 ******************************************************************************
AnnaBridge 126:abea610beb85 3 * @file stm32f3xx_hal_nand.h
AnnaBridge 126:abea610beb85 4 * @author MCD Application Team
<> 135:176b8275d35d 5 * @version V1.4.0
<> 135:176b8275d35d 6 * @date 16-December-2016
AnnaBridge 126:abea610beb85 7 * @brief Header file of NAND HAL module.
AnnaBridge 126:abea610beb85 8 ******************************************************************************
AnnaBridge 126:abea610beb85 9 * @attention
AnnaBridge 126:abea610beb85 10 *
AnnaBridge 126:abea610beb85 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 126:abea610beb85 12 *
AnnaBridge 126:abea610beb85 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 126:abea610beb85 14 * are permitted provided that the following conditions are met:
AnnaBridge 126:abea610beb85 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 126:abea610beb85 16 * this list of conditions and the following disclaimer.
AnnaBridge 126:abea610beb85 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 126:abea610beb85 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 126:abea610beb85 19 * and/or other materials provided with the distribution.
AnnaBridge 126:abea610beb85 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 126:abea610beb85 21 * may be used to endorse or promote products derived from this software
AnnaBridge 126:abea610beb85 22 * without specific prior written permission.
AnnaBridge 126:abea610beb85 23 *
AnnaBridge 126:abea610beb85 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 126:abea610beb85 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 126:abea610beb85 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 126:abea610beb85 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 126:abea610beb85 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 126:abea610beb85 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 126:abea610beb85 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 126:abea610beb85 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 126:abea610beb85 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 126:abea610beb85 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 126:abea610beb85 34 *
AnnaBridge 126:abea610beb85 35 ******************************************************************************
AnnaBridge 126:abea610beb85 36 */
AnnaBridge 126:abea610beb85 37
AnnaBridge 126:abea610beb85 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 126:abea610beb85 39 #ifndef __STM32F3xx_HAL_NAND_H
AnnaBridge 126:abea610beb85 40 #define __STM32F3xx_HAL_NAND_H
AnnaBridge 126:abea610beb85 41
AnnaBridge 126:abea610beb85 42 #ifdef __cplusplus
AnnaBridge 126:abea610beb85 43 extern "C" {
AnnaBridge 126:abea610beb85 44 #endif
AnnaBridge 126:abea610beb85 45
AnnaBridge 126:abea610beb85 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 126:abea610beb85 47 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
AnnaBridge 126:abea610beb85 48 #include "stm32f3xx_ll_fmc.h"
AnnaBridge 126:abea610beb85 49
AnnaBridge 126:abea610beb85 50 /** @addtogroup STM32F3xx_HAL_Driver
AnnaBridge 126:abea610beb85 51 * @{
AnnaBridge 126:abea610beb85 52 */
AnnaBridge 126:abea610beb85 53
AnnaBridge 126:abea610beb85 54 /** @addtogroup NAND
AnnaBridge 126:abea610beb85 55 * @{
AnnaBridge 126:abea610beb85 56 */
AnnaBridge 126:abea610beb85 57
AnnaBridge 126:abea610beb85 58 /** @addtogroup NAND_Private_Constants
AnnaBridge 126:abea610beb85 59 * @{
AnnaBridge 126:abea610beb85 60 */
AnnaBridge 126:abea610beb85 61
AnnaBridge 126:abea610beb85 62 #define NAND_DEVICE1 FMC_BANK2
AnnaBridge 126:abea610beb85 63 #define NAND_DEVICE2 FMC_BANK3
<> 135:176b8275d35d 64 #define NAND_WRITE_TIMEOUT (1000U)
AnnaBridge 126:abea610beb85 65
<> 135:176b8275d35d 66 #define CMD_AREA ((uint32_t)(1U<<16U)) /* A16U = CLE high */
<> 135:176b8275d35d 67 #define ADDR_AREA ((uint32_t)(1U<<17U)) /* A17U = ALE high */
AnnaBridge 126:abea610beb85 68
<> 135:176b8275d35d 69 #define NAND_CMD_AREA_A ((uint8_t)0x00U)
<> 135:176b8275d35d 70 #define NAND_CMD_AREA_B ((uint8_t)0x01U)
<> 135:176b8275d35d 71 #define NAND_CMD_AREA_C ((uint8_t)0x50U)
<> 135:176b8275d35d 72 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30U)
AnnaBridge 126:abea610beb85 73
<> 135:176b8275d35d 74 #define NAND_CMD_WRITE0 ((uint8_t)0x80U)
<> 135:176b8275d35d 75 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10U)
<> 135:176b8275d35d 76 #define NAND_CMD_ERASE0 ((uint8_t)0x60U)
<> 135:176b8275d35d 77 #define NAND_CMD_ERASE1 ((uint8_t)0xD0U)
<> 135:176b8275d35d 78 #define NAND_CMD_READID ((uint8_t)0x90U)
<> 135:176b8275d35d 79 #define NAND_CMD_STATUS ((uint8_t)0x70U)
<> 135:176b8275d35d 80 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7AU)
<> 135:176b8275d35d 81 #define NAND_CMD_RESET ((uint8_t)0xFFU)
AnnaBridge 126:abea610beb85 82
AnnaBridge 126:abea610beb85 83 /* NAND memory status */
<> 135:176b8275d35d 84 #define NAND_VALID_ADDRESS (0x00000100U)
<> 135:176b8275d35d 85 #define NAND_INVALID_ADDRESS (0x00000200U)
<> 135:176b8275d35d 86 #define NAND_TIMEOUT_ERROR (0x00000400U)
<> 135:176b8275d35d 87 #define NAND_BUSY (0x00000000U)
<> 135:176b8275d35d 88 #define NAND_ERROR (0x00000001U)
<> 135:176b8275d35d 89 #define NAND_READY (0x00000040U)
AnnaBridge 126:abea610beb85 90
AnnaBridge 126:abea610beb85 91 /**
AnnaBridge 126:abea610beb85 92 * @}
AnnaBridge 126:abea610beb85 93 */
AnnaBridge 126:abea610beb85 94
AnnaBridge 126:abea610beb85 95 /** @addtogroup NAND_Private_Macros
AnnaBridge 126:abea610beb85 96 * @{
AnnaBridge 126:abea610beb85 97 */
AnnaBridge 126:abea610beb85 98
AnnaBridge 126:abea610beb85 99 /**
AnnaBridge 126:abea610beb85 100 * @brief NAND memory address computation.
AnnaBridge 126:abea610beb85 101 * @param __ADDRESS__: NAND memory address.
AnnaBridge 126:abea610beb85 102 * @param __HANDLE__ : NAND handle.
AnnaBridge 126:abea610beb85 103 * @retval NAND Raw address value
AnnaBridge 126:abea610beb85 104 */
AnnaBridge 126:abea610beb85 105 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) (((__ADDRESS__)->Page) + \
AnnaBridge 126:abea610beb85 106 (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize * ((__HANDLE__)->Info.PageSize + (__HANDLE__)->Info.SpareAreaSize))))
AnnaBridge 126:abea610beb85 107
AnnaBridge 126:abea610beb85 108 /**
AnnaBridge 126:abea610beb85 109 * @brief NAND memory address cycling.
AnnaBridge 126:abea610beb85 110 * @param __ADDRESS__: NAND memory address.
AnnaBridge 126:abea610beb85 111 * @retval NAND address cycling value.
AnnaBridge 126:abea610beb85 112 */
AnnaBridge 126:abea610beb85 113 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
<> 135:176b8275d35d 114 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8U) /* 2nd addressing cycle */
<> 135:176b8275d35d 115 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16U) /* 3rd addressing cycle */
<> 135:176b8275d35d 116 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24U) /* 4th addressing cycle */
AnnaBridge 126:abea610beb85 117
AnnaBridge 126:abea610beb85 118 /**
AnnaBridge 126:abea610beb85 119 * @}
AnnaBridge 126:abea610beb85 120 */
AnnaBridge 126:abea610beb85 121
AnnaBridge 126:abea610beb85 122 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 126:abea610beb85 123 /* Exported types ------------------------------------------------------------*/
AnnaBridge 126:abea610beb85 124 /** @defgroup NAND_Exported_Types NAND Exported Types
AnnaBridge 126:abea610beb85 125 * @{
AnnaBridge 126:abea610beb85 126 */
AnnaBridge 126:abea610beb85 127
AnnaBridge 126:abea610beb85 128 /**
AnnaBridge 126:abea610beb85 129 * @brief HAL NAND State structures definition
AnnaBridge 126:abea610beb85 130 */
AnnaBridge 126:abea610beb85 131 typedef enum
AnnaBridge 126:abea610beb85 132 {
<> 135:176b8275d35d 133 HAL_NAND_STATE_RESET = 0x00U, /*!< NAND not yet initialized or disabled */
<> 135:176b8275d35d 134 HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */
<> 135:176b8275d35d 135 HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */
AnnaBridge 126:abea610beb85 136 HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */
AnnaBridge 126:abea610beb85 137 }HAL_NAND_StateTypeDef;
AnnaBridge 126:abea610beb85 138
AnnaBridge 126:abea610beb85 139 /**
AnnaBridge 126:abea610beb85 140 * @brief NAND Memory electronic signature Structure definition
AnnaBridge 126:abea610beb85 141 */
AnnaBridge 126:abea610beb85 142 typedef struct
AnnaBridge 126:abea610beb85 143 {
AnnaBridge 126:abea610beb85 144 /*<! NAND memory electronic signature maker and device IDs */
AnnaBridge 126:abea610beb85 145
AnnaBridge 126:abea610beb85 146 uint8_t Maker_Id;
AnnaBridge 126:abea610beb85 147
AnnaBridge 126:abea610beb85 148 uint8_t Device_Id;
AnnaBridge 126:abea610beb85 149
AnnaBridge 126:abea610beb85 150 uint8_t Third_Id;
AnnaBridge 126:abea610beb85 151
AnnaBridge 126:abea610beb85 152 uint8_t Fourth_Id;
AnnaBridge 126:abea610beb85 153 }NAND_IDTypeDef;
AnnaBridge 126:abea610beb85 154
AnnaBridge 126:abea610beb85 155 /**
AnnaBridge 126:abea610beb85 156 * @brief NAND Memory address Structure definition
AnnaBridge 126:abea610beb85 157 */
AnnaBridge 126:abea610beb85 158 typedef struct
AnnaBridge 126:abea610beb85 159 {
AnnaBridge 126:abea610beb85 160 uint16_t Page; /*!< NAND memory Page address */
AnnaBridge 126:abea610beb85 161
AnnaBridge 126:abea610beb85 162 uint16_t Zone; /*!< NAND memory Zone address */
AnnaBridge 126:abea610beb85 163
AnnaBridge 126:abea610beb85 164 uint16_t Block; /*!< NAND memory Block address */
AnnaBridge 126:abea610beb85 165
AnnaBridge 126:abea610beb85 166 }NAND_AddressTypeDef;
AnnaBridge 126:abea610beb85 167
AnnaBridge 126:abea610beb85 168 /**
AnnaBridge 126:abea610beb85 169 * @brief NAND Memory info Structure definition
AnnaBridge 126:abea610beb85 170 */
AnnaBridge 126:abea610beb85 171 typedef struct
AnnaBridge 126:abea610beb85 172 {
AnnaBridge 126:abea610beb85 173 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */
AnnaBridge 126:abea610beb85 174
AnnaBridge 126:abea610beb85 175 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */
AnnaBridge 126:abea610beb85 176
AnnaBridge 126:abea610beb85 177 uint32_t BlockSize; /*!< NAND memory block size number of pages */
AnnaBridge 126:abea610beb85 178
AnnaBridge 126:abea610beb85 179 uint32_t BlockNbr; /*!< NAND memory number of blocks */
AnnaBridge 126:abea610beb85 180
AnnaBridge 126:abea610beb85 181 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */
AnnaBridge 126:abea610beb85 182 }NAND_InfoTypeDef;
AnnaBridge 126:abea610beb85 183
AnnaBridge 126:abea610beb85 184 /**
AnnaBridge 126:abea610beb85 185 * @brief NAND handle Structure definition
AnnaBridge 126:abea610beb85 186 */
AnnaBridge 126:abea610beb85 187 typedef struct
AnnaBridge 126:abea610beb85 188 {
AnnaBridge 126:abea610beb85 189 FMC_NAND_TypeDef *Instance; /*!< Register base address */
AnnaBridge 126:abea610beb85 190
AnnaBridge 126:abea610beb85 191 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
AnnaBridge 126:abea610beb85 192
AnnaBridge 126:abea610beb85 193 HAL_LockTypeDef Lock; /*!< NAND locking object */
AnnaBridge 126:abea610beb85 194
AnnaBridge 126:abea610beb85 195 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
AnnaBridge 126:abea610beb85 196
AnnaBridge 126:abea610beb85 197 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
AnnaBridge 126:abea610beb85 198 }NAND_HandleTypeDef;
AnnaBridge 126:abea610beb85 199
AnnaBridge 126:abea610beb85 200 /**
AnnaBridge 126:abea610beb85 201 * @}
AnnaBridge 126:abea610beb85 202 */
AnnaBridge 126:abea610beb85 203
AnnaBridge 126:abea610beb85 204 /* Exported constants --------------------------------------------------------*/
AnnaBridge 126:abea610beb85 205 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 126:abea610beb85 206 /** @defgroup NAND_Exported_Macros NAND Exported Macros
AnnaBridge 126:abea610beb85 207 * @{
AnnaBridge 126:abea610beb85 208 */
AnnaBridge 126:abea610beb85 209
AnnaBridge 126:abea610beb85 210 /** @brief Reset NAND handle state
AnnaBridge 126:abea610beb85 211 * @param __HANDLE__: specifies the NAND handle.
AnnaBridge 126:abea610beb85 212 * @retval None
AnnaBridge 126:abea610beb85 213 */
AnnaBridge 126:abea610beb85 214 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
AnnaBridge 126:abea610beb85 215
AnnaBridge 126:abea610beb85 216 /**
AnnaBridge 126:abea610beb85 217 * @}
AnnaBridge 126:abea610beb85 218 */
AnnaBridge 126:abea610beb85 219
AnnaBridge 126:abea610beb85 220 /* Exported functions --------------------------------------------------------*/
AnnaBridge 126:abea610beb85 221 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
AnnaBridge 126:abea610beb85 222 * @{
AnnaBridge 126:abea610beb85 223 */
AnnaBridge 126:abea610beb85 224
AnnaBridge 126:abea610beb85 225 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 126:abea610beb85 226 * @{
AnnaBridge 126:abea610beb85 227 */
AnnaBridge 126:abea610beb85 228
AnnaBridge 126:abea610beb85 229 /* Initialization/de-initialization functions ********************************/
AnnaBridge 126:abea610beb85 230 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
AnnaBridge 126:abea610beb85 231 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 232 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 233 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 234 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 235 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 236
AnnaBridge 126:abea610beb85 237 /**
AnnaBridge 126:abea610beb85 238 * @}
AnnaBridge 126:abea610beb85 239 */
AnnaBridge 126:abea610beb85 240
AnnaBridge 126:abea610beb85 241 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
AnnaBridge 126:abea610beb85 242 * @{
AnnaBridge 126:abea610beb85 243 */
AnnaBridge 126:abea610beb85 244
AnnaBridge 126:abea610beb85 245 /* IO operation functions ****************************************************/
AnnaBridge 126:abea610beb85 246 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
AnnaBridge 126:abea610beb85 247 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 248 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
AnnaBridge 126:abea610beb85 249 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
AnnaBridge 126:abea610beb85 250 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
AnnaBridge 126:abea610beb85 251 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
AnnaBridge 126:abea610beb85 252 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 126:abea610beb85 253 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 254 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 126:abea610beb85 255
AnnaBridge 126:abea610beb85 256 /**
AnnaBridge 126:abea610beb85 257 * @}
AnnaBridge 126:abea610beb85 258 */
AnnaBridge 126:abea610beb85 259
AnnaBridge 126:abea610beb85 260 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 126:abea610beb85 261 * @{
AnnaBridge 126:abea610beb85 262 */
AnnaBridge 126:abea610beb85 263
AnnaBridge 126:abea610beb85 264 /* NAND Control functions ****************************************************/
AnnaBridge 126:abea610beb85 265 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 266 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 267 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
AnnaBridge 126:abea610beb85 268
AnnaBridge 126:abea610beb85 269 /**
AnnaBridge 126:abea610beb85 270 * @}
AnnaBridge 126:abea610beb85 271 */
AnnaBridge 126:abea610beb85 272
AnnaBridge 126:abea610beb85 273 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 126:abea610beb85 274 * @{
AnnaBridge 126:abea610beb85 275 */
AnnaBridge 126:abea610beb85 276
AnnaBridge 126:abea610beb85 277 /* NAND State functions *******************************************************/
AnnaBridge 126:abea610beb85 278 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 279 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
AnnaBridge 126:abea610beb85 280
AnnaBridge 126:abea610beb85 281 /**
AnnaBridge 126:abea610beb85 282 * @}
AnnaBridge 126:abea610beb85 283 */
AnnaBridge 126:abea610beb85 284
AnnaBridge 126:abea610beb85 285 /**
AnnaBridge 126:abea610beb85 286 * @}
AnnaBridge 126:abea610beb85 287 */
AnnaBridge 126:abea610beb85 288
AnnaBridge 126:abea610beb85 289 /**
AnnaBridge 126:abea610beb85 290 * @}
AnnaBridge 126:abea610beb85 291 */
AnnaBridge 126:abea610beb85 292
AnnaBridge 126:abea610beb85 293 /**
AnnaBridge 126:abea610beb85 294 * @}
AnnaBridge 126:abea610beb85 295 */
AnnaBridge 126:abea610beb85 296
AnnaBridge 126:abea610beb85 297 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
AnnaBridge 126:abea610beb85 298
AnnaBridge 126:abea610beb85 299 #ifdef __cplusplus
AnnaBridge 126:abea610beb85 300 }
AnnaBridge 126:abea610beb85 301 #endif
AnnaBridge 126:abea610beb85 302
AnnaBridge 126:abea610beb85 303 #endif /* __STM32F3xx_HAL_NAND_H */
AnnaBridge 126:abea610beb85 304
AnnaBridge 126:abea610beb85 305 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/