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TARGET_NUCLEO_F030R8/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_ll_exti.h@143:86740a56073b, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Parent:
134:ad3be0349dc5
Child:
160:5571c4ff569f
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 134:ad3be0349dc5 1 /**
<> 134:ad3be0349dc5 2 ******************************************************************************
<> 134:ad3be0349dc5 3 * @file stm32f0xx_ll_exti.h
<> 134:ad3be0349dc5 4 * @author MCD Application Team
<> 134:ad3be0349dc5 5 * @version V1.4.0
<> 134:ad3be0349dc5 6 * @date 27-May-2016
<> 134:ad3be0349dc5 7 * @brief Header file of EXTI LL module.
<> 134:ad3be0349dc5 8 ******************************************************************************
<> 134:ad3be0349dc5 9 * @attention
<> 134:ad3be0349dc5 10 *
<> 134:ad3be0349dc5 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 134:ad3be0349dc5 12 *
<> 134:ad3be0349dc5 13 * Redistribution and use in source and binary forms, with or without modification,
<> 134:ad3be0349dc5 14 * are permitted provided that the following conditions are met:
<> 134:ad3be0349dc5 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 134:ad3be0349dc5 16 * this list of conditions and the following disclaimer.
<> 134:ad3be0349dc5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 134:ad3be0349dc5 18 * this list of conditions and the following disclaimer in the documentation
<> 134:ad3be0349dc5 19 * and/or other materials provided with the distribution.
<> 134:ad3be0349dc5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 134:ad3be0349dc5 21 * may be used to endorse or promote products derived from this software
<> 134:ad3be0349dc5 22 * without specific prior written permission.
<> 134:ad3be0349dc5 23 *
<> 134:ad3be0349dc5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 134:ad3be0349dc5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 134:ad3be0349dc5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 134:ad3be0349dc5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 134:ad3be0349dc5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 134:ad3be0349dc5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 134:ad3be0349dc5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 134:ad3be0349dc5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 134:ad3be0349dc5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 134:ad3be0349dc5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 134:ad3be0349dc5 34 *
<> 134:ad3be0349dc5 35 ******************************************************************************
<> 134:ad3be0349dc5 36 */
<> 134:ad3be0349dc5 37
<> 134:ad3be0349dc5 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 134:ad3be0349dc5 39 #ifndef __STM32F0xx_LL_EXTI_H
<> 134:ad3be0349dc5 40 #define __STM32F0xx_LL_EXTI_H
<> 134:ad3be0349dc5 41
<> 134:ad3be0349dc5 42 #ifdef __cplusplus
<> 134:ad3be0349dc5 43 extern "C" {
<> 134:ad3be0349dc5 44 #endif
<> 134:ad3be0349dc5 45
<> 134:ad3be0349dc5 46 /* Includes ------------------------------------------------------------------*/
<> 134:ad3be0349dc5 47 #include "stm32f0xx.h"
<> 134:ad3be0349dc5 48
<> 134:ad3be0349dc5 49 /** @addtogroup STM32F0xx_LL_Driver
<> 134:ad3be0349dc5 50 * @{
<> 134:ad3be0349dc5 51 */
<> 134:ad3be0349dc5 52
<> 134:ad3be0349dc5 53 #if defined (EXTI)
<> 134:ad3be0349dc5 54
<> 134:ad3be0349dc5 55 /** @defgroup EXTI_LL EXTI
<> 134:ad3be0349dc5 56 * @{
<> 134:ad3be0349dc5 57 */
<> 134:ad3be0349dc5 58
<> 134:ad3be0349dc5 59 /* Private types -------------------------------------------------------------*/
<> 134:ad3be0349dc5 60 /* Private variables ---------------------------------------------------------*/
<> 134:ad3be0349dc5 61 /* Private constants ---------------------------------------------------------*/
<> 134:ad3be0349dc5 62 /* Private Macros ------------------------------------------------------------*/
<> 134:ad3be0349dc5 63 #if defined(USE_FULL_LL_DRIVER)
<> 134:ad3be0349dc5 64 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
<> 134:ad3be0349dc5 65 * @{
<> 134:ad3be0349dc5 66 */
<> 134:ad3be0349dc5 67 /**
<> 134:ad3be0349dc5 68 * @}
<> 134:ad3be0349dc5 69 */
<> 134:ad3be0349dc5 70 #endif /*USE_FULL_LL_DRIVER*/
<> 134:ad3be0349dc5 71 /* Exported types ------------------------------------------------------------*/
<> 134:ad3be0349dc5 72 #if defined(USE_FULL_LL_DRIVER)
<> 134:ad3be0349dc5 73 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
<> 134:ad3be0349dc5 74 * @{
<> 134:ad3be0349dc5 75 */
<> 134:ad3be0349dc5 76 typedef struct
<> 134:ad3be0349dc5 77 {
<> 134:ad3be0349dc5 78
<> 134:ad3be0349dc5 79 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
<> 134:ad3be0349dc5 80 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
<> 134:ad3be0349dc5 81
<> 134:ad3be0349dc5 82 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
<> 134:ad3be0349dc5 83 This parameter can be set either to ENABLE or DISABLE */
<> 134:ad3be0349dc5 84
<> 134:ad3be0349dc5 85 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
<> 134:ad3be0349dc5 86 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
<> 134:ad3be0349dc5 87
<> 134:ad3be0349dc5 88 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
<> 134:ad3be0349dc5 89 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
<> 134:ad3be0349dc5 90 } LL_EXTI_InitTypeDef;
<> 134:ad3be0349dc5 91
<> 134:ad3be0349dc5 92 /**
<> 134:ad3be0349dc5 93 * @}
<> 134:ad3be0349dc5 94 */
<> 134:ad3be0349dc5 95 #endif /*USE_FULL_LL_DRIVER*/
<> 134:ad3be0349dc5 96
<> 134:ad3be0349dc5 97 /* Exported constants --------------------------------------------------------*/
<> 134:ad3be0349dc5 98 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
<> 134:ad3be0349dc5 99 * @{
<> 134:ad3be0349dc5 100 */
<> 134:ad3be0349dc5 101
<> 134:ad3be0349dc5 102 /** @defgroup EXTI_LL_EC_LINE LINE
<> 134:ad3be0349dc5 103 * @{
<> 134:ad3be0349dc5 104 */
<> 134:ad3be0349dc5 105 #define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */
<> 134:ad3be0349dc5 106 #define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */
<> 134:ad3be0349dc5 107 #define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */
<> 134:ad3be0349dc5 108 #define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */
<> 134:ad3be0349dc5 109 #define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */
<> 134:ad3be0349dc5 110 #define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */
<> 134:ad3be0349dc5 111 #define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */
<> 134:ad3be0349dc5 112 #define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */
<> 134:ad3be0349dc5 113 #define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */
<> 134:ad3be0349dc5 114 #define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */
<> 134:ad3be0349dc5 115 #define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */
<> 134:ad3be0349dc5 116 #define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */
<> 134:ad3be0349dc5 117 #define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */
<> 134:ad3be0349dc5 118 #define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */
<> 134:ad3be0349dc5 119 #define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */
<> 134:ad3be0349dc5 120 #define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */
<> 134:ad3be0349dc5 121 #if defined(EXTI_IMR_IM16)
<> 134:ad3be0349dc5 122 #define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */
<> 134:ad3be0349dc5 123 #endif
<> 134:ad3be0349dc5 124 #define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */
<> 134:ad3be0349dc5 125 #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */
<> 134:ad3be0349dc5 126 #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */
<> 134:ad3be0349dc5 127 #if defined(EXTI_IMR_IM20)
<> 134:ad3be0349dc5 128 #define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */
<> 134:ad3be0349dc5 129 #endif
<> 134:ad3be0349dc5 130 #if defined(EXTI_IMR_IM21)
<> 134:ad3be0349dc5 131 #define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */
<> 134:ad3be0349dc5 132 #endif
<> 134:ad3be0349dc5 133 #if defined(EXTI_IMR_IM22)
<> 134:ad3be0349dc5 134 #define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */
<> 134:ad3be0349dc5 135 #endif
<> 134:ad3be0349dc5 136 #define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */
<> 134:ad3be0349dc5 137 #if defined(EXTI_IMR_IM24)
<> 134:ad3be0349dc5 138 #define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */
<> 134:ad3be0349dc5 139 #endif
<> 134:ad3be0349dc5 140 #if defined(EXTI_IMR_IM25)
<> 134:ad3be0349dc5 141 #define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */
<> 134:ad3be0349dc5 142 #endif
<> 134:ad3be0349dc5 143 #if defined(EXTI_IMR_IM26)
<> 134:ad3be0349dc5 144 #define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */
<> 134:ad3be0349dc5 145 #endif
<> 134:ad3be0349dc5 146 #if defined(EXTI_IMR_IM27)
<> 134:ad3be0349dc5 147 #define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */
<> 134:ad3be0349dc5 148 #endif
<> 134:ad3be0349dc5 149 #if defined(EXTI_IMR_IM28)
<> 134:ad3be0349dc5 150 #define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */
<> 134:ad3be0349dc5 151 #endif
<> 134:ad3be0349dc5 152 #if defined(EXTI_IMR_IM29)
<> 134:ad3be0349dc5 153 #define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */
<> 134:ad3be0349dc5 154 #endif
<> 134:ad3be0349dc5 155 #if defined(EXTI_IMR_IM30)
<> 134:ad3be0349dc5 156 #define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */
<> 134:ad3be0349dc5 157 #endif
<> 134:ad3be0349dc5 158 #if defined(EXTI_IMR_IM31)
<> 134:ad3be0349dc5 159 #define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */
<> 134:ad3be0349dc5 160 #endif
<> 134:ad3be0349dc5 161 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/
<> 134:ad3be0349dc5 162
<> 134:ad3be0349dc5 163
<> 134:ad3be0349dc5 164 #define LL_EXTI_LINE_ALL ((uint32_t)0xFFFFFFFFU) /*!< All Extended line */
<> 134:ad3be0349dc5 165
<> 134:ad3be0349dc5 166 #if defined(USE_FULL_LL_DRIVER)
<> 134:ad3be0349dc5 167 #define LL_EXTI_LINE_NONE ((uint32_t)0x00000000U) /*!< None Extended line */
<> 134:ad3be0349dc5 168 #endif /*USE_FULL_LL_DRIVER*/
<> 134:ad3be0349dc5 169
<> 134:ad3be0349dc5 170 /**
<> 134:ad3be0349dc5 171 * @}
<> 134:ad3be0349dc5 172 */
<> 134:ad3be0349dc5 173 #if defined(USE_FULL_LL_DRIVER)
<> 134:ad3be0349dc5 174
<> 134:ad3be0349dc5 175 /** @defgroup EXTI_LL_EC_MODE Mode
<> 134:ad3be0349dc5 176 * @{
<> 134:ad3be0349dc5 177 */
<> 134:ad3be0349dc5 178 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
<> 134:ad3be0349dc5 179 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
<> 134:ad3be0349dc5 180 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
<> 134:ad3be0349dc5 181 /**
<> 134:ad3be0349dc5 182 * @}
<> 134:ad3be0349dc5 183 */
<> 134:ad3be0349dc5 184
<> 134:ad3be0349dc5 185 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
<> 134:ad3be0349dc5 186 * @{
<> 134:ad3be0349dc5 187 */
<> 134:ad3be0349dc5 188 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
<> 134:ad3be0349dc5 189 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
<> 134:ad3be0349dc5 190 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
<> 134:ad3be0349dc5 191 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
<> 134:ad3be0349dc5 192
<> 134:ad3be0349dc5 193 /**
<> 134:ad3be0349dc5 194 * @}
<> 134:ad3be0349dc5 195 */
<> 134:ad3be0349dc5 196
<> 134:ad3be0349dc5 197
<> 134:ad3be0349dc5 198 #endif /*USE_FULL_LL_DRIVER*/
<> 134:ad3be0349dc5 199
<> 134:ad3be0349dc5 200
<> 134:ad3be0349dc5 201 /**
<> 134:ad3be0349dc5 202 * @}
<> 134:ad3be0349dc5 203 */
<> 134:ad3be0349dc5 204
<> 134:ad3be0349dc5 205 /* Exported macro ------------------------------------------------------------*/
<> 134:ad3be0349dc5 206 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
<> 134:ad3be0349dc5 207 * @{
<> 134:ad3be0349dc5 208 */
<> 134:ad3be0349dc5 209
<> 134:ad3be0349dc5 210 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
<> 134:ad3be0349dc5 211 * @{
<> 134:ad3be0349dc5 212 */
<> 134:ad3be0349dc5 213
<> 134:ad3be0349dc5 214 /**
<> 134:ad3be0349dc5 215 * @brief Write a value in EXTI register
<> 134:ad3be0349dc5 216 * @param __REG__ Register to be written
<> 134:ad3be0349dc5 217 * @param __VALUE__ Value to be written in the register
<> 134:ad3be0349dc5 218 * @retval None
<> 134:ad3be0349dc5 219 */
<> 134:ad3be0349dc5 220 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
<> 134:ad3be0349dc5 221
<> 134:ad3be0349dc5 222 /**
<> 134:ad3be0349dc5 223 * @brief Read a value in EXTI register
<> 134:ad3be0349dc5 224 * @param __REG__ Register to be read
<> 134:ad3be0349dc5 225 * @retval Register value
<> 134:ad3be0349dc5 226 */
<> 134:ad3be0349dc5 227 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
<> 134:ad3be0349dc5 228 /**
<> 134:ad3be0349dc5 229 * @}
<> 134:ad3be0349dc5 230 */
<> 134:ad3be0349dc5 231
<> 134:ad3be0349dc5 232
<> 134:ad3be0349dc5 233 /**
<> 134:ad3be0349dc5 234 * @}
<> 134:ad3be0349dc5 235 */
<> 134:ad3be0349dc5 236
<> 134:ad3be0349dc5 237
<> 134:ad3be0349dc5 238
<> 134:ad3be0349dc5 239 /* Exported functions --------------------------------------------------------*/
<> 134:ad3be0349dc5 240 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
<> 134:ad3be0349dc5 241 * @{
<> 134:ad3be0349dc5 242 */
<> 134:ad3be0349dc5 243 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
<> 134:ad3be0349dc5 244 * @{
<> 134:ad3be0349dc5 245 */
<> 134:ad3be0349dc5 246
<> 134:ad3be0349dc5 247 /**
<> 134:ad3be0349dc5 248 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
<> 134:ad3be0349dc5 249 * @note The reset value for the direct or internal lines (see RM)
<> 134:ad3be0349dc5 250 * is set to 1 in order to enable the interrupt by default.
<> 134:ad3be0349dc5 251 * Bits are set automatically at Power on.
<> 134:ad3be0349dc5 252 * @rmtoll IMR IMx LL_EXTI_EnableIT_0_31
<> 134:ad3be0349dc5 253 * @param ExtiLine This parameter can be one of the following values:
<> 134:ad3be0349dc5 254 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 255 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 256 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 257 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 258 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 259 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 260 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 261 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 262 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 263 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 264 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 265 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 266 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 267 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 268 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 269 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 270 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 271 * @arg @ref LL_EXTI_LINE_17
<> 134:ad3be0349dc5 272 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 273 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 274 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 275 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 276 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 277 * @arg @ref LL_EXTI_LINE_23
<> 134:ad3be0349dc5 278 * @arg @ref LL_EXTI_LINE_24
<> 134:ad3be0349dc5 279 * @arg @ref LL_EXTI_LINE_25
<> 134:ad3be0349dc5 280 * @arg @ref LL_EXTI_LINE_26
<> 134:ad3be0349dc5 281 * @arg @ref LL_EXTI_LINE_27
<> 134:ad3be0349dc5 282 * @arg @ref LL_EXTI_LINE_28
<> 134:ad3be0349dc5 283 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 284 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 285 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 286 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 134:ad3be0349dc5 287 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 288 * @retval None
<> 134:ad3be0349dc5 289 */
<> 134:ad3be0349dc5 290 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 291 {
<> 134:ad3be0349dc5 292 SET_BIT(EXTI->IMR, ExtiLine);
<> 134:ad3be0349dc5 293 }
<> 134:ad3be0349dc5 294
<> 134:ad3be0349dc5 295 /**
<> 134:ad3be0349dc5 296 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
<> 134:ad3be0349dc5 297 * @note The reset value for the direct or internal lines (see RM)
<> 134:ad3be0349dc5 298 * is set to 1 in order to enable the interrupt by default.
<> 134:ad3be0349dc5 299 * Bits are set automatically at Power on.
<> 134:ad3be0349dc5 300 * @rmtoll IMR IMx LL_EXTI_DisableIT_0_31
<> 134:ad3be0349dc5 301 * @param ExtiLine This parameter can be one of the following values:
<> 134:ad3be0349dc5 302 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 303 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 304 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 305 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 306 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 307 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 308 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 309 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 310 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 311 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 312 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 313 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 314 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 315 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 316 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 317 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 318 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 319 * @arg @ref LL_EXTI_LINE_17
<> 134:ad3be0349dc5 320 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 321 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 322 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 323 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 324 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 325 * @arg @ref LL_EXTI_LINE_23
<> 134:ad3be0349dc5 326 * @arg @ref LL_EXTI_LINE_24
<> 134:ad3be0349dc5 327 * @arg @ref LL_EXTI_LINE_25
<> 134:ad3be0349dc5 328 * @arg @ref LL_EXTI_LINE_26
<> 134:ad3be0349dc5 329 * @arg @ref LL_EXTI_LINE_27
<> 134:ad3be0349dc5 330 * @arg @ref LL_EXTI_LINE_28
<> 134:ad3be0349dc5 331 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 332 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 333 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 334 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 134:ad3be0349dc5 335 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 336 * @retval None
<> 134:ad3be0349dc5 337 */
<> 134:ad3be0349dc5 338 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 339 {
<> 134:ad3be0349dc5 340 CLEAR_BIT(EXTI->IMR, ExtiLine);
<> 134:ad3be0349dc5 341 }
<> 134:ad3be0349dc5 342
<> 134:ad3be0349dc5 343
<> 134:ad3be0349dc5 344 /**
<> 134:ad3be0349dc5 345 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
<> 134:ad3be0349dc5 346 * @note The reset value for the direct or internal lines (see RM)
<> 134:ad3be0349dc5 347 * is set to 1 in order to enable the interrupt by default.
<> 134:ad3be0349dc5 348 * Bits are set automatically at Power on.
<> 134:ad3be0349dc5 349 * @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31
<> 134:ad3be0349dc5 350 * @param ExtiLine This parameter can be one of the following values:
<> 134:ad3be0349dc5 351 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 352 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 353 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 354 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 355 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 356 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 357 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 358 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 359 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 360 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 361 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 362 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 363 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 364 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 365 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 366 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 367 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 368 * @arg @ref LL_EXTI_LINE_17
<> 134:ad3be0349dc5 369 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 370 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 371 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 372 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 373 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 374 * @arg @ref LL_EXTI_LINE_23
<> 134:ad3be0349dc5 375 * @arg @ref LL_EXTI_LINE_24
<> 134:ad3be0349dc5 376 * @arg @ref LL_EXTI_LINE_25
<> 134:ad3be0349dc5 377 * @arg @ref LL_EXTI_LINE_26
<> 134:ad3be0349dc5 378 * @arg @ref LL_EXTI_LINE_27
<> 134:ad3be0349dc5 379 * @arg @ref LL_EXTI_LINE_28
<> 134:ad3be0349dc5 380 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 381 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 382 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 383 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 134:ad3be0349dc5 384 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 385 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 386 */
<> 134:ad3be0349dc5 387 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 388 {
<> 134:ad3be0349dc5 389 return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine));
<> 134:ad3be0349dc5 390 }
<> 134:ad3be0349dc5 391
<> 134:ad3be0349dc5 392
<> 134:ad3be0349dc5 393 /**
<> 134:ad3be0349dc5 394 * @}
<> 134:ad3be0349dc5 395 */
<> 134:ad3be0349dc5 396
<> 134:ad3be0349dc5 397 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
<> 134:ad3be0349dc5 398 * @{
<> 134:ad3be0349dc5 399 */
<> 134:ad3be0349dc5 400
<> 134:ad3be0349dc5 401 /**
<> 134:ad3be0349dc5 402 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
<> 134:ad3be0349dc5 403 * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31
<> 134:ad3be0349dc5 404 * @param ExtiLine This parameter can be one of the following values:
<> 134:ad3be0349dc5 405 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 406 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 407 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 408 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 409 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 410 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 411 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 412 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 413 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 414 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 415 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 416 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 417 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 418 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 419 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 420 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 421 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 422 * @arg @ref LL_EXTI_LINE_17
<> 134:ad3be0349dc5 423 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 424 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 425 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 426 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 427 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 428 * @arg @ref LL_EXTI_LINE_23
<> 134:ad3be0349dc5 429 * @arg @ref LL_EXTI_LINE_24
<> 134:ad3be0349dc5 430 * @arg @ref LL_EXTI_LINE_25
<> 134:ad3be0349dc5 431 * @arg @ref LL_EXTI_LINE_26
<> 134:ad3be0349dc5 432 * @arg @ref LL_EXTI_LINE_27
<> 134:ad3be0349dc5 433 * @arg @ref LL_EXTI_LINE_28
<> 134:ad3be0349dc5 434 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 435 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 436 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 437 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 134:ad3be0349dc5 438 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 439 * @retval None
<> 134:ad3be0349dc5 440 */
<> 134:ad3be0349dc5 441 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 442 {
<> 134:ad3be0349dc5 443 SET_BIT(EXTI->EMR, ExtiLine);
<> 134:ad3be0349dc5 444
<> 134:ad3be0349dc5 445 }
<> 134:ad3be0349dc5 446
<> 134:ad3be0349dc5 447
<> 134:ad3be0349dc5 448 /**
<> 134:ad3be0349dc5 449 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
<> 134:ad3be0349dc5 450 * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31
<> 134:ad3be0349dc5 451 * @param ExtiLine This parameter can be one of the following values:
<> 134:ad3be0349dc5 452 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 453 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 454 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 455 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 456 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 457 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 458 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 459 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 460 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 461 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 462 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 463 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 464 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 465 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 466 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 467 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 468 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 469 * @arg @ref LL_EXTI_LINE_17
<> 134:ad3be0349dc5 470 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 471 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 472 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 473 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 474 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 475 * @arg @ref LL_EXTI_LINE_23
<> 134:ad3be0349dc5 476 * @arg @ref LL_EXTI_LINE_24
<> 134:ad3be0349dc5 477 * @arg @ref LL_EXTI_LINE_25
<> 134:ad3be0349dc5 478 * @arg @ref LL_EXTI_LINE_26
<> 134:ad3be0349dc5 479 * @arg @ref LL_EXTI_LINE_27
<> 134:ad3be0349dc5 480 * @arg @ref LL_EXTI_LINE_28
<> 134:ad3be0349dc5 481 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 482 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 483 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 484 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 134:ad3be0349dc5 485 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 486 * @retval None
<> 134:ad3be0349dc5 487 */
<> 134:ad3be0349dc5 488 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 489 {
<> 134:ad3be0349dc5 490 CLEAR_BIT(EXTI->EMR, ExtiLine);
<> 134:ad3be0349dc5 491 }
<> 134:ad3be0349dc5 492
<> 134:ad3be0349dc5 493
<> 134:ad3be0349dc5 494 /**
<> 134:ad3be0349dc5 495 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
<> 134:ad3be0349dc5 496 * @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31
<> 134:ad3be0349dc5 497 * @param ExtiLine This parameter can be one of the following values:
<> 134:ad3be0349dc5 498 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 499 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 500 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 501 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 502 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 503 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 504 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 505 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 506 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 507 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 508 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 509 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 510 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 511 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 512 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 513 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 514 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 515 * @arg @ref LL_EXTI_LINE_17
<> 134:ad3be0349dc5 516 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 517 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 518 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 519 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 520 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 521 * @arg @ref LL_EXTI_LINE_23
<> 134:ad3be0349dc5 522 * @arg @ref LL_EXTI_LINE_24
<> 134:ad3be0349dc5 523 * @arg @ref LL_EXTI_LINE_25
<> 134:ad3be0349dc5 524 * @arg @ref LL_EXTI_LINE_26
<> 134:ad3be0349dc5 525 * @arg @ref LL_EXTI_LINE_27
<> 134:ad3be0349dc5 526 * @arg @ref LL_EXTI_LINE_28
<> 134:ad3be0349dc5 527 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 528 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 529 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 530 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 134:ad3be0349dc5 531 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 532 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 533 */
<> 134:ad3be0349dc5 534 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 535 {
<> 134:ad3be0349dc5 536 return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine));
<> 134:ad3be0349dc5 537
<> 134:ad3be0349dc5 538 }
<> 134:ad3be0349dc5 539
<> 134:ad3be0349dc5 540
<> 134:ad3be0349dc5 541 /**
<> 134:ad3be0349dc5 542 * @}
<> 134:ad3be0349dc5 543 */
<> 134:ad3be0349dc5 544
<> 134:ad3be0349dc5 545 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
<> 134:ad3be0349dc5 546 * @{
<> 134:ad3be0349dc5 547 */
<> 134:ad3be0349dc5 548
<> 134:ad3be0349dc5 549 /**
<> 134:ad3be0349dc5 550 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 134:ad3be0349dc5 551 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 134:ad3be0349dc5 552 * generated on these lines. If a rising edge on a configurable interrupt
<> 134:ad3be0349dc5 553 * line occurs during a write operation in the EXTI_RTSR register, the
<> 134:ad3be0349dc5 554 * pending bit is not set.
<> 134:ad3be0349dc5 555 * Rising and falling edge triggers can be set for
<> 134:ad3be0349dc5 556 * the same interrupt line. In this case, both generate a trigger
<> 134:ad3be0349dc5 557 * condition.
<> 134:ad3be0349dc5 558 * @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31
<> 134:ad3be0349dc5 559 * @param ExtiLine This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 560 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 561 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 562 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 563 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 564 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 565 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 566 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 567 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 568 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 569 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 570 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 571 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 572 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 573 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 574 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 575 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 576 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 577 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 578 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 579 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 580 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 581 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 582 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 583 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 584 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 585 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 586 * @retval None
<> 134:ad3be0349dc5 587 */
<> 134:ad3be0349dc5 588 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 589 {
<> 134:ad3be0349dc5 590 SET_BIT(EXTI->RTSR, ExtiLine);
<> 134:ad3be0349dc5 591
<> 134:ad3be0349dc5 592 }
<> 134:ad3be0349dc5 593
<> 134:ad3be0349dc5 594
<> 134:ad3be0349dc5 595 /**
<> 134:ad3be0349dc5 596 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 134:ad3be0349dc5 597 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 134:ad3be0349dc5 598 * generated on these lines. If a rising edge on a configurable interrupt
<> 134:ad3be0349dc5 599 * line occurs during a write operation in the EXTI_RTSR register, the
<> 134:ad3be0349dc5 600 * pending bit is not set.
<> 134:ad3be0349dc5 601 * Rising and falling edge triggers can be set for
<> 134:ad3be0349dc5 602 * the same interrupt line. In this case, both generate a trigger
<> 134:ad3be0349dc5 603 * condition.
<> 134:ad3be0349dc5 604 * @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31
<> 134:ad3be0349dc5 605 * @param ExtiLine This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 606 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 607 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 608 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 609 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 610 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 611 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 612 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 613 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 614 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 615 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 616 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 617 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 618 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 619 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 620 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 621 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 622 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 623 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 624 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 625 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 626 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 627 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 628 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 629 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 630 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 631 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 632 * @retval None
<> 134:ad3be0349dc5 633 */
<> 134:ad3be0349dc5 634 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 635 {
<> 134:ad3be0349dc5 636 CLEAR_BIT(EXTI->RTSR, ExtiLine);
<> 134:ad3be0349dc5 637
<> 134:ad3be0349dc5 638 }
<> 134:ad3be0349dc5 639
<> 134:ad3be0349dc5 640
<> 134:ad3be0349dc5 641 /**
<> 134:ad3be0349dc5 642 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
<> 134:ad3be0349dc5 643 * @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31
<> 134:ad3be0349dc5 644 * @param ExtiLine This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 645 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 646 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 647 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 648 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 649 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 650 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 651 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 652 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 653 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 654 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 655 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 656 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 657 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 658 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 659 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 660 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 661 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 662 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 663 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 664 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 665 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 666 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 667 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 668 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 669 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 670 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 671 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 672 */
<> 134:ad3be0349dc5 673 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 674 {
<> 134:ad3be0349dc5 675 return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine));
<> 134:ad3be0349dc5 676 }
<> 134:ad3be0349dc5 677
<> 134:ad3be0349dc5 678
<> 134:ad3be0349dc5 679 /**
<> 134:ad3be0349dc5 680 * @}
<> 134:ad3be0349dc5 681 */
<> 134:ad3be0349dc5 682
<> 134:ad3be0349dc5 683 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
<> 134:ad3be0349dc5 684 * @{
<> 134:ad3be0349dc5 685 */
<> 134:ad3be0349dc5 686
<> 134:ad3be0349dc5 687 /**
<> 134:ad3be0349dc5 688 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 134:ad3be0349dc5 689 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 134:ad3be0349dc5 690 * generated on these lines. If a falling edge on a configurable interrupt
<> 134:ad3be0349dc5 691 * line occurs during a write operation in the EXTI_FTSR register, the
<> 134:ad3be0349dc5 692 * pending bit is not set.
<> 134:ad3be0349dc5 693 * Rising and falling edge triggers can be set for
<> 134:ad3be0349dc5 694 * the same interrupt line. In this case, both generate a trigger
<> 134:ad3be0349dc5 695 * condition.
<> 134:ad3be0349dc5 696 * @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31
<> 134:ad3be0349dc5 697 * @param ExtiLine This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 698 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 699 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 700 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 701 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 702 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 703 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 704 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 705 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 706 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 707 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 708 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 709 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 710 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 711 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 712 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 713 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 714 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 715 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 716 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 717 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 718 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 719 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 720 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 721 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 722 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 723 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 724 * @retval None
<> 134:ad3be0349dc5 725 */
<> 134:ad3be0349dc5 726 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 727 {
<> 134:ad3be0349dc5 728 SET_BIT(EXTI->FTSR, ExtiLine);
<> 134:ad3be0349dc5 729 }
<> 134:ad3be0349dc5 730
<> 134:ad3be0349dc5 731
<> 134:ad3be0349dc5 732 /**
<> 134:ad3be0349dc5 733 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 134:ad3be0349dc5 734 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 134:ad3be0349dc5 735 * generated on these lines. If a Falling edge on a configurable interrupt
<> 134:ad3be0349dc5 736 * line occurs during a write operation in the EXTI_FTSR register, the
<> 134:ad3be0349dc5 737 * pending bit is not set.
<> 134:ad3be0349dc5 738 * Rising and falling edge triggers can be set for the same interrupt line.
<> 134:ad3be0349dc5 739 * In this case, both generate a trigger condition.
<> 134:ad3be0349dc5 740 * @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31
<> 134:ad3be0349dc5 741 * @param ExtiLine This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 742 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 743 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 744 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 745 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 746 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 747 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 748 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 749 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 750 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 751 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 752 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 753 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 754 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 755 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 756 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 757 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 758 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 759 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 760 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 761 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 762 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 763 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 764 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 765 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 766 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 767 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 768 * @retval None
<> 134:ad3be0349dc5 769 */
<> 134:ad3be0349dc5 770 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 771 {
<> 134:ad3be0349dc5 772 CLEAR_BIT(EXTI->FTSR, ExtiLine);
<> 134:ad3be0349dc5 773 }
<> 134:ad3be0349dc5 774
<> 134:ad3be0349dc5 775
<> 134:ad3be0349dc5 776 /**
<> 134:ad3be0349dc5 777 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
<> 134:ad3be0349dc5 778 * @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31
<> 134:ad3be0349dc5 779 * @param ExtiLine This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 780 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 781 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 782 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 783 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 784 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 785 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 786 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 787 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 788 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 789 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 790 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 791 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 792 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 793 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 794 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 795 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 796 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 797 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 798 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 799 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 800 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 801 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 802 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 803 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 804 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 805 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 806 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 807 */
<> 134:ad3be0349dc5 808 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 809 {
<> 134:ad3be0349dc5 810 return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine));
<> 134:ad3be0349dc5 811 }
<> 134:ad3be0349dc5 812
<> 134:ad3be0349dc5 813
<> 134:ad3be0349dc5 814 /**
<> 134:ad3be0349dc5 815 * @}
<> 134:ad3be0349dc5 816 */
<> 134:ad3be0349dc5 817
<> 134:ad3be0349dc5 818 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
<> 134:ad3be0349dc5 819 * @{
<> 134:ad3be0349dc5 820 */
<> 134:ad3be0349dc5 821
<> 134:ad3be0349dc5 822 /**
<> 134:ad3be0349dc5 823 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
<> 134:ad3be0349dc5 824 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
<> 134:ad3be0349dc5 825 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
<> 134:ad3be0349dc5 826 * resulting in an interrupt request generation.
<> 134:ad3be0349dc5 827 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
<> 134:ad3be0349dc5 828 * register (by writing a 1 into the bit)
<> 134:ad3be0349dc5 829 * @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31
<> 134:ad3be0349dc5 830 * @param ExtiLine This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 831 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 832 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 833 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 834 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 835 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 836 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 837 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 838 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 839 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 840 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 841 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 842 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 843 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 844 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 845 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 846 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 847 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 848 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 849 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 850 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 851 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 852 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 853 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 854 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 855 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 856 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 857 * @retval None
<> 134:ad3be0349dc5 858 */
<> 134:ad3be0349dc5 859 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 860 {
<> 134:ad3be0349dc5 861 SET_BIT(EXTI->SWIER, ExtiLine);
<> 134:ad3be0349dc5 862 }
<> 134:ad3be0349dc5 863
<> 134:ad3be0349dc5 864
<> 134:ad3be0349dc5 865 /**
<> 134:ad3be0349dc5 866 * @}
<> 134:ad3be0349dc5 867 */
<> 134:ad3be0349dc5 868
<> 134:ad3be0349dc5 869 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
<> 134:ad3be0349dc5 870 * @{
<> 134:ad3be0349dc5 871 */
<> 134:ad3be0349dc5 872
<> 134:ad3be0349dc5 873 /**
<> 134:ad3be0349dc5 874 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
<> 134:ad3be0349dc5 875 * @note This bit is set when the selected edge event arrives on the interrupt
<> 134:ad3be0349dc5 876 * line. This bit is cleared by writing a 1 to the bit.
<> 134:ad3be0349dc5 877 * @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31
<> 134:ad3be0349dc5 878 * @param ExtiLine This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 879 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 880 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 881 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 882 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 883 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 884 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 885 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 886 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 887 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 888 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 889 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 890 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 891 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 892 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 893 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 894 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 895 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 896 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 897 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 898 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 899 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 900 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 901 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 902 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 903 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 904 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 905 * @retval State of bit (1 or 0).
<> 134:ad3be0349dc5 906 */
<> 134:ad3be0349dc5 907 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 908 {
<> 134:ad3be0349dc5 909 return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine));
<> 134:ad3be0349dc5 910 }
<> 134:ad3be0349dc5 911
<> 134:ad3be0349dc5 912
<> 134:ad3be0349dc5 913 /**
<> 134:ad3be0349dc5 914 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
<> 134:ad3be0349dc5 915 * @note This bit is set when the selected edge event arrives on the interrupt
<> 134:ad3be0349dc5 916 * line. This bit is cleared by writing a 1 to the bit.
<> 134:ad3be0349dc5 917 * @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31
<> 134:ad3be0349dc5 918 * @param ExtiLine This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 919 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 920 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 921 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 922 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 923 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 924 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 925 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 926 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 927 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 928 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 929 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 930 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 931 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 932 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 933 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 934 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 935 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 936 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 937 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 938 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 939 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 940 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 941 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 942 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 943 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 944 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 945 * @retval @note This bit is set when the selected edge event arrives on the interrupt
<> 134:ad3be0349dc5 946 */
<> 134:ad3be0349dc5 947 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 948 {
<> 134:ad3be0349dc5 949 return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine));
<> 134:ad3be0349dc5 950 }
<> 134:ad3be0349dc5 951
<> 134:ad3be0349dc5 952
<> 134:ad3be0349dc5 953 /**
<> 134:ad3be0349dc5 954 * @brief Clear ExtLine Flags for Lines in range 0 to 31
<> 134:ad3be0349dc5 955 * @note This bit is set when the selected edge event arrives on the interrupt
<> 134:ad3be0349dc5 956 * line. This bit is cleared by writing a 1 to the bit.
<> 134:ad3be0349dc5 957 * @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31
<> 134:ad3be0349dc5 958 * @param ExtiLine This parameter can be a combination of the following values:
<> 134:ad3be0349dc5 959 * @arg @ref LL_EXTI_LINE_0
<> 134:ad3be0349dc5 960 * @arg @ref LL_EXTI_LINE_1
<> 134:ad3be0349dc5 961 * @arg @ref LL_EXTI_LINE_2
<> 134:ad3be0349dc5 962 * @arg @ref LL_EXTI_LINE_3
<> 134:ad3be0349dc5 963 * @arg @ref LL_EXTI_LINE_4
<> 134:ad3be0349dc5 964 * @arg @ref LL_EXTI_LINE_5
<> 134:ad3be0349dc5 965 * @arg @ref LL_EXTI_LINE_6
<> 134:ad3be0349dc5 966 * @arg @ref LL_EXTI_LINE_7
<> 134:ad3be0349dc5 967 * @arg @ref LL_EXTI_LINE_8
<> 134:ad3be0349dc5 968 * @arg @ref LL_EXTI_LINE_9
<> 134:ad3be0349dc5 969 * @arg @ref LL_EXTI_LINE_10
<> 134:ad3be0349dc5 970 * @arg @ref LL_EXTI_LINE_11
<> 134:ad3be0349dc5 971 * @arg @ref LL_EXTI_LINE_12
<> 134:ad3be0349dc5 972 * @arg @ref LL_EXTI_LINE_13
<> 134:ad3be0349dc5 973 * @arg @ref LL_EXTI_LINE_14
<> 134:ad3be0349dc5 974 * @arg @ref LL_EXTI_LINE_15
<> 134:ad3be0349dc5 975 * @arg @ref LL_EXTI_LINE_16
<> 134:ad3be0349dc5 976 * @arg @ref LL_EXTI_LINE_18
<> 134:ad3be0349dc5 977 * @arg @ref LL_EXTI_LINE_19
<> 134:ad3be0349dc5 978 * @arg @ref LL_EXTI_LINE_20
<> 134:ad3be0349dc5 979 * @arg @ref LL_EXTI_LINE_21
<> 134:ad3be0349dc5 980 * @arg @ref LL_EXTI_LINE_22
<> 134:ad3be0349dc5 981 * @arg @ref LL_EXTI_LINE_29
<> 134:ad3be0349dc5 982 * @arg @ref LL_EXTI_LINE_30
<> 134:ad3be0349dc5 983 * @arg @ref LL_EXTI_LINE_31
<> 134:ad3be0349dc5 984 * @note Please check each device line mapping for EXTI Line availability
<> 134:ad3be0349dc5 985 * @retval None
<> 134:ad3be0349dc5 986 */
<> 134:ad3be0349dc5 987 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
<> 134:ad3be0349dc5 988 {
<> 134:ad3be0349dc5 989 WRITE_REG(EXTI->PR, ExtiLine);
<> 134:ad3be0349dc5 990 }
<> 134:ad3be0349dc5 991
<> 134:ad3be0349dc5 992
<> 134:ad3be0349dc5 993 /**
<> 134:ad3be0349dc5 994 * @}
<> 134:ad3be0349dc5 995 */
<> 134:ad3be0349dc5 996
<> 134:ad3be0349dc5 997 #if defined(USE_FULL_LL_DRIVER)
<> 134:ad3be0349dc5 998 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
<> 134:ad3be0349dc5 999 * @{
<> 134:ad3be0349dc5 1000 */
<> 134:ad3be0349dc5 1001
<> 134:ad3be0349dc5 1002 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 134:ad3be0349dc5 1003 uint32_t LL_EXTI_DeInit(void);
<> 134:ad3be0349dc5 1004 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 134:ad3be0349dc5 1005
<> 134:ad3be0349dc5 1006
<> 134:ad3be0349dc5 1007 /**
<> 134:ad3be0349dc5 1008 * @}
<> 134:ad3be0349dc5 1009 */
<> 134:ad3be0349dc5 1010 #endif /* USE_FULL_LL_DRIVER */
<> 134:ad3be0349dc5 1011
<> 134:ad3be0349dc5 1012 /**
<> 134:ad3be0349dc5 1013 * @}
<> 134:ad3be0349dc5 1014 */
<> 134:ad3be0349dc5 1015
<> 134:ad3be0349dc5 1016 /**
<> 134:ad3be0349dc5 1017 * @}
<> 134:ad3be0349dc5 1018 */
<> 134:ad3be0349dc5 1019
<> 134:ad3be0349dc5 1020 #endif /* EXTI */
<> 134:ad3be0349dc5 1021
<> 134:ad3be0349dc5 1022 /**
<> 134:ad3be0349dc5 1023 * @}
<> 134:ad3be0349dc5 1024 */
<> 134:ad3be0349dc5 1025
<> 134:ad3be0349dc5 1026 #ifdef __cplusplus
<> 134:ad3be0349dc5 1027 }
<> 134:ad3be0349dc5 1028 #endif
<> 134:ad3be0349dc5 1029
<> 134:ad3be0349dc5 1030 #endif /* __STM32F0xx_LL_EXTI_H */
<> 134:ad3be0349dc5 1031
<> 134:ad3be0349dc5 1032 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/