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TARGET_VBLUNO52/cmsis_armclang.h@151:675da3299148, 2017-09-15 (annotated)

Committer:
AnnaBridge
Date:
Fri Sep 15 14:46:57 2017 +0100
Revision:
151:675da3299148
Parent:
148:fd96258d940d
Child:
160:5571c4ff569f
Release 151 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 148:fd96258d940d 1 /**************************************************************************//**
Kojto 148:fd96258d940d 2 * @file cmsis_armclang.h
Kojto 148:fd96258d940d 3 * @brief CMSIS compiler ARMCLANG (ARM compiler V6) header file
Kojto 148:fd96258d940d 4 * @version V5.0.3
Kojto 148:fd96258d940d 5 * @date 27. March 2017
Kojto 148:fd96258d940d 6 ******************************************************************************/
Kojto 148:fd96258d940d 7 /*
Kojto 148:fd96258d940d 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
Kojto 148:fd96258d940d 9 *
Kojto 148:fd96258d940d 10 * SPDX-License-Identifier: Apache-2.0
Kojto 148:fd96258d940d 11 *
Kojto 148:fd96258d940d 12 * Licensed under the Apache License, Version 2.0 (the License); you may
Kojto 148:fd96258d940d 13 * not use this file except in compliance with the License.
Kojto 148:fd96258d940d 14 * You may obtain a copy of the License at
Kojto 148:fd96258d940d 15 *
Kojto 148:fd96258d940d 16 * www.apache.org/licenses/LICENSE-2.0
Kojto 148:fd96258d940d 17 *
Kojto 148:fd96258d940d 18 * Unless required by applicable law or agreed to in writing, software
Kojto 148:fd96258d940d 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
Kojto 148:fd96258d940d 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Kojto 148:fd96258d940d 21 * See the License for the specific language governing permissions and
Kojto 148:fd96258d940d 22 * limitations under the License.
Kojto 148:fd96258d940d 23 */
Kojto 148:fd96258d940d 24
Kojto 148:fd96258d940d 25 //lint -esym(9058, IRQn) disable MISRA 2012 Rule 2.4 for IRQn
Kojto 148:fd96258d940d 26
Kojto 148:fd96258d940d 27 #ifndef __CMSIS_ARMCLANG_H
Kojto 148:fd96258d940d 28 #define __CMSIS_ARMCLANG_H
Kojto 148:fd96258d940d 29
Kojto 148:fd96258d940d 30 #ifndef __ARM_COMPAT_H
Kojto 148:fd96258d940d 31 #include <arm_compat.h> /* Compatibility header for ARM Compiler 5 intrinsics */
Kojto 148:fd96258d940d 32 #endif
Kojto 148:fd96258d940d 33
Kojto 148:fd96258d940d 34 /* CMSIS compiler specific defines */
Kojto 148:fd96258d940d 35 #ifndef __ASM
Kojto 148:fd96258d940d 36 #define __ASM __asm
Kojto 148:fd96258d940d 37 #endif
Kojto 148:fd96258d940d 38 #ifndef __INLINE
Kojto 148:fd96258d940d 39 #define __INLINE __inline
Kojto 148:fd96258d940d 40 #endif
Kojto 148:fd96258d940d 41 #ifndef __STATIC_INLINE
Kojto 148:fd96258d940d 42 #define __STATIC_INLINE static __inline
Kojto 148:fd96258d940d 43 #endif
Kojto 148:fd96258d940d 44 #ifndef __NO_RETURN
Kojto 148:fd96258d940d 45 #define __NO_RETURN __attribute__((noreturn))
Kojto 148:fd96258d940d 46 #endif
Kojto 148:fd96258d940d 47 #ifndef __USED
Kojto 148:fd96258d940d 48 #define __USED __attribute__((used))
Kojto 148:fd96258d940d 49 #endif
Kojto 148:fd96258d940d 50 #ifndef __WEAK
Kojto 148:fd96258d940d 51 #define __WEAK __attribute__((weak))
Kojto 148:fd96258d940d 52 #endif
Kojto 148:fd96258d940d 53 #ifndef __PACKED
Kojto 148:fd96258d940d 54 #define __PACKED __attribute__((packed, aligned(1)))
Kojto 148:fd96258d940d 55 #endif
Kojto 148:fd96258d940d 56 #ifndef __PACKED_STRUCT
Kojto 148:fd96258d940d 57 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
Kojto 148:fd96258d940d 58 #endif
Kojto 148:fd96258d940d 59 #ifndef __UNALIGNED_UINT32 /* deprecated */
Kojto 148:fd96258d940d 60 #pragma clang diagnostic push
Kojto 148:fd96258d940d 61 #pragma clang diagnostic ignored "-Wpacked"
Kojto 148:fd96258d940d 62 //lint -esym(9058, T_UINT32) disable MISRA 2012 Rule 2.4 for T_UINT32
Kojto 148:fd96258d940d 63 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
Kojto 148:fd96258d940d 64 #pragma clang diagnostic pop
Kojto 148:fd96258d940d 65 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
Kojto 148:fd96258d940d 66 #endif
Kojto 148:fd96258d940d 67 #ifndef __UNALIGNED_UINT16_WRITE
Kojto 148:fd96258d940d 68 #pragma clang diagnostic push
Kojto 148:fd96258d940d 69 #pragma clang diagnostic ignored "-Wpacked"
Kojto 148:fd96258d940d 70 //lint -esym(9058, T_UINT16_WRITE) disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE
Kojto 148:fd96258d940d 71 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
Kojto 148:fd96258d940d 72 #pragma clang diagnostic pop
Kojto 148:fd96258d940d 73 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
Kojto 148:fd96258d940d 74 #endif
Kojto 148:fd96258d940d 75 #ifndef __UNALIGNED_UINT16_READ
Kojto 148:fd96258d940d 76 #pragma clang diagnostic push
Kojto 148:fd96258d940d 77 #pragma clang diagnostic ignored "-Wpacked"
Kojto 148:fd96258d940d 78 //lint -esym(9058, T_UINT16_READ) disable MISRA 2012 Rule 2.4 for T_UINT16_READ
Kojto 148:fd96258d940d 79 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
Kojto 148:fd96258d940d 80 #pragma clang diagnostic pop
Kojto 148:fd96258d940d 81 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
Kojto 148:fd96258d940d 82 #endif
Kojto 148:fd96258d940d 83 #ifndef __UNALIGNED_UINT32_WRITE
Kojto 148:fd96258d940d 84 #pragma clang diagnostic push
Kojto 148:fd96258d940d 85 #pragma clang diagnostic ignored "-Wpacked"
Kojto 148:fd96258d940d 86 //lint -esym(9058, T_UINT32_WRITE) disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE
Kojto 148:fd96258d940d 87 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
Kojto 148:fd96258d940d 88 #pragma clang diagnostic pop
Kojto 148:fd96258d940d 89 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
Kojto 148:fd96258d940d 90 #endif
Kojto 148:fd96258d940d 91 #ifndef __UNALIGNED_UINT32_READ
Kojto 148:fd96258d940d 92 #pragma clang diagnostic push
Kojto 148:fd96258d940d 93 #pragma clang diagnostic ignored "-Wpacked"
Kojto 148:fd96258d940d 94 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
Kojto 148:fd96258d940d 95 #pragma clang diagnostic pop
Kojto 148:fd96258d940d 96 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
Kojto 148:fd96258d940d 97 #endif
Kojto 148:fd96258d940d 98 #ifndef __ALIGNED
Kojto 148:fd96258d940d 99 #define __ALIGNED(x) __attribute__((aligned(x)))
Kojto 148:fd96258d940d 100 #endif
Kojto 148:fd96258d940d 101
Kojto 148:fd96258d940d 102
Kojto 148:fd96258d940d 103 /* ########################### Core Function Access ########################### */
Kojto 148:fd96258d940d 104 /** \ingroup CMSIS_Core_FunctionInterface
Kojto 148:fd96258d940d 105 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
Kojto 148:fd96258d940d 106 @{
Kojto 148:fd96258d940d 107 */
Kojto 148:fd96258d940d 108
Kojto 148:fd96258d940d 109 /**
Kojto 148:fd96258d940d 110 \brief Enable IRQ Interrupts
Kojto 148:fd96258d940d 111 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Kojto 148:fd96258d940d 112 Can only be executed in Privileged modes.
Kojto 148:fd96258d940d 113 */
Kojto 148:fd96258d940d 114 /* intrinsic void __enable_irq(); see arm_compat.h */
Kojto 148:fd96258d940d 115
Kojto 148:fd96258d940d 116
Kojto 148:fd96258d940d 117 /**
Kojto 148:fd96258d940d 118 \brief Disable IRQ Interrupts
Kojto 148:fd96258d940d 119 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
Kojto 148:fd96258d940d 120 Can only be executed in Privileged modes.
Kojto 148:fd96258d940d 121 */
Kojto 148:fd96258d940d 122 /* intrinsic void __disable_irq(); see arm_compat.h */
Kojto 148:fd96258d940d 123
Kojto 148:fd96258d940d 124
Kojto 148:fd96258d940d 125 /**
Kojto 148:fd96258d940d 126 \brief Get Control Register
Kojto 148:fd96258d940d 127 \details Returns the content of the Control Register.
Kojto 148:fd96258d940d 128 \return Control Register value
Kojto 148:fd96258d940d 129 */
Kojto 148:fd96258d940d 130 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 148:fd96258d940d 131 {
Kojto 148:fd96258d940d 132 uint32_t result;
Kojto 148:fd96258d940d 133
Kojto 148:fd96258d940d 134 __ASM volatile ("MRS %0, control" : "=r" (result) );
Kojto 148:fd96258d940d 135 return(result);
Kojto 148:fd96258d940d 136 }
Kojto 148:fd96258d940d 137
Kojto 148:fd96258d940d 138
Kojto 148:fd96258d940d 139 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 140 /**
Kojto 148:fd96258d940d 141 \brief Get Control Register (non-secure)
Kojto 148:fd96258d940d 142 \details Returns the content of the non-secure Control Register when in secure mode.
Kojto 148:fd96258d940d 143 \return non-secure Control Register value
Kojto 148:fd96258d940d 144 */
Kojto 148:fd96258d940d 145 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
Kojto 148:fd96258d940d 146 {
Kojto 148:fd96258d940d 147 uint32_t result;
Kojto 148:fd96258d940d 148
Kojto 148:fd96258d940d 149 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
Kojto 148:fd96258d940d 150 return(result);
Kojto 148:fd96258d940d 151 }
Kojto 148:fd96258d940d 152 #endif
Kojto 148:fd96258d940d 153
Kojto 148:fd96258d940d 154
Kojto 148:fd96258d940d 155 /**
Kojto 148:fd96258d940d 156 \brief Set Control Register
Kojto 148:fd96258d940d 157 \details Writes the given value to the Control Register.
Kojto 148:fd96258d940d 158 \param [in] control Control Register value to set
Kojto 148:fd96258d940d 159 */
Kojto 148:fd96258d940d 160 __attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 148:fd96258d940d 161 {
Kojto 148:fd96258d940d 162 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
Kojto 148:fd96258d940d 163 }
Kojto 148:fd96258d940d 164
Kojto 148:fd96258d940d 165
Kojto 148:fd96258d940d 166 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 167 /**
Kojto 148:fd96258d940d 168 \brief Set Control Register (non-secure)
Kojto 148:fd96258d940d 169 \details Writes the given value to the non-secure Control Register when in secure state.
Kojto 148:fd96258d940d 170 \param [in] control Control Register value to set
Kojto 148:fd96258d940d 171 */
Kojto 148:fd96258d940d 172 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
Kojto 148:fd96258d940d 173 {
Kojto 148:fd96258d940d 174 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
Kojto 148:fd96258d940d 175 }
Kojto 148:fd96258d940d 176 #endif
Kojto 148:fd96258d940d 177
Kojto 148:fd96258d940d 178
Kojto 148:fd96258d940d 179 /**
Kojto 148:fd96258d940d 180 \brief Get IPSR Register
Kojto 148:fd96258d940d 181 \details Returns the content of the IPSR Register.
Kojto 148:fd96258d940d 182 \return IPSR Register value
Kojto 148:fd96258d940d 183 */
Kojto 148:fd96258d940d 184 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 148:fd96258d940d 185 {
Kojto 148:fd96258d940d 186 uint32_t result;
Kojto 148:fd96258d940d 187
Kojto 148:fd96258d940d 188 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
Kojto 148:fd96258d940d 189 return(result);
Kojto 148:fd96258d940d 190 }
Kojto 148:fd96258d940d 191
Kojto 148:fd96258d940d 192
Kojto 148:fd96258d940d 193 /**
Kojto 148:fd96258d940d 194 \brief Get APSR Register
Kojto 148:fd96258d940d 195 \details Returns the content of the APSR Register.
Kojto 148:fd96258d940d 196 \return APSR Register value
Kojto 148:fd96258d940d 197 */
Kojto 148:fd96258d940d 198 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 148:fd96258d940d 199 {
Kojto 148:fd96258d940d 200 uint32_t result;
Kojto 148:fd96258d940d 201
Kojto 148:fd96258d940d 202 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
Kojto 148:fd96258d940d 203 return(result);
Kojto 148:fd96258d940d 204 }
Kojto 148:fd96258d940d 205
Kojto 148:fd96258d940d 206
Kojto 148:fd96258d940d 207 /**
Kojto 148:fd96258d940d 208 \brief Get xPSR Register
Kojto 148:fd96258d940d 209 \details Returns the content of the xPSR Register.
Kojto 148:fd96258d940d 210 \return xPSR Register value
Kojto 148:fd96258d940d 211 */
Kojto 148:fd96258d940d 212 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 148:fd96258d940d 213 {
Kojto 148:fd96258d940d 214 uint32_t result;
Kojto 148:fd96258d940d 215
Kojto 148:fd96258d940d 216 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
Kojto 148:fd96258d940d 217 return(result);
Kojto 148:fd96258d940d 218 }
Kojto 148:fd96258d940d 219
Kojto 148:fd96258d940d 220
Kojto 148:fd96258d940d 221 /**
Kojto 148:fd96258d940d 222 \brief Get Process Stack Pointer
Kojto 148:fd96258d940d 223 \details Returns the current value of the Process Stack Pointer (PSP).
Kojto 148:fd96258d940d 224 \return PSP Register value
Kojto 148:fd96258d940d 225 */
Kojto 148:fd96258d940d 226 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 148:fd96258d940d 227 {
Kojto 148:fd96258d940d 228 register uint32_t result;
Kojto 148:fd96258d940d 229
Kojto 148:fd96258d940d 230 __ASM volatile ("MRS %0, psp" : "=r" (result) );
Kojto 148:fd96258d940d 231 return(result);
Kojto 148:fd96258d940d 232 }
Kojto 148:fd96258d940d 233
Kojto 148:fd96258d940d 234
Kojto 148:fd96258d940d 235 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 236 /**
Kojto 148:fd96258d940d 237 \brief Get Process Stack Pointer (non-secure)
Kojto 148:fd96258d940d 238 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
Kojto 148:fd96258d940d 239 \return PSP Register value
Kojto 148:fd96258d940d 240 */
Kojto 148:fd96258d940d 241 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
Kojto 148:fd96258d940d 242 {
Kojto 148:fd96258d940d 243 register uint32_t result;
Kojto 148:fd96258d940d 244
Kojto 148:fd96258d940d 245 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
Kojto 148:fd96258d940d 246 return(result);
Kojto 148:fd96258d940d 247 }
Kojto 148:fd96258d940d 248 #endif
Kojto 148:fd96258d940d 249
Kojto 148:fd96258d940d 250
Kojto 148:fd96258d940d 251 /**
Kojto 148:fd96258d940d 252 \brief Set Process Stack Pointer
Kojto 148:fd96258d940d 253 \details Assigns the given value to the Process Stack Pointer (PSP).
Kojto 148:fd96258d940d 254 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 148:fd96258d940d 255 */
Kojto 148:fd96258d940d 256 __attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 148:fd96258d940d 257 {
Kojto 148:fd96258d940d 258 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
Kojto 148:fd96258d940d 259 }
Kojto 148:fd96258d940d 260
Kojto 148:fd96258d940d 261
Kojto 148:fd96258d940d 262 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 263 /**
Kojto 148:fd96258d940d 264 \brief Set Process Stack Pointer (non-secure)
Kojto 148:fd96258d940d 265 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
Kojto 148:fd96258d940d 266 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 148:fd96258d940d 267 */
Kojto 148:fd96258d940d 268 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
Kojto 148:fd96258d940d 269 {
Kojto 148:fd96258d940d 270 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
Kojto 148:fd96258d940d 271 }
Kojto 148:fd96258d940d 272 #endif
Kojto 148:fd96258d940d 273
Kojto 148:fd96258d940d 274
Kojto 148:fd96258d940d 275 /**
Kojto 148:fd96258d940d 276 \brief Get Main Stack Pointer
Kojto 148:fd96258d940d 277 \details Returns the current value of the Main Stack Pointer (MSP).
Kojto 148:fd96258d940d 278 \return MSP Register value
Kojto 148:fd96258d940d 279 */
Kojto 148:fd96258d940d 280 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 148:fd96258d940d 281 {
Kojto 148:fd96258d940d 282 register uint32_t result;
Kojto 148:fd96258d940d 283
Kojto 148:fd96258d940d 284 __ASM volatile ("MRS %0, msp" : "=r" (result) );
Kojto 148:fd96258d940d 285 return(result);
Kojto 148:fd96258d940d 286 }
Kojto 148:fd96258d940d 287
Kojto 148:fd96258d940d 288
Kojto 148:fd96258d940d 289 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 290 /**
Kojto 148:fd96258d940d 291 \brief Get Main Stack Pointer (non-secure)
Kojto 148:fd96258d940d 292 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
Kojto 148:fd96258d940d 293 \return MSP Register value
Kojto 148:fd96258d940d 294 */
Kojto 148:fd96258d940d 295 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
Kojto 148:fd96258d940d 296 {
Kojto 148:fd96258d940d 297 register uint32_t result;
Kojto 148:fd96258d940d 298
Kojto 148:fd96258d940d 299 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
Kojto 148:fd96258d940d 300 return(result);
Kojto 148:fd96258d940d 301 }
Kojto 148:fd96258d940d 302 #endif
Kojto 148:fd96258d940d 303
Kojto 148:fd96258d940d 304
Kojto 148:fd96258d940d 305 /**
Kojto 148:fd96258d940d 306 \brief Set Main Stack Pointer
Kojto 148:fd96258d940d 307 \details Assigns the given value to the Main Stack Pointer (MSP).
Kojto 148:fd96258d940d 308 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 148:fd96258d940d 309 */
Kojto 148:fd96258d940d 310 __attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 148:fd96258d940d 311 {
Kojto 148:fd96258d940d 312 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
Kojto 148:fd96258d940d 313 }
Kojto 148:fd96258d940d 314
Kojto 148:fd96258d940d 315
Kojto 148:fd96258d940d 316 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 317 /**
Kojto 148:fd96258d940d 318 \brief Set Main Stack Pointer (non-secure)
Kojto 148:fd96258d940d 319 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
Kojto 148:fd96258d940d 320 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 148:fd96258d940d 321 */
Kojto 148:fd96258d940d 322 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
Kojto 148:fd96258d940d 323 {
Kojto 148:fd96258d940d 324 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
Kojto 148:fd96258d940d 325 }
Kojto 148:fd96258d940d 326 #endif
Kojto 148:fd96258d940d 327
Kojto 148:fd96258d940d 328
Kojto 148:fd96258d940d 329 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 330 /**
Kojto 148:fd96258d940d 331 \brief Get Stack Pointer (non-secure)
Kojto 148:fd96258d940d 332 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
Kojto 148:fd96258d940d 333 \return SP Register value
Kojto 148:fd96258d940d 334 */
Kojto 148:fd96258d940d 335 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
Kojto 148:fd96258d940d 336 {
Kojto 148:fd96258d940d 337 register uint32_t result;
Kojto 148:fd96258d940d 338
Kojto 148:fd96258d940d 339 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
Kojto 148:fd96258d940d 340 return(result);
Kojto 148:fd96258d940d 341 }
Kojto 148:fd96258d940d 342
Kojto 148:fd96258d940d 343
Kojto 148:fd96258d940d 344 /**
Kojto 148:fd96258d940d 345 \brief Set Stack Pointer (non-secure)
Kojto 148:fd96258d940d 346 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
Kojto 148:fd96258d940d 347 \param [in] topOfStack Stack Pointer value to set
Kojto 148:fd96258d940d 348 */
Kojto 148:fd96258d940d 349 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
Kojto 148:fd96258d940d 350 {
Kojto 148:fd96258d940d 351 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
Kojto 148:fd96258d940d 352 }
Kojto 148:fd96258d940d 353 #endif
Kojto 148:fd96258d940d 354
Kojto 148:fd96258d940d 355
Kojto 148:fd96258d940d 356 /**
Kojto 148:fd96258d940d 357 \brief Get Priority Mask
Kojto 148:fd96258d940d 358 \details Returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 148:fd96258d940d 359 \return Priority Mask value
Kojto 148:fd96258d940d 360 */
Kojto 148:fd96258d940d 361 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 148:fd96258d940d 362 {
Kojto 148:fd96258d940d 363 uint32_t result;
Kojto 148:fd96258d940d 364
Kojto 148:fd96258d940d 365 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Kojto 148:fd96258d940d 366 return(result);
Kojto 148:fd96258d940d 367 }
Kojto 148:fd96258d940d 368
Kojto 148:fd96258d940d 369
Kojto 148:fd96258d940d 370 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 371 /**
Kojto 148:fd96258d940d 372 \brief Get Priority Mask (non-secure)
Kojto 148:fd96258d940d 373 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
Kojto 148:fd96258d940d 374 \return Priority Mask value
Kojto 148:fd96258d940d 375 */
Kojto 148:fd96258d940d 376 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
Kojto 148:fd96258d940d 377 {
Kojto 148:fd96258d940d 378 uint32_t result;
Kojto 148:fd96258d940d 379
Kojto 148:fd96258d940d 380 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
Kojto 148:fd96258d940d 381 return(result);
Kojto 148:fd96258d940d 382 }
Kojto 148:fd96258d940d 383 #endif
Kojto 148:fd96258d940d 384
Kojto 148:fd96258d940d 385
Kojto 148:fd96258d940d 386 /**
Kojto 148:fd96258d940d 387 \brief Set Priority Mask
Kojto 148:fd96258d940d 388 \details Assigns the given value to the Priority Mask Register.
Kojto 148:fd96258d940d 389 \param [in] priMask Priority Mask
Kojto 148:fd96258d940d 390 */
Kojto 148:fd96258d940d 391 __attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 148:fd96258d940d 392 {
Kojto 148:fd96258d940d 393 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
Kojto 148:fd96258d940d 394 }
Kojto 148:fd96258d940d 395
Kojto 148:fd96258d940d 396
Kojto 148:fd96258d940d 397 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 398 /**
Kojto 148:fd96258d940d 399 \brief Set Priority Mask (non-secure)
Kojto 148:fd96258d940d 400 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
Kojto 148:fd96258d940d 401 \param [in] priMask Priority Mask
Kojto 148:fd96258d940d 402 */
Kojto 148:fd96258d940d 403 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
Kojto 148:fd96258d940d 404 {
Kojto 148:fd96258d940d 405 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
Kojto 148:fd96258d940d 406 }
Kojto 148:fd96258d940d 407 #endif
Kojto 148:fd96258d940d 408
Kojto 148:fd96258d940d 409
Kojto 148:fd96258d940d 410 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Kojto 148:fd96258d940d 411 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Kojto 148:fd96258d940d 412 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Kojto 148:fd96258d940d 413 /**
Kojto 148:fd96258d940d 414 \brief Enable FIQ
Kojto 148:fd96258d940d 415 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 148:fd96258d940d 416 Can only be executed in Privileged modes.
Kojto 148:fd96258d940d 417 */
Kojto 148:fd96258d940d 418 #define __enable_fault_irq __enable_fiq /* see arm_compat.h */
Kojto 148:fd96258d940d 419
Kojto 148:fd96258d940d 420
Kojto 148:fd96258d940d 421 /**
Kojto 148:fd96258d940d 422 \brief Disable FIQ
Kojto 148:fd96258d940d 423 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 148:fd96258d940d 424 Can only be executed in Privileged modes.
Kojto 148:fd96258d940d 425 */
Kojto 148:fd96258d940d 426 #define __disable_fault_irq __disable_fiq /* see arm_compat.h */
Kojto 148:fd96258d940d 427
Kojto 148:fd96258d940d 428
Kojto 148:fd96258d940d 429 /**
Kojto 148:fd96258d940d 430 \brief Get Base Priority
Kojto 148:fd96258d940d 431 \details Returns the current value of the Base Priority register.
Kojto 148:fd96258d940d 432 \return Base Priority register value
Kojto 148:fd96258d940d 433 */
Kojto 148:fd96258d940d 434 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 148:fd96258d940d 435 {
Kojto 148:fd96258d940d 436 uint32_t result;
Kojto 148:fd96258d940d 437
Kojto 148:fd96258d940d 438 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
Kojto 148:fd96258d940d 439 return(result);
Kojto 148:fd96258d940d 440 }
Kojto 148:fd96258d940d 441
Kojto 148:fd96258d940d 442
Kojto 148:fd96258d940d 443 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 444 /**
Kojto 148:fd96258d940d 445 \brief Get Base Priority (non-secure)
Kojto 148:fd96258d940d 446 \details Returns the current value of the non-secure Base Priority register when in secure state.
Kojto 148:fd96258d940d 447 \return Base Priority register value
Kojto 148:fd96258d940d 448 */
Kojto 148:fd96258d940d 449 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
Kojto 148:fd96258d940d 450 {
Kojto 148:fd96258d940d 451 uint32_t result;
Kojto 148:fd96258d940d 452
Kojto 148:fd96258d940d 453 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
Kojto 148:fd96258d940d 454 return(result);
Kojto 148:fd96258d940d 455 }
Kojto 148:fd96258d940d 456 #endif
Kojto 148:fd96258d940d 457
Kojto 148:fd96258d940d 458
Kojto 148:fd96258d940d 459 /**
Kojto 148:fd96258d940d 460 \brief Set Base Priority
Kojto 148:fd96258d940d 461 \details Assigns the given value to the Base Priority register.
Kojto 148:fd96258d940d 462 \param [in] basePri Base Priority value to set
Kojto 148:fd96258d940d 463 */
Kojto 148:fd96258d940d 464 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
Kojto 148:fd96258d940d 465 {
Kojto 148:fd96258d940d 466 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
Kojto 148:fd96258d940d 467 }
Kojto 148:fd96258d940d 468
Kojto 148:fd96258d940d 469
Kojto 148:fd96258d940d 470 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 471 /**
Kojto 148:fd96258d940d 472 \brief Set Base Priority (non-secure)
Kojto 148:fd96258d940d 473 \details Assigns the given value to the non-secure Base Priority register when in secure state.
Kojto 148:fd96258d940d 474 \param [in] basePri Base Priority value to set
Kojto 148:fd96258d940d 475 */
Kojto 148:fd96258d940d 476 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
Kojto 148:fd96258d940d 477 {
Kojto 148:fd96258d940d 478 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
Kojto 148:fd96258d940d 479 }
Kojto 148:fd96258d940d 480 #endif
Kojto 148:fd96258d940d 481
Kojto 148:fd96258d940d 482
Kojto 148:fd96258d940d 483 /**
Kojto 148:fd96258d940d 484 \brief Set Base Priority with condition
Kojto 148:fd96258d940d 485 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 148:fd96258d940d 486 or the new value increases the BASEPRI priority level.
Kojto 148:fd96258d940d 487 \param [in] basePri Base Priority value to set
Kojto 148:fd96258d940d 488 */
Kojto 148:fd96258d940d 489 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Kojto 148:fd96258d940d 490 {
Kojto 148:fd96258d940d 491 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
Kojto 148:fd96258d940d 492 }
Kojto 148:fd96258d940d 493
Kojto 148:fd96258d940d 494
Kojto 148:fd96258d940d 495 /**
Kojto 148:fd96258d940d 496 \brief Get Fault Mask
Kojto 148:fd96258d940d 497 \details Returns the current value of the Fault Mask register.
Kojto 148:fd96258d940d 498 \return Fault Mask register value
Kojto 148:fd96258d940d 499 */
Kojto 148:fd96258d940d 500 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 148:fd96258d940d 501 {
Kojto 148:fd96258d940d 502 uint32_t result;
Kojto 148:fd96258d940d 503
Kojto 148:fd96258d940d 504 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Kojto 148:fd96258d940d 505 return(result);
Kojto 148:fd96258d940d 506 }
Kojto 148:fd96258d940d 507
Kojto 148:fd96258d940d 508
Kojto 148:fd96258d940d 509 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 510 /**
Kojto 148:fd96258d940d 511 \brief Get Fault Mask (non-secure)
Kojto 148:fd96258d940d 512 \details Returns the current value of the non-secure Fault Mask register when in secure state.
Kojto 148:fd96258d940d 513 \return Fault Mask register value
Kojto 148:fd96258d940d 514 */
Kojto 148:fd96258d940d 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
Kojto 148:fd96258d940d 516 {
Kojto 148:fd96258d940d 517 uint32_t result;
Kojto 148:fd96258d940d 518
Kojto 148:fd96258d940d 519 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
Kojto 148:fd96258d940d 520 return(result);
Kojto 148:fd96258d940d 521 }
Kojto 148:fd96258d940d 522 #endif
Kojto 148:fd96258d940d 523
Kojto 148:fd96258d940d 524
Kojto 148:fd96258d940d 525 /**
Kojto 148:fd96258d940d 526 \brief Set Fault Mask
Kojto 148:fd96258d940d 527 \details Assigns the given value to the Fault Mask register.
Kojto 148:fd96258d940d 528 \param [in] faultMask Fault Mask value to set
Kojto 148:fd96258d940d 529 */
Kojto 148:fd96258d940d 530 __attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 148:fd96258d940d 531 {
Kojto 148:fd96258d940d 532 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
Kojto 148:fd96258d940d 533 }
Kojto 148:fd96258d940d 534
Kojto 148:fd96258d940d 535
Kojto 148:fd96258d940d 536 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Kojto 148:fd96258d940d 537 /**
Kojto 148:fd96258d940d 538 \brief Set Fault Mask (non-secure)
Kojto 148:fd96258d940d 539 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
Kojto 148:fd96258d940d 540 \param [in] faultMask Fault Mask value to set
Kojto 148:fd96258d940d 541 */
Kojto 148:fd96258d940d 542 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
Kojto 148:fd96258d940d 543 {
Kojto 148:fd96258d940d 544 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
Kojto 148:fd96258d940d 545 }
Kojto 148:fd96258d940d 546 #endif
Kojto 148:fd96258d940d 547
Kojto 148:fd96258d940d 548 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Kojto 148:fd96258d940d 549 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Kojto 148:fd96258d940d 550 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Kojto 148:fd96258d940d 551
Kojto 148:fd96258d940d 552
Kojto 148:fd96258d940d 553 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Kojto 148:fd96258d940d 554 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
Kojto 148:fd96258d940d 555
Kojto 148:fd96258d940d 556 /**
Kojto 148:fd96258d940d 557 \brief Get Process Stack Pointer Limit
Kojto 148:fd96258d940d 558 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
Kojto 148:fd96258d940d 559 \return PSPLIM Register value
Kojto 148:fd96258d940d 560 */
Kojto 148:fd96258d940d 561 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
Kojto 148:fd96258d940d 562 {
Kojto 148:fd96258d940d 563 register uint32_t result;
Kojto 148:fd96258d940d 564
Kojto 148:fd96258d940d 565 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
Kojto 148:fd96258d940d 566 return(result);
Kojto 148:fd96258d940d 567 }
Kojto 148:fd96258d940d 568
Kojto 148:fd96258d940d 569
Kojto 148:fd96258d940d 570 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
Kojto 148:fd96258d940d 571 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Kojto 148:fd96258d940d 572 /**
Kojto 148:fd96258d940d 573 \brief Get Process Stack Pointer Limit (non-secure)
Kojto 148:fd96258d940d 574 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
Kojto 148:fd96258d940d 575 \return PSPLIM Register value
Kojto 148:fd96258d940d 576 */
Kojto 148:fd96258d940d 577 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
Kojto 148:fd96258d940d 578 {
Kojto 148:fd96258d940d 579 register uint32_t result;
Kojto 148:fd96258d940d 580
Kojto 148:fd96258d940d 581 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
Kojto 148:fd96258d940d 582 return(result);
Kojto 148:fd96258d940d 583 }
Kojto 148:fd96258d940d 584 #endif
Kojto 148:fd96258d940d 585
Kojto 148:fd96258d940d 586
Kojto 148:fd96258d940d 587 /**
Kojto 148:fd96258d940d 588 \brief Set Process Stack Pointer Limit
Kojto 148:fd96258d940d 589 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
Kojto 148:fd96258d940d 590 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
Kojto 148:fd96258d940d 591 */
Kojto 148:fd96258d940d 592 __attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
Kojto 148:fd96258d940d 593 {
Kojto 148:fd96258d940d 594 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
Kojto 148:fd96258d940d 595 }
Kojto 148:fd96258d940d 596
Kojto 148:fd96258d940d 597
Kojto 148:fd96258d940d 598 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
Kojto 148:fd96258d940d 599 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Kojto 148:fd96258d940d 600 /**
Kojto 148:fd96258d940d 601 \brief Set Process Stack Pointer (non-secure)
Kojto 148:fd96258d940d 602 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
Kojto 148:fd96258d940d 603 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
Kojto 148:fd96258d940d 604 */
Kojto 148:fd96258d940d 605 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
Kojto 148:fd96258d940d 606 {
Kojto 148:fd96258d940d 607 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
Kojto 148:fd96258d940d 608 }
Kojto 148:fd96258d940d 609 #endif
Kojto 148:fd96258d940d 610
Kojto 148:fd96258d940d 611
Kojto 148:fd96258d940d 612 /**
Kojto 148:fd96258d940d 613 \brief Get Main Stack Pointer Limit
Kojto 148:fd96258d940d 614 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
Kojto 148:fd96258d940d 615 \return MSPLIM Register value
Kojto 148:fd96258d940d 616 */
Kojto 148:fd96258d940d 617 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
Kojto 148:fd96258d940d 618 {
Kojto 148:fd96258d940d 619 register uint32_t result;
Kojto 148:fd96258d940d 620
Kojto 148:fd96258d940d 621 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
Kojto 148:fd96258d940d 622
Kojto 148:fd96258d940d 623 return(result);
Kojto 148:fd96258d940d 624 }
Kojto 148:fd96258d940d 625
Kojto 148:fd96258d940d 626
Kojto 148:fd96258d940d 627 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
Kojto 148:fd96258d940d 628 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Kojto 148:fd96258d940d 629 /**
Kojto 148:fd96258d940d 630 \brief Get Main Stack Pointer Limit (non-secure)
Kojto 148:fd96258d940d 631 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
Kojto 148:fd96258d940d 632 \return MSPLIM Register value
Kojto 148:fd96258d940d 633 */
Kojto 148:fd96258d940d 634 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
Kojto 148:fd96258d940d 635 {
Kojto 148:fd96258d940d 636 register uint32_t result;
Kojto 148:fd96258d940d 637
Kojto 148:fd96258d940d 638 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
Kojto 148:fd96258d940d 639 return(result);
Kojto 148:fd96258d940d 640 }
Kojto 148:fd96258d940d 641 #endif
Kojto 148:fd96258d940d 642
Kojto 148:fd96258d940d 643
Kojto 148:fd96258d940d 644 /**
Kojto 148:fd96258d940d 645 \brief Set Main Stack Pointer Limit
Kojto 148:fd96258d940d 646 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
Kojto 148:fd96258d940d 647 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
Kojto 148:fd96258d940d 648 */
Kojto 148:fd96258d940d 649 __attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
Kojto 148:fd96258d940d 650 {
Kojto 148:fd96258d940d 651 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
Kojto 148:fd96258d940d 652 }
Kojto 148:fd96258d940d 653
Kojto 148:fd96258d940d 654
Kojto 148:fd96258d940d 655 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
Kojto 148:fd96258d940d 656 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Kojto 148:fd96258d940d 657 /**
Kojto 148:fd96258d940d 658 \brief Set Main Stack Pointer Limit (non-secure)
Kojto 148:fd96258d940d 659 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
Kojto 148:fd96258d940d 660 \param [in] MainStackPtrLimit Main Stack Pointer value to set
Kojto 148:fd96258d940d 661 */
Kojto 148:fd96258d940d 662 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
Kojto 148:fd96258d940d 663 {
Kojto 148:fd96258d940d 664 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
Kojto 148:fd96258d940d 665 }
Kojto 148:fd96258d940d 666 #endif
Kojto 148:fd96258d940d 667
Kojto 148:fd96258d940d 668 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Kojto 148:fd96258d940d 669 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
Kojto 148:fd96258d940d 670
Kojto 148:fd96258d940d 671
Kojto 148:fd96258d940d 672 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Kojto 148:fd96258d940d 673 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Kojto 148:fd96258d940d 674
Kojto 148:fd96258d940d 675 /**
Kojto 148:fd96258d940d 676 \brief Get FPSCR
Kojto 148:fd96258d940d 677 \details Returns the current value of the Floating Point Status/Control register.
Kojto 148:fd96258d940d 678 \return Floating Point Status/Control register value
Kojto 148:fd96258d940d 679 */
Kojto 148:fd96258d940d 680 /* #define __get_FPSCR __builtin_arm_get_fpscr */
Kojto 148:fd96258d940d 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 148:fd96258d940d 682 {
Kojto 148:fd96258d940d 683 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
Kojto 148:fd96258d940d 684 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Kojto 148:fd96258d940d 685 uint32_t result;
Kojto 148:fd96258d940d 686
Kojto 148:fd96258d940d 687 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
Kojto 148:fd96258d940d 688 return(result);
Kojto 148:fd96258d940d 689 #else
Kojto 148:fd96258d940d 690 return(0U);
Kojto 148:fd96258d940d 691 #endif
Kojto 148:fd96258d940d 692 }
Kojto 148:fd96258d940d 693
Kojto 148:fd96258d940d 694
Kojto 148:fd96258d940d 695 /**
Kojto 148:fd96258d940d 696 \brief Set FPSCR
Kojto 148:fd96258d940d 697 \details Assigns the given value to the Floating Point Status/Control register.
Kojto 148:fd96258d940d 698 \param [in] fpscr Floating Point Status/Control value to set
Kojto 148:fd96258d940d 699 */
Kojto 148:fd96258d940d 700 /* #define __set_FPSCR __builtin_arm_set_fpscr */
Kojto 148:fd96258d940d 701 __attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 148:fd96258d940d 702 {
Kojto 148:fd96258d940d 703 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
Kojto 148:fd96258d940d 704 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Kojto 148:fd96258d940d 705 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "memory");
Kojto 148:fd96258d940d 706 #else
Kojto 148:fd96258d940d 707 (void)fpscr;
Kojto 148:fd96258d940d 708 #endif
Kojto 148:fd96258d940d 709 }
Kojto 148:fd96258d940d 710
Kojto 148:fd96258d940d 711 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Kojto 148:fd96258d940d 712 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Kojto 148:fd96258d940d 713
Kojto 148:fd96258d940d 714
Kojto 148:fd96258d940d 715
Kojto 148:fd96258d940d 716 /*@} end of CMSIS_Core_RegAccFunctions */
Kojto 148:fd96258d940d 717
Kojto 148:fd96258d940d 718
Kojto 148:fd96258d940d 719 /* ########################## Core Instruction Access ######################### */
Kojto 148:fd96258d940d 720 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Kojto 148:fd96258d940d 721 Access to dedicated instructions
Kojto 148:fd96258d940d 722 @{
Kojto 148:fd96258d940d 723 */
Kojto 148:fd96258d940d 724
Kojto 148:fd96258d940d 725 /* Define macros for porting to both thumb1 and thumb2.
Kojto 148:fd96258d940d 726 * For thumb1, use low register (r0-r7), specified by constraint "l"
Kojto 148:fd96258d940d 727 * Otherwise, use general registers, specified by constraint "r" */
Kojto 148:fd96258d940d 728 #if defined (__thumb__) && !defined (__thumb2__)
Kojto 148:fd96258d940d 729 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
Kojto 148:fd96258d940d 730 #define __CMSIS_GCC_USE_REG(r) "l" (r)
Kojto 148:fd96258d940d 731 #else
Kojto 148:fd96258d940d 732 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
Kojto 148:fd96258d940d 733 #define __CMSIS_GCC_USE_REG(r) "r" (r)
Kojto 148:fd96258d940d 734 #endif
Kojto 148:fd96258d940d 735
Kojto 148:fd96258d940d 736 /**
Kojto 148:fd96258d940d 737 \brief No Operation
Kojto 148:fd96258d940d 738 \details No Operation does nothing. This instruction can be used for code alignment purposes.
Kojto 148:fd96258d940d 739 */
Kojto 148:fd96258d940d 740 #define __NOP __builtin_arm_nop
Kojto 148:fd96258d940d 741
Kojto 148:fd96258d940d 742 /**
Kojto 148:fd96258d940d 743 \brief Wait For Interrupt
Kojto 148:fd96258d940d 744 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
Kojto 148:fd96258d940d 745 */
Kojto 148:fd96258d940d 746 #define __WFI __builtin_arm_wfi
Kojto 148:fd96258d940d 747
Kojto 148:fd96258d940d 748
Kojto 148:fd96258d940d 749 /**
Kojto 148:fd96258d940d 750 \brief Wait For Event
Kojto 148:fd96258d940d 751 \details Wait For Event is a hint instruction that permits the processor to enter
Kojto 148:fd96258d940d 752 a low-power state until one of a number of events occurs.
Kojto 148:fd96258d940d 753 */
Kojto 148:fd96258d940d 754 #define __WFE __builtin_arm_wfe
Kojto 148:fd96258d940d 755
Kojto 148:fd96258d940d 756
Kojto 148:fd96258d940d 757 /**
Kojto 148:fd96258d940d 758 \brief Send Event
Kojto 148:fd96258d940d 759 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Kojto 148:fd96258d940d 760 */
Kojto 148:fd96258d940d 761 #define __SEV __builtin_arm_sev
Kojto 148:fd96258d940d 762
Kojto 148:fd96258d940d 763
Kojto 148:fd96258d940d 764 /**
Kojto 148:fd96258d940d 765 \brief Instruction Synchronization Barrier
Kojto 148:fd96258d940d 766 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
Kojto 148:fd96258d940d 767 so that all instructions following the ISB are fetched from cache or memory,
Kojto 148:fd96258d940d 768 after the instruction has been completed.
Kojto 148:fd96258d940d 769 */
Kojto 148:fd96258d940d 770 #define __ISB() __builtin_arm_isb(0xF);
Kojto 148:fd96258d940d 771
Kojto 148:fd96258d940d 772 /**
Kojto 148:fd96258d940d 773 \brief Data Synchronization Barrier
Kojto 148:fd96258d940d 774 \details Acts as a special kind of Data Memory Barrier.
Kojto 148:fd96258d940d 775 It completes when all explicit memory accesses before this instruction complete.
Kojto 148:fd96258d940d 776 */
Kojto 148:fd96258d940d 777 #define __DSB() __builtin_arm_dsb(0xF);
Kojto 148:fd96258d940d 778
Kojto 148:fd96258d940d 779
Kojto 148:fd96258d940d 780 /**
Kojto 148:fd96258d940d 781 \brief Data Memory Barrier
Kojto 148:fd96258d940d 782 \details Ensures the apparent order of the explicit memory operations before
Kojto 148:fd96258d940d 783 and after the instruction, without ensuring their completion.
Kojto 148:fd96258d940d 784 */
Kojto 148:fd96258d940d 785 #define __DMB() __builtin_arm_dmb(0xF);
Kojto 148:fd96258d940d 786
Kojto 148:fd96258d940d 787
Kojto 148:fd96258d940d 788 /**
Kojto 148:fd96258d940d 789 \brief Reverse byte order (32 bit)
Kojto 148:fd96258d940d 790 \details Reverses the byte order in integer value.
Kojto 148:fd96258d940d 791 \param [in] value Value to reverse
Kojto 148:fd96258d940d 792 \return Reversed value
Kojto 148:fd96258d940d 793 */
Kojto 148:fd96258d940d 794 #define __REV __builtin_bswap32
Kojto 148:fd96258d940d 795
Kojto 148:fd96258d940d 796
Kojto 148:fd96258d940d 797 /**
Kojto 148:fd96258d940d 798 \brief Reverse byte order (16 bit)
Kojto 148:fd96258d940d 799 \details Reverses the byte order in two unsigned short values.
Kojto 148:fd96258d940d 800 \param [in] value Value to reverse
Kojto 148:fd96258d940d 801 \return Reversed value
Kojto 148:fd96258d940d 802 */
Kojto 148:fd96258d940d 803 #define __REV16 __builtin_bswap16 /* ToDo ARMCLANG: check if __builtin_bswap16 could be used */
Kojto 148:fd96258d940d 804 #if 0
Kojto 148:fd96258d940d 805 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
Kojto 148:fd96258d940d 806 {
Kojto 148:fd96258d940d 807 uint32_t result;
Kojto 148:fd96258d940d 808
Kojto 148:fd96258d940d 809 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Kojto 148:fd96258d940d 810 return(result);
Kojto 148:fd96258d940d 811 }
Kojto 148:fd96258d940d 812 #endif
Kojto 148:fd96258d940d 813
Kojto 148:fd96258d940d 814
Kojto 148:fd96258d940d 815 /**
Kojto 148:fd96258d940d 816 \brief Reverse byte order in signed short value
Kojto 148:fd96258d940d 817 \details Reverses the byte order in a signed short value with sign extension to integer.
Kojto 148:fd96258d940d 818 \param [in] value Value to reverse
Kojto 148:fd96258d940d 819 \return Reversed value
Kojto 148:fd96258d940d 820 */
Kojto 148:fd96258d940d 821 /* ToDo ARMCLANG: check if __builtin_bswap16 could be used */
Kojto 148:fd96258d940d 822 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
Kojto 148:fd96258d940d 823 {
Kojto 148:fd96258d940d 824 int32_t result;
Kojto 148:fd96258d940d 825
Kojto 148:fd96258d940d 826 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Kojto 148:fd96258d940d 827 return(result);
Kojto 148:fd96258d940d 828 }
Kojto 148:fd96258d940d 829
Kojto 148:fd96258d940d 830
Kojto 148:fd96258d940d 831 /**
Kojto 148:fd96258d940d 832 \brief Rotate Right in unsigned value (32 bit)
Kojto 148:fd96258d940d 833 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
Kojto 148:fd96258d940d 834 \param [in] op1 Value to rotate
Kojto 148:fd96258d940d 835 \param [in] op2 Number of Bits to rotate
Kojto 148:fd96258d940d 836 \return Rotated value
Kojto 148:fd96258d940d 837 */
Kojto 148:fd96258d940d 838 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 839 {
Kojto 148:fd96258d940d 840 return (op1 >> op2) | (op1 << (32U - op2));
Kojto 148:fd96258d940d 841 }
Kojto 148:fd96258d940d 842
Kojto 148:fd96258d940d 843
Kojto 148:fd96258d940d 844 /**
Kojto 148:fd96258d940d 845 \brief Breakpoint
Kojto 148:fd96258d940d 846 \details Causes the processor to enter Debug state.
Kojto 148:fd96258d940d 847 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
Kojto 148:fd96258d940d 848 \param [in] value is ignored by the processor.
Kojto 148:fd96258d940d 849 If required, a debugger can use it to store additional information about the breakpoint.
Kojto 148:fd96258d940d 850 */
Kojto 148:fd96258d940d 851 #define __BKPT(value) __ASM volatile ("bkpt "#value)
Kojto 148:fd96258d940d 852
Kojto 148:fd96258d940d 853
Kojto 148:fd96258d940d 854 /**
Kojto 148:fd96258d940d 855 \brief Reverse bit order of value
Kojto 148:fd96258d940d 856 \details Reverses the bit order of the given value.
Kojto 148:fd96258d940d 857 \param [in] value Value to reverse
Kojto 148:fd96258d940d 858 \return Reversed value
Kojto 148:fd96258d940d 859 */
Kojto 148:fd96258d940d 860 /* ToDo ARMCLANG: check if __builtin_arm_rbit is supported */
Kojto 148:fd96258d940d 861 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
Kojto 148:fd96258d940d 862 {
Kojto 148:fd96258d940d 863 uint32_t result;
Kojto 148:fd96258d940d 864
Kojto 148:fd96258d940d 865 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Kojto 148:fd96258d940d 866 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Kojto 148:fd96258d940d 867 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Kojto 148:fd96258d940d 868 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
Kojto 148:fd96258d940d 869 #else
Kojto 148:fd96258d940d 870 int32_t s = (4 /*sizeof(v)*/ * 8) - 1; /* extra shift needed at end */
Kojto 148:fd96258d940d 871
Kojto 148:fd96258d940d 872 result = value; /* r will be reversed bits of v; first get LSB of v */
Kojto 148:fd96258d940d 873 for (value >>= 1U; value; value >>= 1U)
Kojto 148:fd96258d940d 874 {
Kojto 148:fd96258d940d 875 result <<= 1U;
Kojto 148:fd96258d940d 876 result |= value & 1U;
Kojto 148:fd96258d940d 877 s--;
Kojto 148:fd96258d940d 878 }
Kojto 148:fd96258d940d 879 result <<= s; /* shift when v's highest bits are zero */
Kojto 148:fd96258d940d 880 #endif
Kojto 148:fd96258d940d 881 return(result);
Kojto 148:fd96258d940d 882 }
Kojto 148:fd96258d940d 883
Kojto 148:fd96258d940d 884
Kojto 148:fd96258d940d 885 /**
Kojto 148:fd96258d940d 886 \brief Count leading zeros
Kojto 148:fd96258d940d 887 \details Counts the number of leading zeros of a data value.
Kojto 148:fd96258d940d 888 \param [in] value Value to count the leading zeros
Kojto 148:fd96258d940d 889 \return number of leading zeros in value
Kojto 148:fd96258d940d 890 */
Kojto 148:fd96258d940d 891 #define __CLZ __builtin_clz
Kojto 148:fd96258d940d 892
Kojto 148:fd96258d940d 893
Kojto 148:fd96258d940d 894 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Kojto 148:fd96258d940d 895 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Kojto 148:fd96258d940d 896 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Kojto 148:fd96258d940d 897 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
Kojto 148:fd96258d940d 898 /**
Kojto 148:fd96258d940d 899 \brief LDR Exclusive (8 bit)
Kojto 148:fd96258d940d 900 \details Executes a exclusive LDR instruction for 8 bit value.
Kojto 148:fd96258d940d 901 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 902 \return value of type uint8_t at (*ptr)
Kojto 148:fd96258d940d 903 */
Kojto 148:fd96258d940d 904 #define __LDREXB (uint8_t)__builtin_arm_ldrex
Kojto 148:fd96258d940d 905
Kojto 148:fd96258d940d 906
Kojto 148:fd96258d940d 907 /**
Kojto 148:fd96258d940d 908 \brief LDR Exclusive (16 bit)
Kojto 148:fd96258d940d 909 \details Executes a exclusive LDR instruction for 16 bit values.
Kojto 148:fd96258d940d 910 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 911 \return value of type uint16_t at (*ptr)
Kojto 148:fd96258d940d 912 */
Kojto 148:fd96258d940d 913 #define __LDREXH (uint16_t)__builtin_arm_ldrex
Kojto 148:fd96258d940d 914
Kojto 148:fd96258d940d 915
Kojto 148:fd96258d940d 916 /**
Kojto 148:fd96258d940d 917 \brief LDR Exclusive (32 bit)
Kojto 148:fd96258d940d 918 \details Executes a exclusive LDR instruction for 32 bit values.
Kojto 148:fd96258d940d 919 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 920 \return value of type uint32_t at (*ptr)
Kojto 148:fd96258d940d 921 */
Kojto 148:fd96258d940d 922 #define __LDREXW (uint32_t)__builtin_arm_ldrex
Kojto 148:fd96258d940d 923
Kojto 148:fd96258d940d 924
Kojto 148:fd96258d940d 925 /**
Kojto 148:fd96258d940d 926 \brief STR Exclusive (8 bit)
Kojto 148:fd96258d940d 927 \details Executes a exclusive STR instruction for 8 bit values.
Kojto 148:fd96258d940d 928 \param [in] value Value to store
Kojto 148:fd96258d940d 929 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 930 \return 0 Function succeeded
Kojto 148:fd96258d940d 931 \return 1 Function failed
Kojto 148:fd96258d940d 932 */
Kojto 148:fd96258d940d 933 #define __STREXB (uint32_t)__builtin_arm_strex
Kojto 148:fd96258d940d 934
Kojto 148:fd96258d940d 935
Kojto 148:fd96258d940d 936 /**
Kojto 148:fd96258d940d 937 \brief STR Exclusive (16 bit)
Kojto 148:fd96258d940d 938 \details Executes a exclusive STR instruction for 16 bit values.
Kojto 148:fd96258d940d 939 \param [in] value Value to store
Kojto 148:fd96258d940d 940 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 941 \return 0 Function succeeded
Kojto 148:fd96258d940d 942 \return 1 Function failed
Kojto 148:fd96258d940d 943 */
Kojto 148:fd96258d940d 944 #define __STREXH (uint32_t)__builtin_arm_strex
Kojto 148:fd96258d940d 945
Kojto 148:fd96258d940d 946
Kojto 148:fd96258d940d 947 /**
Kojto 148:fd96258d940d 948 \brief STR Exclusive (32 bit)
Kojto 148:fd96258d940d 949 \details Executes a exclusive STR instruction for 32 bit values.
Kojto 148:fd96258d940d 950 \param [in] value Value to store
Kojto 148:fd96258d940d 951 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 952 \return 0 Function succeeded
Kojto 148:fd96258d940d 953 \return 1 Function failed
Kojto 148:fd96258d940d 954 */
Kojto 148:fd96258d940d 955 #define __STREXW (uint32_t)__builtin_arm_strex
Kojto 148:fd96258d940d 956
Kojto 148:fd96258d940d 957
Kojto 148:fd96258d940d 958 /**
Kojto 148:fd96258d940d 959 \brief Remove the exclusive lock
Kojto 148:fd96258d940d 960 \details Removes the exclusive lock which is created by LDREX.
Kojto 148:fd96258d940d 961 */
Kojto 148:fd96258d940d 962 #define __CLREX __builtin_arm_clrex
Kojto 148:fd96258d940d 963
Kojto 148:fd96258d940d 964 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Kojto 148:fd96258d940d 965 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Kojto 148:fd96258d940d 966 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Kojto 148:fd96258d940d 967 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
Kojto 148:fd96258d940d 968
Kojto 148:fd96258d940d 969
Kojto 148:fd96258d940d 970 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Kojto 148:fd96258d940d 971 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Kojto 148:fd96258d940d 972 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Kojto 148:fd96258d940d 973 /**
Kojto 148:fd96258d940d 974 \brief Signed Saturate
Kojto 148:fd96258d940d 975 \details Saturates a signed value.
Kojto 148:fd96258d940d 976 \param [in] value Value to be saturated
Kojto 148:fd96258d940d 977 \param [in] sat Bit position to saturate to (1..32)
Kojto 148:fd96258d940d 978 \return Saturated value
Kojto 148:fd96258d940d 979 */
Kojto 148:fd96258d940d 980 #define __SSAT __builtin_arm_ssat
Kojto 148:fd96258d940d 981
Kojto 148:fd96258d940d 982
Kojto 148:fd96258d940d 983 /**
Kojto 148:fd96258d940d 984 \brief Unsigned Saturate
Kojto 148:fd96258d940d 985 \details Saturates an unsigned value.
Kojto 148:fd96258d940d 986 \param [in] value Value to be saturated
Kojto 148:fd96258d940d 987 \param [in] sat Bit position to saturate to (0..31)
Kojto 148:fd96258d940d 988 \return Saturated value
Kojto 148:fd96258d940d 989 */
Kojto 148:fd96258d940d 990 #define __USAT __builtin_arm_usat
Kojto 148:fd96258d940d 991
Kojto 148:fd96258d940d 992
Kojto 148:fd96258d940d 993 /**
Kojto 148:fd96258d940d 994 \brief Rotate Right with Extend (32 bit)
Kojto 148:fd96258d940d 995 \details Moves each bit of a bitstring right by one bit.
Kojto 148:fd96258d940d 996 The carry input is shifted in at the left end of the bitstring.
Kojto 148:fd96258d940d 997 \param [in] value Value to rotate
Kojto 148:fd96258d940d 998 \return Rotated value
Kojto 148:fd96258d940d 999 */
Kojto 148:fd96258d940d 1000 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
Kojto 148:fd96258d940d 1001 {
Kojto 148:fd96258d940d 1002 uint32_t result;
Kojto 148:fd96258d940d 1003
Kojto 148:fd96258d940d 1004 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Kojto 148:fd96258d940d 1005 return(result);
Kojto 148:fd96258d940d 1006 }
Kojto 148:fd96258d940d 1007
Kojto 148:fd96258d940d 1008
Kojto 148:fd96258d940d 1009 /**
Kojto 148:fd96258d940d 1010 \brief LDRT Unprivileged (8 bit)
Kojto 148:fd96258d940d 1011 \details Executes a Unprivileged LDRT instruction for 8 bit value.
Kojto 148:fd96258d940d 1012 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 1013 \return value of type uint8_t at (*ptr)
Kojto 148:fd96258d940d 1014 */
Kojto 148:fd96258d940d 1015 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
Kojto 148:fd96258d940d 1016 {
Kojto 148:fd96258d940d 1017 uint32_t result;
Kojto 148:fd96258d940d 1018
Kojto 148:fd96258d940d 1019 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
Kojto 148:fd96258d940d 1020 return ((uint8_t) result); /* Add explicit type cast here */
Kojto 148:fd96258d940d 1021 }
Kojto 148:fd96258d940d 1022
Kojto 148:fd96258d940d 1023
Kojto 148:fd96258d940d 1024 /**
Kojto 148:fd96258d940d 1025 \brief LDRT Unprivileged (16 bit)
Kojto 148:fd96258d940d 1026 \details Executes a Unprivileged LDRT instruction for 16 bit values.
Kojto 148:fd96258d940d 1027 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 1028 \return value of type uint16_t at (*ptr)
Kojto 148:fd96258d940d 1029 */
Kojto 148:fd96258d940d 1030 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
Kojto 148:fd96258d940d 1031 {
Kojto 148:fd96258d940d 1032 uint32_t result;
Kojto 148:fd96258d940d 1033
Kojto 148:fd96258d940d 1034 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
Kojto 148:fd96258d940d 1035 return ((uint16_t) result); /* Add explicit type cast here */
Kojto 148:fd96258d940d 1036 }
Kojto 148:fd96258d940d 1037
Kojto 148:fd96258d940d 1038
Kojto 148:fd96258d940d 1039 /**
Kojto 148:fd96258d940d 1040 \brief LDRT Unprivileged (32 bit)
Kojto 148:fd96258d940d 1041 \details Executes a Unprivileged LDRT instruction for 32 bit values.
Kojto 148:fd96258d940d 1042 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 1043 \return value of type uint32_t at (*ptr)
Kojto 148:fd96258d940d 1044 */
Kojto 148:fd96258d940d 1045 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
Kojto 148:fd96258d940d 1046 {
Kojto 148:fd96258d940d 1047 uint32_t result;
Kojto 148:fd96258d940d 1048
Kojto 148:fd96258d940d 1049 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
Kojto 148:fd96258d940d 1050 return(result);
Kojto 148:fd96258d940d 1051 }
Kojto 148:fd96258d940d 1052
Kojto 148:fd96258d940d 1053
Kojto 148:fd96258d940d 1054 /**
Kojto 148:fd96258d940d 1055 \brief STRT Unprivileged (8 bit)
Kojto 148:fd96258d940d 1056 \details Executes a Unprivileged STRT instruction for 8 bit values.
Kojto 148:fd96258d940d 1057 \param [in] value Value to store
Kojto 148:fd96258d940d 1058 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 1059 */
Kojto 148:fd96258d940d 1060 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
Kojto 148:fd96258d940d 1061 {
Kojto 148:fd96258d940d 1062 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
Kojto 148:fd96258d940d 1063 }
Kojto 148:fd96258d940d 1064
Kojto 148:fd96258d940d 1065
Kojto 148:fd96258d940d 1066 /**
Kojto 148:fd96258d940d 1067 \brief STRT Unprivileged (16 bit)
Kojto 148:fd96258d940d 1068 \details Executes a Unprivileged STRT instruction for 16 bit values.
Kojto 148:fd96258d940d 1069 \param [in] value Value to store
Kojto 148:fd96258d940d 1070 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 1071 */
Kojto 148:fd96258d940d 1072 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
Kojto 148:fd96258d940d 1073 {
Kojto 148:fd96258d940d 1074 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
Kojto 148:fd96258d940d 1075 }
Kojto 148:fd96258d940d 1076
Kojto 148:fd96258d940d 1077
Kojto 148:fd96258d940d 1078 /**
Kojto 148:fd96258d940d 1079 \brief STRT Unprivileged (32 bit)
Kojto 148:fd96258d940d 1080 \details Executes a Unprivileged STRT instruction for 32 bit values.
Kojto 148:fd96258d940d 1081 \param [in] value Value to store
Kojto 148:fd96258d940d 1082 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 1083 */
Kojto 148:fd96258d940d 1084 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
Kojto 148:fd96258d940d 1085 {
Kojto 148:fd96258d940d 1086 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
Kojto 148:fd96258d940d 1087 }
Kojto 148:fd96258d940d 1088
Kojto 148:fd96258d940d 1089 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Kojto 148:fd96258d940d 1090 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Kojto 148:fd96258d940d 1091 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Kojto 148:fd96258d940d 1092
Kojto 148:fd96258d940d 1093
Kojto 148:fd96258d940d 1094 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Kojto 148:fd96258d940d 1095 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
Kojto 148:fd96258d940d 1096 /**
Kojto 148:fd96258d940d 1097 \brief Load-Acquire (8 bit)
Kojto 148:fd96258d940d 1098 \details Executes a LDAB instruction for 8 bit value.
Kojto 148:fd96258d940d 1099 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 1100 \return value of type uint8_t at (*ptr)
Kojto 148:fd96258d940d 1101 */
Kojto 148:fd96258d940d 1102 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
Kojto 148:fd96258d940d 1103 {
Kojto 148:fd96258d940d 1104 uint32_t result;
Kojto 148:fd96258d940d 1105
Kojto 148:fd96258d940d 1106 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
Kojto 148:fd96258d940d 1107 return ((uint8_t) result);
Kojto 148:fd96258d940d 1108 }
Kojto 148:fd96258d940d 1109
Kojto 148:fd96258d940d 1110
Kojto 148:fd96258d940d 1111 /**
Kojto 148:fd96258d940d 1112 \brief Load-Acquire (16 bit)
Kojto 148:fd96258d940d 1113 \details Executes a LDAH instruction for 16 bit values.
Kojto 148:fd96258d940d 1114 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 1115 \return value of type uint16_t at (*ptr)
Kojto 148:fd96258d940d 1116 */
Kojto 148:fd96258d940d 1117 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
Kojto 148:fd96258d940d 1118 {
Kojto 148:fd96258d940d 1119 uint32_t result;
Kojto 148:fd96258d940d 1120
Kojto 148:fd96258d940d 1121 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
Kojto 148:fd96258d940d 1122 return ((uint16_t) result);
Kojto 148:fd96258d940d 1123 }
Kojto 148:fd96258d940d 1124
Kojto 148:fd96258d940d 1125
Kojto 148:fd96258d940d 1126 /**
Kojto 148:fd96258d940d 1127 \brief Load-Acquire (32 bit)
Kojto 148:fd96258d940d 1128 \details Executes a LDA instruction for 32 bit values.
Kojto 148:fd96258d940d 1129 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 1130 \return value of type uint32_t at (*ptr)
Kojto 148:fd96258d940d 1131 */
Kojto 148:fd96258d940d 1132 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
Kojto 148:fd96258d940d 1133 {
Kojto 148:fd96258d940d 1134 uint32_t result;
Kojto 148:fd96258d940d 1135
Kojto 148:fd96258d940d 1136 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
Kojto 148:fd96258d940d 1137 return(result);
Kojto 148:fd96258d940d 1138 }
Kojto 148:fd96258d940d 1139
Kojto 148:fd96258d940d 1140
Kojto 148:fd96258d940d 1141 /**
Kojto 148:fd96258d940d 1142 \brief Store-Release (8 bit)
Kojto 148:fd96258d940d 1143 \details Executes a STLB instruction for 8 bit values.
Kojto 148:fd96258d940d 1144 \param [in] value Value to store
Kojto 148:fd96258d940d 1145 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 1146 */
Kojto 148:fd96258d940d 1147 __attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
Kojto 148:fd96258d940d 1148 {
Kojto 148:fd96258d940d 1149 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
Kojto 148:fd96258d940d 1150 }
Kojto 148:fd96258d940d 1151
Kojto 148:fd96258d940d 1152
Kojto 148:fd96258d940d 1153 /**
Kojto 148:fd96258d940d 1154 \brief Store-Release (16 bit)
Kojto 148:fd96258d940d 1155 \details Executes a STLH instruction for 16 bit values.
Kojto 148:fd96258d940d 1156 \param [in] value Value to store
Kojto 148:fd96258d940d 1157 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 1158 */
Kojto 148:fd96258d940d 1159 __attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
Kojto 148:fd96258d940d 1160 {
Kojto 148:fd96258d940d 1161 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
Kojto 148:fd96258d940d 1162 }
Kojto 148:fd96258d940d 1163
Kojto 148:fd96258d940d 1164
Kojto 148:fd96258d940d 1165 /**
Kojto 148:fd96258d940d 1166 \brief Store-Release (32 bit)
Kojto 148:fd96258d940d 1167 \details Executes a STL instruction for 32 bit values.
Kojto 148:fd96258d940d 1168 \param [in] value Value to store
Kojto 148:fd96258d940d 1169 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 1170 */
Kojto 148:fd96258d940d 1171 __attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
Kojto 148:fd96258d940d 1172 {
Kojto 148:fd96258d940d 1173 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
Kojto 148:fd96258d940d 1174 }
Kojto 148:fd96258d940d 1175
Kojto 148:fd96258d940d 1176
Kojto 148:fd96258d940d 1177 /**
Kojto 148:fd96258d940d 1178 \brief Load-Acquire Exclusive (8 bit)
Kojto 148:fd96258d940d 1179 \details Executes a LDAB exclusive instruction for 8 bit value.
Kojto 148:fd96258d940d 1180 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 1181 \return value of type uint8_t at (*ptr)
Kojto 148:fd96258d940d 1182 */
Kojto 148:fd96258d940d 1183 #define __LDAEXB (uint8_t)__builtin_arm_ldaex
Kojto 148:fd96258d940d 1184
Kojto 148:fd96258d940d 1185
Kojto 148:fd96258d940d 1186 /**
Kojto 148:fd96258d940d 1187 \brief Load-Acquire Exclusive (16 bit)
Kojto 148:fd96258d940d 1188 \details Executes a LDAH exclusive instruction for 16 bit values.
Kojto 148:fd96258d940d 1189 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 1190 \return value of type uint16_t at (*ptr)
Kojto 148:fd96258d940d 1191 */
Kojto 148:fd96258d940d 1192 #define __LDAEXH (uint16_t)__builtin_arm_ldaex
Kojto 148:fd96258d940d 1193
Kojto 148:fd96258d940d 1194
Kojto 148:fd96258d940d 1195 /**
Kojto 148:fd96258d940d 1196 \brief Load-Acquire Exclusive (32 bit)
Kojto 148:fd96258d940d 1197 \details Executes a LDA exclusive instruction for 32 bit values.
Kojto 148:fd96258d940d 1198 \param [in] ptr Pointer to data
Kojto 148:fd96258d940d 1199 \return value of type uint32_t at (*ptr)
Kojto 148:fd96258d940d 1200 */
Kojto 148:fd96258d940d 1201 #define __LDAEX (uint32_t)__builtin_arm_ldaex
Kojto 148:fd96258d940d 1202
Kojto 148:fd96258d940d 1203
Kojto 148:fd96258d940d 1204 /**
Kojto 148:fd96258d940d 1205 \brief Store-Release Exclusive (8 bit)
Kojto 148:fd96258d940d 1206 \details Executes a STLB exclusive instruction for 8 bit values.
Kojto 148:fd96258d940d 1207 \param [in] value Value to store
Kojto 148:fd96258d940d 1208 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 1209 \return 0 Function succeeded
Kojto 148:fd96258d940d 1210 \return 1 Function failed
Kojto 148:fd96258d940d 1211 */
Kojto 148:fd96258d940d 1212 #define __STLEXB (uint32_t)__builtin_arm_stlex
Kojto 148:fd96258d940d 1213
Kojto 148:fd96258d940d 1214
Kojto 148:fd96258d940d 1215 /**
Kojto 148:fd96258d940d 1216 \brief Store-Release Exclusive (16 bit)
Kojto 148:fd96258d940d 1217 \details Executes a STLH exclusive instruction for 16 bit values.
Kojto 148:fd96258d940d 1218 \param [in] value Value to store
Kojto 148:fd96258d940d 1219 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 1220 \return 0 Function succeeded
Kojto 148:fd96258d940d 1221 \return 1 Function failed
Kojto 148:fd96258d940d 1222 */
Kojto 148:fd96258d940d 1223 #define __STLEXH (uint32_t)__builtin_arm_stlex
Kojto 148:fd96258d940d 1224
Kojto 148:fd96258d940d 1225
Kojto 148:fd96258d940d 1226 /**
Kojto 148:fd96258d940d 1227 \brief Store-Release Exclusive (32 bit)
Kojto 148:fd96258d940d 1228 \details Executes a STL exclusive instruction for 32 bit values.
Kojto 148:fd96258d940d 1229 \param [in] value Value to store
Kojto 148:fd96258d940d 1230 \param [in] ptr Pointer to location
Kojto 148:fd96258d940d 1231 \return 0 Function succeeded
Kojto 148:fd96258d940d 1232 \return 1 Function failed
Kojto 148:fd96258d940d 1233 */
Kojto 148:fd96258d940d 1234 #define __STLEX (uint32_t)__builtin_arm_stlex
Kojto 148:fd96258d940d 1235
Kojto 148:fd96258d940d 1236 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Kojto 148:fd96258d940d 1237 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
Kojto 148:fd96258d940d 1238
Kojto 148:fd96258d940d 1239 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
Kojto 148:fd96258d940d 1240
Kojto 148:fd96258d940d 1241
Kojto 148:fd96258d940d 1242 /* ################### Compiler specific Intrinsics ########################### */
Kojto 148:fd96258d940d 1243 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Kojto 148:fd96258d940d 1244 Access to dedicated SIMD instructions
Kojto 148:fd96258d940d 1245 @{
Kojto 148:fd96258d940d 1246 */
Kojto 148:fd96258d940d 1247
Kojto 148:fd96258d940d 1248 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
Kojto 148:fd96258d940d 1249
Kojto 148:fd96258d940d 1250 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1251 {
Kojto 148:fd96258d940d 1252 uint32_t result;
Kojto 148:fd96258d940d 1253
Kojto 148:fd96258d940d 1254 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1255 return(result);
Kojto 148:fd96258d940d 1256 }
Kojto 148:fd96258d940d 1257
Kojto 148:fd96258d940d 1258 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1259 {
Kojto 148:fd96258d940d 1260 uint32_t result;
Kojto 148:fd96258d940d 1261
Kojto 148:fd96258d940d 1262 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1263 return(result);
Kojto 148:fd96258d940d 1264 }
Kojto 148:fd96258d940d 1265
Kojto 148:fd96258d940d 1266 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1267 {
Kojto 148:fd96258d940d 1268 uint32_t result;
Kojto 148:fd96258d940d 1269
Kojto 148:fd96258d940d 1270 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1271 return(result);
Kojto 148:fd96258d940d 1272 }
Kojto 148:fd96258d940d 1273
Kojto 148:fd96258d940d 1274 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1275 {
Kojto 148:fd96258d940d 1276 uint32_t result;
Kojto 148:fd96258d940d 1277
Kojto 148:fd96258d940d 1278 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1279 return(result);
Kojto 148:fd96258d940d 1280 }
Kojto 148:fd96258d940d 1281
Kojto 148:fd96258d940d 1282 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1283 {
Kojto 148:fd96258d940d 1284 uint32_t result;
Kojto 148:fd96258d940d 1285
Kojto 148:fd96258d940d 1286 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1287 return(result);
Kojto 148:fd96258d940d 1288 }
Kojto 148:fd96258d940d 1289
Kojto 148:fd96258d940d 1290 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1291 {
Kojto 148:fd96258d940d 1292 uint32_t result;
Kojto 148:fd96258d940d 1293
Kojto 148:fd96258d940d 1294 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1295 return(result);
Kojto 148:fd96258d940d 1296 }
Kojto 148:fd96258d940d 1297
Kojto 148:fd96258d940d 1298
Kojto 148:fd96258d940d 1299 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1300 {
Kojto 148:fd96258d940d 1301 uint32_t result;
Kojto 148:fd96258d940d 1302
Kojto 148:fd96258d940d 1303 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1304 return(result);
Kojto 148:fd96258d940d 1305 }
Kojto 148:fd96258d940d 1306
Kojto 148:fd96258d940d 1307 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1308 {
Kojto 148:fd96258d940d 1309 uint32_t result;
Kojto 148:fd96258d940d 1310
Kojto 148:fd96258d940d 1311 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1312 return(result);
Kojto 148:fd96258d940d 1313 }
Kojto 148:fd96258d940d 1314
Kojto 148:fd96258d940d 1315 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1316 {
Kojto 148:fd96258d940d 1317 uint32_t result;
Kojto 148:fd96258d940d 1318
Kojto 148:fd96258d940d 1319 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1320 return(result);
Kojto 148:fd96258d940d 1321 }
Kojto 148:fd96258d940d 1322
Kojto 148:fd96258d940d 1323 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1324 {
Kojto 148:fd96258d940d 1325 uint32_t result;
Kojto 148:fd96258d940d 1326
Kojto 148:fd96258d940d 1327 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1328 return(result);
Kojto 148:fd96258d940d 1329 }
Kojto 148:fd96258d940d 1330
Kojto 148:fd96258d940d 1331 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1332 {
Kojto 148:fd96258d940d 1333 uint32_t result;
Kojto 148:fd96258d940d 1334
Kojto 148:fd96258d940d 1335 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1336 return(result);
Kojto 148:fd96258d940d 1337 }
Kojto 148:fd96258d940d 1338
Kojto 148:fd96258d940d 1339 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1340 {
Kojto 148:fd96258d940d 1341 uint32_t result;
Kojto 148:fd96258d940d 1342
Kojto 148:fd96258d940d 1343 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1344 return(result);
Kojto 148:fd96258d940d 1345 }
Kojto 148:fd96258d940d 1346
Kojto 148:fd96258d940d 1347
Kojto 148:fd96258d940d 1348 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1349 {
Kojto 148:fd96258d940d 1350 uint32_t result;
Kojto 148:fd96258d940d 1351
Kojto 148:fd96258d940d 1352 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1353 return(result);
Kojto 148:fd96258d940d 1354 }
Kojto 148:fd96258d940d 1355
Kojto 148:fd96258d940d 1356 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1357 {
Kojto 148:fd96258d940d 1358 uint32_t result;
Kojto 148:fd96258d940d 1359
Kojto 148:fd96258d940d 1360 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1361 return(result);
Kojto 148:fd96258d940d 1362 }
Kojto 148:fd96258d940d 1363
Kojto 148:fd96258d940d 1364 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1365 {
Kojto 148:fd96258d940d 1366 uint32_t result;
Kojto 148:fd96258d940d 1367
Kojto 148:fd96258d940d 1368 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1369 return(result);
Kojto 148:fd96258d940d 1370 }
Kojto 148:fd96258d940d 1371
Kojto 148:fd96258d940d 1372 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1373 {
Kojto 148:fd96258d940d 1374 uint32_t result;
Kojto 148:fd96258d940d 1375
Kojto 148:fd96258d940d 1376 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1377 return(result);
Kojto 148:fd96258d940d 1378 }
Kojto 148:fd96258d940d 1379
Kojto 148:fd96258d940d 1380 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1381 {
Kojto 148:fd96258d940d 1382 uint32_t result;
Kojto 148:fd96258d940d 1383
Kojto 148:fd96258d940d 1384 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1385 return(result);
Kojto 148:fd96258d940d 1386 }
Kojto 148:fd96258d940d 1387
Kojto 148:fd96258d940d 1388 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1389 {
Kojto 148:fd96258d940d 1390 uint32_t result;
Kojto 148:fd96258d940d 1391
Kojto 148:fd96258d940d 1392 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1393 return(result);
Kojto 148:fd96258d940d 1394 }
Kojto 148:fd96258d940d 1395
Kojto 148:fd96258d940d 1396 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1397 {
Kojto 148:fd96258d940d 1398 uint32_t result;
Kojto 148:fd96258d940d 1399
Kojto 148:fd96258d940d 1400 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1401 return(result);
Kojto 148:fd96258d940d 1402 }
Kojto 148:fd96258d940d 1403
Kojto 148:fd96258d940d 1404 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1405 {
Kojto 148:fd96258d940d 1406 uint32_t result;
Kojto 148:fd96258d940d 1407
Kojto 148:fd96258d940d 1408 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1409 return(result);
Kojto 148:fd96258d940d 1410 }
Kojto 148:fd96258d940d 1411
Kojto 148:fd96258d940d 1412 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1413 {
Kojto 148:fd96258d940d 1414 uint32_t result;
Kojto 148:fd96258d940d 1415
Kojto 148:fd96258d940d 1416 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1417 return(result);
Kojto 148:fd96258d940d 1418 }
Kojto 148:fd96258d940d 1419
Kojto 148:fd96258d940d 1420 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1421 {
Kojto 148:fd96258d940d 1422 uint32_t result;
Kojto 148:fd96258d940d 1423
Kojto 148:fd96258d940d 1424 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1425 return(result);
Kojto 148:fd96258d940d 1426 }
Kojto 148:fd96258d940d 1427
Kojto 148:fd96258d940d 1428 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1429 {
Kojto 148:fd96258d940d 1430 uint32_t result;
Kojto 148:fd96258d940d 1431
Kojto 148:fd96258d940d 1432 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1433 return(result);
Kojto 148:fd96258d940d 1434 }
Kojto 148:fd96258d940d 1435
Kojto 148:fd96258d940d 1436 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1437 {
Kojto 148:fd96258d940d 1438 uint32_t result;
Kojto 148:fd96258d940d 1439
Kojto 148:fd96258d940d 1440 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1441 return(result);
Kojto 148:fd96258d940d 1442 }
Kojto 148:fd96258d940d 1443
Kojto 148:fd96258d940d 1444 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1445 {
Kojto 148:fd96258d940d 1446 uint32_t result;
Kojto 148:fd96258d940d 1447
Kojto 148:fd96258d940d 1448 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1449 return(result);
Kojto 148:fd96258d940d 1450 }
Kojto 148:fd96258d940d 1451
Kojto 148:fd96258d940d 1452 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1453 {
Kojto 148:fd96258d940d 1454 uint32_t result;
Kojto 148:fd96258d940d 1455
Kojto 148:fd96258d940d 1456 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1457 return(result);
Kojto 148:fd96258d940d 1458 }
Kojto 148:fd96258d940d 1459
Kojto 148:fd96258d940d 1460 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1461 {
Kojto 148:fd96258d940d 1462 uint32_t result;
Kojto 148:fd96258d940d 1463
Kojto 148:fd96258d940d 1464 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1465 return(result);
Kojto 148:fd96258d940d 1466 }
Kojto 148:fd96258d940d 1467
Kojto 148:fd96258d940d 1468 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1469 {
Kojto 148:fd96258d940d 1470 uint32_t result;
Kojto 148:fd96258d940d 1471
Kojto 148:fd96258d940d 1472 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1473 return(result);
Kojto 148:fd96258d940d 1474 }
Kojto 148:fd96258d940d 1475
Kojto 148:fd96258d940d 1476 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1477 {
Kojto 148:fd96258d940d 1478 uint32_t result;
Kojto 148:fd96258d940d 1479
Kojto 148:fd96258d940d 1480 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1481 return(result);
Kojto 148:fd96258d940d 1482 }
Kojto 148:fd96258d940d 1483
Kojto 148:fd96258d940d 1484 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1485 {
Kojto 148:fd96258d940d 1486 uint32_t result;
Kojto 148:fd96258d940d 1487
Kojto 148:fd96258d940d 1488 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1489 return(result);
Kojto 148:fd96258d940d 1490 }
Kojto 148:fd96258d940d 1491
Kojto 148:fd96258d940d 1492 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1493 {
Kojto 148:fd96258d940d 1494 uint32_t result;
Kojto 148:fd96258d940d 1495
Kojto 148:fd96258d940d 1496 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1497 return(result);
Kojto 148:fd96258d940d 1498 }
Kojto 148:fd96258d940d 1499
Kojto 148:fd96258d940d 1500 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1501 {
Kojto 148:fd96258d940d 1502 uint32_t result;
Kojto 148:fd96258d940d 1503
Kojto 148:fd96258d940d 1504 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1505 return(result);
Kojto 148:fd96258d940d 1506 }
Kojto 148:fd96258d940d 1507
Kojto 148:fd96258d940d 1508 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1509 {
Kojto 148:fd96258d940d 1510 uint32_t result;
Kojto 148:fd96258d940d 1511
Kojto 148:fd96258d940d 1512 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1513 return(result);
Kojto 148:fd96258d940d 1514 }
Kojto 148:fd96258d940d 1515
Kojto 148:fd96258d940d 1516 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1517 {
Kojto 148:fd96258d940d 1518 uint32_t result;
Kojto 148:fd96258d940d 1519
Kojto 148:fd96258d940d 1520 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1521 return(result);
Kojto 148:fd96258d940d 1522 }
Kojto 148:fd96258d940d 1523
Kojto 148:fd96258d940d 1524 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1525 {
Kojto 148:fd96258d940d 1526 uint32_t result;
Kojto 148:fd96258d940d 1527
Kojto 148:fd96258d940d 1528 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1529 return(result);
Kojto 148:fd96258d940d 1530 }
Kojto 148:fd96258d940d 1531
Kojto 148:fd96258d940d 1532 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1533 {
Kojto 148:fd96258d940d 1534 uint32_t result;
Kojto 148:fd96258d940d 1535
Kojto 148:fd96258d940d 1536 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1537 return(result);
Kojto 148:fd96258d940d 1538 }
Kojto 148:fd96258d940d 1539
Kojto 148:fd96258d940d 1540 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1541 {
Kojto 148:fd96258d940d 1542 uint32_t result;
Kojto 148:fd96258d940d 1543
Kojto 148:fd96258d940d 1544 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1545 return(result);
Kojto 148:fd96258d940d 1546 }
Kojto 148:fd96258d940d 1547
Kojto 148:fd96258d940d 1548 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
Kojto 148:fd96258d940d 1549 {
Kojto 148:fd96258d940d 1550 uint32_t result;
Kojto 148:fd96258d940d 1551
Kojto 148:fd96258d940d 1552 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Kojto 148:fd96258d940d 1553 return(result);
Kojto 148:fd96258d940d 1554 }
Kojto 148:fd96258d940d 1555
Kojto 148:fd96258d940d 1556 #define __SSAT16(ARG1,ARG2) \
Kojto 148:fd96258d940d 1557 ({ \
Kojto 148:fd96258d940d 1558 int32_t __RES, __ARG1 = (ARG1); \
Kojto 148:fd96258d940d 1559 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Kojto 148:fd96258d940d 1560 __RES; \
Kojto 148:fd96258d940d 1561 })
Kojto 148:fd96258d940d 1562
Kojto 148:fd96258d940d 1563 #define __USAT16(ARG1,ARG2) \
Kojto 148:fd96258d940d 1564 ({ \
Kojto 148:fd96258d940d 1565 uint32_t __RES, __ARG1 = (ARG1); \
Kojto 148:fd96258d940d 1566 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Kojto 148:fd96258d940d 1567 __RES; \
Kojto 148:fd96258d940d 1568 })
Kojto 148:fd96258d940d 1569
Kojto 148:fd96258d940d 1570 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
Kojto 148:fd96258d940d 1571 {
Kojto 148:fd96258d940d 1572 uint32_t result;
Kojto 148:fd96258d940d 1573
Kojto 148:fd96258d940d 1574 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
Kojto 148:fd96258d940d 1575 return(result);
Kojto 148:fd96258d940d 1576 }
Kojto 148:fd96258d940d 1577
Kojto 148:fd96258d940d 1578 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1579 {
Kojto 148:fd96258d940d 1580 uint32_t result;
Kojto 148:fd96258d940d 1581
Kojto 148:fd96258d940d 1582 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1583 return(result);
Kojto 148:fd96258d940d 1584 }
Kojto 148:fd96258d940d 1585
Kojto 148:fd96258d940d 1586 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
Kojto 148:fd96258d940d 1587 {
Kojto 148:fd96258d940d 1588 uint32_t result;
Kojto 148:fd96258d940d 1589
Kojto 148:fd96258d940d 1590 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
Kojto 148:fd96258d940d 1591 return(result);
Kojto 148:fd96258d940d 1592 }
Kojto 148:fd96258d940d 1593
Kojto 148:fd96258d940d 1594 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1595 {
Kojto 148:fd96258d940d 1596 uint32_t result;
Kojto 148:fd96258d940d 1597
Kojto 148:fd96258d940d 1598 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1599 return(result);
Kojto 148:fd96258d940d 1600 }
Kojto 148:fd96258d940d 1601
Kojto 148:fd96258d940d 1602 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1603 {
Kojto 148:fd96258d940d 1604 uint32_t result;
Kojto 148:fd96258d940d 1605
Kojto 148:fd96258d940d 1606 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1607 return(result);
Kojto 148:fd96258d940d 1608 }
Kojto 148:fd96258d940d 1609
Kojto 148:fd96258d940d 1610 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1611 {
Kojto 148:fd96258d940d 1612 uint32_t result;
Kojto 148:fd96258d940d 1613
Kojto 148:fd96258d940d 1614 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1615 return(result);
Kojto 148:fd96258d940d 1616 }
Kojto 148:fd96258d940d 1617
Kojto 148:fd96258d940d 1618 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
Kojto 148:fd96258d940d 1619 {
Kojto 148:fd96258d940d 1620 uint32_t result;
Kojto 148:fd96258d940d 1621
Kojto 148:fd96258d940d 1622 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Kojto 148:fd96258d940d 1623 return(result);
Kojto 148:fd96258d940d 1624 }
Kojto 148:fd96258d940d 1625
Kojto 148:fd96258d940d 1626 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
Kojto 148:fd96258d940d 1627 {
Kojto 148:fd96258d940d 1628 uint32_t result;
Kojto 148:fd96258d940d 1629
Kojto 148:fd96258d940d 1630 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Kojto 148:fd96258d940d 1631 return(result);
Kojto 148:fd96258d940d 1632 }
Kojto 148:fd96258d940d 1633
Kojto 148:fd96258d940d 1634 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
Kojto 148:fd96258d940d 1635 {
Kojto 148:fd96258d940d 1636 union llreg_u{
Kojto 148:fd96258d940d 1637 uint32_t w32[2];
Kojto 148:fd96258d940d 1638 uint64_t w64;
Kojto 148:fd96258d940d 1639 } llr;
Kojto 148:fd96258d940d 1640 llr.w64 = acc;
Kojto 148:fd96258d940d 1641
Kojto 148:fd96258d940d 1642 #ifndef __ARMEB__ /* Little endian */
Kojto 148:fd96258d940d 1643 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Kojto 148:fd96258d940d 1644 #else /* Big endian */
Kojto 148:fd96258d940d 1645 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Kojto 148:fd96258d940d 1646 #endif
Kojto 148:fd96258d940d 1647
Kojto 148:fd96258d940d 1648 return(llr.w64);
Kojto 148:fd96258d940d 1649 }
Kojto 148:fd96258d940d 1650
Kojto 148:fd96258d940d 1651 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
Kojto 148:fd96258d940d 1652 {
Kojto 148:fd96258d940d 1653 union llreg_u{
Kojto 148:fd96258d940d 1654 uint32_t w32[2];
Kojto 148:fd96258d940d 1655 uint64_t w64;
Kojto 148:fd96258d940d 1656 } llr;
Kojto 148:fd96258d940d 1657 llr.w64 = acc;
Kojto 148:fd96258d940d 1658
Kojto 148:fd96258d940d 1659 #ifndef __ARMEB__ /* Little endian */
Kojto 148:fd96258d940d 1660 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Kojto 148:fd96258d940d 1661 #else /* Big endian */
Kojto 148:fd96258d940d 1662 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Kojto 148:fd96258d940d 1663 #endif
Kojto 148:fd96258d940d 1664
Kojto 148:fd96258d940d 1665 return(llr.w64);
Kojto 148:fd96258d940d 1666 }
Kojto 148:fd96258d940d 1667
Kojto 148:fd96258d940d 1668 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1669 {
Kojto 148:fd96258d940d 1670 uint32_t result;
Kojto 148:fd96258d940d 1671
Kojto 148:fd96258d940d 1672 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1673 return(result);
Kojto 148:fd96258d940d 1674 }
Kojto 148:fd96258d940d 1675
Kojto 148:fd96258d940d 1676 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1677 {
Kojto 148:fd96258d940d 1678 uint32_t result;
Kojto 148:fd96258d940d 1679
Kojto 148:fd96258d940d 1680 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1681 return(result);
Kojto 148:fd96258d940d 1682 }
Kojto 148:fd96258d940d 1683
Kojto 148:fd96258d940d 1684 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
Kojto 148:fd96258d940d 1685 {
Kojto 148:fd96258d940d 1686 uint32_t result;
Kojto 148:fd96258d940d 1687
Kojto 148:fd96258d940d 1688 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Kojto 148:fd96258d940d 1689 return(result);
Kojto 148:fd96258d940d 1690 }
Kojto 148:fd96258d940d 1691
Kojto 148:fd96258d940d 1692 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
Kojto 148:fd96258d940d 1693 {
Kojto 148:fd96258d940d 1694 uint32_t result;
Kojto 148:fd96258d940d 1695
Kojto 148:fd96258d940d 1696 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Kojto 148:fd96258d940d 1697 return(result);
Kojto 148:fd96258d940d 1698 }
Kojto 148:fd96258d940d 1699
Kojto 148:fd96258d940d 1700 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
Kojto 148:fd96258d940d 1701 {
Kojto 148:fd96258d940d 1702 union llreg_u{
Kojto 148:fd96258d940d 1703 uint32_t w32[2];
Kojto 148:fd96258d940d 1704 uint64_t w64;
Kojto 148:fd96258d940d 1705 } llr;
Kojto 148:fd96258d940d 1706 llr.w64 = acc;
Kojto 148:fd96258d940d 1707
Kojto 148:fd96258d940d 1708 #ifndef __ARMEB__ /* Little endian */
Kojto 148:fd96258d940d 1709 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Kojto 148:fd96258d940d 1710 #else /* Big endian */
Kojto 148:fd96258d940d 1711 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Kojto 148:fd96258d940d 1712 #endif
Kojto 148:fd96258d940d 1713
Kojto 148:fd96258d940d 1714 return(llr.w64);
Kojto 148:fd96258d940d 1715 }
Kojto 148:fd96258d940d 1716
Kojto 148:fd96258d940d 1717 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
Kojto 148:fd96258d940d 1718 {
Kojto 148:fd96258d940d 1719 union llreg_u{
Kojto 148:fd96258d940d 1720 uint32_t w32[2];
Kojto 148:fd96258d940d 1721 uint64_t w64;
Kojto 148:fd96258d940d 1722 } llr;
Kojto 148:fd96258d940d 1723 llr.w64 = acc;
Kojto 148:fd96258d940d 1724
Kojto 148:fd96258d940d 1725 #ifndef __ARMEB__ /* Little endian */
Kojto 148:fd96258d940d 1726 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Kojto 148:fd96258d940d 1727 #else /* Big endian */
Kojto 148:fd96258d940d 1728 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Kojto 148:fd96258d940d 1729 #endif
Kojto 148:fd96258d940d 1730
Kojto 148:fd96258d940d 1731 return(llr.w64);
Kojto 148:fd96258d940d 1732 }
Kojto 148:fd96258d940d 1733
Kojto 148:fd96258d940d 1734 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
Kojto 148:fd96258d940d 1735 {
Kojto 148:fd96258d940d 1736 uint32_t result;
Kojto 148:fd96258d940d 1737
Kojto 148:fd96258d940d 1738 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1739 return(result);
Kojto 148:fd96258d940d 1740 }
Kojto 148:fd96258d940d 1741
Kojto 148:fd96258d940d 1742 __attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
Kojto 148:fd96258d940d 1743 {
Kojto 148:fd96258d940d 1744 int32_t result;
Kojto 148:fd96258d940d 1745
Kojto 148:fd96258d940d 1746 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1747 return(result);
Kojto 148:fd96258d940d 1748 }
Kojto 148:fd96258d940d 1749
Kojto 148:fd96258d940d 1750 __attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
Kojto 148:fd96258d940d 1751 {
Kojto 148:fd96258d940d 1752 int32_t result;
Kojto 148:fd96258d940d 1753
Kojto 148:fd96258d940d 1754 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Kojto 148:fd96258d940d 1755 return(result);
Kojto 148:fd96258d940d 1756 }
Kojto 148:fd96258d940d 1757
Kojto 148:fd96258d940d 1758 #if 0
Kojto 148:fd96258d940d 1759 #define __PKHBT(ARG1,ARG2,ARG3) \
Kojto 148:fd96258d940d 1760 ({ \
Kojto 148:fd96258d940d 1761 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
Kojto 148:fd96258d940d 1762 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
Kojto 148:fd96258d940d 1763 __RES; \
Kojto 148:fd96258d940d 1764 })
Kojto 148:fd96258d940d 1765
Kojto 148:fd96258d940d 1766 #define __PKHTB(ARG1,ARG2,ARG3) \
Kojto 148:fd96258d940d 1767 ({ \
Kojto 148:fd96258d940d 1768 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
Kojto 148:fd96258d940d 1769 if (ARG3 == 0) \
Kojto 148:fd96258d940d 1770 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
Kojto 148:fd96258d940d 1771 else \
Kojto 148:fd96258d940d 1772 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
Kojto 148:fd96258d940d 1773 __RES; \
Kojto 148:fd96258d940d 1774 })
Kojto 148:fd96258d940d 1775 #endif
Kojto 148:fd96258d940d 1776
Kojto 148:fd96258d940d 1777 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
Kojto 148:fd96258d940d 1778 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
Kojto 148:fd96258d940d 1779
Kojto 148:fd96258d940d 1780 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
Kojto 148:fd96258d940d 1781 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
Kojto 148:fd96258d940d 1782
Kojto 148:fd96258d940d 1783 __attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
Kojto 148:fd96258d940d 1784 {
Kojto 148:fd96258d940d 1785 int32_t result;
Kojto 148:fd96258d940d 1786
Kojto 148:fd96258d940d 1787 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
Kojto 148:fd96258d940d 1788 return(result);
Kojto 148:fd96258d940d 1789 }
Kojto 148:fd96258d940d 1790
Kojto 148:fd96258d940d 1791 #endif /* (__ARM_FEATURE_DSP == 1) */
Kojto 148:fd96258d940d 1792 /*@} end of group CMSIS_SIMD_intrinsics */
Kojto 148:fd96258d940d 1793
Kojto 148:fd96258d940d 1794
Kojto 148:fd96258d940d 1795 #endif /* __CMSIS_ARMCLANG_H */