mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_WIZWIKI_W7500ECO/TOOLCHAIN_IAR/W7500x_crg.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 108:34e6b704fe68 1 /**
Kojto 108:34e6b704fe68 2 ******************************************************************************
Kojto 108:34e6b704fe68 3 * @file
Kojto 108:34e6b704fe68 4 * @author
Kojto 108:34e6b704fe68 5 * @version
Kojto 108:34e6b704fe68 6 * @date
Kojto 108:34e6b704fe68 7 * @brief This file contains all the functions prototypes for the Clock Reset Generator
Kojto 108:34e6b704fe68 8 * firmware library.
Kojto 108:34e6b704fe68 9 ******************************************************************************
Kojto 108:34e6b704fe68 10 *
Kojto 108:34e6b704fe68 11 ******************************************************************************
Kojto 108:34e6b704fe68 12 */
Kojto 108:34e6b704fe68 13
Kojto 108:34e6b704fe68 14 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 108:34e6b704fe68 15 #ifndef __W7500X_CRG_H
Kojto 108:34e6b704fe68 16 #define __W7500X_CRG_H
Kojto 108:34e6b704fe68 17
Kojto 108:34e6b704fe68 18 #ifdef __cplusplus
Kojto 108:34e6b704fe68 19 extern "C" {
Kojto 108:34e6b704fe68 20 #endif
Kojto 108:34e6b704fe68 21
Kojto 108:34e6b704fe68 22 /* Includes ------------------------------------------------------------------*/
Kojto 108:34e6b704fe68 23 #include "W7500x.h"
Kojto 108:34e6b704fe68 24
Kojto 108:34e6b704fe68 25 // It will be in W7500x_crg.h
Kojto 108:34e6b704fe68 26 typedef enum { CRG_CLK_DIS = 0, CRG_MCLK, CRG_RCLK, CRG_OCLK } CRG_CLK_SOURCE;
Kojto 108:34e6b704fe68 27 typedef enum { CRG_CLK_HIGH = 0, CRG_CLK_LOW } CRG_CLK_LOW_SOURCE;
Kojto 108:34e6b704fe68 28 typedef enum { CRG_PREDIV1 = 0, CRG_PREDIV2, CRG_PREDIV4, CRG_PREDIV8, CRG_PREDIV16, \
Kojto 108:34e6b704fe68 29 CRG_PREDIV32, CRG_PREDIV64, CRG_PREDIV128 } CRG_PREDIV;
Kojto 108:34e6b704fe68 30 typedef enum { CRG_TIMER0 = 0, CRG_TIMER1 } CRG_TIMER;
Kojto 108:34e6b704fe68 31 typedef enum { CRG_PWM0 = 0, CRG_PWM1, CRG_PWM2, CRG_PWM3, CRG_PWM4, CRG_PWM5, CRG_PWM6, CRG_PWM7 } CRG_PWM;
Kojto 108:34e6b704fe68 32
Kojto 108:34e6b704fe68 33
Kojto 108:34e6b704fe68 34
Kojto 108:34e6b704fe68 35 #define IS_CRG_PLL_SRC(SRC) (((SRC) == CRG_RCLK) || ((SRC) == CRG_OCLK))
Kojto 108:34e6b704fe68 36 #define IS_CRG_FCLK_SRC(SRC) (((SRC) == CRG_MCLK) || ((SRC) == CRG_RCLK) || ((SRC) == CRG_OCLK))
Kojto 108:34e6b704fe68 37
Kojto 108:34e6b704fe68 38 #define CRG_CLK_SRC_DEFAULT(SRC) (((SRC) == CRG_CLK_DIS) || ((SRC) == CRG_MCLK) || \
Kojto 108:34e6b704fe68 39 ((SRC) == CRG_RCLK) || ((SRC) == CRG_OCLK))
Kojto 108:34e6b704fe68 40 #define CRG_CLK_SRC_LOW(SRC) (((SRC) == CRG_CLK_HIGH) || ((SRC) == CRG_CLK_LOW))
Kojto 108:34e6b704fe68 41
Kojto 108:34e6b704fe68 42 #define CRG_CLK_PREDIV_DEFAULT(DIV) (((DIV) == CRG_PREDIV1) || ((DIV) == CRG_PREDIV2) || \
Kojto 108:34e6b704fe68 43 ((DIV) == CRG_PREDIV4) || ((DIV) == CRG_PREDIV8))
Kojto 108:34e6b704fe68 44 #define CRG_CLK_PREDIV_ADVANCE(DIV) (((DIV) == CRG_PREDIV1) || ((DIV) == CRG_PREDIV2) || \
Kojto 108:34e6b704fe68 45 ((DIV) == CRG_PREDIV4) || ((DIV) == CRG_PREDIV8) || \
Kojto 108:34e6b704fe68 46 ((DIV) == CRG_PREDIV16) || ((DIV) == CRG_PREDIV32) || \
Kojto 108:34e6b704fe68 47 ((DIV) == CRG_PREDIV64) || ((DIV) == CRG_PREDIV128))
Kojto 108:34e6b704fe68 48
Kojto 108:34e6b704fe68 49
Kojto 108:34e6b704fe68 50 #define IS_CRG_FCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
Kojto 108:34e6b704fe68 51
Kojto 108:34e6b704fe68 52 #define IS_CRG_SSPCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 108:34e6b704fe68 53 #define IS_CRG_SSPCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
Kojto 108:34e6b704fe68 54
Kojto 108:34e6b704fe68 55 #define IS_CRG_ADCCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
Kojto 108:34e6b704fe68 56 #define IS_CRG_ADCCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 108:34e6b704fe68 57
Kojto 108:34e6b704fe68 58
Kojto 108:34e6b704fe68 59
Kojto 108:34e6b704fe68 60
Kojto 108:34e6b704fe68 61
Kojto 108:34e6b704fe68 62 #define IS_CRG_TIMERCLK_NUM(NUM) (((NUM) == CRG_TIMER0) || ((NUM) == CRG_TIMER1))
Kojto 108:34e6b704fe68 63 #define IS_CRG_TIMERCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 108:34e6b704fe68 64 #define IS_CRG_TIMERCLK_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
Kojto 108:34e6b704fe68 65
Kojto 108:34e6b704fe68 66 #define CRG_SET_TIMERCLK_SSR(NUM,VALUE) \
Kojto 108:34e6b704fe68 67 (*((volatile uint32_t *)(CRG->TIMER0CLK_SSR) + (0x10ul * NUM)) = VALUE)
Kojto 108:34e6b704fe68 68 #define CRG_SET_TIMERCLK_PREDIV(NUM,VALUE) \
Kojto 108:34e6b704fe68 69 (*((volatile uint32_t *)(CRG->TIMER0CLK_PVSR) + (0x10ul * NUM)) = VALUE)
Kojto 108:34e6b704fe68 70 //#define CRG_SET_TIMERCLK_SSR(num,value) CRG->TIMER##num##CLK_SSR = value
Kojto 108:34e6b704fe68 71 //#define CRG_SET_TIMERCLK_PREDIV(num,value) CRG->TIMER##num##CLK_PVSR = value
Kojto 108:34e6b704fe68 72
Kojto 108:34e6b704fe68 73
Kojto 108:34e6b704fe68 74 #define IS_CRG_PWMCLK_NUM(NUM) (((NUM) == CRG_PWM0) || ((NUM) == CRG_PWM1) || \
Kojto 108:34e6b704fe68 75 ((NUM) == CRG_PWM2) || ((NUM) == CRG_PWM3) || \
Kojto 108:34e6b704fe68 76 ((NUM) == CRG_PWM4) || ((NUM) == CRG_PWM5) || \
Kojto 108:34e6b704fe68 77 ((NUM) == CRG_PWM6) || ((NUM) == CRG_PWM7) )
Kojto 108:34e6b704fe68 78 #define IS_CRG_PWMCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 108:34e6b704fe68 79 #define IS_CRG_PWMCLK_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
Kojto 108:34e6b704fe68 80
Kojto 108:34e6b704fe68 81 #define CRG_SET_PWMCLK_SSR(NUM,VALUE) \
Kojto 108:34e6b704fe68 82 (*((volatile uint32_t *)(CRG->PWM0CLK_SSR) + (0x10ul * NUM)) = VALUE)
Kojto 108:34e6b704fe68 83 #define CRG_SET_PWMCLK_PREDIV(NUM,VALUE) \
Kojto 108:34e6b704fe68 84 (*((volatile uint32_t *)(CRG->PWM0CLK_PVSR) + (0x10ul * NUM)) = VALUE)
Kojto 108:34e6b704fe68 85 //#define CRG_SET_PWMCLK_SSR(num,value) CRG->PWM##num##CLK_SSR = value
Kojto 108:34e6b704fe68 86 //#define CRG_SET_PWMCLK_PREDIV(num,value) CRG->PWM##num##CLK_PVSR = value
Kojto 108:34e6b704fe68 87
Kojto 108:34e6b704fe68 88 #define IS_CRG_RTC_HS_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 108:34e6b704fe68 89 #define IS_CRG_RTC_HS_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
Kojto 108:34e6b704fe68 90 #define IS_CRG_RTC_LOW_SRC(SRC) CRG_CLK_SRC_LOW(SRC)
Kojto 108:34e6b704fe68 91
Kojto 108:34e6b704fe68 92 #define IS_CRG_WDOGCLK_HS_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 108:34e6b704fe68 93 #define IS_CRG_WDOGCLK_HS_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
Kojto 108:34e6b704fe68 94 #define IS_CRG_WDOGCLK_LOW_SRC(SRC) CRG_CLK_SRC_LOW(SRC)
Kojto 108:34e6b704fe68 95
Kojto 108:34e6b704fe68 96 #define IS_CRG_UARTCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
Kojto 108:34e6b704fe68 97 #define IS_CRG_UARTCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
Kojto 108:34e6b704fe68 98
Kojto 108:34e6b704fe68 99 #define IS_CRG_MONCLK_SSR(value) (((value) >= 0x00ul) || ((value) <= 0x13ul))
Kojto 108:34e6b704fe68 100
Kojto 108:34e6b704fe68 101 void CRG_DeInit(void);
Kojto 108:34e6b704fe68 102 void CRG_OSC_PowerDownEnable (FunctionalState NewState);
Kojto 108:34e6b704fe68 103 void CRG_PLL_PowerDownEnable (FunctionalState NewState);
Kojto 108:34e6b704fe68 104 void CRG_PLL_OutputEnable (FunctionalState NewState);
Kojto 108:34e6b704fe68 105 void CRG_PLL_BypassEnable (FunctionalState NewState);
Kojto 108:34e6b704fe68 106 void CRG_PLL_InputFrequencySelect (CRG_CLK_SOURCE src);
Kojto 108:34e6b704fe68 107
Kojto 108:34e6b704fe68 108 void CRG_FCLK_SourceSelect (CRG_CLK_SOURCE src);
Kojto 108:34e6b704fe68 109 void CRG_FCLK_SetPrescale (CRG_PREDIV prediv);
Kojto 108:34e6b704fe68 110
Kojto 108:34e6b704fe68 111 void CRG_SSPCLK_SourceSelect (CRG_CLK_SOURCE src);
Kojto 108:34e6b704fe68 112 void CRG_SSPCLK_SetPrescale (CRG_PREDIV prediv);
Kojto 108:34e6b704fe68 113
Kojto 108:34e6b704fe68 114 void CRG_ADCCLK_SourceSelect (CRG_CLK_SOURCE src);
Kojto 108:34e6b704fe68 115 void CRG_ADCCLK_SetPrescale (CRG_PREDIV prediv);
Kojto 108:34e6b704fe68 116
Kojto 108:34e6b704fe68 117 void CRG_TIMERCLK_SourceSelect (CRG_TIMER num, CRG_CLK_SOURCE src);
Kojto 108:34e6b704fe68 118 void CRG_TIMERCLK_SetPrescale (CRG_TIMER num, CRG_PREDIV prediv);
Kojto 108:34e6b704fe68 119
Kojto 108:34e6b704fe68 120 void CRG_PWMCLK_SourceSelect (CRG_PWM num, CRG_CLK_SOURCE src);
Kojto 108:34e6b704fe68 121 void CRG_PWMCLK_SetPrescale (CRG_PWM num, CRG_PREDIV prediv);
Kojto 108:34e6b704fe68 122
Kojto 108:34e6b704fe68 123 void CRG_RTC_HS_SourceSelect (CRG_CLK_SOURCE src);
Kojto 108:34e6b704fe68 124 void CRG_RTC_HS_SetPrescale (CRG_PREDIV prediv);
Kojto 108:34e6b704fe68 125 void CRG_RTC_SourceSelect (CRG_CLK_LOW_SOURCE src);
Kojto 108:34e6b704fe68 126
Kojto 108:34e6b704fe68 127 void CRG_WDOGCLK_HS_SourceSelect (CRG_CLK_SOURCE src);
Kojto 108:34e6b704fe68 128 void CRG_WDOGCLK_HS_SetPrescale (CRG_PREDIV prediv);
Kojto 108:34e6b704fe68 129 void CRG_WDOGCLK_SourceSelect (CRG_CLK_LOW_SOURCE src);
Kojto 108:34e6b704fe68 130
Kojto 108:34e6b704fe68 131 void CRG_UARTCLK_SourceSelect (CRG_CLK_SOURCE src);
Kojto 108:34e6b704fe68 132 void CRG_UARTCLK_SetPrescale (CRG_PREDIV prediv);
Kojto 108:34e6b704fe68 133
Kojto 108:34e6b704fe68 134 void CRG_MII_Enable (FunctionalState rx_clk, FunctionalState tx_clk);
Kojto 108:34e6b704fe68 135
Kojto 108:34e6b704fe68 136 void CRG_SetMonitoringClock (uint32_t value);
Kojto 108:34e6b704fe68 137 uint32_t CRG_GetMonitoringClock (void);
Kojto 108:34e6b704fe68 138
Kojto 108:34e6b704fe68 139
Kojto 108:34e6b704fe68 140 #ifdef __cplusplus
Kojto 108:34e6b704fe68 141 }
Kojto 108:34e6b704fe68 142 #endif
Kojto 108:34e6b704fe68 143
Kojto 108:34e6b704fe68 144 #endif
Kojto 108:34e6b704fe68 145