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TARGET_VK_RZ_A1H/TOOLCHAIN_GCC_ARM/cmsis_iccarm.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 2 * @file cmsis_iccarm.h
AnnaBridge 171:3a7713b1edbc 3 * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file
AnnaBridge 171:3a7713b1edbc 4 * @version V5.0.6
AnnaBridge 171:3a7713b1edbc 5 * @date 02. March 2018
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 7
AnnaBridge 171:3a7713b1edbc 8 //------------------------------------------------------------------------------
AnnaBridge 171:3a7713b1edbc 9 //
AnnaBridge 171:3a7713b1edbc 10 // Copyright (c) 2017-2018 IAR Systems
AnnaBridge 171:3a7713b1edbc 11 //
AnnaBridge 171:3a7713b1edbc 12 // Licensed under the Apache License, Version 2.0 (the "License")
AnnaBridge 171:3a7713b1edbc 13 // you may not use this file except in compliance with the License.
AnnaBridge 171:3a7713b1edbc 14 // You may obtain a copy of the License at
AnnaBridge 171:3a7713b1edbc 15 // http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 171:3a7713b1edbc 16 //
AnnaBridge 171:3a7713b1edbc 17 // Unless required by applicable law or agreed to in writing, software
AnnaBridge 171:3a7713b1edbc 18 // distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 171:3a7713b1edbc 19 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 171:3a7713b1edbc 20 // See the License for the specific language governing permissions and
AnnaBridge 171:3a7713b1edbc 21 // limitations under the License.
AnnaBridge 171:3a7713b1edbc 22 //
AnnaBridge 171:3a7713b1edbc 23 //------------------------------------------------------------------------------
AnnaBridge 171:3a7713b1edbc 24
AnnaBridge 171:3a7713b1edbc 25
AnnaBridge 171:3a7713b1edbc 26 #ifndef __CMSIS_ICCARM_H__
AnnaBridge 171:3a7713b1edbc 27 #define __CMSIS_ICCARM_H__
AnnaBridge 171:3a7713b1edbc 28
AnnaBridge 171:3a7713b1edbc 29 #ifndef __ICCARM__
AnnaBridge 171:3a7713b1edbc 30 #error This file should only be compiled by ICCARM
AnnaBridge 171:3a7713b1edbc 31 #endif
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #pragma system_include
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 #define __IAR_FT _Pragma("inline=forced") __intrinsic
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 #if (__VER__ >= 8000000)
AnnaBridge 171:3a7713b1edbc 38 #define __ICCARM_V8 1
AnnaBridge 171:3a7713b1edbc 39 #else
AnnaBridge 171:3a7713b1edbc 40 #define __ICCARM_V8 0
AnnaBridge 171:3a7713b1edbc 41 #endif
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43 #pragma language=extended
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 #ifndef __ALIGNED
AnnaBridge 171:3a7713b1edbc 46 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 47 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 171:3a7713b1edbc 48 #elif (__VER__ >= 7080000)
AnnaBridge 171:3a7713b1edbc 49 /* Needs IAR language extensions */
AnnaBridge 171:3a7713b1edbc 50 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 171:3a7713b1edbc 51 #else
AnnaBridge 171:3a7713b1edbc 52 #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
AnnaBridge 171:3a7713b1edbc 53 #define __ALIGNED(x)
AnnaBridge 171:3a7713b1edbc 54 #endif
AnnaBridge 171:3a7713b1edbc 55 #endif
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57
AnnaBridge 171:3a7713b1edbc 58 /* Define compiler macros for CPU architecture, used in CMSIS 5.
AnnaBridge 171:3a7713b1edbc 59 */
AnnaBridge 171:3a7713b1edbc 60 #if __ARM_ARCH_7A__
AnnaBridge 171:3a7713b1edbc 61 /* Macro already defined */
AnnaBridge 171:3a7713b1edbc 62 #else
AnnaBridge 171:3a7713b1edbc 63 #if defined(__ARM7A__)
AnnaBridge 171:3a7713b1edbc 64 #define __ARM_ARCH_7A__ 1
AnnaBridge 171:3a7713b1edbc 65 #endif
AnnaBridge 171:3a7713b1edbc 66 #endif
AnnaBridge 171:3a7713b1edbc 67
AnnaBridge 171:3a7713b1edbc 68 #ifndef __ASM
AnnaBridge 171:3a7713b1edbc 69 #define __ASM __asm
AnnaBridge 171:3a7713b1edbc 70 #endif
AnnaBridge 171:3a7713b1edbc 71
AnnaBridge 171:3a7713b1edbc 72 #ifndef __INLINE
AnnaBridge 171:3a7713b1edbc 73 #define __INLINE inline
AnnaBridge 171:3a7713b1edbc 74 #endif
AnnaBridge 171:3a7713b1edbc 75
AnnaBridge 171:3a7713b1edbc 76 #ifndef __NO_RETURN
AnnaBridge 171:3a7713b1edbc 77 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 78 #define __NO_RETURN __attribute__((__noreturn__))
AnnaBridge 171:3a7713b1edbc 79 #else
AnnaBridge 171:3a7713b1edbc 80 #define __NO_RETURN _Pragma("object_attribute=__noreturn")
AnnaBridge 171:3a7713b1edbc 81 #endif
AnnaBridge 171:3a7713b1edbc 82 #endif
AnnaBridge 171:3a7713b1edbc 83
AnnaBridge 171:3a7713b1edbc 84 #ifndef __PACKED
AnnaBridge 171:3a7713b1edbc 85 /* Needs IAR language extensions */
AnnaBridge 171:3a7713b1edbc 86 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 87 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 171:3a7713b1edbc 88 #else
AnnaBridge 171:3a7713b1edbc 89 #define __PACKED __packed
AnnaBridge 171:3a7713b1edbc 90 #endif
AnnaBridge 171:3a7713b1edbc 91 #endif
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93 #ifndef __PACKED_STRUCT
AnnaBridge 171:3a7713b1edbc 94 /* Needs IAR language extensions */
AnnaBridge 171:3a7713b1edbc 95 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 96 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 171:3a7713b1edbc 97 #else
AnnaBridge 171:3a7713b1edbc 98 #define __PACKED_STRUCT __packed struct
AnnaBridge 171:3a7713b1edbc 99 #endif
AnnaBridge 171:3a7713b1edbc 100 #endif
AnnaBridge 171:3a7713b1edbc 101
AnnaBridge 171:3a7713b1edbc 102 #ifndef __PACKED_UNION
AnnaBridge 171:3a7713b1edbc 103 /* Needs IAR language extensions */
AnnaBridge 171:3a7713b1edbc 104 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 105 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
AnnaBridge 171:3a7713b1edbc 106 #else
AnnaBridge 171:3a7713b1edbc 107 #define __PACKED_UNION __packed union
AnnaBridge 171:3a7713b1edbc 108 #endif
AnnaBridge 171:3a7713b1edbc 109 #endif
AnnaBridge 171:3a7713b1edbc 110
AnnaBridge 171:3a7713b1edbc 111 #ifndef __RESTRICT
AnnaBridge 171:3a7713b1edbc 112 #define __RESTRICT restrict
AnnaBridge 171:3a7713b1edbc 113 #endif
AnnaBridge 171:3a7713b1edbc 114
AnnaBridge 171:3a7713b1edbc 115 #ifndef __STATIC_INLINE
AnnaBridge 171:3a7713b1edbc 116 #define __STATIC_INLINE static inline
AnnaBridge 171:3a7713b1edbc 117 #endif
AnnaBridge 171:3a7713b1edbc 118
AnnaBridge 171:3a7713b1edbc 119 #ifndef __FORCEINLINE
AnnaBridge 171:3a7713b1edbc 120 #define __FORCEINLINE _Pragma("inline=forced")
AnnaBridge 171:3a7713b1edbc 121 #endif
AnnaBridge 171:3a7713b1edbc 122
AnnaBridge 171:3a7713b1edbc 123 #ifndef __STATIC_FORCEINLINE
AnnaBridge 171:3a7713b1edbc 124 #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE
AnnaBridge 171:3a7713b1edbc 125 #endif
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 #ifndef CMSIS_DEPRECATED
AnnaBridge 171:3a7713b1edbc 128 #define CMSIS_DEPRECATED __attribute__((deprecated))
AnnaBridge 171:3a7713b1edbc 129 #endif
AnnaBridge 171:3a7713b1edbc 130
AnnaBridge 171:3a7713b1edbc 131 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 171:3a7713b1edbc 132 #pragma language=save
AnnaBridge 171:3a7713b1edbc 133 #pragma language=extended
AnnaBridge 171:3a7713b1edbc 134 __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
AnnaBridge 171:3a7713b1edbc 135 {
AnnaBridge 171:3a7713b1edbc 136 return *(__packed uint16_t*)(ptr);
AnnaBridge 171:3a7713b1edbc 137 }
AnnaBridge 171:3a7713b1edbc 138 #pragma language=restore
AnnaBridge 171:3a7713b1edbc 139 #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
AnnaBridge 171:3a7713b1edbc 140 #endif
AnnaBridge 171:3a7713b1edbc 141
AnnaBridge 171:3a7713b1edbc 142
AnnaBridge 171:3a7713b1edbc 143 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 171:3a7713b1edbc 144 #pragma language=save
AnnaBridge 171:3a7713b1edbc 145 #pragma language=extended
AnnaBridge 171:3a7713b1edbc 146 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
AnnaBridge 171:3a7713b1edbc 147 {
AnnaBridge 171:3a7713b1edbc 148 *(__packed uint16_t*)(ptr) = val;;
AnnaBridge 171:3a7713b1edbc 149 }
AnnaBridge 171:3a7713b1edbc 150 #pragma language=restore
AnnaBridge 171:3a7713b1edbc 151 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
AnnaBridge 171:3a7713b1edbc 152 #endif
AnnaBridge 171:3a7713b1edbc 153
AnnaBridge 171:3a7713b1edbc 154 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 171:3a7713b1edbc 155 #pragma language=save
AnnaBridge 171:3a7713b1edbc 156 #pragma language=extended
AnnaBridge 171:3a7713b1edbc 157 __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
AnnaBridge 171:3a7713b1edbc 158 {
AnnaBridge 171:3a7713b1edbc 159 return *(__packed uint32_t*)(ptr);
AnnaBridge 171:3a7713b1edbc 160 }
AnnaBridge 171:3a7713b1edbc 161 #pragma language=restore
AnnaBridge 171:3a7713b1edbc 162 #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
AnnaBridge 171:3a7713b1edbc 163 #endif
AnnaBridge 171:3a7713b1edbc 164
AnnaBridge 171:3a7713b1edbc 165 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 171:3a7713b1edbc 166 #pragma language=save
AnnaBridge 171:3a7713b1edbc 167 #pragma language=extended
AnnaBridge 171:3a7713b1edbc 168 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
AnnaBridge 171:3a7713b1edbc 169 {
AnnaBridge 171:3a7713b1edbc 170 *(__packed uint32_t*)(ptr) = val;;
AnnaBridge 171:3a7713b1edbc 171 }
AnnaBridge 171:3a7713b1edbc 172 #pragma language=restore
AnnaBridge 171:3a7713b1edbc 173 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
AnnaBridge 171:3a7713b1edbc 174 #endif
AnnaBridge 171:3a7713b1edbc 175
AnnaBridge 171:3a7713b1edbc 176 #if 0
AnnaBridge 171:3a7713b1edbc 177 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 171:3a7713b1edbc 178 #pragma language=save
AnnaBridge 171:3a7713b1edbc 179 #pragma language=extended
AnnaBridge 171:3a7713b1edbc 180 __packed struct __iar_u32 { uint32_t v; };
AnnaBridge 171:3a7713b1edbc 181 #pragma language=restore
AnnaBridge 171:3a7713b1edbc 182 #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
AnnaBridge 171:3a7713b1edbc 183 #endif
AnnaBridge 171:3a7713b1edbc 184 #endif
AnnaBridge 171:3a7713b1edbc 185
AnnaBridge 171:3a7713b1edbc 186 #ifndef __USED
AnnaBridge 171:3a7713b1edbc 187 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 188 #define __USED __attribute__((used))
AnnaBridge 171:3a7713b1edbc 189 #else
AnnaBridge 171:3a7713b1edbc 190 #define __USED _Pragma("__root")
AnnaBridge 171:3a7713b1edbc 191 #endif
AnnaBridge 171:3a7713b1edbc 192 #endif
AnnaBridge 171:3a7713b1edbc 193
AnnaBridge 171:3a7713b1edbc 194 #ifndef __WEAK
AnnaBridge 171:3a7713b1edbc 195 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 196 #define __WEAK __attribute__((weak))
AnnaBridge 171:3a7713b1edbc 197 #else
AnnaBridge 171:3a7713b1edbc 198 #define __WEAK _Pragma("__weak")
AnnaBridge 171:3a7713b1edbc 199 #endif
AnnaBridge 171:3a7713b1edbc 200 #endif
AnnaBridge 171:3a7713b1edbc 201
AnnaBridge 171:3a7713b1edbc 202
AnnaBridge 171:3a7713b1edbc 203 #ifndef __ICCARM_INTRINSICS_VERSION__
AnnaBridge 171:3a7713b1edbc 204 #define __ICCARM_INTRINSICS_VERSION__ 0
AnnaBridge 171:3a7713b1edbc 205 #endif
AnnaBridge 171:3a7713b1edbc 206
AnnaBridge 171:3a7713b1edbc 207 #if __ICCARM_INTRINSICS_VERSION__ == 2
AnnaBridge 171:3a7713b1edbc 208
AnnaBridge 171:3a7713b1edbc 209 #if defined(__CLZ)
AnnaBridge 171:3a7713b1edbc 210 #undef __CLZ
AnnaBridge 171:3a7713b1edbc 211 #endif
AnnaBridge 171:3a7713b1edbc 212 #if defined(__REVSH)
AnnaBridge 171:3a7713b1edbc 213 #undef __REVSH
AnnaBridge 171:3a7713b1edbc 214 #endif
AnnaBridge 171:3a7713b1edbc 215 #if defined(__RBIT)
AnnaBridge 171:3a7713b1edbc 216 #undef __RBIT
AnnaBridge 171:3a7713b1edbc 217 #endif
AnnaBridge 171:3a7713b1edbc 218 #if defined(__SSAT)
AnnaBridge 171:3a7713b1edbc 219 #undef __SSAT
AnnaBridge 171:3a7713b1edbc 220 #endif
AnnaBridge 171:3a7713b1edbc 221 #if defined(__USAT)
AnnaBridge 171:3a7713b1edbc 222 #undef __USAT
AnnaBridge 171:3a7713b1edbc 223 #endif
AnnaBridge 171:3a7713b1edbc 224
AnnaBridge 171:3a7713b1edbc 225 #include "iccarm_builtin.h"
AnnaBridge 171:3a7713b1edbc 226
AnnaBridge 171:3a7713b1edbc 227 #define __enable_irq __iar_builtin_enable_interrupt
AnnaBridge 171:3a7713b1edbc 228 #define __disable_irq __iar_builtin_disable_interrupt
AnnaBridge 171:3a7713b1edbc 229 #define __enable_fault_irq __iar_builtin_enable_fiq
AnnaBridge 171:3a7713b1edbc 230 #define __disable_fault_irq __iar_builtin_disable_fiq
AnnaBridge 171:3a7713b1edbc 231 #define __arm_rsr __iar_builtin_rsr
AnnaBridge 171:3a7713b1edbc 232 #define __arm_wsr __iar_builtin_wsr
AnnaBridge 171:3a7713b1edbc 233
AnnaBridge 171:3a7713b1edbc 234 #if __FPU_PRESENT
AnnaBridge 171:3a7713b1edbc 235 #define __get_FPSCR() (__arm_rsr("FPSCR"))
AnnaBridge 171:3a7713b1edbc 236 #else
AnnaBridge 171:3a7713b1edbc 237 #define __get_FPSCR() ( 0 )
AnnaBridge 171:3a7713b1edbc 238 #endif
AnnaBridge 171:3a7713b1edbc 239
AnnaBridge 171:3a7713b1edbc 240 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", VALUE))
AnnaBridge 171:3a7713b1edbc 241
AnnaBridge 171:3a7713b1edbc 242 #define __get_CPSR() (__arm_rsr("CPSR"))
AnnaBridge 171:3a7713b1edbc 243 #define __get_mode() (__get_CPSR() & 0x1FU)
AnnaBridge 171:3a7713b1edbc 244
AnnaBridge 171:3a7713b1edbc 245 #define __set_CPSR(VALUE) (__arm_wsr("CPSR", (VALUE)))
AnnaBridge 171:3a7713b1edbc 246 #define __set_mode(VALUE) (__arm_wsr("CPSR_c", (VALUE)))
AnnaBridge 171:3a7713b1edbc 247
AnnaBridge 171:3a7713b1edbc 248
AnnaBridge 171:3a7713b1edbc 249 #define __get_FPEXC() (__arm_rsr("FPEXC"))
AnnaBridge 171:3a7713b1edbc 250 #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", VALUE))
AnnaBridge 171:3a7713b1edbc 251
AnnaBridge 171:3a7713b1edbc 252 #define __get_CP(cp, op1, RT, CRn, CRm, op2) \
AnnaBridge 171:3a7713b1edbc 253 ((RT) = __arm_rsr("p" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2))
AnnaBridge 171:3a7713b1edbc 254
AnnaBridge 171:3a7713b1edbc 255 #define __set_CP(cp, op1, RT, CRn, CRm, op2) \
AnnaBridge 171:3a7713b1edbc 256 (__arm_wsr("p" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2, (RT)))
AnnaBridge 171:3a7713b1edbc 257
AnnaBridge 171:3a7713b1edbc 258 #define __get_CP64(cp, op1, Rt, CRm) \
AnnaBridge 171:3a7713b1edbc 259 __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" )
AnnaBridge 171:3a7713b1edbc 260
AnnaBridge 171:3a7713b1edbc 261 #define __set_CP64(cp, op1, Rt, CRm) \
AnnaBridge 171:3a7713b1edbc 262 __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" )
AnnaBridge 171:3a7713b1edbc 263
AnnaBridge 171:3a7713b1edbc 264 #include "cmsis_cp15.h"
AnnaBridge 171:3a7713b1edbc 265
AnnaBridge 171:3a7713b1edbc 266 #define __NOP __iar_builtin_no_operation
AnnaBridge 171:3a7713b1edbc 267
AnnaBridge 171:3a7713b1edbc 268 #define __CLZ __iar_builtin_CLZ
AnnaBridge 171:3a7713b1edbc 269 #define __CLREX __iar_builtin_CLREX
AnnaBridge 171:3a7713b1edbc 270
AnnaBridge 171:3a7713b1edbc 271 #define __DMB __iar_builtin_DMB
AnnaBridge 171:3a7713b1edbc 272 #define __DSB __iar_builtin_DSB
AnnaBridge 171:3a7713b1edbc 273 #define __ISB __iar_builtin_ISB
AnnaBridge 171:3a7713b1edbc 274
AnnaBridge 171:3a7713b1edbc 275 #define __LDREXB __iar_builtin_LDREXB
AnnaBridge 171:3a7713b1edbc 276 #define __LDREXH __iar_builtin_LDREXH
AnnaBridge 171:3a7713b1edbc 277 #define __LDREXW __iar_builtin_LDREX
AnnaBridge 171:3a7713b1edbc 278
AnnaBridge 171:3a7713b1edbc 279 #define __RBIT __iar_builtin_RBIT
AnnaBridge 171:3a7713b1edbc 280 #define __REV __iar_builtin_REV
AnnaBridge 171:3a7713b1edbc 281 #define __REV16 __iar_builtin_REV16
AnnaBridge 171:3a7713b1edbc 282
AnnaBridge 171:3a7713b1edbc 283 __IAR_FT int16_t __REVSH(int16_t val)
AnnaBridge 171:3a7713b1edbc 284 {
AnnaBridge 171:3a7713b1edbc 285 return (int16_t) __iar_builtin_REVSH(val);
AnnaBridge 171:3a7713b1edbc 286 }
AnnaBridge 171:3a7713b1edbc 287
AnnaBridge 171:3a7713b1edbc 288 #define __ROR __iar_builtin_ROR
AnnaBridge 171:3a7713b1edbc 289 #define __RRX __iar_builtin_RRX
AnnaBridge 171:3a7713b1edbc 290
AnnaBridge 171:3a7713b1edbc 291 #define __SEV __iar_builtin_SEV
AnnaBridge 171:3a7713b1edbc 292
AnnaBridge 171:3a7713b1edbc 293 #define __SSAT __iar_builtin_SSAT
AnnaBridge 171:3a7713b1edbc 294
AnnaBridge 171:3a7713b1edbc 295 #define __STREXB __iar_builtin_STREXB
AnnaBridge 171:3a7713b1edbc 296 #define __STREXH __iar_builtin_STREXH
AnnaBridge 171:3a7713b1edbc 297 #define __STREXW __iar_builtin_STREX
AnnaBridge 171:3a7713b1edbc 298
AnnaBridge 171:3a7713b1edbc 299 #define __USAT __iar_builtin_USAT
AnnaBridge 171:3a7713b1edbc 300
AnnaBridge 171:3a7713b1edbc 301 #define __WFE __iar_builtin_WFE
AnnaBridge 171:3a7713b1edbc 302 #define __WFI __iar_builtin_WFI
AnnaBridge 171:3a7713b1edbc 303
AnnaBridge 171:3a7713b1edbc 304 #define __SADD8 __iar_builtin_SADD8
AnnaBridge 171:3a7713b1edbc 305 #define __QADD8 __iar_builtin_QADD8
AnnaBridge 171:3a7713b1edbc 306 #define __SHADD8 __iar_builtin_SHADD8
AnnaBridge 171:3a7713b1edbc 307 #define __UADD8 __iar_builtin_UADD8
AnnaBridge 171:3a7713b1edbc 308 #define __UQADD8 __iar_builtin_UQADD8
AnnaBridge 171:3a7713b1edbc 309 #define __UHADD8 __iar_builtin_UHADD8
AnnaBridge 171:3a7713b1edbc 310 #define __SSUB8 __iar_builtin_SSUB8
AnnaBridge 171:3a7713b1edbc 311 #define __QSUB8 __iar_builtin_QSUB8
AnnaBridge 171:3a7713b1edbc 312 #define __SHSUB8 __iar_builtin_SHSUB8
AnnaBridge 171:3a7713b1edbc 313 #define __USUB8 __iar_builtin_USUB8
AnnaBridge 171:3a7713b1edbc 314 #define __UQSUB8 __iar_builtin_UQSUB8
AnnaBridge 171:3a7713b1edbc 315 #define __UHSUB8 __iar_builtin_UHSUB8
AnnaBridge 171:3a7713b1edbc 316 #define __SADD16 __iar_builtin_SADD16
AnnaBridge 171:3a7713b1edbc 317 #define __QADD16 __iar_builtin_QADD16
AnnaBridge 171:3a7713b1edbc 318 #define __SHADD16 __iar_builtin_SHADD16
AnnaBridge 171:3a7713b1edbc 319 #define __UADD16 __iar_builtin_UADD16
AnnaBridge 171:3a7713b1edbc 320 #define __UQADD16 __iar_builtin_UQADD16
AnnaBridge 171:3a7713b1edbc 321 #define __UHADD16 __iar_builtin_UHADD16
AnnaBridge 171:3a7713b1edbc 322 #define __SSUB16 __iar_builtin_SSUB16
AnnaBridge 171:3a7713b1edbc 323 #define __QSUB16 __iar_builtin_QSUB16
AnnaBridge 171:3a7713b1edbc 324 #define __SHSUB16 __iar_builtin_SHSUB16
AnnaBridge 171:3a7713b1edbc 325 #define __USUB16 __iar_builtin_USUB16
AnnaBridge 171:3a7713b1edbc 326 #define __UQSUB16 __iar_builtin_UQSUB16
AnnaBridge 171:3a7713b1edbc 327 #define __UHSUB16 __iar_builtin_UHSUB16
AnnaBridge 171:3a7713b1edbc 328 #define __SASX __iar_builtin_SASX
AnnaBridge 171:3a7713b1edbc 329 #define __QASX __iar_builtin_QASX
AnnaBridge 171:3a7713b1edbc 330 #define __SHASX __iar_builtin_SHASX
AnnaBridge 171:3a7713b1edbc 331 #define __UASX __iar_builtin_UASX
AnnaBridge 171:3a7713b1edbc 332 #define __UQASX __iar_builtin_UQASX
AnnaBridge 171:3a7713b1edbc 333 #define __UHASX __iar_builtin_UHASX
AnnaBridge 171:3a7713b1edbc 334 #define __SSAX __iar_builtin_SSAX
AnnaBridge 171:3a7713b1edbc 335 #define __QSAX __iar_builtin_QSAX
AnnaBridge 171:3a7713b1edbc 336 #define __SHSAX __iar_builtin_SHSAX
AnnaBridge 171:3a7713b1edbc 337 #define __USAX __iar_builtin_USAX
AnnaBridge 171:3a7713b1edbc 338 #define __UQSAX __iar_builtin_UQSAX
AnnaBridge 171:3a7713b1edbc 339 #define __UHSAX __iar_builtin_UHSAX
AnnaBridge 171:3a7713b1edbc 340 #define __USAD8 __iar_builtin_USAD8
AnnaBridge 171:3a7713b1edbc 341 #define __USADA8 __iar_builtin_USADA8
AnnaBridge 171:3a7713b1edbc 342 #define __SSAT16 __iar_builtin_SSAT16
AnnaBridge 171:3a7713b1edbc 343 #define __USAT16 __iar_builtin_USAT16
AnnaBridge 171:3a7713b1edbc 344 #define __UXTB16 __iar_builtin_UXTB16
AnnaBridge 171:3a7713b1edbc 345 #define __UXTAB16 __iar_builtin_UXTAB16
AnnaBridge 171:3a7713b1edbc 346 #define __SXTB16 __iar_builtin_SXTB16
AnnaBridge 171:3a7713b1edbc 347 #define __SXTAB16 __iar_builtin_SXTAB16
AnnaBridge 171:3a7713b1edbc 348 #define __SMUAD __iar_builtin_SMUAD
AnnaBridge 171:3a7713b1edbc 349 #define __SMUADX __iar_builtin_SMUADX
AnnaBridge 171:3a7713b1edbc 350 #define __SMMLA __iar_builtin_SMMLA
AnnaBridge 171:3a7713b1edbc 351 #define __SMLAD __iar_builtin_SMLAD
AnnaBridge 171:3a7713b1edbc 352 #define __SMLADX __iar_builtin_SMLADX
AnnaBridge 171:3a7713b1edbc 353 #define __SMLALD __iar_builtin_SMLALD
AnnaBridge 171:3a7713b1edbc 354 #define __SMLALDX __iar_builtin_SMLALDX
AnnaBridge 171:3a7713b1edbc 355 #define __SMUSD __iar_builtin_SMUSD
AnnaBridge 171:3a7713b1edbc 356 #define __SMUSDX __iar_builtin_SMUSDX
AnnaBridge 171:3a7713b1edbc 357 #define __SMLSD __iar_builtin_SMLSD
AnnaBridge 171:3a7713b1edbc 358 #define __SMLSDX __iar_builtin_SMLSDX
AnnaBridge 171:3a7713b1edbc 359 #define __SMLSLD __iar_builtin_SMLSLD
AnnaBridge 171:3a7713b1edbc 360 #define __SMLSLDX __iar_builtin_SMLSLDX
AnnaBridge 171:3a7713b1edbc 361 #define __SEL __iar_builtin_SEL
AnnaBridge 171:3a7713b1edbc 362 #define __QADD __iar_builtin_QADD
AnnaBridge 171:3a7713b1edbc 363 #define __QSUB __iar_builtin_QSUB
AnnaBridge 171:3a7713b1edbc 364 #define __PKHBT __iar_builtin_PKHBT
AnnaBridge 171:3a7713b1edbc 365 #define __PKHTB __iar_builtin_PKHTB
AnnaBridge 171:3a7713b1edbc 366
AnnaBridge 171:3a7713b1edbc 367 #else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
AnnaBridge 171:3a7713b1edbc 368
AnnaBridge 171:3a7713b1edbc 369 #if !__FPU_PRESENT
AnnaBridge 171:3a7713b1edbc 370 #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
AnnaBridge 171:3a7713b1edbc 371 #endif
AnnaBridge 171:3a7713b1edbc 372
AnnaBridge 171:3a7713b1edbc 373 #ifdef __INTRINSICS_INCLUDED
AnnaBridge 171:3a7713b1edbc 374 #error intrinsics.h is already included previously!
AnnaBridge 171:3a7713b1edbc 375 #endif
AnnaBridge 171:3a7713b1edbc 376
AnnaBridge 171:3a7713b1edbc 377 #include <intrinsics.h>
AnnaBridge 171:3a7713b1edbc 378
AnnaBridge 171:3a7713b1edbc 379 #if !__FPU_PRESENT
AnnaBridge 171:3a7713b1edbc 380 #define __get_FPSCR() (0)
AnnaBridge 171:3a7713b1edbc 381 #endif
AnnaBridge 171:3a7713b1edbc 382
AnnaBridge 171:3a7713b1edbc 383 #pragma diag_suppress=Pe940
AnnaBridge 171:3a7713b1edbc 384 #pragma diag_suppress=Pe177
AnnaBridge 171:3a7713b1edbc 385
AnnaBridge 171:3a7713b1edbc 386 #define __enable_irq __enable_interrupt
AnnaBridge 171:3a7713b1edbc 387 #define __disable_irq __disable_interrupt
AnnaBridge 171:3a7713b1edbc 388 #define __enable_fault_irq __enable_fiq
AnnaBridge 171:3a7713b1edbc 389 #define __disable_fault_irq __disable_fiq
AnnaBridge 171:3a7713b1edbc 390 #define __NOP __no_operation
AnnaBridge 171:3a7713b1edbc 391
AnnaBridge 171:3a7713b1edbc 392 #define __get_xPSR __get_PSR
AnnaBridge 171:3a7713b1edbc 393
AnnaBridge 171:3a7713b1edbc 394 __IAR_FT void __set_mode(uint32_t mode)
AnnaBridge 171:3a7713b1edbc 395 {
AnnaBridge 171:3a7713b1edbc 396 __ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory");
AnnaBridge 171:3a7713b1edbc 397 }
AnnaBridge 171:3a7713b1edbc 398
AnnaBridge 171:3a7713b1edbc 399 __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
AnnaBridge 171:3a7713b1edbc 400 {
AnnaBridge 171:3a7713b1edbc 401 return __LDREX((unsigned long *)ptr);
AnnaBridge 171:3a7713b1edbc 402 }
AnnaBridge 171:3a7713b1edbc 403
AnnaBridge 171:3a7713b1edbc 404 __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
AnnaBridge 171:3a7713b1edbc 405 {
AnnaBridge 171:3a7713b1edbc 406 return __STREX(value, (unsigned long *)ptr);
AnnaBridge 171:3a7713b1edbc 407 }
AnnaBridge 171:3a7713b1edbc 408
AnnaBridge 171:3a7713b1edbc 409
AnnaBridge 171:3a7713b1edbc 410 __IAR_FT uint32_t __RRX(uint32_t value)
AnnaBridge 171:3a7713b1edbc 411 {
AnnaBridge 171:3a7713b1edbc 412 uint32_t result;
AnnaBridge 171:3a7713b1edbc 413 __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
AnnaBridge 171:3a7713b1edbc 414 return(result);
AnnaBridge 171:3a7713b1edbc 415 }
AnnaBridge 171:3a7713b1edbc 416
AnnaBridge 171:3a7713b1edbc 417
AnnaBridge 171:3a7713b1edbc 418 __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 171:3a7713b1edbc 419 {
AnnaBridge 171:3a7713b1edbc 420 return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
AnnaBridge 171:3a7713b1edbc 421 }
AnnaBridge 171:3a7713b1edbc 422
AnnaBridge 171:3a7713b1edbc 423 __IAR_FT uint32_t __get_FPEXC(void)
AnnaBridge 171:3a7713b1edbc 424 {
AnnaBridge 171:3a7713b1edbc 425 #if (__FPU_PRESENT == 1)
AnnaBridge 171:3a7713b1edbc 426 uint32_t result;
AnnaBridge 171:3a7713b1edbc 427 __ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory");
AnnaBridge 171:3a7713b1edbc 428 return(result);
AnnaBridge 171:3a7713b1edbc 429 #else
AnnaBridge 171:3a7713b1edbc 430 return(0);
AnnaBridge 171:3a7713b1edbc 431 #endif
AnnaBridge 171:3a7713b1edbc 432 }
AnnaBridge 171:3a7713b1edbc 433
AnnaBridge 171:3a7713b1edbc 434 __IAR_FT void __set_FPEXC(uint32_t fpexc)
AnnaBridge 171:3a7713b1edbc 435 {
AnnaBridge 171:3a7713b1edbc 436 #if (__FPU_PRESENT == 1)
AnnaBridge 171:3a7713b1edbc 437 __ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
AnnaBridge 171:3a7713b1edbc 438 #endif
AnnaBridge 171:3a7713b1edbc 439 }
AnnaBridge 171:3a7713b1edbc 440
AnnaBridge 171:3a7713b1edbc 441
AnnaBridge 171:3a7713b1edbc 442 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) \
AnnaBridge 171:3a7713b1edbc 443 __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
AnnaBridge 171:3a7713b1edbc 444 #define __set_CP(cp, op1, Rt, CRn, CRm, op2) \
AnnaBridge 171:3a7713b1edbc 445 __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
AnnaBridge 171:3a7713b1edbc 446 #define __get_CP64(cp, op1, Rt, CRm) \
AnnaBridge 171:3a7713b1edbc 447 __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" )
AnnaBridge 171:3a7713b1edbc 448 #define __set_CP64(cp, op1, Rt, CRm) \
AnnaBridge 171:3a7713b1edbc 449 __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" )
AnnaBridge 171:3a7713b1edbc 450
AnnaBridge 171:3a7713b1edbc 451 #include "cmsis_cp15.h"
AnnaBridge 171:3a7713b1edbc 452
AnnaBridge 171:3a7713b1edbc 453 #endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
AnnaBridge 171:3a7713b1edbc 454
AnnaBridge 171:3a7713b1edbc 455 #define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
AnnaBridge 171:3a7713b1edbc 456
AnnaBridge 171:3a7713b1edbc 457
AnnaBridge 171:3a7713b1edbc 458 __IAR_FT uint32_t __get_SP_usr(void)
AnnaBridge 171:3a7713b1edbc 459 {
AnnaBridge 171:3a7713b1edbc 460 uint32_t cpsr;
AnnaBridge 171:3a7713b1edbc 461 uint32_t result;
AnnaBridge 171:3a7713b1edbc 462 __ASM volatile(
AnnaBridge 171:3a7713b1edbc 463 "MRS %0, cpsr \n"
AnnaBridge 171:3a7713b1edbc 464 "CPS #0x1F \n" // no effect in USR mode
AnnaBridge 171:3a7713b1edbc 465 "MOV %1, sp \n"
AnnaBridge 171:3a7713b1edbc 466 "MSR cpsr_c, %2 \n" // no effect in USR mode
AnnaBridge 171:3a7713b1edbc 467 "ISB" : "=r"(cpsr), "=r"(result) : "r"(cpsr) : "memory"
AnnaBridge 171:3a7713b1edbc 468 );
AnnaBridge 171:3a7713b1edbc 469 return result;
AnnaBridge 171:3a7713b1edbc 470 }
AnnaBridge 171:3a7713b1edbc 471
AnnaBridge 171:3a7713b1edbc 472 __IAR_FT void __set_SP_usr(uint32_t topOfProcStack)
AnnaBridge 171:3a7713b1edbc 473 {
AnnaBridge 171:3a7713b1edbc 474 uint32_t cpsr;
AnnaBridge 171:3a7713b1edbc 475 __ASM volatile(
AnnaBridge 171:3a7713b1edbc 476 "MRS %0, cpsr \n"
AnnaBridge 171:3a7713b1edbc 477 "CPS #0x1F \n" // no effect in USR mode
AnnaBridge 171:3a7713b1edbc 478 "MOV sp, %1 \n"
AnnaBridge 171:3a7713b1edbc 479 "MSR cpsr_c, %2 \n" // no effect in USR mode
AnnaBridge 171:3a7713b1edbc 480 "ISB" : "=r"(cpsr) : "r" (topOfProcStack), "r"(cpsr) : "memory"
AnnaBridge 171:3a7713b1edbc 481 );
AnnaBridge 171:3a7713b1edbc 482 }
AnnaBridge 171:3a7713b1edbc 483
AnnaBridge 171:3a7713b1edbc 484 #define __get_mode() (__get_CPSR() & 0x1FU)
AnnaBridge 171:3a7713b1edbc 485
AnnaBridge 171:3a7713b1edbc 486 __STATIC_INLINE
AnnaBridge 171:3a7713b1edbc 487 void __FPU_Enable(void)
AnnaBridge 171:3a7713b1edbc 488 {
AnnaBridge 171:3a7713b1edbc 489 __ASM volatile(
AnnaBridge 171:3a7713b1edbc 490 //Permit access to VFP/NEON, registers by modifying CPACR
AnnaBridge 171:3a7713b1edbc 491 " MRC p15,0,R1,c1,c0,2 \n"
AnnaBridge 171:3a7713b1edbc 492 " ORR R1,R1,#0x00F00000 \n"
AnnaBridge 171:3a7713b1edbc 493 " MCR p15,0,R1,c1,c0,2 \n"
AnnaBridge 171:3a7713b1edbc 494
AnnaBridge 171:3a7713b1edbc 495 //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted
AnnaBridge 171:3a7713b1edbc 496 " ISB \n"
AnnaBridge 171:3a7713b1edbc 497
AnnaBridge 171:3a7713b1edbc 498 //Enable VFP/NEON
AnnaBridge 171:3a7713b1edbc 499 " VMRS R1,FPEXC \n"
AnnaBridge 171:3a7713b1edbc 500 " ORR R1,R1,#0x40000000 \n"
AnnaBridge 171:3a7713b1edbc 501 " VMSR FPEXC,R1 \n"
AnnaBridge 171:3a7713b1edbc 502
AnnaBridge 171:3a7713b1edbc 503 //Initialise VFP/NEON registers to 0
AnnaBridge 171:3a7713b1edbc 504 " MOV R2,#0 \n"
AnnaBridge 171:3a7713b1edbc 505
AnnaBridge 171:3a7713b1edbc 506 //Initialise D16 registers to 0
AnnaBridge 171:3a7713b1edbc 507 " VMOV D0, R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 508 " VMOV D1, R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 509 " VMOV D2, R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 510 " VMOV D3, R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 511 " VMOV D4, R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 512 " VMOV D5, R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 513 " VMOV D6, R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 514 " VMOV D7, R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 515 " VMOV D8, R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 516 " VMOV D9, R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 517 " VMOV D10,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 518 " VMOV D11,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 519 " VMOV D12,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 520 " VMOV D13,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 521 " VMOV D14,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 522 " VMOV D15,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 523
AnnaBridge 171:3a7713b1edbc 524 #ifdef __ARM_ADVANCED_SIMD__
AnnaBridge 171:3a7713b1edbc 525 //Initialise D32 registers to 0
AnnaBridge 171:3a7713b1edbc 526 " VMOV D16,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 527 " VMOV D17,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 528 " VMOV D18,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 529 " VMOV D19,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 530 " VMOV D20,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 531 " VMOV D21,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 532 " VMOV D22,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 533 " VMOV D23,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 534 " VMOV D24,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 535 " VMOV D25,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 536 " VMOV D26,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 537 " VMOV D27,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 538 " VMOV D28,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 539 " VMOV D29,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 540 " VMOV D30,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 541 " VMOV D31,R2,R2 \n"
AnnaBridge 171:3a7713b1edbc 542 #endif
AnnaBridge 171:3a7713b1edbc 543
AnnaBridge 171:3a7713b1edbc 544 //Initialise FPSCR to a known state
AnnaBridge 171:3a7713b1edbc 545 " VMRS R2,FPSCR \n"
AnnaBridge 171:3a7713b1edbc 546 " MOV32 R3,#0x00086060 \n" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero.
AnnaBridge 171:3a7713b1edbc 547 " AND R2,R2,R3 \n"
AnnaBridge 171:3a7713b1edbc 548 " VMSR FPSCR,R2 \n");
AnnaBridge 171:3a7713b1edbc 549 }
AnnaBridge 171:3a7713b1edbc 550
AnnaBridge 171:3a7713b1edbc 551
AnnaBridge 171:3a7713b1edbc 552
AnnaBridge 171:3a7713b1edbc 553 #undef __IAR_FT
AnnaBridge 171:3a7713b1edbc 554 #undef __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 555
AnnaBridge 171:3a7713b1edbc 556 #pragma diag_default=Pe940
AnnaBridge 171:3a7713b1edbc 557 #pragma diag_default=Pe177
AnnaBridge 171:3a7713b1edbc 558
AnnaBridge 171:3a7713b1edbc 559 #endif /* __CMSIS_ICCARM_H__ */