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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_VK_RZ_A1H/TOOLCHAIN_ARM_STD/VKRZA1H.sct@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 165:d1b4690b3f8b 1 #! armcc -E -I"../"
AnnaBridge 165:d1b4690b3f8b 2 ;**************************************************
AnnaBridge 165:d1b4690b3f8b 3 ; Copyright (c) 2017 ARM Ltd. All rights reserved.
AnnaBridge 165:d1b4690b3f8b 4 ;**************************************************
AnnaBridge 165:d1b4690b3f8b 5
AnnaBridge 165:d1b4690b3f8b 6 ; Scatter-file for RTX Example on Versatile Express
AnnaBridge 165:d1b4690b3f8b 7
AnnaBridge 165:d1b4690b3f8b 8 ; This scatter-file places application code, data, stack and heap at suitable addresses in the memory map.
AnnaBridge 165:d1b4690b3f8b 9
AnnaBridge 165:d1b4690b3f8b 10 #include "mbed_config.h"
AnnaBridge 171:3a7713b1edbc 11
AnnaBridge 171:3a7713b1edbc 12 #ifdef RUN_FROM_SDRAM
AnnaBridge 171:3a7713b1edbc 13 #define __ROM_BASE 0x08000000
AnnaBridge 171:3a7713b1edbc 14 #define __ROM_SIZE 0x02000000
AnnaBridge 171:3a7713b1edbc 15 #define __VECTOR_BASE 0x08000000
AnnaBridge 171:3a7713b1edbc 16 #define __DATA_BASE +0 ALIGN 0x100000
AnnaBridge 171:3a7713b1edbc 17 #elif defined (RUN_FROM_SRAM)
AnnaBridge 171:3a7713b1edbc 18 #define __ROM_BASE 0x200A0000
AnnaBridge 171:3a7713b1edbc 19 #define __ROM_SIZE 0x00960000
AnnaBridge 171:3a7713b1edbc 20 #define __VECTOR_BASE 0x200A0000
AnnaBridge 171:3a7713b1edbc 21 #define __DATA_BASE +0 ALIGN 0x100000 NOCOMPRESS
AnnaBridge 171:3a7713b1edbc 22 #else
AnnaBridge 171:3a7713b1edbc 23 #define __ROM_BASE 0x18020000
AnnaBridge 171:3a7713b1edbc 24 #define __ROM_SIZE 0x01FE0000
AnnaBridge 171:3a7713b1edbc 25 #define __VECTOR_BASE 0x18020000
AnnaBridge 171:3a7713b1edbc 26 #define __DATA_BASE 0x20020000
AnnaBridge 171:3a7713b1edbc 27 #endif
AnnaBridge 171:3a7713b1edbc 28
AnnaBridge 171:3a7713b1edbc 29 #ifdef RUN_FROM_SDRAM
AnnaBridge 171:3a7713b1edbc 30 #define __RAM_BASE 0x08000000
AnnaBridge 171:3a7713b1edbc 31 #define __RAM_SIZE 0x02000000
AnnaBridge 171:3a7713b1edbc 32 #define __NC_RAM_SIZE 0x00200000
AnnaBridge 171:3a7713b1edbc 33 #else
AnnaBridge 171:3a7713b1edbc 34 #define __RAM_BASE 0x20000000
AnnaBridge 171:3a7713b1edbc 35 #define __RAM_SIZE 0x00A00000
AnnaBridge 171:3a7713b1edbc 36 #define __NC_RAM_SIZE 0x00100000
AnnaBridge 171:3a7713b1edbc 37 #endif
AnnaBridge 171:3a7713b1edbc 38 #define __NM_RAM_SIZE (__RAM_SIZE - __NC_RAM_SIZE)
AnnaBridge 171:3a7713b1edbc 39 #define __DATA_NC_BASE (__RAM_BASE + __NM_RAM_SIZE + 0x40000000)
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 #define __UND_STACK_SIZE 0x00000100
AnnaBridge 171:3a7713b1edbc 42 #define __SVC_STACK_SIZE 0x00008000
AnnaBridge 171:3a7713b1edbc 43 #define __ABT_STACK_SIZE 0x00000100
AnnaBridge 171:3a7713b1edbc 44 #define __FIQ_STACK_SIZE 0x00000100
AnnaBridge 171:3a7713b1edbc 45 #define __IRQ_STACK_SIZE 0x0000F000
AnnaBridge 171:3a7713b1edbc 46 #define __STACK_SIZE (__UND_STACK_SIZE + __SVC_STACK_SIZE + __ABT_STACK_SIZE + __FIQ_STACK_SIZE + __IRQ_STACK_SIZE)
AnnaBridge 171:3a7713b1edbc 47
AnnaBridge 171:3a7713b1edbc 48 #define __TTB_BASE 0x20000000
AnnaBridge 171:3a7713b1edbc 49 #define __TTB_SIZE 0x00004000
AnnaBridge 165:d1b4690b3f8b 50
AnnaBridge 165:d1b4690b3f8b 51 LOAD_TTB __TTB_BASE __TTB_SIZE ; Page 0 of On-Chip Data Retention RAM
AnnaBridge 165:d1b4690b3f8b 52 {
AnnaBridge 165:d1b4690b3f8b 53 TTB +0 EMPTY 0x4000
AnnaBridge 165:d1b4690b3f8b 54 { } ; Level-1 Translation Table for MMU
AnnaBridge 165:d1b4690b3f8b 55 }
AnnaBridge 165:d1b4690b3f8b 56
AnnaBridge 170:e95d10626187 57 LR_IROM1 __ROM_BASE __ROM_SIZE ; load region size_region
AnnaBridge 165:d1b4690b3f8b 58 {
AnnaBridge 165:d1b4690b3f8b 59 VECTORS __VECTOR_BASE FIXED
AnnaBridge 165:d1b4690b3f8b 60 {
AnnaBridge 165:d1b4690b3f8b 61 * (RESET, +FIRST) ; Vector table and other startup code
AnnaBridge 165:d1b4690b3f8b 62 * (InRoot$$Sections) ; All (library) code that must be in a root region
AnnaBridge 165:d1b4690b3f8b 63 * (+RO-CODE) ; Application RO code (.text)
AnnaBridge 165:d1b4690b3f8b 64 }
AnnaBridge 165:d1b4690b3f8b 65
AnnaBridge 165:d1b4690b3f8b 66 RO_DATA +0
AnnaBridge 165:d1b4690b3f8b 67 { * (+RO-DATA) } ; Application RO data (.constdata)
AnnaBridge 165:d1b4690b3f8b 68
AnnaBridge 165:d1b4690b3f8b 69 RW_DATA __DATA_BASE
AnnaBridge 165:d1b4690b3f8b 70 { * (+RW) } ; Application RW data (.data)
AnnaBridge 165:d1b4690b3f8b 71
AnnaBridge 165:d1b4690b3f8b 72 RW_IRAM1 +0 ALIGN 0x10
AnnaBridge 165:d1b4690b3f8b 73 { * (+ZI) } ; Application ZI data (.bss)
AnnaBridge 165:d1b4690b3f8b 74
AnnaBridge 165:d1b4690b3f8b 75 ARM_LIB_HEAP +0
AnnaBridge 165:d1b4690b3f8b 76 { * (HEAP) } ; Application heap area (HEAP)
AnnaBridge 165:d1b4690b3f8b 77
AnnaBridge 165:d1b4690b3f8b 78 ARM_LIB_STACK (__RAM_BASE + __NM_RAM_SIZE) EMPTY -__STACK_SIZE ; Stack region growing down
AnnaBridge 165:d1b4690b3f8b 79 { }
AnnaBridge 165:d1b4690b3f8b 80
AnnaBridge 165:d1b4690b3f8b 81 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
AnnaBridge 165:d1b4690b3f8b 82 ; RAM-NC : Internal non-cached RAM region
AnnaBridge 165:d1b4690b3f8b 83 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
AnnaBridge 165:d1b4690b3f8b 84
AnnaBridge 165:d1b4690b3f8b 85 RW_DATA_NC __DATA_NC_BASE __NC_RAM_SIZE
AnnaBridge 165:d1b4690b3f8b 86 { * (NC_DATA) } ; Application RW data Non cached area
AnnaBridge 165:d1b4690b3f8b 87
AnnaBridge 165:d1b4690b3f8b 88 ZI_DATA_NC +0
AnnaBridge 165:d1b4690b3f8b 89 { * (NC_BSS) } ; Application ZI data Non cached area
AnnaBridge 165:d1b4690b3f8b 90 }
AnnaBridge 165:d1b4690b3f8b 91
AnnaBridge 165:d1b4690b3f8b 92 #ifndef RUN_FROM_SDRAM
AnnaBridge 165:d1b4690b3f8b 93 SDRAM 0x08000000 0x02000000 ; 32MB External SDRAM region
AnnaBridge 165:d1b4690b3f8b 94 {
AnnaBridge 165:d1b4690b3f8b 95 }
AnnaBridge 165:d1b4690b3f8b 96 #else
AnnaBridge 165:d1b4690b3f8b 97 SRAM 0x200A0000 0x00960000 ; 9.5MB Internal SRAM region (0.5MB SDCARD Bootloader !!!)
AnnaBridge 165:d1b4690b3f8b 98 {
AnnaBridge 165:d1b4690b3f8b 99 }
AnnaBridge 165:d1b4690b3f8b 100 #endif