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TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/ins_i2s.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 * \file
AnnaBridge 171:3a7713b1edbc 3 *
AnnaBridge 171:3a7713b1edbc 4 * \brief Instance description for I2S
AnnaBridge 171:3a7713b1edbc 5 *
AnnaBridge 171:3a7713b1edbc 6 * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * \asf_license_start
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * \page License
AnnaBridge 171:3a7713b1edbc 11 *
AnnaBridge 171:3a7713b1edbc 12 * Redistribution and use in source and binary forms, with or without
AnnaBridge 171:3a7713b1edbc 13 * modification, are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 17 *
AnnaBridge 171:3a7713b1edbc 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 19 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 20 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * 3. The name of Atmel may not be used to endorse or promote products derived
AnnaBridge 171:3a7713b1edbc 23 * from this software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 24 *
AnnaBridge 171:3a7713b1edbc 25 * 4. This software may only be redistributed and used in connection with an
AnnaBridge 171:3a7713b1edbc 26 * Atmel microcontroller product.
AnnaBridge 171:3a7713b1edbc 27 *
AnnaBridge 171:3a7713b1edbc 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
AnnaBridge 171:3a7713b1edbc 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
AnnaBridge 171:3a7713b1edbc 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
AnnaBridge 171:3a7713b1edbc 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
AnnaBridge 171:3a7713b1edbc 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
AnnaBridge 171:3a7713b1edbc 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
AnnaBridge 171:3a7713b1edbc 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
AnnaBridge 171:3a7713b1edbc 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
AnnaBridge 171:3a7713b1edbc 38 * POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 39 *
AnnaBridge 171:3a7713b1edbc 40 * \asf_license_stop
AnnaBridge 171:3a7713b1edbc 41 *
AnnaBridge 171:3a7713b1edbc 42 */
AnnaBridge 171:3a7713b1edbc 43 /*
AnnaBridge 171:3a7713b1edbc 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
AnnaBridge 171:3a7713b1edbc 45 */
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 #ifndef _SAMD21_I2S_INSTANCE_
AnnaBridge 171:3a7713b1edbc 48 #define _SAMD21_I2S_INSTANCE_
AnnaBridge 171:3a7713b1edbc 49
AnnaBridge 171:3a7713b1edbc 50 /* ========== Register definition for I2S peripheral ========== */
AnnaBridge 171:3a7713b1edbc 51 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
AnnaBridge 171:3a7713b1edbc 52 #define REG_I2S_CTRLA (0x42005000U) /**< \brief (I2S) Control A */
AnnaBridge 171:3a7713b1edbc 53 #define REG_I2S_CLKCTRL0 (0x42005004U) /**< \brief (I2S) Clock Unit 0 Control */
AnnaBridge 171:3a7713b1edbc 54 #define REG_I2S_CLKCTRL1 (0x42005008U) /**< \brief (I2S) Clock Unit 1 Control */
AnnaBridge 171:3a7713b1edbc 55 #define REG_I2S_INTENCLR (0x4200500CU) /**< \brief (I2S) Interrupt Enable Clear */
AnnaBridge 171:3a7713b1edbc 56 #define REG_I2S_INTENSET (0x42005010U) /**< \brief (I2S) Interrupt Enable Set */
AnnaBridge 171:3a7713b1edbc 57 #define REG_I2S_INTFLAG (0x42005014U) /**< \brief (I2S) Interrupt Flag Status and Clear */
AnnaBridge 171:3a7713b1edbc 58 #define REG_I2S_SYNCBUSY (0x42005018U) /**< \brief (I2S) Synchronization Status */
AnnaBridge 171:3a7713b1edbc 59 #define REG_I2S_SERCTRL0 (0x42005020U) /**< \brief (I2S) Serializer 0 Control */
AnnaBridge 171:3a7713b1edbc 60 #define REG_I2S_SERCTRL1 (0x42005024U) /**< \brief (I2S) Serializer 1 Control */
AnnaBridge 171:3a7713b1edbc 61 #define REG_I2S_DATA0 (0x42005030U) /**< \brief (I2S) Data 0 */
AnnaBridge 171:3a7713b1edbc 62 #define REG_I2S_DATA1 (0x42005034U) /**< \brief (I2S) Data 1 */
AnnaBridge 171:3a7713b1edbc 63 #else
AnnaBridge 171:3a7713b1edbc 64 #define REG_I2S_CTRLA (*(RwReg8 *)0x42005000U) /**< \brief (I2S) Control A */
AnnaBridge 171:3a7713b1edbc 65 #define REG_I2S_CLKCTRL0 (*(RwReg *)0x42005004U) /**< \brief (I2S) Clock Unit 0 Control */
AnnaBridge 171:3a7713b1edbc 66 #define REG_I2S_CLKCTRL1 (*(RwReg *)0x42005008U) /**< \brief (I2S) Clock Unit 1 Control */
AnnaBridge 171:3a7713b1edbc 67 #define REG_I2S_INTENCLR (*(RwReg16*)0x4200500CU) /**< \brief (I2S) Interrupt Enable Clear */
AnnaBridge 171:3a7713b1edbc 68 #define REG_I2S_INTENSET (*(RwReg16*)0x42005010U) /**< \brief (I2S) Interrupt Enable Set */
AnnaBridge 171:3a7713b1edbc 69 #define REG_I2S_INTFLAG (*(RwReg16*)0x42005014U) /**< \brief (I2S) Interrupt Flag Status and Clear */
AnnaBridge 171:3a7713b1edbc 70 #define REG_I2S_SYNCBUSY (*(RoReg16*)0x42005018U) /**< \brief (I2S) Synchronization Status */
AnnaBridge 171:3a7713b1edbc 71 #define REG_I2S_SERCTRL0 (*(RwReg *)0x42005020U) /**< \brief (I2S) Serializer 0 Control */
AnnaBridge 171:3a7713b1edbc 72 #define REG_I2S_SERCTRL1 (*(RwReg *)0x42005024U) /**< \brief (I2S) Serializer 1 Control */
AnnaBridge 171:3a7713b1edbc 73 #define REG_I2S_DATA0 (*(RwReg *)0x42005030U) /**< \brief (I2S) Data 0 */
AnnaBridge 171:3a7713b1edbc 74 #define REG_I2S_DATA1 (*(RwReg *)0x42005034U) /**< \brief (I2S) Data 1 */
AnnaBridge 171:3a7713b1edbc 75 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
AnnaBridge 171:3a7713b1edbc 76
AnnaBridge 171:3a7713b1edbc 77 /* ========== Instance parameters for I2S peripheral ========== */
AnnaBridge 171:3a7713b1edbc 78 #define I2S_CLK_NUM 2 // Number of clock units
AnnaBridge 171:3a7713b1edbc 79 #define I2S_DMAC_ID_RX_0 41
AnnaBridge 171:3a7713b1edbc 80 #define I2S_DMAC_ID_RX_1 42
AnnaBridge 171:3a7713b1edbc 81 #define I2S_DMAC_ID_RX_LSB 41
AnnaBridge 171:3a7713b1edbc 82 #define I2S_DMAC_ID_RX_MSB 42
AnnaBridge 171:3a7713b1edbc 83 #define I2S_DMAC_ID_RX_SIZE 2
AnnaBridge 171:3a7713b1edbc 84 #define I2S_DMAC_ID_TX_0 43
AnnaBridge 171:3a7713b1edbc 85 #define I2S_DMAC_ID_TX_1 44
AnnaBridge 171:3a7713b1edbc 86 #define I2S_DMAC_ID_TX_LSB 43
AnnaBridge 171:3a7713b1edbc 87 #define I2S_DMAC_ID_TX_MSB 44
AnnaBridge 171:3a7713b1edbc 88 #define I2S_DMAC_ID_TX_SIZE 2
AnnaBridge 171:3a7713b1edbc 89 #define I2S_GCLK_ID_0 35
AnnaBridge 171:3a7713b1edbc 90 #define I2S_GCLK_ID_1 36
AnnaBridge 171:3a7713b1edbc 91 #define I2S_GCLK_ID_LSB 35
AnnaBridge 171:3a7713b1edbc 92 #define I2S_GCLK_ID_MSB 36
AnnaBridge 171:3a7713b1edbc 93 #define I2S_GCLK_ID_SIZE 2
AnnaBridge 171:3a7713b1edbc 94 #define I2S_MAX_SLOTS 8 // Max number of data slots in frame
AnnaBridge 171:3a7713b1edbc 95 #define I2S_SER_NUM 2 // Number of serializers
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 #endif /* _SAMD21_I2S_INSTANCE_ */