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TARGET_SAKURAIO_EVB_01/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_pwr_ex.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 163:e59c8e839560 1 /**
AnnaBridge 163:e59c8e839560 2 ******************************************************************************
AnnaBridge 163:e59c8e839560 3 * @file stm32f4xx_hal_pwr_ex.h
AnnaBridge 163:e59c8e839560 4 * @author MCD Application Team
AnnaBridge 163:e59c8e839560 5 * @brief Header file of PWR HAL Extension module.
AnnaBridge 163:e59c8e839560 6 ******************************************************************************
AnnaBridge 163:e59c8e839560 7 * @attention
AnnaBridge 163:e59c8e839560 8 *
AnnaBridge 163:e59c8e839560 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 163:e59c8e839560 10 *
AnnaBridge 163:e59c8e839560 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 163:e59c8e839560 12 * are permitted provided that the following conditions are met:
AnnaBridge 163:e59c8e839560 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 163:e59c8e839560 14 * this list of conditions and the following disclaimer.
AnnaBridge 163:e59c8e839560 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 163:e59c8e839560 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 163:e59c8e839560 17 * and/or other materials provided with the distribution.
AnnaBridge 163:e59c8e839560 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 163:e59c8e839560 19 * may be used to endorse or promote products derived from this software
AnnaBridge 163:e59c8e839560 20 * without specific prior written permission.
AnnaBridge 163:e59c8e839560 21 *
AnnaBridge 163:e59c8e839560 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 163:e59c8e839560 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 163:e59c8e839560 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 163:e59c8e839560 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 163:e59c8e839560 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 163:e59c8e839560 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 163:e59c8e839560 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 163:e59c8e839560 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 163:e59c8e839560 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 163:e59c8e839560 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 163:e59c8e839560 32 *
AnnaBridge 163:e59c8e839560 33 ******************************************************************************
AnnaBridge 163:e59c8e839560 34 */
AnnaBridge 163:e59c8e839560 35
AnnaBridge 163:e59c8e839560 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 163:e59c8e839560 37 #ifndef __STM32F4xx_HAL_PWR_EX_H
AnnaBridge 163:e59c8e839560 38 #define __STM32F4xx_HAL_PWR_EX_H
AnnaBridge 163:e59c8e839560 39
AnnaBridge 163:e59c8e839560 40 #ifdef __cplusplus
AnnaBridge 163:e59c8e839560 41 extern "C" {
AnnaBridge 163:e59c8e839560 42 #endif
AnnaBridge 163:e59c8e839560 43
AnnaBridge 163:e59c8e839560 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 45 #include "stm32f4xx_hal_def.h"
AnnaBridge 163:e59c8e839560 46
AnnaBridge 163:e59c8e839560 47 /** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge 163:e59c8e839560 48 * @{
AnnaBridge 163:e59c8e839560 49 */
AnnaBridge 163:e59c8e839560 50
AnnaBridge 163:e59c8e839560 51 /** @addtogroup PWREx
AnnaBridge 163:e59c8e839560 52 * @{
AnnaBridge 163:e59c8e839560 53 */
AnnaBridge 163:e59c8e839560 54
AnnaBridge 163:e59c8e839560 55 /* Exported types ------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 56 /* Exported constants --------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 57 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
AnnaBridge 163:e59c8e839560 58 * @{
AnnaBridge 163:e59c8e839560 59 */
AnnaBridge 163:e59c8e839560 60 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
AnnaBridge 163:e59c8e839560 61 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 163:e59c8e839560 62
AnnaBridge 163:e59c8e839560 63 /** @defgroup PWREx_Regulator_state_in_UnderDrive_mode PWREx Regulator state in UnderDrive mode
AnnaBridge 163:e59c8e839560 64 * @{
AnnaBridge 163:e59c8e839560 65 */
AnnaBridge 163:e59c8e839560 66 #define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR_MRUDS
AnnaBridge 163:e59c8e839560 67 #define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
AnnaBridge 163:e59c8e839560 68 /**
AnnaBridge 163:e59c8e839560 69 * @}
AnnaBridge 163:e59c8e839560 70 */
AnnaBridge 163:e59c8e839560 71
AnnaBridge 163:e59c8e839560 72 /** @defgroup PWREx_Over_Under_Drive_Flag PWREx Over Under Drive Flag
AnnaBridge 163:e59c8e839560 73 * @{
AnnaBridge 163:e59c8e839560 74 */
AnnaBridge 163:e59c8e839560 75 #define PWR_FLAG_ODRDY PWR_CSR_ODRDY
AnnaBridge 163:e59c8e839560 76 #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
AnnaBridge 163:e59c8e839560 77 #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
AnnaBridge 163:e59c8e839560 78 /**
AnnaBridge 163:e59c8e839560 79 * @}
AnnaBridge 163:e59c8e839560 80 */
AnnaBridge 163:e59c8e839560 81 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
AnnaBridge 163:e59c8e839560 82
AnnaBridge 163:e59c8e839560 83 /** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale
AnnaBridge 163:e59c8e839560 84 * @{
AnnaBridge 163:e59c8e839560 85 */
AnnaBridge 163:e59c8e839560 86 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
AnnaBridge 163:e59c8e839560 87 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */
AnnaBridge 163:e59c8e839560 88 #define PWR_REGULATOR_VOLTAGE_SCALE2 0x00000000U /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */
AnnaBridge 163:e59c8e839560 89 #else
AnnaBridge 163:e59c8e839560 90 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
AnnaBridge 163:e59c8e839560 91 180 MHz by activating the over-drive mode. */
AnnaBridge 163:e59c8e839560 92 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
AnnaBridge 163:e59c8e839560 93 168 MHz by activating the over-drive mode. */
AnnaBridge 163:e59c8e839560 94 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
AnnaBridge 163:e59c8e839560 95 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
AnnaBridge 163:e59c8e839560 96 /**
AnnaBridge 163:e59c8e839560 97 * @}
AnnaBridge 163:e59c8e839560 98 */
AnnaBridge 163:e59c8e839560 99 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
AnnaBridge 163:e59c8e839560 100 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
AnnaBridge 163:e59c8e839560 101 /** @defgroup PWREx_WakeUp_Pins PWREx WakeUp Pins
AnnaBridge 163:e59c8e839560 102 * @{
AnnaBridge 163:e59c8e839560 103 */
AnnaBridge 163:e59c8e839560 104 #define PWR_WAKEUP_PIN2 0x00000080U
AnnaBridge 163:e59c8e839560 105 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
AnnaBridge 163:e59c8e839560 106 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
AnnaBridge 163:e59c8e839560 107 #define PWR_WAKEUP_PIN3 0x00000040U
AnnaBridge 163:e59c8e839560 108 #endif /* STM32F410xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Zx || STM32F412Vx || \
AnnaBridge 163:e59c8e839560 109 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
AnnaBridge 163:e59c8e839560 110 /**
AnnaBridge 163:e59c8e839560 111 * @}
AnnaBridge 163:e59c8e839560 112 */
AnnaBridge 163:e59c8e839560 113 #endif /* STM32F410xx || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
AnnaBridge 163:e59c8e839560 114 STM32F413xx || STM32F423xx */
AnnaBridge 163:e59c8e839560 115
AnnaBridge 163:e59c8e839560 116 /**
AnnaBridge 163:e59c8e839560 117 * @}
AnnaBridge 163:e59c8e839560 118 */
AnnaBridge 163:e59c8e839560 119
AnnaBridge 163:e59c8e839560 120 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 121 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
AnnaBridge 163:e59c8e839560 122 * @{
AnnaBridge 163:e59c8e839560 123 */
AnnaBridge 163:e59c8e839560 124
AnnaBridge 163:e59c8e839560 125 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
AnnaBridge 163:e59c8e839560 126 /** @brief macros configure the main internal regulator output voltage.
AnnaBridge 163:e59c8e839560 127 * @param __REGULATOR__ specifies the regulator output voltage to achieve
AnnaBridge 163:e59c8e839560 128 * a tradeoff between performance and power consumption when the device does
AnnaBridge 163:e59c8e839560 129 * not operate at the maximum frequency (refer to the datasheets for more details).
AnnaBridge 163:e59c8e839560 130 * This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 131 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
AnnaBridge 163:e59c8e839560 132 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
AnnaBridge 163:e59c8e839560 133 * @retval None
AnnaBridge 163:e59c8e839560 134 */
AnnaBridge 163:e59c8e839560 135 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
AnnaBridge 163:e59c8e839560 136 __IO uint32_t tmpreg = 0x00U; \
AnnaBridge 163:e59c8e839560 137 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
AnnaBridge 163:e59c8e839560 138 /* Delay after an RCC peripheral clock enabling */ \
AnnaBridge 163:e59c8e839560 139 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
AnnaBridge 163:e59c8e839560 140 UNUSED(tmpreg); \
AnnaBridge 163:e59c8e839560 141 } while(0U)
AnnaBridge 163:e59c8e839560 142 #else
AnnaBridge 163:e59c8e839560 143 /** @brief macros configure the main internal regulator output voltage.
AnnaBridge 163:e59c8e839560 144 * @param __REGULATOR__ specifies the regulator output voltage to achieve
AnnaBridge 163:e59c8e839560 145 * a tradeoff between performance and power consumption when the device does
AnnaBridge 163:e59c8e839560 146 * not operate at the maximum frequency (refer to the datasheets for more details).
AnnaBridge 163:e59c8e839560 147 * This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 148 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
AnnaBridge 163:e59c8e839560 149 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
AnnaBridge 163:e59c8e839560 150 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
AnnaBridge 163:e59c8e839560 151 * @retval None
AnnaBridge 163:e59c8e839560 152 */
AnnaBridge 163:e59c8e839560 153 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
AnnaBridge 163:e59c8e839560 154 __IO uint32_t tmpreg = 0x00U; \
AnnaBridge 163:e59c8e839560 155 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
AnnaBridge 163:e59c8e839560 156 /* Delay after an RCC peripheral clock enabling */ \
AnnaBridge 163:e59c8e839560 157 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
AnnaBridge 163:e59c8e839560 158 UNUSED(tmpreg); \
AnnaBridge 163:e59c8e839560 159 } while(0U)
AnnaBridge 163:e59c8e839560 160 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
AnnaBridge 163:e59c8e839560 161
AnnaBridge 163:e59c8e839560 162 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
AnnaBridge 163:e59c8e839560 163 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 163:e59c8e839560 164 /** @brief Macros to enable or disable the Over drive mode.
AnnaBridge 163:e59c8e839560 165 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
AnnaBridge 163:e59c8e839560 166 */
AnnaBridge 163:e59c8e839560 167 #define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
AnnaBridge 163:e59c8e839560 168 #define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
AnnaBridge 163:e59c8e839560 169
AnnaBridge 163:e59c8e839560 170 /** @brief Macros to enable or disable the Over drive switching.
AnnaBridge 163:e59c8e839560 171 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
AnnaBridge 163:e59c8e839560 172 */
AnnaBridge 163:e59c8e839560 173 #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
AnnaBridge 163:e59c8e839560 174 #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
AnnaBridge 163:e59c8e839560 175
AnnaBridge 163:e59c8e839560 176 /** @brief Macros to enable or disable the Under drive mode.
AnnaBridge 163:e59c8e839560 177 * @note This mode is enabled only with STOP low power mode.
AnnaBridge 163:e59c8e839560 178 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
AnnaBridge 163:e59c8e839560 179 * mode is only available when the main regulator or the low power regulator
AnnaBridge 163:e59c8e839560 180 * is in low voltage mode.
AnnaBridge 163:e59c8e839560 181 * @note If the Under-drive mode was enabled, it is automatically disabled after
AnnaBridge 163:e59c8e839560 182 * exiting Stop mode.
AnnaBridge 163:e59c8e839560 183 * When the voltage regulator operates in Under-drive mode, an additional
AnnaBridge 163:e59c8e839560 184 * startup delay is induced when waking up from Stop mode.
AnnaBridge 163:e59c8e839560 185 */
AnnaBridge 163:e59c8e839560 186 #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
AnnaBridge 163:e59c8e839560 187 #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
AnnaBridge 163:e59c8e839560 188
AnnaBridge 163:e59c8e839560 189 /** @brief Check PWR flag is set or not.
AnnaBridge 163:e59c8e839560 190 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
AnnaBridge 163:e59c8e839560 191 * @param __FLAG__ specifies the flag to check.
AnnaBridge 163:e59c8e839560 192 * This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 193 * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
AnnaBridge 163:e59c8e839560 194 * is ready
AnnaBridge 163:e59c8e839560 195 * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
AnnaBridge 163:e59c8e839560 196 * switching is ready
AnnaBridge 163:e59c8e839560 197 * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
AnnaBridge 163:e59c8e839560 198 * is enabled in Stop mode
AnnaBridge 163:e59c8e839560 199 * @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge 163:e59c8e839560 200 */
AnnaBridge 163:e59c8e839560 201 #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
AnnaBridge 163:e59c8e839560 202
AnnaBridge 163:e59c8e839560 203 /** @brief Clear the Under-Drive Ready flag.
AnnaBridge 163:e59c8e839560 204 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
AnnaBridge 163:e59c8e839560 205 */
AnnaBridge 163:e59c8e839560 206 #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
AnnaBridge 163:e59c8e839560 207
AnnaBridge 163:e59c8e839560 208 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
AnnaBridge 163:e59c8e839560 209 /**
AnnaBridge 163:e59c8e839560 210 * @}
AnnaBridge 163:e59c8e839560 211 */
AnnaBridge 163:e59c8e839560 212
AnnaBridge 163:e59c8e839560 213 /* Exported functions --------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 214 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
AnnaBridge 163:e59c8e839560 215 * @{
AnnaBridge 163:e59c8e839560 216 */
AnnaBridge 163:e59c8e839560 217
AnnaBridge 163:e59c8e839560 218 /** @addtogroup PWREx_Exported_Functions_Group1
AnnaBridge 163:e59c8e839560 219 * @{
AnnaBridge 163:e59c8e839560 220 */
AnnaBridge 163:e59c8e839560 221 void HAL_PWREx_EnableFlashPowerDown(void);
AnnaBridge 163:e59c8e839560 222 void HAL_PWREx_DisableFlashPowerDown(void);
AnnaBridge 163:e59c8e839560 223 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
AnnaBridge 163:e59c8e839560 224 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
AnnaBridge 163:e59c8e839560 225 uint32_t HAL_PWREx_GetVoltageRange(void);
AnnaBridge 163:e59c8e839560 226 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
AnnaBridge 163:e59c8e839560 227
AnnaBridge 163:e59c8e839560 228 #if defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 163:e59c8e839560 229 void HAL_PWREx_EnableWakeUpPinPolarityRisingEdge(void);
AnnaBridge 163:e59c8e839560 230 void HAL_PWREx_EnableWakeUpPinPolarityFallingEdge(void);
AnnaBridge 163:e59c8e839560 231 #endif /* STM32F469xx || STM32F479xx */
AnnaBridge 163:e59c8e839560 232
AnnaBridge 163:e59c8e839560 233 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F401xC) ||\
AnnaBridge 163:e59c8e839560 234 defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
AnnaBridge 163:e59c8e839560 235 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
AnnaBridge 163:e59c8e839560 236 void HAL_PWREx_EnableMainRegulatorLowVoltage(void);
AnnaBridge 163:e59c8e839560 237 void HAL_PWREx_DisableMainRegulatorLowVoltage(void);
AnnaBridge 163:e59c8e839560 238 void HAL_PWREx_EnableLowRegulatorLowVoltage(void);
AnnaBridge 163:e59c8e839560 239 void HAL_PWREx_DisableLowRegulatorLowVoltage(void);
AnnaBridge 163:e59c8e839560 240 #endif /* STM32F410xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F412Zx || STM32F412Vx ||\
AnnaBridge 163:e59c8e839560 241 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
AnnaBridge 163:e59c8e839560 242
AnnaBridge 163:e59c8e839560 243 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) ||\
AnnaBridge 163:e59c8e839560 244 defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 163:e59c8e839560 245 HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void);
AnnaBridge 163:e59c8e839560 246 HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void);
AnnaBridge 163:e59c8e839560 247 HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
AnnaBridge 163:e59c8e839560 248 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
AnnaBridge 163:e59c8e839560 249
AnnaBridge 163:e59c8e839560 250 /**
AnnaBridge 163:e59c8e839560 251 * @}
AnnaBridge 163:e59c8e839560 252 */
AnnaBridge 163:e59c8e839560 253
AnnaBridge 163:e59c8e839560 254 /**
AnnaBridge 163:e59c8e839560 255 * @}
AnnaBridge 163:e59c8e839560 256 */
AnnaBridge 163:e59c8e839560 257 /* Private types -------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 258 /* Private variables ---------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 259 /* Private constants ---------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 260 /** @defgroup PWREx_Private_Constants PWREx Private Constants
AnnaBridge 163:e59c8e839560 261 * @{
AnnaBridge 163:e59c8e839560 262 */
AnnaBridge 163:e59c8e839560 263
AnnaBridge 163:e59c8e839560 264 /** @defgroup PWREx_register_alias_address PWREx Register alias address
AnnaBridge 163:e59c8e839560 265 * @{
AnnaBridge 163:e59c8e839560 266 */
AnnaBridge 163:e59c8e839560 267 /* ------------- PWR registers bit address in the alias region ---------------*/
AnnaBridge 163:e59c8e839560 268 /* --- CR Register ---*/
AnnaBridge 163:e59c8e839560 269 /* Alias word address of FPDS bit */
AnnaBridge 163:e59c8e839560 270 #define FPDS_BIT_NUMBER PWR_CR_FPDS_Pos
AnnaBridge 163:e59c8e839560 271 #define CR_FPDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (FPDS_BIT_NUMBER * 4U))
AnnaBridge 163:e59c8e839560 272
AnnaBridge 163:e59c8e839560 273 /* Alias word address of ODEN bit */
AnnaBridge 163:e59c8e839560 274 #define ODEN_BIT_NUMBER PWR_CR_ODEN_Pos
AnnaBridge 163:e59c8e839560 275 #define CR_ODEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODEN_BIT_NUMBER * 4U))
AnnaBridge 163:e59c8e839560 276
AnnaBridge 163:e59c8e839560 277 /* Alias word address of ODSWEN bit */
AnnaBridge 163:e59c8e839560 278 #define ODSWEN_BIT_NUMBER PWR_CR_ODSWEN_Pos
AnnaBridge 163:e59c8e839560 279 #define CR_ODSWEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODSWEN_BIT_NUMBER * 4U))
AnnaBridge 163:e59c8e839560 280
AnnaBridge 163:e59c8e839560 281 /* Alias word address of MRLVDS bit */
AnnaBridge 163:e59c8e839560 282 #define MRLVDS_BIT_NUMBER PWR_CR_MRLVDS_Pos
AnnaBridge 163:e59c8e839560 283 #define CR_MRLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (MRLVDS_BIT_NUMBER * 4U))
AnnaBridge 163:e59c8e839560 284
AnnaBridge 163:e59c8e839560 285 /* Alias word address of LPLVDS bit */
AnnaBridge 163:e59c8e839560 286 #define LPLVDS_BIT_NUMBER PWR_CR_LPLVDS_Pos
AnnaBridge 163:e59c8e839560 287 #define CR_LPLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (LPLVDS_BIT_NUMBER * 4U))
AnnaBridge 163:e59c8e839560 288
AnnaBridge 163:e59c8e839560 289 /**
AnnaBridge 163:e59c8e839560 290 * @}
AnnaBridge 163:e59c8e839560 291 */
AnnaBridge 163:e59c8e839560 292
AnnaBridge 163:e59c8e839560 293 /** @defgroup PWREx_CSR_register_alias PWRx CSR Register alias address
AnnaBridge 163:e59c8e839560 294 * @{
AnnaBridge 163:e59c8e839560 295 */
AnnaBridge 163:e59c8e839560 296 /* --- CSR Register ---*/
AnnaBridge 163:e59c8e839560 297 /* Alias word address of BRE bit */
AnnaBridge 163:e59c8e839560 298 #define BRE_BIT_NUMBER PWR_CSR_BRE_Pos
AnnaBridge 163:e59c8e839560 299 #define CSR_BRE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (BRE_BIT_NUMBER * 4U))
AnnaBridge 163:e59c8e839560 300
AnnaBridge 163:e59c8e839560 301 #if defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 163:e59c8e839560 302 /* Alias word address of WUPP bit */
AnnaBridge 163:e59c8e839560 303 #define WUPP_BIT_NUMBER PWR_CSR_WUPP_Pos
AnnaBridge 163:e59c8e839560 304 #define CSR_WUPP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (WUPP_BIT_NUMBER * 4U))
AnnaBridge 163:e59c8e839560 305 #endif /* STM32F469xx || STM32F479xx */
AnnaBridge 163:e59c8e839560 306 /**
AnnaBridge 163:e59c8e839560 307 * @}
AnnaBridge 163:e59c8e839560 308 */
AnnaBridge 163:e59c8e839560 309
AnnaBridge 163:e59c8e839560 310 /**
AnnaBridge 163:e59c8e839560 311 * @}
AnnaBridge 163:e59c8e839560 312 */
AnnaBridge 163:e59c8e839560 313
AnnaBridge 163:e59c8e839560 314 /* Private macros ------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 315 /** @defgroup PWREx_Private_Macros PWREx Private Macros
AnnaBridge 163:e59c8e839560 316 * @{
AnnaBridge 163:e59c8e839560 317 */
AnnaBridge 163:e59c8e839560 318
AnnaBridge 163:e59c8e839560 319 /** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters
AnnaBridge 163:e59c8e839560 320 * @{
AnnaBridge 163:e59c8e839560 321 */
AnnaBridge 163:e59c8e839560 322 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
AnnaBridge 163:e59c8e839560 323 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 163:e59c8e839560 324 #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \
AnnaBridge 163:e59c8e839560 325 ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
AnnaBridge 163:e59c8e839560 326 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
AnnaBridge 163:e59c8e839560 327
AnnaBridge 163:e59c8e839560 328 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
AnnaBridge 163:e59c8e839560 329 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
AnnaBridge 163:e59c8e839560 330 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
AnnaBridge 163:e59c8e839560 331 #else
AnnaBridge 163:e59c8e839560 332 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
AnnaBridge 163:e59c8e839560 333 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
AnnaBridge 163:e59c8e839560 334 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
AnnaBridge 163:e59c8e839560 335 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
AnnaBridge 163:e59c8e839560 336
AnnaBridge 163:e59c8e839560 337 #if defined(STM32F446xx)
AnnaBridge 163:e59c8e839560 338 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2))
AnnaBridge 163:e59c8e839560 339 #elif defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) ||\
AnnaBridge 163:e59c8e839560 340 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
AnnaBridge 163:e59c8e839560 341 defined(STM32F423xx)
AnnaBridge 163:e59c8e839560 342 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2) || \
AnnaBridge 163:e59c8e839560 343 ((PIN) == PWR_WAKEUP_PIN3))
AnnaBridge 163:e59c8e839560 344 #else
AnnaBridge 163:e59c8e839560 345 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
AnnaBridge 163:e59c8e839560 346 #endif /* STM32F446xx */
AnnaBridge 163:e59c8e839560 347 /**
AnnaBridge 163:e59c8e839560 348 * @}
AnnaBridge 163:e59c8e839560 349 */
AnnaBridge 163:e59c8e839560 350
AnnaBridge 163:e59c8e839560 351 /**
AnnaBridge 163:e59c8e839560 352 * @}
AnnaBridge 163:e59c8e839560 353 */
AnnaBridge 163:e59c8e839560 354
AnnaBridge 163:e59c8e839560 355 /**
AnnaBridge 163:e59c8e839560 356 * @}
AnnaBridge 163:e59c8e839560 357 */
AnnaBridge 163:e59c8e839560 358
AnnaBridge 163:e59c8e839560 359 /**
AnnaBridge 163:e59c8e839560 360 * @}
AnnaBridge 163:e59c8e839560 361 */
AnnaBridge 163:e59c8e839560 362
AnnaBridge 163:e59c8e839560 363 #ifdef __cplusplus
AnnaBridge 163:e59c8e839560 364 }
AnnaBridge 163:e59c8e839560 365 #endif
AnnaBridge 163:e59c8e839560 366
AnnaBridge 163:e59c8e839560 367
AnnaBridge 163:e59c8e839560 368 #endif /* __STM32F4xx_HAL_PWR_EX_H */
AnnaBridge 163:e59c8e839560 369
AnnaBridge 163:e59c8e839560 370 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/