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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

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TARGET_RAPIDIOT_K64F/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 #! armcc -E
AnnaBridge 171:3a7713b1edbc 2 /*
AnnaBridge 171:3a7713b1edbc 3 ** ###################################################################
AnnaBridge 171:3a7713b1edbc 4 ** Processors: MK64FN1M0CAJ12
AnnaBridge 171:3a7713b1edbc 5 ** MK64FN1M0VDC12
AnnaBridge 171:3a7713b1edbc 6 ** MK64FN1M0VLL12
AnnaBridge 171:3a7713b1edbc 7 ** MK64FN1M0VLQ12
AnnaBridge 171:3a7713b1edbc 8 ** MK64FN1M0VMD12
AnnaBridge 171:3a7713b1edbc 9 **
AnnaBridge 171:3a7713b1edbc 10 ** Compiler: Keil ARM C/C++ Compiler
AnnaBridge 171:3a7713b1edbc 11 ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
AnnaBridge 171:3a7713b1edbc 12 ** Version: rev. 2.9, 2016-03-21
AnnaBridge 171:3a7713b1edbc 13 ** Build: b160406
AnnaBridge 171:3a7713b1edbc 14 **
AnnaBridge 171:3a7713b1edbc 15 ** Abstract:
AnnaBridge 171:3a7713b1edbc 16 ** Linker file for the Keil ARM C/C++ Compiler
AnnaBridge 171:3a7713b1edbc 17 **
AnnaBridge 171:3a7713b1edbc 18 ** Copyright (c) 2016 Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 19 ** All rights reserved.
AnnaBridge 171:3a7713b1edbc 20 **
AnnaBridge 171:3a7713b1edbc 21 ** Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 22 ** are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 23 **
AnnaBridge 171:3a7713b1edbc 24 ** o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 25 ** of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 26 **
AnnaBridge 171:3a7713b1edbc 27 ** o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 28 ** list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 29 ** other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 30 **
AnnaBridge 171:3a7713b1edbc 31 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 171:3a7713b1edbc 32 ** contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 33 ** software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 34 **
AnnaBridge 171:3a7713b1edbc 35 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 36 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 37 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 38 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 39 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 40 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 41 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 42 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 43 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 44 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 45 **
AnnaBridge 171:3a7713b1edbc 46 ** http: www.freescale.com
AnnaBridge 171:3a7713b1edbc 47 ** mail: support@freescale.com
AnnaBridge 171:3a7713b1edbc 48 **
AnnaBridge 171:3a7713b1edbc 49 ** ###################################################################
AnnaBridge 171:3a7713b1edbc 50 */
AnnaBridge 171:3a7713b1edbc 51 #define __ram_vector_table__ 1
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 #if (defined(__ram_vector_table__))
AnnaBridge 171:3a7713b1edbc 54 #define __ram_vector_table_size__ 0x00000400
AnnaBridge 171:3a7713b1edbc 55 #else
AnnaBridge 171:3a7713b1edbc 56 #define __ram_vector_table_size__ 0x00000000
AnnaBridge 171:3a7713b1edbc 57 #endif
AnnaBridge 171:3a7713b1edbc 58
AnnaBridge 171:3a7713b1edbc 59 #if !defined(MBED_APP_START)
AnnaBridge 171:3a7713b1edbc 60 #define MBED_APP_START 0
AnnaBridge 171:3a7713b1edbc 61 #endif
AnnaBridge 171:3a7713b1edbc 62
AnnaBridge 171:3a7713b1edbc 63 #if !defined(MBED_APP_SIZE)
AnnaBridge 171:3a7713b1edbc 64 #define MBED_APP_SIZE 0x100000
AnnaBridge 171:3a7713b1edbc 65 #endif
AnnaBridge 171:3a7713b1edbc 66
AnnaBridge 172:65be27845400 67 #if !defined(MBED_BOOT_STACK_SIZE)
AnnaBridge 172:65be27845400 68 #define MBED_BOOT_STACK_SIZE 0x400
AnnaBridge 172:65be27845400 69 #endif
AnnaBridge 172:65be27845400 70
AnnaBridge 171:3a7713b1edbc 71 #define m_interrupts_start MBED_APP_START
AnnaBridge 171:3a7713b1edbc 72 #define m_interrupts_size 0x00000400
AnnaBridge 171:3a7713b1edbc 73
AnnaBridge 171:3a7713b1edbc 74 #define m_flash_config_start MBED_APP_START + 0x400
AnnaBridge 171:3a7713b1edbc 75 #define m_flash_config_size 0x00000010
AnnaBridge 171:3a7713b1edbc 76
AnnaBridge 171:3a7713b1edbc 77 #define m_text_start MBED_APP_START + 0x410
AnnaBridge 171:3a7713b1edbc 78 #define m_text_size MBED_APP_SIZE - 0x410
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 #define m_interrupts_ram_start 0x1FFF0000
AnnaBridge 171:3a7713b1edbc 81 #define m_interrupts_ram_size __ram_vector_table_size__
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 172:65be27845400 83 #define m_crash_report_ram_start (m_interrupts_ram_start + m_interrupts_ram_size)
AnnaBridge 172:65be27845400 84 #define m_crash_report_ram_size (0x100)
AnnaBridge 172:65be27845400 85
AnnaBridge 172:65be27845400 86 #define m_data_start (m_crash_report_ram_start + m_crash_report_ram_size)
AnnaBridge 172:65be27845400 87 #define m_data_size (0x00010000 - (m_interrupts_ram_size+m_crash_report_ram_size))
AnnaBridge 171:3a7713b1edbc 88
AnnaBridge 171:3a7713b1edbc 89 #define m_data_2_start 0x20000000
AnnaBridge 171:3a7713b1edbc 90 #define m_data_2_size 0x00030000
AnnaBridge 171:3a7713b1edbc 91
AnnaBridge 171:3a7713b1edbc 92 /* Sizes */
AnnaBridge 171:3a7713b1edbc 93 #if (defined(__stack_size__))
AnnaBridge 171:3a7713b1edbc 94 #define Stack_Size __stack_size__
AnnaBridge 171:3a7713b1edbc 95 #else
AnnaBridge 172:65be27845400 96 #define Stack_Size MBED_BOOT_STACK_SIZE
AnnaBridge 171:3a7713b1edbc 97 #endif
AnnaBridge 171:3a7713b1edbc 98
AnnaBridge 171:3a7713b1edbc 99 #if (defined(__heap_size__))
AnnaBridge 171:3a7713b1edbc 100 #define Heap_Size __heap_size__
AnnaBridge 171:3a7713b1edbc 101 #else
AnnaBridge 171:3a7713b1edbc 102 #define Heap_Size 0x0400
AnnaBridge 171:3a7713b1edbc 103 #endif
AnnaBridge 171:3a7713b1edbc 104
AnnaBridge 171:3a7713b1edbc 105 LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region
AnnaBridge 171:3a7713b1edbc 106 VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
AnnaBridge 171:3a7713b1edbc 107 * (RESET,+FIRST)
AnnaBridge 171:3a7713b1edbc 108 }
AnnaBridge 171:3a7713b1edbc 109 ER_m_flash_config m_flash_config_start FIXED m_flash_config_size { ; load address = execution address
AnnaBridge 171:3a7713b1edbc 110 * (FlashConfig)
AnnaBridge 171:3a7713b1edbc 111 }
AnnaBridge 171:3a7713b1edbc 112 ER_IROM1 m_text_start m_text_size { ; load address = execution address
AnnaBridge 171:3a7713b1edbc 113 * (InRoot$$Sections)
AnnaBridge 171:3a7713b1edbc 114 .ANY (+RO)
AnnaBridge 171:3a7713b1edbc 115 }
AnnaBridge 171:3a7713b1edbc 116
AnnaBridge 171:3a7713b1edbc 117 #if (defined(__ram_vector_table__))
AnnaBridge 171:3a7713b1edbc 118 VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
AnnaBridge 171:3a7713b1edbc 119 }
AnnaBridge 171:3a7713b1edbc 120 #else
AnnaBridge 171:3a7713b1edbc 121 VECTOR_RAM m_interrupts_start EMPTY 0 {
AnnaBridge 171:3a7713b1edbc 122 }
AnnaBridge 171:3a7713b1edbc 123 #endif
AnnaBridge 172:65be27845400 124 RW_m_crash_data m_crash_report_ram_start EMPTY m_crash_report_ram_size { ; RW data
AnnaBridge 172:65be27845400 125 }
AnnaBridge 171:3a7713b1edbc 126 RW_m_data m_data_start m_data_size { ; RW data
AnnaBridge 171:3a7713b1edbc 127 .ANY (+RW +ZI)
AnnaBridge 171:3a7713b1edbc 128 }
AnnaBridge 171:3a7713b1edbc 129 RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
AnnaBridge 171:3a7713b1edbc 130 .ANY (+RW +ZI)
AnnaBridge 171:3a7713b1edbc 131 }
AnnaBridge 171:3a7713b1edbc 132 RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up
AnnaBridge 171:3a7713b1edbc 133 }
AnnaBridge 172:65be27845400 134 ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
AnnaBridge 172:65be27845400 135 }
AnnaBridge 171:3a7713b1edbc 136 }