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TARGET_NUMAKER_PFM_M453/TOOLCHAIN_ARM_MICRO/m451_gpio.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 2 * @file GPIO.h
AnnaBridge 171:3a7713b1edbc 3 * @version V3.00
AnnaBridge 171:3a7713b1edbc 4 * $Revision: 21 $
AnnaBridge 171:3a7713b1edbc 5 * $Date: 15/08/11 10:26a $
AnnaBridge 171:3a7713b1edbc 6 * @brief M451 series GPIO driver header file
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * @note
AnnaBridge 171:3a7713b1edbc 9 * Copyright (C) 2011~2015 Nuvoton Technology Corp. All rights reserved.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 12 #ifndef __GPIO_H__
AnnaBridge 171:3a7713b1edbc 13 #define __GPIO_H__
AnnaBridge 171:3a7713b1edbc 14
AnnaBridge 171:3a7713b1edbc 15
AnnaBridge 171:3a7713b1edbc 16 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 17 extern "C"
AnnaBridge 171:3a7713b1edbc 18 {
AnnaBridge 171:3a7713b1edbc 19 #endif
AnnaBridge 171:3a7713b1edbc 20
AnnaBridge 171:3a7713b1edbc 21 /** @addtogroup Standard_Driver Standard Driver
AnnaBridge 171:3a7713b1edbc 22 @{
AnnaBridge 171:3a7713b1edbc 23 */
AnnaBridge 171:3a7713b1edbc 24
AnnaBridge 171:3a7713b1edbc 25 /** @addtogroup GPIO_Driver GPIO Driver
AnnaBridge 171:3a7713b1edbc 26 @{
AnnaBridge 171:3a7713b1edbc 27 */
AnnaBridge 171:3a7713b1edbc 28
AnnaBridge 171:3a7713b1edbc 29 /** @addtogroup GPIO_EXPORTED_CONSTANTS GPIO Exported Constants
AnnaBridge 171:3a7713b1edbc 30 @{
AnnaBridge 171:3a7713b1edbc 31 */
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33
AnnaBridge 171:3a7713b1edbc 34 #define GPIO_PIN_MAX 16 /*!< Specify Maximum Pins of Each GPIO Port */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 38 /* GPIO_MODE Constant Definitions */
AnnaBridge 171:3a7713b1edbc 39 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 40 #define GPIO_MODE_INPUT 0x0UL /*!< Input Mode */
AnnaBridge 171:3a7713b1edbc 41 #define GPIO_MODE_OUTPUT 0x1UL /*!< Output Mode */
AnnaBridge 171:3a7713b1edbc 42 #define GPIO_MODE_OPEN_DRAIN 0x2UL /*!< Open-Drain Mode */
AnnaBridge 171:3a7713b1edbc 43 #define GPIO_MODE_QUASI 0x3UL /*!< Quasi-bidirectional Mode */
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 47 /* GPIO Interrupt Type Constant Definitions */
AnnaBridge 171:3a7713b1edbc 48 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 49 #define GPIO_INT_RISING 0x00010000UL /*!< Interrupt enable by Input Rising Edge */
AnnaBridge 171:3a7713b1edbc 50 #define GPIO_INT_FALLING 0x00000001UL /*!< Interrupt enable by Input Falling Edge */
AnnaBridge 171:3a7713b1edbc 51 #define GPIO_INT_BOTH_EDGE 0x00010001UL /*!< Interrupt enable by both Rising Edge and Falling Edge */
AnnaBridge 171:3a7713b1edbc 52 #define GPIO_INT_HIGH 0x01010000UL /*!< Interrupt enable by Level-High */
AnnaBridge 171:3a7713b1edbc 53 #define GPIO_INT_LOW 0x01000001UL /*!< Interrupt enable by Level-Level */
AnnaBridge 171:3a7713b1edbc 54
AnnaBridge 171:3a7713b1edbc 55
AnnaBridge 171:3a7713b1edbc 56 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 57 /* GPIO_INTTYPE Constant Definitions */
AnnaBridge 171:3a7713b1edbc 58 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 59 #define GPIO_INTTYPE_EDGE 0UL /*!< GPIO_INTTYPE Setting for Edge Trigger Mode */
AnnaBridge 171:3a7713b1edbc 60 #define GPIO_INTTYPE_LEVEL 1UL /*!< GPIO_INTTYPE Setting for Edge Level Mode */
AnnaBridge 171:3a7713b1edbc 61
AnnaBridge 171:3a7713b1edbc 62
AnnaBridge 171:3a7713b1edbc 63 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 64 /* GPIO_DBCTL Constant Definitions */
AnnaBridge 171:3a7713b1edbc 65 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 66 #define GPIO_DBCTL_ICLK_ON 0x00000020UL /*!< GPIO_DBCTL setting for all IO pins edge detection circuit is always active after reset */
AnnaBridge 171:3a7713b1edbc 67 #define GPIO_DBCTL_ICLK_OFF 0x00000000UL /*!< GPIO_DBCTL setting for edge detection circuit is active only if IO pin corresponding GPIOx_IEN bit is set to 1 */
AnnaBridge 171:3a7713b1edbc 68
AnnaBridge 171:3a7713b1edbc 69 #define GPIO_DBCTL_DBCLKSRC_LIRC 0x00000010UL /*!< GPIO_DBCTL setting for de-bounce counter clock source is the internal 10 kHz */
AnnaBridge 171:3a7713b1edbc 70 #define GPIO_DBCTL_DBCLKSRC_HCLK 0x00000000UL /*!< GPIO_DBCTL setting for de-bounce counter clock source is the HCLK */
AnnaBridge 171:3a7713b1edbc 71
AnnaBridge 171:3a7713b1edbc 72 #define GPIO_DBCTL_DBCLKSEL_1 0x00000000UL /*!< GPIO_DBCTL setting for sampling cycle = 1 clocks */
AnnaBridge 171:3a7713b1edbc 73 #define GPIO_DBCTL_DBCLKSEL_2 0x00000001UL /*!< GPIO_DBCTL setting for sampling cycle = 2 clocks */
AnnaBridge 171:3a7713b1edbc 74 #define GPIO_DBCTL_DBCLKSEL_4 0x00000002UL /*!< GPIO_DBCTL setting for sampling cycle = 4 clocks */
AnnaBridge 171:3a7713b1edbc 75 #define GPIO_DBCTL_DBCLKSEL_8 0x00000003UL /*!< GPIO_DBCTL setting for sampling cycle = 8 clocks */
AnnaBridge 171:3a7713b1edbc 76 #define GPIO_DBCTL_DBCLKSEL_16 0x00000004UL /*!< GPIO_DBCTL setting for sampling cycle = 16 clocks */
AnnaBridge 171:3a7713b1edbc 77 #define GPIO_DBCTL_DBCLKSEL_32 0x00000005UL /*!< GPIO_DBCTL setting for sampling cycle = 32 clocks */
AnnaBridge 171:3a7713b1edbc 78 #define GPIO_DBCTL_DBCLKSEL_64 0x00000006UL /*!< GPIO_DBCTL setting for sampling cycle = 64 clocks */
AnnaBridge 171:3a7713b1edbc 79 #define GPIO_DBCTL_DBCLKSEL_128 0x00000007UL /*!< GPIO_DBCTL setting for sampling cycle = 128 clocks */
AnnaBridge 171:3a7713b1edbc 80 #define GPIO_DBCTL_DBCLKSEL_256 0x00000008UL /*!< GPIO_DBCTL setting for sampling cycle = 256 clocks */
AnnaBridge 171:3a7713b1edbc 81 #define GPIO_DBCTL_DBCLKSEL_512 0x00000009UL /*!< GPIO_DBCTL setting for sampling cycle = 512 clocks */
AnnaBridge 171:3a7713b1edbc 82 #define GPIO_DBCTL_DBCLKSEL_1024 0x0000000AUL /*!< GPIO_DBCTL setting for sampling cycle = 1024 clocks */
AnnaBridge 171:3a7713b1edbc 83 #define GPIO_DBCTL_DBCLKSEL_2048 0x0000000BUL /*!< GPIO_DBCTL setting for sampling cycle = 2048 clocks */
AnnaBridge 171:3a7713b1edbc 84 #define GPIO_DBCTL_DBCLKSEL_4096 0x0000000CUL /*!< GPIO_DBCTL setting for sampling cycle = 4096 clocks */
AnnaBridge 171:3a7713b1edbc 85 #define GPIO_DBCTL_DBCLKSEL_8192 0x0000000DUL /*!< GPIO_DBCTL setting for sampling cycle = 8192 clocks */
AnnaBridge 171:3a7713b1edbc 86 #define GPIO_DBCTL_DBCLKSEL_16384 0x0000000EUL /*!< GPIO_DBCTL setting for sampling cycle = 16384 clocks */
AnnaBridge 171:3a7713b1edbc 87 #define GPIO_DBCTL_DBCLKSEL_32768 0x0000000FUL /*!< GPIO_DBCTL setting for sampling cycle = 32768 clocks */
AnnaBridge 171:3a7713b1edbc 88
AnnaBridge 171:3a7713b1edbc 89
AnnaBridge 171:3a7713b1edbc 90 /* Define GPIO Pin Data Input/Output. It could be used to control each I/O pin by pin address mapping.
AnnaBridge 171:3a7713b1edbc 91 Example 1:
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93 PA0 = 1;
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 It is used to set GPIO PA.0 to high;
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 Example 2:
AnnaBridge 171:3a7713b1edbc 98
AnnaBridge 171:3a7713b1edbc 99 if (PA0)
AnnaBridge 171:3a7713b1edbc 100 PA0 = 0;
AnnaBridge 171:3a7713b1edbc 101
AnnaBridge 171:3a7713b1edbc 102 If GPIO PA.0 pin status is high, then set GPIO PA.0 data output to low.
AnnaBridge 171:3a7713b1edbc 103 */
AnnaBridge 171:3a7713b1edbc 104 #define GPIO_PIN_DATA(port, pin) (*((volatile uint32_t *)((GPIO_PIN_DATA_BASE+(0x40*(port))) + ((pin)<<2))))
AnnaBridge 171:3a7713b1edbc 105 #define PA0 GPIO_PIN_DATA(0, 0 ) /*!< Specify PA.0 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 106 #define PA1 GPIO_PIN_DATA(0, 1 ) /*!< Specify PA.1 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 107 #define PA2 GPIO_PIN_DATA(0, 2 ) /*!< Specify PA.2 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 108 #define PA3 GPIO_PIN_DATA(0, 3 ) /*!< Specify PA.3 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 109 #define PA4 GPIO_PIN_DATA(0, 4 ) /*!< Specify PA.4 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 110 #define PA5 GPIO_PIN_DATA(0, 5 ) /*!< Specify PA.5 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 111 #define PA6 GPIO_PIN_DATA(0, 6 ) /*!< Specify PA.6 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 112 #define PA7 GPIO_PIN_DATA(0, 7 ) /*!< Specify PA.7 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 113 #define PA8 GPIO_PIN_DATA(0, 8 ) /*!< Specify PA.8 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 114 #define PA9 GPIO_PIN_DATA(0, 9 ) /*!< Specify PA.9 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 115 #define PA10 GPIO_PIN_DATA(0, 10) /*!< Specify PA.10 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 116 #define PA11 GPIO_PIN_DATA(0, 11) /*!< Specify PA.11 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 117 #define PA12 GPIO_PIN_DATA(0, 12) /*!< Specify PA.12 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 118 #define PA13 GPIO_PIN_DATA(0, 13) /*!< Specify PA.13 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 119 #define PA14 GPIO_PIN_DATA(0, 14) /*!< Specify PA.14 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 120 #define PA15 GPIO_PIN_DATA(0, 15) /*!< Specify PA.15 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 121 #define PB0 GPIO_PIN_DATA(1, 0 ) /*!< Specify PB.0 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 122 #define PB1 GPIO_PIN_DATA(1, 1 ) /*!< Specify PB.1 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 123 #define PB2 GPIO_PIN_DATA(1, 2 ) /*!< Specify PB.2 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 124 #define PB3 GPIO_PIN_DATA(1, 3 ) /*!< Specify PB.3 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 125 #define PB4 GPIO_PIN_DATA(1, 4 ) /*!< Specify PB.4 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 126 #define PB5 GPIO_PIN_DATA(1, 5 ) /*!< Specify PB.5 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 127 #define PB6 GPIO_PIN_DATA(1, 6 ) /*!< Specify PB.6 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 128 #define PB7 GPIO_PIN_DATA(1, 7 ) /*!< Specify PB.7 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 129 #define PB8 GPIO_PIN_DATA(1, 8 ) /*!< Specify PB.8 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 130 #define PB9 GPIO_PIN_DATA(1, 9 ) /*!< Specify PB.9 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 131 #define PB10 GPIO_PIN_DATA(1, 10) /*!< Specify PB.10 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 132 #define PB11 GPIO_PIN_DATA(1, 11) /*!< Specify PB.11 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 133 #define PB12 GPIO_PIN_DATA(1, 12) /*!< Specify PB.12 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 134 #define PB13 GPIO_PIN_DATA(1, 13) /*!< Specify PB.13 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 135 #define PB14 GPIO_PIN_DATA(1, 14) /*!< Specify PB.14 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 136 #define PB15 GPIO_PIN_DATA(1, 15) /*!< Specify PB.15 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 137 #define PC0 GPIO_PIN_DATA(2, 0 ) /*!< Specify PC.0 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 138 #define PC1 GPIO_PIN_DATA(2, 1 ) /*!< Specify PC.1 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 139 #define PC2 GPIO_PIN_DATA(2, 2 ) /*!< Specify PC.2 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 140 #define PC3 GPIO_PIN_DATA(2, 3 ) /*!< Specify PC.3 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 141 #define PC4 GPIO_PIN_DATA(2, 4 ) /*!< Specify PC.4 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 142 #define PC5 GPIO_PIN_DATA(2, 5 ) /*!< Specify PC.5 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 143 #define PC6 GPIO_PIN_DATA(2, 6 ) /*!< Specify PC.6 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 144 #define PC7 GPIO_PIN_DATA(2, 7 ) /*!< Specify PC.7 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 145 #define PC8 GPIO_PIN_DATA(2, 8 ) /*!< Specify PC.8 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 146 #define PC9 GPIO_PIN_DATA(2, 9 ) /*!< Specify PC.9 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 147 #define PC10 GPIO_PIN_DATA(2, 10) /*!< Specify PC.10 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 148 #define PC11 GPIO_PIN_DATA(2, 11) /*!< Specify PC.11 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 149 #define PC12 GPIO_PIN_DATA(2, 12) /*!< Specify PC.12 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 150 #define PC13 GPIO_PIN_DATA(2, 13) /*!< Specify PC.13 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 151 #define PC14 GPIO_PIN_DATA(2, 14) /*!< Specify PC.14 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 152 #define PC15 GPIO_PIN_DATA(2, 15) /*!< Specify PC.15 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 153 #define PD0 GPIO_PIN_DATA(3, 0 ) /*!< Specify PD.0 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 154 #define PD1 GPIO_PIN_DATA(3, 1 ) /*!< Specify PD.1 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 155 #define PD2 GPIO_PIN_DATA(3, 2 ) /*!< Specify PD.2 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 156 #define PD3 GPIO_PIN_DATA(3, 3 ) /*!< Specify PD.3 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 157 #define PD4 GPIO_PIN_DATA(3, 4 ) /*!< Specify PD.4 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 158 #define PD5 GPIO_PIN_DATA(3, 5 ) /*!< Specify PD.5 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 159 #define PD6 GPIO_PIN_DATA(3, 6 ) /*!< Specify PD.6 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 160 #define PD7 GPIO_PIN_DATA(3, 7 ) /*!< Specify PD.7 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 161 #define PD8 GPIO_PIN_DATA(3, 8 ) /*!< Specify PD.8 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 162 #define PD9 GPIO_PIN_DATA(3, 9 ) /*!< Specify PD.9 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 163 #define PD10 GPIO_PIN_DATA(3, 10) /*!< Specify PD.10 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 164 #define PD11 GPIO_PIN_DATA(3, 11) /*!< Specify PD.11 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 165 #define PD12 GPIO_PIN_DATA(3, 12) /*!< Specify PD.12 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 166 #define PD13 GPIO_PIN_DATA(3, 13) /*!< Specify PD.13 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 167 #define PD14 GPIO_PIN_DATA(3, 14) /*!< Specify PD.14 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 168 #define PD15 GPIO_PIN_DATA(3, 15) /*!< Specify PD.15 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 169 #define PE0 GPIO_PIN_DATA(4, 0 ) /*!< Specify PE.0 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 170 #define PE1 GPIO_PIN_DATA(4, 1 ) /*!< Specify PE.1 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 171 #define PE2 GPIO_PIN_DATA(4, 2 ) /*!< Specify PE.2 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 172 #define PE3 GPIO_PIN_DATA(4, 3 ) /*!< Specify PE.3 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 173 #define PE4 GPIO_PIN_DATA(4, 4 ) /*!< Specify PE.4 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 174 #define PE5 GPIO_PIN_DATA(4, 5 ) /*!< Specify PE.5 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 175 #define PE6 GPIO_PIN_DATA(4, 6 ) /*!< Specify PE.6 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 176 #define PE7 GPIO_PIN_DATA(4, 7 ) /*!< Specify PE.7 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 177 #define PE8 GPIO_PIN_DATA(4, 8 ) /*!< Specify PE.8 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 178 #define PE9 GPIO_PIN_DATA(4, 9 ) /*!< Specify PE.9 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 179 #define PE10 GPIO_PIN_DATA(4, 10) /*!< Specify PE.10 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 180 #define PE11 GPIO_PIN_DATA(4, 11) /*!< Specify PE.11 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 181 #define PE12 GPIO_PIN_DATA(4, 12) /*!< Specify PE.12 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 182 #define PE13 GPIO_PIN_DATA(4, 13) /*!< Specify PE.13 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 183 #define PE14 GPIO_PIN_DATA(4, 14) /*!< Specify PE.14 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 184 #define PF0 GPIO_PIN_DATA(5, 0 ) /*!< Specify PF.0 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 185 #define PF1 GPIO_PIN_DATA(5, 1 ) /*!< Specify PF.1 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 186 #define PF2 GPIO_PIN_DATA(5, 2 ) /*!< Specify PF.2 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 187 #define PF3 GPIO_PIN_DATA(5, 3 ) /*!< Specify PF.3 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 188 #define PF4 GPIO_PIN_DATA(5, 4 ) /*!< Specify PF.4 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 189 #define PF5 GPIO_PIN_DATA(5, 5 ) /*!< Specify PF.5 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 190 #define PF6 GPIO_PIN_DATA(5, 6 ) /*!< Specify PF.6 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 191 #define PF7 GPIO_PIN_DATA(5, 7 ) /*!< Specify PF.7 Pin Data Input/Output */
AnnaBridge 171:3a7713b1edbc 192
AnnaBridge 171:3a7713b1edbc 193
AnnaBridge 171:3a7713b1edbc 194 /*@}*/ /* end of group GPIO_EXPORTED_CONSTANTS */
AnnaBridge 171:3a7713b1edbc 195
AnnaBridge 171:3a7713b1edbc 196
AnnaBridge 171:3a7713b1edbc 197 /** @addtogroup GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions
AnnaBridge 171:3a7713b1edbc 198 @{
AnnaBridge 171:3a7713b1edbc 199 */
AnnaBridge 171:3a7713b1edbc 200
AnnaBridge 171:3a7713b1edbc 201 /**
AnnaBridge 171:3a7713b1edbc 202 * @brief Clear GPIO Pin Interrupt Flag
AnnaBridge 171:3a7713b1edbc 203 *
AnnaBridge 171:3a7713b1edbc 204 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 205 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
AnnaBridge 171:3a7713b1edbc 206 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
AnnaBridge 171:3a7713b1edbc 207 * It could be BIT0 ~ BIT14 for PE.
AnnaBridge 171:3a7713b1edbc 208 * It could be BIT0 ~ BIT7 for PF.
AnnaBridge 171:3a7713b1edbc 209 *
AnnaBridge 171:3a7713b1edbc 210 * @return None
AnnaBridge 171:3a7713b1edbc 211 *
AnnaBridge 171:3a7713b1edbc 212 * @details Clear the interrupt status of specified GPIO pin.
AnnaBridge 171:3a7713b1edbc 213 */
AnnaBridge 171:3a7713b1edbc 214 #define GPIO_CLR_INT_FLAG(port, u32PinMask) ((port)->INTSRC = (u32PinMask))
AnnaBridge 171:3a7713b1edbc 215
AnnaBridge 171:3a7713b1edbc 216 /**
AnnaBridge 171:3a7713b1edbc 217 * @brief Disable Pin De-bounce Function
AnnaBridge 171:3a7713b1edbc 218 *
AnnaBridge 171:3a7713b1edbc 219 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 220 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
AnnaBridge 171:3a7713b1edbc 221 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
AnnaBridge 171:3a7713b1edbc 222 * It could be BIT0 ~ BIT14 for PE.
AnnaBridge 171:3a7713b1edbc 223 * It could be BIT0 ~ BIT7 for PF.
AnnaBridge 171:3a7713b1edbc 224 *
AnnaBridge 171:3a7713b1edbc 225 * @return None
AnnaBridge 171:3a7713b1edbc 226 *
AnnaBridge 171:3a7713b1edbc 227 * @details Disable the interrupt de-bounce function of specified GPIO pin.
AnnaBridge 171:3a7713b1edbc 228 */
AnnaBridge 171:3a7713b1edbc 229 #define GPIO_DISABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN &= ~(u32PinMask))
AnnaBridge 171:3a7713b1edbc 230
AnnaBridge 171:3a7713b1edbc 231 /**
AnnaBridge 171:3a7713b1edbc 232 * @brief Enable Pin De-bounce Function
AnnaBridge 171:3a7713b1edbc 233 *
AnnaBridge 171:3a7713b1edbc 234 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 235 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
AnnaBridge 171:3a7713b1edbc 236 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
AnnaBridge 171:3a7713b1edbc 237 * It could be BIT0 ~ BIT14 for PE.
AnnaBridge 171:3a7713b1edbc 238 * It could be BIT0 ~ BIT7 for PF.
AnnaBridge 171:3a7713b1edbc 239 * @return None
AnnaBridge 171:3a7713b1edbc 240 *
AnnaBridge 171:3a7713b1edbc 241 * @details Enable the interrupt de-bounce function of specified GPIO pin.
AnnaBridge 171:3a7713b1edbc 242 */
AnnaBridge 171:3a7713b1edbc 243 #define GPIO_ENABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN |= (u32PinMask))
AnnaBridge 171:3a7713b1edbc 244
AnnaBridge 171:3a7713b1edbc 245 /**
AnnaBridge 171:3a7713b1edbc 246 * @brief Disable I/O Digital Input Path
AnnaBridge 171:3a7713b1edbc 247 *
AnnaBridge 171:3a7713b1edbc 248 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 249 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
AnnaBridge 171:3a7713b1edbc 250 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
AnnaBridge 171:3a7713b1edbc 251 * It could be BIT0 ~ BIT14 for PE.
AnnaBridge 171:3a7713b1edbc 252 * It could be BIT0 ~ BIT7 for PF.
AnnaBridge 171:3a7713b1edbc 253 *
AnnaBridge 171:3a7713b1edbc 254 * @return None
AnnaBridge 171:3a7713b1edbc 255 *
AnnaBridge 171:3a7713b1edbc 256 * @details Disable I/O digital input path of specified GPIO pin.
AnnaBridge 171:3a7713b1edbc 257 */
AnnaBridge 171:3a7713b1edbc 258 #define GPIO_DISABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF |= ((u32PinMask)<<16))
AnnaBridge 171:3a7713b1edbc 259
AnnaBridge 171:3a7713b1edbc 260 /**
AnnaBridge 171:3a7713b1edbc 261 * @brief Enable I/O Digital Input Path
AnnaBridge 171:3a7713b1edbc 262 *
AnnaBridge 171:3a7713b1edbc 263 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 264 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
AnnaBridge 171:3a7713b1edbc 265 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
AnnaBridge 171:3a7713b1edbc 266 * It could be BIT0 ~ BIT14 for PE.
AnnaBridge 171:3a7713b1edbc 267 * It could be BIT0 ~ BIT7 for PF.
AnnaBridge 171:3a7713b1edbc 268 *
AnnaBridge 171:3a7713b1edbc 269 * @return None
AnnaBridge 171:3a7713b1edbc 270 *
AnnaBridge 171:3a7713b1edbc 271 * @details Enable I/O digital input path of specified GPIO pin.
AnnaBridge 171:3a7713b1edbc 272 */
AnnaBridge 171:3a7713b1edbc 273 #define GPIO_ENABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF &= ~((u32PinMask)<<16))
AnnaBridge 171:3a7713b1edbc 274
AnnaBridge 171:3a7713b1edbc 275 /**
AnnaBridge 171:3a7713b1edbc 276 * @brief Disable I/O DOUT mask
AnnaBridge 171:3a7713b1edbc 277 *
AnnaBridge 171:3a7713b1edbc 278 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 279 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
AnnaBridge 171:3a7713b1edbc 280 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
AnnaBridge 171:3a7713b1edbc 281 * It could be BIT0 ~ BIT14 for PE.
AnnaBridge 171:3a7713b1edbc 282 * It could be BIT0 ~ BIT7 for PF.
AnnaBridge 171:3a7713b1edbc 283 *
AnnaBridge 171:3a7713b1edbc 284 * @return None
AnnaBridge 171:3a7713b1edbc 285 *
AnnaBridge 171:3a7713b1edbc 286 * @details Disable I/O DOUT mask of specified GPIO pin.
AnnaBridge 171:3a7713b1edbc 287 */
AnnaBridge 171:3a7713b1edbc 288 #define GPIO_DISABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK &= ~(u32PinMask))
AnnaBridge 171:3a7713b1edbc 289
AnnaBridge 171:3a7713b1edbc 290 /**
AnnaBridge 171:3a7713b1edbc 291 * @brief Enable I/O DOUT mask
AnnaBridge 171:3a7713b1edbc 292 *
AnnaBridge 171:3a7713b1edbc 293 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 294 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
AnnaBridge 171:3a7713b1edbc 295 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
AnnaBridge 171:3a7713b1edbc 296 * It could be BIT0 ~ BIT14 for PE.
AnnaBridge 171:3a7713b1edbc 297 * It could be BIT0 ~ BIT7 for PF.
AnnaBridge 171:3a7713b1edbc 298 *
AnnaBridge 171:3a7713b1edbc 299 * @return None
AnnaBridge 171:3a7713b1edbc 300 *
AnnaBridge 171:3a7713b1edbc 301 * @details Enable I/O DOUT mask of specified GPIO pin.
AnnaBridge 171:3a7713b1edbc 302 */
AnnaBridge 171:3a7713b1edbc 303 #define GPIO_ENABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK |= (u32PinMask))
AnnaBridge 171:3a7713b1edbc 304
AnnaBridge 171:3a7713b1edbc 305 /**
AnnaBridge 171:3a7713b1edbc 306 * @brief Get GPIO Pin Interrupt Flag
AnnaBridge 171:3a7713b1edbc 307 *
AnnaBridge 171:3a7713b1edbc 308 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 309 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
AnnaBridge 171:3a7713b1edbc 310 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
AnnaBridge 171:3a7713b1edbc 311 * It could be BIT0 ~ BIT14 for PE.
AnnaBridge 171:3a7713b1edbc 312 * It could be BIT0 ~ BIT7 for PF.
AnnaBridge 171:3a7713b1edbc 313 *
AnnaBridge 171:3a7713b1edbc 314 * @retval 0 No interrupt at specified GPIO pin
AnnaBridge 171:3a7713b1edbc 315 * @retval 1 The specified GPIO pin generate an interrupt
AnnaBridge 171:3a7713b1edbc 316 *
AnnaBridge 171:3a7713b1edbc 317 * @details Get the interrupt status of specified GPIO pin.
AnnaBridge 171:3a7713b1edbc 318 */
AnnaBridge 171:3a7713b1edbc 319 #define GPIO_GET_INT_FLAG(port, u32PinMask) ((port)->INTSRC & (u32PinMask))
AnnaBridge 171:3a7713b1edbc 320
AnnaBridge 171:3a7713b1edbc 321 /**
AnnaBridge 171:3a7713b1edbc 322 * @brief Set De-bounce Sampling Cycle Time
AnnaBridge 171:3a7713b1edbc 323 *
AnnaBridge 171:3a7713b1edbc 324 * @param[in] u32ClkSrc The de-bounce counter clock source. It could be GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC.
AnnaBridge 171:3a7713b1edbc 325 * @param[in] u32ClkSel The de-bounce sampling cycle selection. It could be
AnnaBridge 171:3a7713b1edbc 326 * - \ref GPIO_DBCTL_DBCLKSEL_1
AnnaBridge 171:3a7713b1edbc 327 * - \ref GPIO_DBCTL_DBCLKSEL_2
AnnaBridge 171:3a7713b1edbc 328 * - \ref GPIO_DBCTL_DBCLKSEL_4
AnnaBridge 171:3a7713b1edbc 329 * - \ref GPIO_DBCTL_DBCLKSEL_8
AnnaBridge 171:3a7713b1edbc 330 * - \ref GPIO_DBCTL_DBCLKSEL_16
AnnaBridge 171:3a7713b1edbc 331 * - \ref GPIO_DBCTL_DBCLKSEL_32
AnnaBridge 171:3a7713b1edbc 332 * - \ref GPIO_DBCTL_DBCLKSEL_64
AnnaBridge 171:3a7713b1edbc 333 * - \ref GPIO_DBCTL_DBCLKSEL_128
AnnaBridge 171:3a7713b1edbc 334 * - \ref GPIO_DBCTL_DBCLKSEL_256
AnnaBridge 171:3a7713b1edbc 335 * - \ref GPIO_DBCTL_DBCLKSEL_512
AnnaBridge 171:3a7713b1edbc 336 * - \ref GPIO_DBCTL_DBCLKSEL_1024
AnnaBridge 171:3a7713b1edbc 337 * - \ref GPIO_DBCTL_DBCLKSEL_2048
AnnaBridge 171:3a7713b1edbc 338 * - \ref GPIO_DBCTL_DBCLKSEL_4096
AnnaBridge 171:3a7713b1edbc 339 * - \ref GPIO_DBCTL_DBCLKSEL_8192
AnnaBridge 171:3a7713b1edbc 340 * - \ref GPIO_DBCTL_DBCLKSEL_16384
AnnaBridge 171:3a7713b1edbc 341 * - \ref GPIO_DBCTL_DBCLKSEL_32768
AnnaBridge 171:3a7713b1edbc 342 *
AnnaBridge 171:3a7713b1edbc 343 * @return None
AnnaBridge 171:3a7713b1edbc 344 *
AnnaBridge 171:3a7713b1edbc 345 * @details Set the interrupt de-bounce sampling cycle time based on the debounce counter clock source. \n
AnnaBridge 171:3a7713b1edbc 346 * Example: _GPIO_SET_DEBOUNCE_TIME(GPIO_DBCTL_DBCLKSRC_LIRC, GPIO_DBCTL_DBCLKSEL_4). \n
AnnaBridge 171:3a7713b1edbc 347 * It's meaning the De-debounce counter clock source is internal 10 KHz and sampling cycle selection is 4. \n
AnnaBridge 171:3a7713b1edbc 348 * Then the target de-bounce sampling cycle time is (4)*(1/(10*1000)) s = 4*0.0001 s = 400 us,
AnnaBridge 171:3a7713b1edbc 349 * and system will sampling interrupt input once per 00 us.
AnnaBridge 171:3a7713b1edbc 350 */
AnnaBridge 171:3a7713b1edbc 351 #define GPIO_SET_DEBOUNCE_TIME(u32ClkSrc, u32ClkSel) (GPIO->DBCTL = (GPIO_DBCTL_ICLKON_Msk | (u32ClkSrc) | (u32ClkSel)))
AnnaBridge 171:3a7713b1edbc 352
AnnaBridge 171:3a7713b1edbc 353 /**
AnnaBridge 171:3a7713b1edbc 354 * @brief Get GPIO Port IN Data
AnnaBridge 171:3a7713b1edbc 355 *
AnnaBridge 171:3a7713b1edbc 356 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 357 *
AnnaBridge 171:3a7713b1edbc 358 * @return The specified port data
AnnaBridge 171:3a7713b1edbc 359 *
AnnaBridge 171:3a7713b1edbc 360 * @details Get the PIN register of specified GPIO port.
AnnaBridge 171:3a7713b1edbc 361 */
AnnaBridge 171:3a7713b1edbc 362 #define GPIO_GET_IN_DATA(port) ((port)->PIN)
AnnaBridge 171:3a7713b1edbc 363
AnnaBridge 171:3a7713b1edbc 364 /**
AnnaBridge 171:3a7713b1edbc 365 * @brief Set GPIO Port OUT Data
AnnaBridge 171:3a7713b1edbc 366 *
AnnaBridge 171:3a7713b1edbc 367 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 368 * @param[in] u32Data GPIO port data.
AnnaBridge 171:3a7713b1edbc 369 *
AnnaBridge 171:3a7713b1edbc 370 * @return None
AnnaBridge 171:3a7713b1edbc 371 *
AnnaBridge 171:3a7713b1edbc 372 * @details Set the Data into specified GPIO port.
AnnaBridge 171:3a7713b1edbc 373 */
AnnaBridge 171:3a7713b1edbc 374 #define GPIO_SET_OUT_DATA(port, u32Data) ((port)->DOUT = (u32Data))
AnnaBridge 171:3a7713b1edbc 375
AnnaBridge 171:3a7713b1edbc 376 /**
AnnaBridge 171:3a7713b1edbc 377 * @brief Toggle Specified GPIO pin
AnnaBridge 171:3a7713b1edbc 378 *
AnnaBridge 171:3a7713b1edbc 379 * @param[in] u32Pin Pxy
AnnaBridge 171:3a7713b1edbc 380 *
AnnaBridge 171:3a7713b1edbc 381 * @return None
AnnaBridge 171:3a7713b1edbc 382 *
AnnaBridge 171:3a7713b1edbc 383 * @details Toggle the specified GPIO pint.
AnnaBridge 171:3a7713b1edbc 384 */
AnnaBridge 171:3a7713b1edbc 385 #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1)
AnnaBridge 171:3a7713b1edbc 386
AnnaBridge 171:3a7713b1edbc 387
AnnaBridge 171:3a7713b1edbc 388 /**
AnnaBridge 171:3a7713b1edbc 389 * @brief Enable External GPIO interrupt
AnnaBridge 171:3a7713b1edbc 390 *
AnnaBridge 171:3a7713b1edbc 391 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 392 * @param[in] u32Pin The pin of specified GPIO port.
AnnaBridge 171:3a7713b1edbc 393 * It could be 0 ~ 15 for PA, PB, PC and PD GPIO port.
AnnaBridge 171:3a7713b1edbc 394 * It could be 0 ~ 14 for PE GPIO port.
AnnaBridge 171:3a7713b1edbc 395 * It could be 0 ~ 7 for PF GPIO port.
AnnaBridge 171:3a7713b1edbc 396 * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n
AnnaBridge 171:3a7713b1edbc 397 * GPIO_INT_RISING, GPIO_INT_FALLING, GPIO_INT_BOTH_EDGE, GPIO_INT_HIGH, GPIO_INT_LOW.
AnnaBridge 171:3a7713b1edbc 398 *
AnnaBridge 171:3a7713b1edbc 399 * @return None
AnnaBridge 171:3a7713b1edbc 400 *
AnnaBridge 171:3a7713b1edbc 401 * @details This function is used to enable specified GPIO pin interrupt.
AnnaBridge 171:3a7713b1edbc 402 */
AnnaBridge 171:3a7713b1edbc 403 #define GPIO_EnableEINT GPIO_EnableInt
AnnaBridge 171:3a7713b1edbc 404
AnnaBridge 171:3a7713b1edbc 405 /**
AnnaBridge 171:3a7713b1edbc 406 * @brief Disable External GPIO interrupt
AnnaBridge 171:3a7713b1edbc 407 *
AnnaBridge 171:3a7713b1edbc 408 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
AnnaBridge 171:3a7713b1edbc 409 * @param[in] u32Pin The pin of specified GPIO port.
AnnaBridge 171:3a7713b1edbc 410 * It could be 0 ~ 15 for PA, PB, PC and PD GPIO port.
AnnaBridge 171:3a7713b1edbc 411 * It could be 0 ~ 14 for PE GPIO port.
AnnaBridge 171:3a7713b1edbc 412 * It could be 0 ~ 7 for PF GPIO port.
AnnaBridge 171:3a7713b1edbc 413 *
AnnaBridge 171:3a7713b1edbc 414 * @return None
AnnaBridge 171:3a7713b1edbc 415 *
AnnaBridge 171:3a7713b1edbc 416 * @details This function is used to enable specified GPIO pin interrupt.
AnnaBridge 171:3a7713b1edbc 417 */
AnnaBridge 171:3a7713b1edbc 418 #define GPIO_DisableEINT GPIO_DisableInt
AnnaBridge 171:3a7713b1edbc 419
AnnaBridge 171:3a7713b1edbc 420
AnnaBridge 171:3a7713b1edbc 421 void GPIO_SetMode(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode);
AnnaBridge 171:3a7713b1edbc 422 void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs);
AnnaBridge 171:3a7713b1edbc 423 void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin);
AnnaBridge 171:3a7713b1edbc 424
AnnaBridge 171:3a7713b1edbc 425
AnnaBridge 171:3a7713b1edbc 426 /*@}*/ /* end of group GPIO_EXPORTED_FUNCTIONS */
AnnaBridge 171:3a7713b1edbc 427
AnnaBridge 171:3a7713b1edbc 428 /*@}*/ /* end of group GPIO_Driver */
AnnaBridge 171:3a7713b1edbc 429
AnnaBridge 171:3a7713b1edbc 430 /*@}*/ /* end of group Standard_Driver */
AnnaBridge 171:3a7713b1edbc 431
AnnaBridge 171:3a7713b1edbc 432
AnnaBridge 171:3a7713b1edbc 433 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 434 }
AnnaBridge 171:3a7713b1edbc 435 #endif
AnnaBridge 171:3a7713b1edbc 436
AnnaBridge 171:3a7713b1edbc 437 #endif // __GPIO_H__
AnnaBridge 171:3a7713b1edbc 438
AnnaBridge 171:3a7713b1edbc 439 /*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/