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TARGET_NUCLEO_L4R5ZI/TOOLCHAIN_ARM_STD/us_ticker_data.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /* mbed Microcontroller Library
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2006-2018 ARM Limited
AnnaBridge 171:3a7713b1edbc 3 *
AnnaBridge 171:3a7713b1edbc 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 171:3a7713b1edbc 5 * you may not use this file except in compliance with the License.
AnnaBridge 171:3a7713b1edbc 6 * You may obtain a copy of the License at
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 171:3a7713b1edbc 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 171:3a7713b1edbc 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 171:3a7713b1edbc 13 * See the License for the specific language governing permissions and
AnnaBridge 171:3a7713b1edbc 14 * limitations under the License.
AnnaBridge 171:3a7713b1edbc 15 */
AnnaBridge 171:3a7713b1edbc 16 #ifndef __US_TICKER_DATA_H
AnnaBridge 171:3a7713b1edbc 17 #define __US_TICKER_DATA_H
AnnaBridge 171:3a7713b1edbc 18
AnnaBridge 171:3a7713b1edbc 19 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 20 extern "C" {
AnnaBridge 171:3a7713b1edbc 21 #endif
AnnaBridge 171:3a7713b1edbc 22
AnnaBridge 171:3a7713b1edbc 23 #include "stm32l4xx.h"
AnnaBridge 171:3a7713b1edbc 24 #include "stm32l4xx_ll_tim.h"
AnnaBridge 171:3a7713b1edbc 25 #include "cmsis_nvic.h"
AnnaBridge 171:3a7713b1edbc 26
AnnaBridge 171:3a7713b1edbc 27 #define TIM_MST TIM5
AnnaBridge 171:3a7713b1edbc 28 #define TIM_MST_IRQ TIM5_IRQn
AnnaBridge 171:3a7713b1edbc 29 #define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
AnnaBridge 171:3a7713b1edbc 30 #define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM5()
AnnaBridge 171:3a7713b1edbc 31
AnnaBridge 171:3a7713b1edbc 32 #define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
AnnaBridge 171:3a7713b1edbc 33 #define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 #define TIM_MST_BIT_WIDTH 32 // 16 or 32
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 #define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
AnnaBridge 171:3a7713b1edbc 38
AnnaBridge 171:3a7713b1edbc 39 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 40 }
AnnaBridge 171:3a7713b1edbc 41 #endif
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43 #endif // __US_TICKER_DATA_H