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TARGET_NUCLEO_L486RG/TOOLCHAIN_ARM_STD/stm32l4xx_hal_ospi.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
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AnnaBridge | 161:aa5281ff4a02 | 1 | /** |
AnnaBridge | 161:aa5281ff4a02 | 2 | ****************************************************************************** |
AnnaBridge | 161:aa5281ff4a02 | 3 | * @file stm32l4xx_hal_ospi.h |
AnnaBridge | 161:aa5281ff4a02 | 4 | * @author MCD Application Team |
AnnaBridge | 161:aa5281ff4a02 | 5 | * @brief Header file of OSPI HAL module. |
AnnaBridge | 161:aa5281ff4a02 | 6 | ****************************************************************************** |
AnnaBridge | 161:aa5281ff4a02 | 7 | * @attention |
AnnaBridge | 161:aa5281ff4a02 | 8 | * |
AnnaBridge | 161:aa5281ff4a02 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
AnnaBridge | 161:aa5281ff4a02 | 10 | * |
AnnaBridge | 161:aa5281ff4a02 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 161:aa5281ff4a02 | 12 | * are permitted provided that the following conditions are met: |
AnnaBridge | 161:aa5281ff4a02 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 161:aa5281ff4a02 | 14 | * this list of conditions and the following disclaimer. |
AnnaBridge | 161:aa5281ff4a02 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 161:aa5281ff4a02 | 16 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 161:aa5281ff4a02 | 17 | * and/or other materials provided with the distribution. |
AnnaBridge | 161:aa5281ff4a02 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 161:aa5281ff4a02 | 19 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 161:aa5281ff4a02 | 20 | * without specific prior written permission. |
AnnaBridge | 161:aa5281ff4a02 | 21 | * |
AnnaBridge | 161:aa5281ff4a02 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 161:aa5281ff4a02 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 161:aa5281ff4a02 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 161:aa5281ff4a02 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 161:aa5281ff4a02 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 161:aa5281ff4a02 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 161:aa5281ff4a02 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 161:aa5281ff4a02 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 161:aa5281ff4a02 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 161:aa5281ff4a02 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 161:aa5281ff4a02 | 32 | * |
AnnaBridge | 161:aa5281ff4a02 | 33 | ****************************************************************************** |
AnnaBridge | 161:aa5281ff4a02 | 34 | */ |
AnnaBridge | 161:aa5281ff4a02 | 35 | |
AnnaBridge | 161:aa5281ff4a02 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 161:aa5281ff4a02 | 37 | #ifndef __STM32L4xx_HAL_OSPI_H |
AnnaBridge | 161:aa5281ff4a02 | 38 | #define __STM32L4xx_HAL_OSPI_H |
AnnaBridge | 161:aa5281ff4a02 | 39 | |
AnnaBridge | 161:aa5281ff4a02 | 40 | #ifdef __cplusplus |
AnnaBridge | 161:aa5281ff4a02 | 41 | extern "C" { |
AnnaBridge | 161:aa5281ff4a02 | 42 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 43 | |
AnnaBridge | 161:aa5281ff4a02 | 44 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 161:aa5281ff4a02 | 45 | #include "stm32l4xx_hal_def.h" |
AnnaBridge | 161:aa5281ff4a02 | 46 | |
AnnaBridge | 161:aa5281ff4a02 | 47 | #if defined(OCTOSPI) || defined(OCTOSPI1) || defined(OCTOSPI2) |
AnnaBridge | 161:aa5281ff4a02 | 48 | |
AnnaBridge | 161:aa5281ff4a02 | 49 | /** @addtogroup STM32L4xx_HAL_Driver |
AnnaBridge | 161:aa5281ff4a02 | 50 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 51 | */ |
AnnaBridge | 161:aa5281ff4a02 | 52 | |
AnnaBridge | 161:aa5281ff4a02 | 53 | /** @addtogroup OSPI |
AnnaBridge | 161:aa5281ff4a02 | 54 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 55 | */ |
AnnaBridge | 161:aa5281ff4a02 | 56 | |
AnnaBridge | 161:aa5281ff4a02 | 57 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 161:aa5281ff4a02 | 58 | /** @defgroup OSPI_Exported_Types OSPI Exported Types |
AnnaBridge | 161:aa5281ff4a02 | 59 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 60 | */ |
AnnaBridge | 161:aa5281ff4a02 | 61 | |
AnnaBridge | 161:aa5281ff4a02 | 62 | /** |
AnnaBridge | 161:aa5281ff4a02 | 63 | * @brief OSPI Init structure definition |
AnnaBridge | 161:aa5281ff4a02 | 64 | */ |
AnnaBridge | 161:aa5281ff4a02 | 65 | typedef struct |
AnnaBridge | 161:aa5281ff4a02 | 66 | { |
AnnaBridge | 161:aa5281ff4a02 | 67 | uint32_t FifoThreshold; /* This is the threshold used byt the IP to generate the interrupt |
AnnaBridge | 161:aa5281ff4a02 | 68 | indicating that data are available in reception or free place |
AnnaBridge | 161:aa5281ff4a02 | 69 | is available in transmission. |
AnnaBridge | 161:aa5281ff4a02 | 70 | This parameter can be a value between 1 and 32 */ |
AnnaBridge | 161:aa5281ff4a02 | 71 | uint32_t DualQuad; /* It enables or not the dual-quad mode which allow to access up to |
AnnaBridge | 161:aa5281ff4a02 | 72 | quad mode on two different devices to increase the throughput. |
AnnaBridge | 161:aa5281ff4a02 | 73 | This parameter can be a value of @ref OSPI_DualQuad */ |
AnnaBridge | 161:aa5281ff4a02 | 74 | uint32_t MemoryType; /* It indicates the external device type connected to the OSPI. |
AnnaBridge | 161:aa5281ff4a02 | 75 | This parameter can be a value of @ref OSPI_MemoryType */ |
AnnaBridge | 161:aa5281ff4a02 | 76 | uint32_t DeviceSize; /* It defines the size of the external device connected to the OSPI, |
AnnaBridge | 161:aa5281ff4a02 | 77 | it corresponds to the number of address bits required to access |
AnnaBridge | 161:aa5281ff4a02 | 78 | the external device. |
AnnaBridge | 161:aa5281ff4a02 | 79 | This parameter can be a value between 1 and 32 */ |
AnnaBridge | 161:aa5281ff4a02 | 80 | uint32_t ChipSelectHighTime; /* It defines the minimun number of clocks which the chip select |
AnnaBridge | 161:aa5281ff4a02 | 81 | must remain high between commands. |
AnnaBridge | 161:aa5281ff4a02 | 82 | This parameter can be a value between 1 and 8 */ |
AnnaBridge | 161:aa5281ff4a02 | 83 | uint32_t FreeRunningClock; /* It enables or not the free running clock. |
AnnaBridge | 161:aa5281ff4a02 | 84 | This parameter can be a value of @ref OSPI_FreeRunningClock */ |
AnnaBridge | 161:aa5281ff4a02 | 85 | uint32_t ClockMode; /* It indicates the level of clock when the chip select is released. |
AnnaBridge | 161:aa5281ff4a02 | 86 | This parameter can be a value of @ref OSPI_ClockMode */ |
AnnaBridge | 161:aa5281ff4a02 | 87 | uint32_t WrapSize; /* It indicates the wrap-size corresponding the external device configuration. |
AnnaBridge | 161:aa5281ff4a02 | 88 | This parameter can be a value of @ref OSPI_WrapSize */ |
AnnaBridge | 161:aa5281ff4a02 | 89 | uint32_t ClockPrescaler; /* It specifies the prescaler factor used for generating |
AnnaBridge | 161:aa5281ff4a02 | 90 | the external clock based on the AHB clock. |
AnnaBridge | 161:aa5281ff4a02 | 91 | This parameter can be a value between 1 and 256 */ |
AnnaBridge | 161:aa5281ff4a02 | 92 | uint32_t SampleShifting; /* It allows to delay to 1/2 cycle the data sampling in order |
AnnaBridge | 161:aa5281ff4a02 | 93 | to take in account external signal delays. |
AnnaBridge | 161:aa5281ff4a02 | 94 | This parameter can be a value of @ref OSPI_SampleShifting */ |
AnnaBridge | 161:aa5281ff4a02 | 95 | uint32_t DelayHoldQuarterCycle; /* It allows to hold to 1/4 cycle the data. |
AnnaBridge | 161:aa5281ff4a02 | 96 | This parameter can be a value of @ref OSPI_DelayHoldQuarterCycle */ |
AnnaBridge | 161:aa5281ff4a02 | 97 | uint32_t ChipSelectBoundary; /* It enables the transaction boundary feature and |
AnnaBridge | 161:aa5281ff4a02 | 98 | defines the boundary of bytes to release the chip select. |
AnnaBridge | 161:aa5281ff4a02 | 99 | This parameter can be a value between 0 and 31 */ |
AnnaBridge | 161:aa5281ff4a02 | 100 | }OSPI_InitTypeDef; |
AnnaBridge | 161:aa5281ff4a02 | 101 | |
AnnaBridge | 161:aa5281ff4a02 | 102 | /** |
AnnaBridge | 161:aa5281ff4a02 | 103 | * @brief HAL OSPI Handle Structure definition |
AnnaBridge | 161:aa5281ff4a02 | 104 | */ |
AnnaBridge | 161:aa5281ff4a02 | 105 | typedef struct |
AnnaBridge | 161:aa5281ff4a02 | 106 | { |
AnnaBridge | 161:aa5281ff4a02 | 107 | OCTOSPI_TypeDef *Instance; /* OSPI registers base address */ |
AnnaBridge | 161:aa5281ff4a02 | 108 | OSPI_InitTypeDef Init; /* OSPI initialization parameters */ |
AnnaBridge | 161:aa5281ff4a02 | 109 | uint8_t *pBuffPtr; /* Address of the OSPI buffer for transfer */ |
AnnaBridge | 161:aa5281ff4a02 | 110 | __IO uint32_t XferSize; /* Number of data to transfer */ |
AnnaBridge | 161:aa5281ff4a02 | 111 | __IO uint32_t XferCount; /* Counter of data transferred */ |
AnnaBridge | 161:aa5281ff4a02 | 112 | DMA_HandleTypeDef *hdma; /* Handle of the DMA channel used for the transfer */ |
AnnaBridge | 161:aa5281ff4a02 | 113 | __IO uint32_t State; /* Internal state of the OSPI HAL driver */ |
AnnaBridge | 161:aa5281ff4a02 | 114 | __IO uint32_t ErrorCode; /* Error code in case of HAL driver internal error */ |
AnnaBridge | 161:aa5281ff4a02 | 115 | uint32_t Timeout; /* Timeout used for the OSPI external device access */ |
AnnaBridge | 161:aa5281ff4a02 | 116 | }OSPI_HandleTypeDef; |
AnnaBridge | 161:aa5281ff4a02 | 117 | |
AnnaBridge | 161:aa5281ff4a02 | 118 | /** |
AnnaBridge | 161:aa5281ff4a02 | 119 | * @brief HAL OSPI Regular Command Structure definition |
AnnaBridge | 161:aa5281ff4a02 | 120 | */ |
AnnaBridge | 161:aa5281ff4a02 | 121 | typedef struct |
AnnaBridge | 161:aa5281ff4a02 | 122 | { |
AnnaBridge | 161:aa5281ff4a02 | 123 | uint32_t OperationType; /* It indicates if the configuration applies to the common regsiters or |
AnnaBridge | 161:aa5281ff4a02 | 124 | to the registers for the write operation (these registers are only |
AnnaBridge | 161:aa5281ff4a02 | 125 | used for memory-mapped mode). |
AnnaBridge | 161:aa5281ff4a02 | 126 | This parameter can be a value of @ref OSPI_OperationType */ |
AnnaBridge | 161:aa5281ff4a02 | 127 | uint32_t FlashId; /* It indicates which external device is selected for this command (it |
AnnaBridge | 161:aa5281ff4a02 | 128 | applies only if Dualquad is disabled in the initialization structure). |
AnnaBridge | 161:aa5281ff4a02 | 129 | This parameter can be a value of @ref OSPI_FlashId */ |
AnnaBridge | 161:aa5281ff4a02 | 130 | uint32_t Instruction; /* It contains the instruction to be sent to the device. |
AnnaBridge | 161:aa5281ff4a02 | 131 | This parameter can be a value between 0 and 0xFFFFFFFF */ |
AnnaBridge | 161:aa5281ff4a02 | 132 | uint32_t InstructionMode; /* It indicates the mode of the instruction. |
AnnaBridge | 161:aa5281ff4a02 | 133 | This parameter can be a value of @ref OSPI_InstructionMode */ |
AnnaBridge | 161:aa5281ff4a02 | 134 | uint32_t InstructionSize; /* It indicates the size of the instruction. |
AnnaBridge | 161:aa5281ff4a02 | 135 | This parameter can be a value of @ref OSPI_InstructionSize */ |
AnnaBridge | 161:aa5281ff4a02 | 136 | uint32_t InstructionDtrMode; /* It enables or not the DTR mode for the instruction phase. |
AnnaBridge | 161:aa5281ff4a02 | 137 | This parameter can be a value of @ref OSPI_InstructionDtrMode */ |
AnnaBridge | 161:aa5281ff4a02 | 138 | uint32_t Address; /* It contains the address to be sent to the device. |
AnnaBridge | 161:aa5281ff4a02 | 139 | This parameter can be a value between 0 and 0xFFFFFFFF */ |
AnnaBridge | 161:aa5281ff4a02 | 140 | uint32_t AddressMode; /* It indicates the mode of the address. |
AnnaBridge | 161:aa5281ff4a02 | 141 | This parameter can be a value of @ref OSPI_AddressMode */ |
AnnaBridge | 161:aa5281ff4a02 | 142 | uint32_t AddressSize; /* It indicates the size of the address. |
AnnaBridge | 161:aa5281ff4a02 | 143 | This parameter can be a value of @ref OSPI_AddressSize */ |
AnnaBridge | 161:aa5281ff4a02 | 144 | uint32_t AddressDtrMode; /* It enables or not the DTR mode for the address phase. |
AnnaBridge | 161:aa5281ff4a02 | 145 | This parameter can be a value of @ref OSPI_AddressDtrMode */ |
AnnaBridge | 161:aa5281ff4a02 | 146 | uint32_t AlternateBytes; /* It contains the alternate bytes to be sent to the device. |
AnnaBridge | 161:aa5281ff4a02 | 147 | This parameter can be a value between 0 and 0xFFFFFFFF */ |
AnnaBridge | 161:aa5281ff4a02 | 148 | uint32_t AlternateBytesMode; /* It indicates the mode of the alternate bytes. |
AnnaBridge | 161:aa5281ff4a02 | 149 | This parameter can be a value of @ref OSPI_AlternateBytesMode */ |
AnnaBridge | 161:aa5281ff4a02 | 150 | uint32_t AlternateBytesSize; /* It indicates the size of the alternate bytes. |
AnnaBridge | 161:aa5281ff4a02 | 151 | This parameter can be a value of @ref OSPI_AlternateBytesSize */ |
AnnaBridge | 161:aa5281ff4a02 | 152 | uint32_t AlternateBytesDtrMode; /* It enables or not the DTR mode for the alternate bytes phase. |
AnnaBridge | 161:aa5281ff4a02 | 153 | This parameter can be a value of @ref OSPI_AlternateBytesDtrMode */ |
AnnaBridge | 161:aa5281ff4a02 | 154 | uint32_t DataMode; /* It indicates the mode of the data. |
AnnaBridge | 161:aa5281ff4a02 | 155 | This parameter can be a value of @ref OSPI_DataMode */ |
AnnaBridge | 161:aa5281ff4a02 | 156 | uint32_t NbData; /* It indicates the number of data transferred with this command. |
AnnaBridge | 161:aa5281ff4a02 | 157 | This field is only used for indirect mode. |
AnnaBridge | 161:aa5281ff4a02 | 158 | This parameter can be a value between 1 and 0xFFFFFFFF */ |
AnnaBridge | 161:aa5281ff4a02 | 159 | uint32_t DataDtrMode; /* It enables or not the DTR mode for the data phase. |
AnnaBridge | 161:aa5281ff4a02 | 160 | This parameter can be a value of @ref OSPI_DataDtrMode */ |
AnnaBridge | 161:aa5281ff4a02 | 161 | uint32_t DummyCycles; /* It indicates the number of dummy cycles inserted before data phase. |
AnnaBridge | 161:aa5281ff4a02 | 162 | This parameter can be a value between 0 and 31 */ |
AnnaBridge | 161:aa5281ff4a02 | 163 | uint32_t DQSMode; /* It enables or not the data strobe management. |
AnnaBridge | 161:aa5281ff4a02 | 164 | This parameter can be a value of @ref OSPI_DQSMode */ |
AnnaBridge | 161:aa5281ff4a02 | 165 | uint32_t SIOOMode; /* It enables or not the SIOO mode. |
AnnaBridge | 161:aa5281ff4a02 | 166 | This parameter can be a value of @ref OSPI_SIOOMode */ |
AnnaBridge | 161:aa5281ff4a02 | 167 | }OSPI_RegularCmdTypeDef; |
AnnaBridge | 161:aa5281ff4a02 | 168 | |
AnnaBridge | 161:aa5281ff4a02 | 169 | /** |
AnnaBridge | 161:aa5281ff4a02 | 170 | * @brief HAL OSPI Hyperbus Configuration Structure definition |
AnnaBridge | 161:aa5281ff4a02 | 171 | */ |
AnnaBridge | 161:aa5281ff4a02 | 172 | typedef struct |
AnnaBridge | 161:aa5281ff4a02 | 173 | { |
AnnaBridge | 161:aa5281ff4a02 | 174 | uint32_t RWRecoveryTime; /* It indicates the number of cycles for the device read write recovery time. |
AnnaBridge | 161:aa5281ff4a02 | 175 | This parameter can be a value between 0 and 255 */ |
AnnaBridge | 161:aa5281ff4a02 | 176 | uint32_t AccessTime; /* It indicates the number of cycles for the device acces time. |
AnnaBridge | 161:aa5281ff4a02 | 177 | This parameter can be a value between 0 and 255 */ |
AnnaBridge | 161:aa5281ff4a02 | 178 | uint32_t WriteZeroLatency; /* It enables or not the latency for the write access. |
AnnaBridge | 161:aa5281ff4a02 | 179 | This parameter can be a value of @ref OSPI_WriteZeroLatency */ |
AnnaBridge | 161:aa5281ff4a02 | 180 | uint32_t LatencyMode; /* It configures the latency mode. |
AnnaBridge | 161:aa5281ff4a02 | 181 | This parameter can be a value of @ref OSPI_LatencyMode */ |
AnnaBridge | 161:aa5281ff4a02 | 182 | }OSPI_HyperbusCfgTypeDef; |
AnnaBridge | 161:aa5281ff4a02 | 183 | |
AnnaBridge | 161:aa5281ff4a02 | 184 | /** |
AnnaBridge | 161:aa5281ff4a02 | 185 | * @brief HAL OSPI Hyperbus Command Structure definition |
AnnaBridge | 161:aa5281ff4a02 | 186 | */ |
AnnaBridge | 161:aa5281ff4a02 | 187 | typedef struct |
AnnaBridge | 161:aa5281ff4a02 | 188 | { |
AnnaBridge | 161:aa5281ff4a02 | 189 | uint32_t AddressSpace; /* It indicates the address space accessed by the command. |
AnnaBridge | 161:aa5281ff4a02 | 190 | This parameter can be a value of @ref OSPI_AddressSpace */ |
AnnaBridge | 161:aa5281ff4a02 | 191 | uint32_t Address; /* It contains the address to be sent tot he device. |
AnnaBridge | 161:aa5281ff4a02 | 192 | This parameter can be a value between 0 and 0xFFFFFFFF */ |
AnnaBridge | 161:aa5281ff4a02 | 193 | uint32_t AddressSize; /* It indicates the size of the address. |
AnnaBridge | 161:aa5281ff4a02 | 194 | This parameter can be a value of @ref OSPI_AddressSize */ |
AnnaBridge | 161:aa5281ff4a02 | 195 | uint32_t NbData; /* It indicates the number of data transferred with this command. |
AnnaBridge | 161:aa5281ff4a02 | 196 | This field is only used for indirect mode. |
AnnaBridge | 161:aa5281ff4a02 | 197 | This parameter can be a value between 1 and 0xFFFFFFFF |
AnnaBridge | 161:aa5281ff4a02 | 198 | In case of autopolling mode, this parameter can be any value between 1 and 4 */ |
AnnaBridge | 161:aa5281ff4a02 | 199 | uint32_t DQSMode; /* It enables or not the data strobe management. |
AnnaBridge | 161:aa5281ff4a02 | 200 | This parameter can be a value of @ref OSPI_DQSMode */ |
AnnaBridge | 161:aa5281ff4a02 | 201 | }OSPI_HyperbusCmdTypeDef; |
AnnaBridge | 161:aa5281ff4a02 | 202 | |
AnnaBridge | 161:aa5281ff4a02 | 203 | /** |
AnnaBridge | 161:aa5281ff4a02 | 204 | * @brief HAL OSPI Auto Polling mode configuration structure definition |
AnnaBridge | 161:aa5281ff4a02 | 205 | */ |
AnnaBridge | 161:aa5281ff4a02 | 206 | typedef struct |
AnnaBridge | 161:aa5281ff4a02 | 207 | { |
AnnaBridge | 161:aa5281ff4a02 | 208 | uint32_t Match; /* Specifies the value to be compared with the masked status register to get a match. |
AnnaBridge | 161:aa5281ff4a02 | 209 | This parameter can be any value between 0 and 0xFFFFFFFF */ |
AnnaBridge | 161:aa5281ff4a02 | 210 | uint32_t Mask; /* Specifies the mask to be applied to the status bytes received. |
AnnaBridge | 161:aa5281ff4a02 | 211 | This parameter can be any value between 0 and 0xFFFFFFFF */ |
AnnaBridge | 161:aa5281ff4a02 | 212 | uint32_t MatchMode; /* Specifies the method used for determining a match. |
AnnaBridge | 161:aa5281ff4a02 | 213 | This parameter can be a value of @ref OSPI_MatchMode */ |
AnnaBridge | 161:aa5281ff4a02 | 214 | uint32_t AutomaticStop; /* Specifies if automatic polling is stopped after a match. |
AnnaBridge | 161:aa5281ff4a02 | 215 | This parameter can be a value of @ref OSPI_AutomaticStop */ |
AnnaBridge | 161:aa5281ff4a02 | 216 | uint32_t Interval; /* Specifies the number of clock cycles between two read during automatic polling phases. |
AnnaBridge | 161:aa5281ff4a02 | 217 | This parameter can be any value between 0 and 0xFFFF */ |
AnnaBridge | 161:aa5281ff4a02 | 218 | }OSPI_AutoPollingTypeDef; |
AnnaBridge | 161:aa5281ff4a02 | 219 | |
AnnaBridge | 161:aa5281ff4a02 | 220 | /** |
AnnaBridge | 161:aa5281ff4a02 | 221 | * @brief HAL OSPI Memory Mapped mode configuration structure definition |
AnnaBridge | 161:aa5281ff4a02 | 222 | */ |
AnnaBridge | 161:aa5281ff4a02 | 223 | typedef struct |
AnnaBridge | 161:aa5281ff4a02 | 224 | { |
AnnaBridge | 161:aa5281ff4a02 | 225 | uint32_t TimeOutActivation; /* Specifies if the timeout counter is enabled to release the chip select. |
AnnaBridge | 161:aa5281ff4a02 | 226 | This parameter can be a value of @ref OSPI_TimeOutActivation */ |
AnnaBridge | 161:aa5281ff4a02 | 227 | uint32_t TimeOutPeriod; /* Specifies the number of clock to wait when the FIFO is full before to release the chip select. |
AnnaBridge | 161:aa5281ff4a02 | 228 | This parameter can be any value between 0 and 0xFFFF */ |
AnnaBridge | 161:aa5281ff4a02 | 229 | }OSPI_MemoryMappedTypeDef; |
AnnaBridge | 161:aa5281ff4a02 | 230 | |
AnnaBridge | 161:aa5281ff4a02 | 231 | /** |
AnnaBridge | 161:aa5281ff4a02 | 232 | * @brief HAL OSPI IO Manager Configuration structure definition |
AnnaBridge | 161:aa5281ff4a02 | 233 | */ |
AnnaBridge | 161:aa5281ff4a02 | 234 | typedef struct |
AnnaBridge | 161:aa5281ff4a02 | 235 | { |
AnnaBridge | 161:aa5281ff4a02 | 236 | uint32_t ClkPort; /* It indicates which port of the OSPI IO Manager is used for the CLK pins. |
AnnaBridge | 161:aa5281ff4a02 | 237 | This parameter can be a value between 1 and 8 */ |
AnnaBridge | 161:aa5281ff4a02 | 238 | uint32_t DQSPort; /* It indicates which port of the OSPI IO Manager is used for the DQS pin. |
AnnaBridge | 161:aa5281ff4a02 | 239 | This parameter can be a value between 1 and 8 */ |
AnnaBridge | 161:aa5281ff4a02 | 240 | uint32_t NCSPort; /* It indicates which port of the OSPI IO Manager is used for the NCS pin. |
AnnaBridge | 161:aa5281ff4a02 | 241 | This parameter can be a value between 1 and 8 */ |
AnnaBridge | 161:aa5281ff4a02 | 242 | uint32_t IOLowPort; /* It indicates which port of the OSPI IO Manager is used for the IO[3:0] pins. |
AnnaBridge | 161:aa5281ff4a02 | 243 | This parameter can be a value of @ref OSPIM_IOPort */ |
AnnaBridge | 161:aa5281ff4a02 | 244 | uint32_t IOHighPort; /* It indicates which port of the OSPI IO Manager is used for the IO[7:4] pins. |
AnnaBridge | 161:aa5281ff4a02 | 245 | This parameter can be a value of @ref OSPIM_IOPort */ |
AnnaBridge | 161:aa5281ff4a02 | 246 | }OSPIM_CfgTypeDef; |
AnnaBridge | 161:aa5281ff4a02 | 247 | |
AnnaBridge | 161:aa5281ff4a02 | 248 | /** |
AnnaBridge | 161:aa5281ff4a02 | 249 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 250 | */ |
AnnaBridge | 161:aa5281ff4a02 | 251 | |
AnnaBridge | 161:aa5281ff4a02 | 252 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 161:aa5281ff4a02 | 253 | /** @defgroup OSPI_Exported_Constants OSPI Exported Constants |
AnnaBridge | 161:aa5281ff4a02 | 254 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 255 | */ |
AnnaBridge | 161:aa5281ff4a02 | 256 | |
AnnaBridge | 161:aa5281ff4a02 | 257 | /** @defgroup OSPI_State OSPI State |
AnnaBridge | 161:aa5281ff4a02 | 258 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 259 | */ |
AnnaBridge | 161:aa5281ff4a02 | 260 | #define HAL_OSPI_STATE_RESET ((uint32_t)0x00000000U) /*!< Initial state */ |
AnnaBridge | 161:aa5281ff4a02 | 261 | #define HAL_OSPI_STATE_HYPERBUS_INIT ((uint32_t)0x00000001U) /*!< Initialization done in hyperbus mode but timing configuration not done */ |
AnnaBridge | 161:aa5281ff4a02 | 262 | #define HAL_OSPI_STATE_READY ((uint32_t)0x00000002U) /*!< Driver ready to be used */ |
AnnaBridge | 161:aa5281ff4a02 | 263 | #define HAL_OSPI_STATE_CMD_CFG ((uint32_t)0x00000004U) /*!< Command (regular or hyperbus) configured, ready for an action */ |
AnnaBridge | 161:aa5281ff4a02 | 264 | #define HAL_OSPI_STATE_READ_CMD_CFG ((uint32_t)0x00000014U) /*!< Read command configuration done, not the write command configuration */ |
AnnaBridge | 161:aa5281ff4a02 | 265 | #define HAL_OSPI_STATE_WRITE_CMD_CFG ((uint32_t)0x00000024U) /*!< Write command configuration done, not the read command configuration */ |
AnnaBridge | 161:aa5281ff4a02 | 266 | #define HAL_OSPI_STATE_BUSY_CMD ((uint32_t)0x00000008U) /*!< Command without data on-going */ |
AnnaBridge | 161:aa5281ff4a02 | 267 | #define HAL_OSPI_STATE_BUSY_TX ((uint32_t)0x00000018U) /*!< Indirect Tx on-going */ |
AnnaBridge | 161:aa5281ff4a02 | 268 | #define HAL_OSPI_STATE_BUSY_RX ((uint32_t)0x00000028U) /*!< Indirect Rx on-going */ |
AnnaBridge | 161:aa5281ff4a02 | 269 | #define HAL_OSPI_STATE_BUSY_AUTO_POLLING ((uint32_t)0x00000048U) /*!< Auto-polling on-going */ |
AnnaBridge | 161:aa5281ff4a02 | 270 | #define HAL_OSPI_STATE_BUSY_MEM_MAPPED ((uint32_t)0x00000088U) /*!< Memory-mapped on-going */ |
AnnaBridge | 161:aa5281ff4a02 | 271 | #define HAL_OSPI_STATE_ABORT ((uint32_t)0x00000100U) /*!< Abort on-going */ |
AnnaBridge | 161:aa5281ff4a02 | 272 | #define HAL_OSPI_STATE_ERROR ((uint32_t)0x00000200U) /*!< Blocking error, driver should be re-initialized */ |
AnnaBridge | 161:aa5281ff4a02 | 273 | /** |
AnnaBridge | 161:aa5281ff4a02 | 274 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 275 | */ |
AnnaBridge | 161:aa5281ff4a02 | 276 | |
AnnaBridge | 161:aa5281ff4a02 | 277 | /** @defgroup OSPI_ErrorCode OSPI Error Code |
AnnaBridge | 161:aa5281ff4a02 | 278 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 279 | */ |
AnnaBridge | 161:aa5281ff4a02 | 280 | #define HAL_OSPI_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ |
AnnaBridge | 161:aa5281ff4a02 | 281 | #define HAL_OSPI_ERROR_TIMEOUT ((uint32_t)0x00000001U) /*!< Timeout error */ |
AnnaBridge | 161:aa5281ff4a02 | 282 | #define HAL_OSPI_ERROR_TRANSFER ((uint32_t)0x00000002U) /*!< Transfer error */ |
AnnaBridge | 161:aa5281ff4a02 | 283 | #define HAL_OSPI_ERROR_DMA ((uint32_t)0x00000004U) /*!< DMA transfer error */ |
AnnaBridge | 161:aa5281ff4a02 | 284 | #define HAL_OSPI_ERROR_INVALID_PARAM ((uint32_t)0x00000008U) /*!< Invalid parameters error */ |
AnnaBridge | 161:aa5281ff4a02 | 285 | #define HAL_OSPI_ERROR_INVALID_SEQUENCE ((uint32_t)0x00000010U) /*!< Sequence of the state machine is incorrect */ |
AnnaBridge | 161:aa5281ff4a02 | 286 | /** |
AnnaBridge | 161:aa5281ff4a02 | 287 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 288 | */ |
AnnaBridge | 161:aa5281ff4a02 | 289 | |
AnnaBridge | 161:aa5281ff4a02 | 290 | /** @defgroup OSPI_DualQuad OSPI Dual-Quad |
AnnaBridge | 161:aa5281ff4a02 | 291 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 292 | */ |
AnnaBridge | 161:aa5281ff4a02 | 293 | #define HAL_OSPI_DUALQUAD_DISABLE ((uint32_t)0x00000000U) /*!< Dual-Quad mode disabled */ |
AnnaBridge | 161:aa5281ff4a02 | 294 | #define HAL_OSPI_DUALQUAD_ENABLE ((uint32_t)OCTOSPI_CR_DQM) /*!< Dual-Quad mode enabled */ |
AnnaBridge | 161:aa5281ff4a02 | 295 | /** |
AnnaBridge | 161:aa5281ff4a02 | 296 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 297 | */ |
AnnaBridge | 161:aa5281ff4a02 | 298 | |
AnnaBridge | 161:aa5281ff4a02 | 299 | /** @defgroup OSPI_MemoryType OSPI Memory Type |
AnnaBridge | 161:aa5281ff4a02 | 300 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 301 | */ |
AnnaBridge | 161:aa5281ff4a02 | 302 | #define HAL_OSPI_MEMTYPE_MICRON ((uint32_t)0x00000000U) /*!< Micron mode */ |
AnnaBridge | 161:aa5281ff4a02 | 303 | #define HAL_OSPI_MEMTYPE_MACRONIX ((uint32_t)OCTOSPI_DCR1_MTYP_0) /*!< Macronix mode */ |
AnnaBridge | 161:aa5281ff4a02 | 304 | #define HAL_OSPI_MEMTYPE_MACRONIX_RAM ((uint32_t)(OCTOSPI_DCR1_MTYP_1 | OCTOSPI_DCR1_MTYP_0)) /*!< Macronix RAM mode */ |
AnnaBridge | 161:aa5281ff4a02 | 305 | #define HAL_OSPI_MEMTYPE_HYPERBUS ((uint32_t)OCTOSPI_DCR1_MTYP_2) /*!< Hyperbus mode */ |
AnnaBridge | 161:aa5281ff4a02 | 306 | /** |
AnnaBridge | 161:aa5281ff4a02 | 307 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 308 | */ |
AnnaBridge | 161:aa5281ff4a02 | 309 | |
AnnaBridge | 161:aa5281ff4a02 | 310 | /** @defgroup OSPI_FreeRunningClock OSPI Free Running Clock |
AnnaBridge | 161:aa5281ff4a02 | 311 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 312 | */ |
AnnaBridge | 161:aa5281ff4a02 | 313 | #define HAL_OSPI_FREERUNCLK_DISABLE ((uint32_t)0x00000000U) /*!< CLK is not free running */ |
AnnaBridge | 161:aa5281ff4a02 | 314 | #define HAL_OSPI_FREERUNCLK_ENABLE ((uint32_t)OCTOSPI_DCR1_FRCK) /*!< CLK is free running (always provided) */ |
AnnaBridge | 161:aa5281ff4a02 | 315 | /** |
AnnaBridge | 161:aa5281ff4a02 | 316 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 317 | */ |
AnnaBridge | 161:aa5281ff4a02 | 318 | |
AnnaBridge | 161:aa5281ff4a02 | 319 | /** @defgroup OSPI_ClockMode OSPI Clock Mode |
AnnaBridge | 161:aa5281ff4a02 | 320 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 321 | */ |
AnnaBridge | 161:aa5281ff4a02 | 322 | #define HAL_OSPI_CLOCK_MODE_0 ((uint32_t)0x00000000U) /*!< CLK must stay low while nCS is high */ |
AnnaBridge | 161:aa5281ff4a02 | 323 | #define HAL_OSPI_CLOCK_MODE_3 ((uint32_t)OCTOSPI_DCR1_CKMODE) /*!< CLK must stay high while nCS is high */ |
AnnaBridge | 161:aa5281ff4a02 | 324 | /** |
AnnaBridge | 161:aa5281ff4a02 | 325 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 326 | */ |
AnnaBridge | 161:aa5281ff4a02 | 327 | |
AnnaBridge | 161:aa5281ff4a02 | 328 | /** @defgroup OSPI_WrapSize OSPI Wrap-Size |
AnnaBridge | 161:aa5281ff4a02 | 329 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 330 | */ |
AnnaBridge | 161:aa5281ff4a02 | 331 | #define HAL_OSPI_WRAP_NOT_SUPPORTED ((uint32_t)0x00000000U) /*!< wrapped reads are not supported by the memory */ |
AnnaBridge | 161:aa5281ff4a02 | 332 | #define HAL_OSPI_WRAP_16_BYTES ((uint32_t)OCTOSPI_DCR2_WRAPSIZE_1) /*!< external memory supports wrap size of 16 bytes */ |
AnnaBridge | 161:aa5281ff4a02 | 333 | #define HAL_OSPI_WRAP_32_BYTES ((uint32_t)(OCTOSPI_DCR2_WRAPSIZE_0 | OCTOSPI_DCR2_WRAPSIZE_1)) /*!< external memory supports wrap size of 32 bytes */ |
AnnaBridge | 161:aa5281ff4a02 | 334 | #define HAL_OSPI_WRAP_64_BYTES ((uint32_t)OCTOSPI_DCR2_WRAPSIZE_2) /*!< external memory supports wrap size of 64 bytes */ |
AnnaBridge | 161:aa5281ff4a02 | 335 | #define HAL_OSPI_WRAP_128_BYTES ((uint32_t)(OCTOSPI_DCR2_WRAPSIZE_0 | OCTOSPI_DCR2_WRAPSIZE_2)) /*!< external memory supports wrap size of 128 bytes */ |
AnnaBridge | 161:aa5281ff4a02 | 336 | /** |
AnnaBridge | 161:aa5281ff4a02 | 337 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 338 | */ |
AnnaBridge | 161:aa5281ff4a02 | 339 | |
AnnaBridge | 161:aa5281ff4a02 | 340 | /** @defgroup OSPI_SampleShifting OSPI Sample Shifting |
AnnaBridge | 161:aa5281ff4a02 | 341 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 342 | */ |
AnnaBridge | 161:aa5281ff4a02 | 343 | #define HAL_OSPI_SAMPLE_SHIFTING_NONE ((uint32_t)0x00000000U) /*!< No shift */ |
AnnaBridge | 161:aa5281ff4a02 | 344 | #define HAL_OSPI_SAMPLE_SHIFTING_HALFCYCLE ((uint32_t)OCTOSPI_TCR_SSHIFT) /*!< 1/2 cycle shift */ |
AnnaBridge | 161:aa5281ff4a02 | 345 | /** |
AnnaBridge | 161:aa5281ff4a02 | 346 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 347 | */ |
AnnaBridge | 161:aa5281ff4a02 | 348 | |
AnnaBridge | 161:aa5281ff4a02 | 349 | /** @defgroup OSPI_DelayHoldQuarterCycle OSPI Delay Hold Quarter Cycle |
AnnaBridge | 161:aa5281ff4a02 | 350 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 351 | */ |
AnnaBridge | 161:aa5281ff4a02 | 352 | #define HAL_OSPI_DHQC_DISABLE ((uint32_t)0x00000000U) /*!< No Delay */ |
AnnaBridge | 161:aa5281ff4a02 | 353 | #define HAL_OSPI_DHQC_ENABLE ((uint32_t)OCTOSPI_TCR_DHQC) /*!< Delay Hold 1/4 cycle */ |
AnnaBridge | 161:aa5281ff4a02 | 354 | /** |
AnnaBridge | 161:aa5281ff4a02 | 355 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 356 | */ |
AnnaBridge | 161:aa5281ff4a02 | 357 | |
AnnaBridge | 161:aa5281ff4a02 | 358 | /** @defgroup OSPI_OperationType OSPI Operation Type |
AnnaBridge | 161:aa5281ff4a02 | 359 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 360 | */ |
AnnaBridge | 161:aa5281ff4a02 | 361 | #define HAL_OSPI_OPTYPE_COMMON_CFG ((uint32_t)0x00000000U) /*!< Common configuration (indirect or auto-polling mode) */ |
AnnaBridge | 161:aa5281ff4a02 | 362 | #define HAL_OSPI_OPTYPE_READ_CFG ((uint32_t)0x00000001U) /*!< Read configuration (memory-mapped mode) */ |
AnnaBridge | 161:aa5281ff4a02 | 363 | #define HAL_OSPI_OPTYPE_WRITE_CFG ((uint32_t)0x00000002U) /*!< Write configuration (memory-mapped mode) */ |
AnnaBridge | 161:aa5281ff4a02 | 364 | /** |
AnnaBridge | 161:aa5281ff4a02 | 365 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 366 | */ |
AnnaBridge | 161:aa5281ff4a02 | 367 | |
AnnaBridge | 161:aa5281ff4a02 | 368 | /** @defgroup OSPI_FlashID OSPI Flash Id |
AnnaBridge | 161:aa5281ff4a02 | 369 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 370 | */ |
AnnaBridge | 161:aa5281ff4a02 | 371 | #define HAL_OSPI_FLASH_ID_1 ((uint32_t)0x00000000U) /*!< FLASH 1 selected */ |
AnnaBridge | 161:aa5281ff4a02 | 372 | #define HAL_OSPI_FLASH_ID_2 ((uint32_t)OCTOSPI_CR_FSEL) /*!< FLASH 2 selected */ |
AnnaBridge | 161:aa5281ff4a02 | 373 | /** |
AnnaBridge | 161:aa5281ff4a02 | 374 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 375 | */ |
AnnaBridge | 161:aa5281ff4a02 | 376 | |
AnnaBridge | 161:aa5281ff4a02 | 377 | /** @defgroup OSPI_InstructionMode OSPI Instruction Mode |
AnnaBridge | 161:aa5281ff4a02 | 378 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 379 | */ |
AnnaBridge | 161:aa5281ff4a02 | 380 | #define HAL_OSPI_INSTRUCTION_NONE ((uint32_t)0x00000000U) /*!< No instruction */ |
AnnaBridge | 161:aa5281ff4a02 | 381 | #define HAL_OSPI_INSTRUCTION_1_LINE ((uint32_t)OCTOSPI_CCR_IMODE_0) /*!< Instruction on a single line */ |
AnnaBridge | 161:aa5281ff4a02 | 382 | #define HAL_OSPI_INSTRUCTION_2_LINES ((uint32_t)OCTOSPI_CCR_IMODE_1) /*!< Instruction on two lines */ |
AnnaBridge | 161:aa5281ff4a02 | 383 | #define HAL_OSPI_INSTRUCTION_4_LINES ((uint32_t)(OCTOSPI_CCR_IMODE_0 | OCTOSPI_CCR_IMODE_1)) /*!< Instruction on four lines */ |
AnnaBridge | 161:aa5281ff4a02 | 384 | #define HAL_OSPI_INSTRUCTION_8_LINES ((uint32_t)OCTOSPI_CCR_IMODE_2) /*!< Instruction on eight lines */ |
AnnaBridge | 161:aa5281ff4a02 | 385 | /** |
AnnaBridge | 161:aa5281ff4a02 | 386 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 387 | */ |
AnnaBridge | 161:aa5281ff4a02 | 388 | |
AnnaBridge | 161:aa5281ff4a02 | 389 | /** @defgroup OSPI_InstructionSize OSPI Instruction Size |
AnnaBridge | 161:aa5281ff4a02 | 390 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 391 | */ |
AnnaBridge | 161:aa5281ff4a02 | 392 | #define HAL_OSPI_INSTRUCTION_8_BITS ((uint32_t)0x00000000U) /*!< 8-bit instruction */ |
AnnaBridge | 161:aa5281ff4a02 | 393 | #define HAL_OSPI_INSTRUCTION_16_BITS ((uint32_t)OCTOSPI_CCR_ISIZE_0) /*!< 16-bit instruction */ |
AnnaBridge | 161:aa5281ff4a02 | 394 | #define HAL_OSPI_INSTRUCTION_24_BITS ((uint32_t)OCTOSPI_CCR_ISIZE_1) /*!< 24-bit instruction */ |
AnnaBridge | 161:aa5281ff4a02 | 395 | #define HAL_OSPI_INSTRUCTION_32_BITS ((uint32_t)OCTOSPI_CCR_ISIZE) /*!< 32-bit instruction */ |
AnnaBridge | 161:aa5281ff4a02 | 396 | /** |
AnnaBridge | 161:aa5281ff4a02 | 397 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 398 | */ |
AnnaBridge | 161:aa5281ff4a02 | 399 | |
AnnaBridge | 161:aa5281ff4a02 | 400 | /** @defgroup OSPI_InstructionDtrMode OSPI Instruction DTR Mode |
AnnaBridge | 161:aa5281ff4a02 | 401 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 402 | */ |
AnnaBridge | 161:aa5281ff4a02 | 403 | #define HAL_OSPI_INSTRUCTION_DTR_DISABLE ((uint32_t)0x00000000U) /*!< DTR mode disabled for instruction phase */ |
AnnaBridge | 161:aa5281ff4a02 | 404 | #define HAL_OSPI_INSTRUCTION_DTR_ENABLE ((uint32_t)OCTOSPI_CCR_IDTR) /*!< DTR mode enabled for instruction phase */ |
AnnaBridge | 161:aa5281ff4a02 | 405 | /** |
AnnaBridge | 161:aa5281ff4a02 | 406 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 407 | */ |
AnnaBridge | 161:aa5281ff4a02 | 408 | |
AnnaBridge | 161:aa5281ff4a02 | 409 | /** @defgroup OSPI_AddressMode OSPI Address Mode |
AnnaBridge | 161:aa5281ff4a02 | 410 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 411 | */ |
AnnaBridge | 161:aa5281ff4a02 | 412 | #define HAL_OSPI_ADDRESS_NONE ((uint32_t)0x00000000U) /*!< No address */ |
AnnaBridge | 161:aa5281ff4a02 | 413 | #define HAL_OSPI_ADDRESS_1_LINE ((uint32_t)OCTOSPI_CCR_ADMODE_0) /*!< Address on a single line */ |
AnnaBridge | 161:aa5281ff4a02 | 414 | #define HAL_OSPI_ADDRESS_2_LINES ((uint32_t)OCTOSPI_CCR_ADMODE_1) /*!< Address on two lines */ |
AnnaBridge | 161:aa5281ff4a02 | 415 | #define HAL_OSPI_ADDRESS_4_LINES ((uint32_t)(OCTOSPI_CCR_ADMODE_0 | OCTOSPI_CCR_ADMODE_1)) /*!< Address on four lines */ |
AnnaBridge | 161:aa5281ff4a02 | 416 | #define HAL_OSPI_ADDRESS_8_LINES ((uint32_t)OCTOSPI_CCR_ADMODE_2) /*!< Address on eight lines */ |
AnnaBridge | 161:aa5281ff4a02 | 417 | /** |
AnnaBridge | 161:aa5281ff4a02 | 418 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 419 | */ |
AnnaBridge | 161:aa5281ff4a02 | 420 | |
AnnaBridge | 161:aa5281ff4a02 | 421 | /** @defgroup OSPI_AddressSize OSPI Address Size |
AnnaBridge | 161:aa5281ff4a02 | 422 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 423 | */ |
AnnaBridge | 161:aa5281ff4a02 | 424 | #define HAL_OSPI_ADDRESS_8_BITS ((uint32_t)0x00000000U) /*!< 8-bit address */ |
AnnaBridge | 161:aa5281ff4a02 | 425 | #define HAL_OSPI_ADDRESS_16_BITS ((uint32_t)OCTOSPI_CCR_ADSIZE_0) /*!< 16-bit address */ |
AnnaBridge | 161:aa5281ff4a02 | 426 | #define HAL_OSPI_ADDRESS_24_BITS ((uint32_t)OCTOSPI_CCR_ADSIZE_1) /*!< 24-bit address */ |
AnnaBridge | 161:aa5281ff4a02 | 427 | #define HAL_OSPI_ADDRESS_32_BITS ((uint32_t)OCTOSPI_CCR_ADSIZE) /*!< 32-bit address */ |
AnnaBridge | 161:aa5281ff4a02 | 428 | /** |
AnnaBridge | 161:aa5281ff4a02 | 429 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 430 | */ |
AnnaBridge | 161:aa5281ff4a02 | 431 | |
AnnaBridge | 161:aa5281ff4a02 | 432 | /** @defgroup OSPI_AddressDtrMode OSPI Address DTR Mode |
AnnaBridge | 161:aa5281ff4a02 | 433 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 434 | */ |
AnnaBridge | 161:aa5281ff4a02 | 435 | #define HAL_OSPI_ADDRESS_DTR_DISABLE ((uint32_t)0x00000000U) /*!< DTR mode disabled for address phase */ |
AnnaBridge | 161:aa5281ff4a02 | 436 | #define HAL_OSPI_ADDRESS_DTR_ENABLE ((uint32_t)OCTOSPI_CCR_ADDTR) /*!< DTR mode enabled for address phase */ |
AnnaBridge | 161:aa5281ff4a02 | 437 | /** |
AnnaBridge | 161:aa5281ff4a02 | 438 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 439 | */ |
AnnaBridge | 161:aa5281ff4a02 | 440 | |
AnnaBridge | 161:aa5281ff4a02 | 441 | /** @defgroup OSPI_AlternateBytesMode OSPI Alternate Bytes Mode |
AnnaBridge | 161:aa5281ff4a02 | 442 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 443 | */ |
AnnaBridge | 161:aa5281ff4a02 | 444 | #define HAL_OSPI_ALTERNATE_BYTES_NONE ((uint32_t)0x00000000U) /*!< No alternate bytes */ |
AnnaBridge | 161:aa5281ff4a02 | 445 | #define HAL_OSPI_ALTERNATE_BYTES_1_LINE ((uint32_t)OCTOSPI_CCR_ABMODE_0) /*!< Alternate bytes on a single line */ |
AnnaBridge | 161:aa5281ff4a02 | 446 | #define HAL_OSPI_ALTERNATE_BYTES_2_LINES ((uint32_t)OCTOSPI_CCR_ABMODE_1) /*!< Alternate bytes on two lines */ |
AnnaBridge | 161:aa5281ff4a02 | 447 | #define HAL_OSPI_ALTERNATE_BYTES_4_LINES ((uint32_t)(OCTOSPI_CCR_ABMODE_0 | OCTOSPI_CCR_ABMODE_1)) /*!< Alternate bytes on four lines */ |
AnnaBridge | 161:aa5281ff4a02 | 448 | #define HAL_OSPI_ALTERNATE_BYTES_8_LINES ((uint32_t)OCTOSPI_CCR_ABMODE_2) /*!< Alternate bytes on eight lines */ |
AnnaBridge | 161:aa5281ff4a02 | 449 | /** |
AnnaBridge | 161:aa5281ff4a02 | 450 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 451 | */ |
AnnaBridge | 161:aa5281ff4a02 | 452 | |
AnnaBridge | 161:aa5281ff4a02 | 453 | /** @defgroup OSPI_AlternateBytesSize OSPI Alternate Bytes Size |
AnnaBridge | 161:aa5281ff4a02 | 454 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 455 | */ |
AnnaBridge | 161:aa5281ff4a02 | 456 | #define HAL_OSPI_ALTERNATE_BYTES_8_BITS ((uint32_t)0x00000000U) /*!< 8-bit alternate bytes */ |
AnnaBridge | 161:aa5281ff4a02 | 457 | #define HAL_OSPI_ALTERNATE_BYTES_16_BITS ((uint32_t)OCTOSPI_CCR_ABSIZE_0) /*!< 16-bit alternate bytes */ |
AnnaBridge | 161:aa5281ff4a02 | 458 | #define HAL_OSPI_ALTERNATE_BYTES_24_BITS ((uint32_t)OCTOSPI_CCR_ABSIZE_1) /*!< 24-bit alternate bytes */ |
AnnaBridge | 161:aa5281ff4a02 | 459 | #define HAL_OSPI_ALTERNATE_BYTES_32_BITS ((uint32_t)OCTOSPI_CCR_ABSIZE) /*!< 32-bit alternate bytes */ |
AnnaBridge | 161:aa5281ff4a02 | 460 | /** |
AnnaBridge | 161:aa5281ff4a02 | 461 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 462 | */ |
AnnaBridge | 161:aa5281ff4a02 | 463 | |
AnnaBridge | 161:aa5281ff4a02 | 464 | /** @defgroup OSPI_AlternateBytesDtrMode OSPI Alternate Bytes DTR Mode |
AnnaBridge | 161:aa5281ff4a02 | 465 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 466 | */ |
AnnaBridge | 161:aa5281ff4a02 | 467 | #define HAL_OSPI_ALTERNATE_BYTES_DTR_DISABLE ((uint32_t)0x00000000U) /*!< DTR mode disabled for alternate bytes phase */ |
AnnaBridge | 161:aa5281ff4a02 | 468 | #define HAL_OSPI_ALTERNATE_BYTES_DTR_ENABLE ((uint32_t)OCTOSPI_CCR_ABDTR) /*!< DTR mode enabled for alternate bytes phase */ |
AnnaBridge | 161:aa5281ff4a02 | 469 | /** |
AnnaBridge | 161:aa5281ff4a02 | 470 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 471 | */ |
AnnaBridge | 161:aa5281ff4a02 | 472 | |
AnnaBridge | 161:aa5281ff4a02 | 473 | /** @defgroup OSPI_DataMode OSPI Data Mode |
AnnaBridge | 161:aa5281ff4a02 | 474 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 475 | */ |
AnnaBridge | 161:aa5281ff4a02 | 476 | #define HAL_OSPI_DATA_NONE ((uint32_t)0x00000000U) /*!< No data */ |
AnnaBridge | 161:aa5281ff4a02 | 477 | #define HAL_OSPI_DATA_1_LINE ((uint32_t)OCTOSPI_CCR_DMODE_0) /*!< Data on a single line */ |
AnnaBridge | 161:aa5281ff4a02 | 478 | #define HAL_OSPI_DATA_2_LINES ((uint32_t)OCTOSPI_CCR_DMODE_1) /*!< Data on two lines */ |
AnnaBridge | 161:aa5281ff4a02 | 479 | #define HAL_OSPI_DATA_4_LINES ((uint32_t)(OCTOSPI_CCR_DMODE_0 | OCTOSPI_CCR_DMODE_1)) /*!< Data on four lines */ |
AnnaBridge | 161:aa5281ff4a02 | 480 | #define HAL_OSPI_DATA_8_LINES ((uint32_t)OCTOSPI_CCR_DMODE_2) /*!< Data on eight lines */ |
AnnaBridge | 161:aa5281ff4a02 | 481 | /** |
AnnaBridge | 161:aa5281ff4a02 | 482 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 483 | */ |
AnnaBridge | 161:aa5281ff4a02 | 484 | |
AnnaBridge | 161:aa5281ff4a02 | 485 | /** @defgroup OSPI_DataDtrMode OSPI Data DTR Mode |
AnnaBridge | 161:aa5281ff4a02 | 486 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 487 | */ |
AnnaBridge | 161:aa5281ff4a02 | 488 | #define HAL_OSPI_DATA_DTR_DISABLE ((uint32_t)0x00000000U) /*!< DTR mode disabled for data phase */ |
AnnaBridge | 161:aa5281ff4a02 | 489 | #define HAL_OSPI_DATA_DTR_ENABLE ((uint32_t)OCTOSPI_CCR_DDTR) /*!< DTR mode enabled for data phase */ |
AnnaBridge | 161:aa5281ff4a02 | 490 | /** |
AnnaBridge | 161:aa5281ff4a02 | 491 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 492 | */ |
AnnaBridge | 161:aa5281ff4a02 | 493 | |
AnnaBridge | 161:aa5281ff4a02 | 494 | /** @defgroup OSPI_DQSMode OSPI DQS Mode |
AnnaBridge | 161:aa5281ff4a02 | 495 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 496 | */ |
AnnaBridge | 161:aa5281ff4a02 | 497 | #define HAL_OSPI_DQS_DISABLE ((uint32_t)0x00000000U) /*!< DQS disabled */ |
AnnaBridge | 161:aa5281ff4a02 | 498 | #define HAL_OSPI_DQS_ENABLE ((uint32_t)OCTOSPI_CCR_DQSE) /*!< DQS enabled */ |
AnnaBridge | 161:aa5281ff4a02 | 499 | /** |
AnnaBridge | 161:aa5281ff4a02 | 500 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 501 | */ |
AnnaBridge | 161:aa5281ff4a02 | 502 | |
AnnaBridge | 161:aa5281ff4a02 | 503 | /** @defgroup OSPI_SIOOMode OSPI SIOO Mode |
AnnaBridge | 161:aa5281ff4a02 | 504 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 505 | */ |
AnnaBridge | 161:aa5281ff4a02 | 506 | #define HAL_OSPI_SIOO_INST_EVERY_CMD ((uint32_t)0x00000000U) /*!< Send instruction on every transaction */ |
AnnaBridge | 161:aa5281ff4a02 | 507 | #define HAL_OSPI_SIOO_INST_ONLY_FIRST_CMD ((uint32_t)OCTOSPI_CCR_SIOO) /*!< Send instruction only for the first command */ |
AnnaBridge | 161:aa5281ff4a02 | 508 | /** |
AnnaBridge | 161:aa5281ff4a02 | 509 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 510 | */ |
AnnaBridge | 161:aa5281ff4a02 | 511 | |
AnnaBridge | 161:aa5281ff4a02 | 512 | /** @defgroup OSPI_WriteZeroLatency OSPI Hyperbus Write Zero Latency Activation |
AnnaBridge | 161:aa5281ff4a02 | 513 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 514 | */ |
AnnaBridge | 161:aa5281ff4a02 | 515 | #define HAL_OSPI_LATENCY_ON_WRITE ((uint32_t)0x00000000U) /*!< Latency on write accesses */ |
AnnaBridge | 161:aa5281ff4a02 | 516 | #define HAL_OSPI_NO_LATENCY_ON_WRITE ((uint32_t)OCTOSPI_HLCR_WZL) /*!< No latency on write accesses */ |
AnnaBridge | 161:aa5281ff4a02 | 517 | /** |
AnnaBridge | 161:aa5281ff4a02 | 518 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 519 | */ |
AnnaBridge | 161:aa5281ff4a02 | 520 | |
AnnaBridge | 161:aa5281ff4a02 | 521 | /** @defgroup OSPI_LatencyMode OSPI Hyperbus Latency Mode |
AnnaBridge | 161:aa5281ff4a02 | 522 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 523 | */ |
AnnaBridge | 161:aa5281ff4a02 | 524 | #define HAL_OSPI_VARIABLE_LATENCY ((uint32_t)0x00000000U) /*!< Variable initial latency */ |
AnnaBridge | 161:aa5281ff4a02 | 525 | #define HAL_OSPI_FIXED_LATENCY ((uint32_t)OCTOSPI_HLCR_LM) /*!< Fixed latency */ |
AnnaBridge | 161:aa5281ff4a02 | 526 | /** |
AnnaBridge | 161:aa5281ff4a02 | 527 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 528 | */ |
AnnaBridge | 161:aa5281ff4a02 | 529 | |
AnnaBridge | 161:aa5281ff4a02 | 530 | /** @defgroup OSPI_AddressSpace OSPI Hyperbus Address Space |
AnnaBridge | 161:aa5281ff4a02 | 531 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 532 | */ |
AnnaBridge | 161:aa5281ff4a02 | 533 | #define HAL_OSPI_MEMORY_ADDRESS_SPACE ((uint32_t)0x00000000U) /*!< HyperBus memory mode */ |
AnnaBridge | 161:aa5281ff4a02 | 534 | #define HAL_OSPI_REGISTER_ADDRESS_SPACE ((uint32_t)OCTOSPI_DCR1_MTYP_0) /*!< HyperBus register mode */ |
AnnaBridge | 161:aa5281ff4a02 | 535 | /** |
AnnaBridge | 161:aa5281ff4a02 | 536 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 537 | */ |
AnnaBridge | 161:aa5281ff4a02 | 538 | |
AnnaBridge | 161:aa5281ff4a02 | 539 | /** @defgroup OSPI_MatchMode OSPI Match Mode |
AnnaBridge | 161:aa5281ff4a02 | 540 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 541 | */ |
AnnaBridge | 161:aa5281ff4a02 | 542 | #define HAL_OSPI_MATCH_MODE_AND ((uint32_t)0x00000000U) /*!< AND match mode between unmasked bits */ |
AnnaBridge | 161:aa5281ff4a02 | 543 | #define HAL_OSPI_MATCH_MODE_OR ((uint32_t)OCTOSPI_CR_PMM) /*!< OR match mode between unmasked bits */ |
AnnaBridge | 161:aa5281ff4a02 | 544 | /** |
AnnaBridge | 161:aa5281ff4a02 | 545 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 546 | */ |
AnnaBridge | 161:aa5281ff4a02 | 547 | |
AnnaBridge | 161:aa5281ff4a02 | 548 | /** @defgroup OSPI_AutomaticStop OSPI Automatic Stop |
AnnaBridge | 161:aa5281ff4a02 | 549 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 550 | */ |
AnnaBridge | 161:aa5281ff4a02 | 551 | #define HAL_OSPI_AUTOMATIC_STOP_DISABLE ((uint32_t)0x00000000U) /*!< AutoPolling stops only with abort or OSPI disabling */ |
AnnaBridge | 161:aa5281ff4a02 | 552 | #define HAL_OSPI_AUTOMATIC_STOP_ENABLE ((uint32_t)OCTOSPI_CR_APMS) /*!< AutoPolling stops as soon as there is a match */ |
AnnaBridge | 161:aa5281ff4a02 | 553 | /** |
AnnaBridge | 161:aa5281ff4a02 | 554 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 555 | */ |
AnnaBridge | 161:aa5281ff4a02 | 556 | |
AnnaBridge | 161:aa5281ff4a02 | 557 | /** @defgroup OSPI_TimeOutActivation OSPI Timeout Activation |
AnnaBridge | 161:aa5281ff4a02 | 558 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 559 | */ |
AnnaBridge | 161:aa5281ff4a02 | 560 | #define HAL_OSPI_TIMEOUT_COUNTER_DISABLE ((uint32_t)0x00000000U) /*!< Timeout counter disabled, nCS remains active */ |
AnnaBridge | 161:aa5281ff4a02 | 561 | #define HAL_OSPI_TIMEOUT_COUNTER_ENABLE ((uint32_t)OCTOSPI_CR_TCEN) /*!< Timeout counter enabled, nCS released when timeout expires */ |
AnnaBridge | 161:aa5281ff4a02 | 562 | /** |
AnnaBridge | 161:aa5281ff4a02 | 563 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 564 | */ |
AnnaBridge | 161:aa5281ff4a02 | 565 | |
AnnaBridge | 161:aa5281ff4a02 | 566 | /** @defgroup OSPI_Flags OSPI Flags |
AnnaBridge | 161:aa5281ff4a02 | 567 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 568 | */ |
AnnaBridge | 161:aa5281ff4a02 | 569 | #define HAL_OSPI_FLAG_BUSY OCTOSPI_SR_BUSY /*!< Busy flag: operation is ongoing */ |
AnnaBridge | 161:aa5281ff4a02 | 570 | #define HAL_OSPI_FLAG_TO OCTOSPI_SR_TOF /*!< Timeout flag: timeout occurs in memory-mapped mode */ |
AnnaBridge | 161:aa5281ff4a02 | 571 | #define HAL_OSPI_FLAG_SM OCTOSPI_SR_SMF /*!< Status match flag: received data matches in autopolling mode */ |
AnnaBridge | 161:aa5281ff4a02 | 572 | #define HAL_OSPI_FLAG_FT OCTOSPI_SR_FTF /*!< Fifo threshold flag: Fifo threshold reached or data left after read from memory is complete */ |
AnnaBridge | 161:aa5281ff4a02 | 573 | #define HAL_OSPI_FLAG_TC OCTOSPI_SR_TCF /*!< Transfer complete flag: programmed number of data have been transferred or the transfer has been aborted */ |
AnnaBridge | 161:aa5281ff4a02 | 574 | #define HAL_OSPI_FLAG_TE OCTOSPI_SR_TEF /*!< Transfer error flag: invalid address is being accessed */ |
AnnaBridge | 161:aa5281ff4a02 | 575 | /** |
AnnaBridge | 161:aa5281ff4a02 | 576 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 577 | */ |
AnnaBridge | 161:aa5281ff4a02 | 578 | |
AnnaBridge | 161:aa5281ff4a02 | 579 | /** @defgroup OSPI_Interrupts OSPI Interrupts |
AnnaBridge | 161:aa5281ff4a02 | 580 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 581 | */ |
AnnaBridge | 161:aa5281ff4a02 | 582 | #define HAL_OSPI_IT_TO OCTOSPI_CR_TOIE /*!< Interrupt on the timeout flag */ |
AnnaBridge | 161:aa5281ff4a02 | 583 | #define HAL_OSPI_IT_SM OCTOSPI_CR_SMIE /*!< Interrupt on the status match flag */ |
AnnaBridge | 161:aa5281ff4a02 | 584 | #define HAL_OSPI_IT_FT OCTOSPI_CR_FTIE /*!< Interrupt on the fifo threshold flag */ |
AnnaBridge | 161:aa5281ff4a02 | 585 | #define HAL_OSPI_IT_TC OCTOSPI_CR_TCIE /*!< Interrupt on the transfer complete flag */ |
AnnaBridge | 161:aa5281ff4a02 | 586 | #define HAL_OSPI_IT_TE OCTOSPI_CR_TEIE /*!< Interrupt on the transfer error flag */ |
AnnaBridge | 161:aa5281ff4a02 | 587 | /** |
AnnaBridge | 161:aa5281ff4a02 | 588 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 589 | */ |
AnnaBridge | 161:aa5281ff4a02 | 590 | |
AnnaBridge | 161:aa5281ff4a02 | 591 | /** @defgroup OSPI_Timeout_definition OSPI Timeout definition |
AnnaBridge | 161:aa5281ff4a02 | 592 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 593 | */ |
AnnaBridge | 161:aa5281ff4a02 | 594 | #define HAL_OSPI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000U) /* 5 s */ |
AnnaBridge | 161:aa5281ff4a02 | 595 | /** |
AnnaBridge | 161:aa5281ff4a02 | 596 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 597 | */ |
AnnaBridge | 161:aa5281ff4a02 | 598 | |
AnnaBridge | 161:aa5281ff4a02 | 599 | /** @defgroup OSPIM_IOPort OSPI IO Manager IO Port |
AnnaBridge | 161:aa5281ff4a02 | 600 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 601 | */ |
AnnaBridge | 161:aa5281ff4a02 | 602 | #define HAL_OSPIM_IOPORT_1_LOW ((uint32_t)(OCTOSPIM_PCR_IOLEN | 0x1)) /*!< Port 1 - IO[3:0] */ |
AnnaBridge | 161:aa5281ff4a02 | 603 | #define HAL_OSPIM_IOPORT_1_HIGH ((uint32_t)(OCTOSPIM_PCR_IOHEN | 0x1)) /*!< Port 1 - IO[7:4] */ |
AnnaBridge | 161:aa5281ff4a02 | 604 | #define HAL_OSPIM_IOPORT_2_LOW ((uint32_t)(OCTOSPIM_PCR_IOLEN | 0x2)) /*!< Port 2 - IO[3:0] */ |
AnnaBridge | 161:aa5281ff4a02 | 605 | #define HAL_OSPIM_IOPORT_2_HIGH ((uint32_t)(OCTOSPIM_PCR_IOHEN | 0x2)) /*!< Port 2 - IO[7:4] */ |
AnnaBridge | 161:aa5281ff4a02 | 606 | /** |
AnnaBridge | 161:aa5281ff4a02 | 607 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 608 | */ |
AnnaBridge | 161:aa5281ff4a02 | 609 | /** |
AnnaBridge | 161:aa5281ff4a02 | 610 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 611 | */ |
AnnaBridge | 161:aa5281ff4a02 | 612 | |
AnnaBridge | 161:aa5281ff4a02 | 613 | /* Exported macros -----------------------------------------------------------*/ |
AnnaBridge | 161:aa5281ff4a02 | 614 | /** @defgroup OSPI_Exported_Macros OSPI Exported Macros |
AnnaBridge | 161:aa5281ff4a02 | 615 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 616 | */ |
AnnaBridge | 161:aa5281ff4a02 | 617 | /** @brief Reset OSPI handle state. |
AnnaBridge | 161:aa5281ff4a02 | 618 | * @param __HANDLE__: OSPI handle. |
AnnaBridge | 161:aa5281ff4a02 | 619 | * @retval None |
AnnaBridge | 161:aa5281ff4a02 | 620 | */ |
AnnaBridge | 161:aa5281ff4a02 | 621 | #define __HAL_OSPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_OSPI_STATE_RESET) |
AnnaBridge | 161:aa5281ff4a02 | 622 | |
AnnaBridge | 161:aa5281ff4a02 | 623 | /** @brief Enable the OSPI peripheral. |
AnnaBridge | 161:aa5281ff4a02 | 624 | * @param __HANDLE__: specifies the OSPI Handle. |
AnnaBridge | 161:aa5281ff4a02 | 625 | * @retval None |
AnnaBridge | 161:aa5281ff4a02 | 626 | */ |
AnnaBridge | 161:aa5281ff4a02 | 627 | #define __HAL_OSPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, OCTOSPI_CR_EN) |
AnnaBridge | 161:aa5281ff4a02 | 628 | |
AnnaBridge | 161:aa5281ff4a02 | 629 | /** @brief Disable the OSPI peripheral. |
AnnaBridge | 161:aa5281ff4a02 | 630 | * @param __HANDLE__: specifies the OSPI Handle. |
AnnaBridge | 161:aa5281ff4a02 | 631 | * @retval None |
AnnaBridge | 161:aa5281ff4a02 | 632 | */ |
AnnaBridge | 161:aa5281ff4a02 | 633 | #define __HAL_OSPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, OCTOSPI_CR_EN) |
AnnaBridge | 161:aa5281ff4a02 | 634 | |
AnnaBridge | 161:aa5281ff4a02 | 635 | /** @brief Enable the specified OSPI interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 636 | * @param __HANDLE__: specifies the OSPI Handle. |
AnnaBridge | 161:aa5281ff4a02 | 637 | * @param __INTERRUPT__: specifies the OSPI interrupt source to enable. |
AnnaBridge | 161:aa5281ff4a02 | 638 | * This parameter can be one of the following values: |
AnnaBridge | 161:aa5281ff4a02 | 639 | * @arg HAL_OSPI_IT_TO: OSPI Timeout interrupt |
AnnaBridge | 161:aa5281ff4a02 | 640 | * @arg HAL_OSPI_IT_SM: OSPI Status match interrupt |
AnnaBridge | 161:aa5281ff4a02 | 641 | * @arg HAL_OSPI_IT_FT: OSPI FIFO threshold interrupt |
AnnaBridge | 161:aa5281ff4a02 | 642 | * @arg HAL_OSPI_IT_TC: OSPI Transfer complete interrupt |
AnnaBridge | 161:aa5281ff4a02 | 643 | * @arg HAL_OSPI_IT_TE: OSPI Transfer error interrupt |
AnnaBridge | 161:aa5281ff4a02 | 644 | * @retval None |
AnnaBridge | 161:aa5281ff4a02 | 645 | */ |
AnnaBridge | 161:aa5281ff4a02 | 646 | #define __HAL_OSPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
AnnaBridge | 161:aa5281ff4a02 | 647 | |
AnnaBridge | 161:aa5281ff4a02 | 648 | |
AnnaBridge | 161:aa5281ff4a02 | 649 | /** @brief Disable the specified OSPI interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 650 | * @param __HANDLE__: specifies the OSPI Handle. |
AnnaBridge | 161:aa5281ff4a02 | 651 | * @param __INTERRUPT__: specifies the OSPI interrupt source to disable. |
AnnaBridge | 161:aa5281ff4a02 | 652 | * This parameter can be one of the following values: |
AnnaBridge | 161:aa5281ff4a02 | 653 | * @arg HAL_OSPI_IT_TO: OSPI Timeout interrupt |
AnnaBridge | 161:aa5281ff4a02 | 654 | * @arg HAL_OSPI_IT_SM: OSPI Status match interrupt |
AnnaBridge | 161:aa5281ff4a02 | 655 | * @arg HAL_OSPI_IT_FT: OSPI FIFO threshold interrupt |
AnnaBridge | 161:aa5281ff4a02 | 656 | * @arg HAL_OSPI_IT_TC: OSPI Transfer complete interrupt |
AnnaBridge | 161:aa5281ff4a02 | 657 | * @arg HAL_OSPI_IT_TE: OSPI Transfer error interrupt |
AnnaBridge | 161:aa5281ff4a02 | 658 | * @retval None |
AnnaBridge | 161:aa5281ff4a02 | 659 | */ |
AnnaBridge | 161:aa5281ff4a02 | 660 | #define __HAL_OSPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
AnnaBridge | 161:aa5281ff4a02 | 661 | |
AnnaBridge | 161:aa5281ff4a02 | 662 | /** @brief Check whether the specified OSPI interrupt source is enabled or not. |
AnnaBridge | 161:aa5281ff4a02 | 663 | * @param __HANDLE__: specifies the OSPI Handle. |
AnnaBridge | 161:aa5281ff4a02 | 664 | * @param __INTERRUPT__: specifies the OSPI interrupt source to check. |
AnnaBridge | 161:aa5281ff4a02 | 665 | * This parameter can be one of the following values: |
AnnaBridge | 161:aa5281ff4a02 | 666 | * @arg HAL_OSPI_IT_TO: OSPI Timeout interrupt |
AnnaBridge | 161:aa5281ff4a02 | 667 | * @arg HAL_OSPI_IT_SM: OSPI Status match interrupt |
AnnaBridge | 161:aa5281ff4a02 | 668 | * @arg HAL_OSPI_IT_FT: OSPI FIFO threshold interrupt |
AnnaBridge | 161:aa5281ff4a02 | 669 | * @arg HAL_OSPI_IT_TC: OSPI Transfer complete interrupt |
AnnaBridge | 161:aa5281ff4a02 | 670 | * @arg HAL_OSPI_IT_TE: OSPI Transfer error interrupt |
AnnaBridge | 161:aa5281ff4a02 | 671 | * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
AnnaBridge | 161:aa5281ff4a02 | 672 | */ |
AnnaBridge | 161:aa5281ff4a02 | 673 | #define __HAL_OSPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) == (__INTERRUPT__)) |
AnnaBridge | 161:aa5281ff4a02 | 674 | |
AnnaBridge | 161:aa5281ff4a02 | 675 | /** |
AnnaBridge | 161:aa5281ff4a02 | 676 | * @brief Check whether the selected OSPI flag is set or not. |
AnnaBridge | 161:aa5281ff4a02 | 677 | * @param __HANDLE__: specifies the OSPI Handle. |
AnnaBridge | 161:aa5281ff4a02 | 678 | * @param __FLAG__: specifies the OSPI flag to check. |
AnnaBridge | 161:aa5281ff4a02 | 679 | * This parameter can be one of the following values: |
AnnaBridge | 161:aa5281ff4a02 | 680 | * @arg HAL_OSPI_FLAG_BUSY: OSPI Busy flag |
AnnaBridge | 161:aa5281ff4a02 | 681 | * @arg HAL_OSPI_FLAG_TO: OSPI Timeout flag |
AnnaBridge | 161:aa5281ff4a02 | 682 | * @arg HAL_OSPI_FLAG_SM: OSPI Status match flag |
AnnaBridge | 161:aa5281ff4a02 | 683 | * @arg HAL_OSPI_FLAG_FT: OSPI FIFO threshold flag |
AnnaBridge | 161:aa5281ff4a02 | 684 | * @arg HAL_OSPI_FLAG_TC: OSPI Transfer complete flag |
AnnaBridge | 161:aa5281ff4a02 | 685 | * @arg HAL_OSPI_FLAG_TE: OSPI Transfer error flag |
AnnaBridge | 161:aa5281ff4a02 | 686 | * @retval None |
AnnaBridge | 161:aa5281ff4a02 | 687 | */ |
AnnaBridge | 161:aa5281ff4a02 | 688 | #define __HAL_OSPI_GET_FLAG(__HANDLE__, __FLAG__) ((READ_BIT((__HANDLE__)->Instance->SR, (__FLAG__)) != 0) ? SET : RESET) |
AnnaBridge | 161:aa5281ff4a02 | 689 | |
AnnaBridge | 161:aa5281ff4a02 | 690 | /** @brief Clears the specified OSPI's flag status. |
AnnaBridge | 161:aa5281ff4a02 | 691 | * @param __HANDLE__: specifies the OSPI Handle. |
AnnaBridge | 161:aa5281ff4a02 | 692 | * @param __FLAG__: specifies the OSPI clear register flag that needs to be set |
AnnaBridge | 161:aa5281ff4a02 | 693 | * This parameter can be one of the following values: |
AnnaBridge | 161:aa5281ff4a02 | 694 | * @arg HAL_OSPI_FLAG_TO: OSPI Timeout flag |
AnnaBridge | 161:aa5281ff4a02 | 695 | * @arg HAL_OSPI_FLAG_SM: OSPI Status match flag |
AnnaBridge | 161:aa5281ff4a02 | 696 | * @arg HAL_OSPI_FLAG_TC: OSPI Transfer complete flag |
AnnaBridge | 161:aa5281ff4a02 | 697 | * @arg HAL_OSPI_FLAG_TE: OSPI Transfer error flag |
AnnaBridge | 161:aa5281ff4a02 | 698 | * @retval None |
AnnaBridge | 161:aa5281ff4a02 | 699 | */ |
AnnaBridge | 161:aa5281ff4a02 | 700 | #define __HAL_OSPI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->FCR, (__FLAG__)) |
AnnaBridge | 161:aa5281ff4a02 | 701 | |
AnnaBridge | 161:aa5281ff4a02 | 702 | /** |
AnnaBridge | 161:aa5281ff4a02 | 703 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 704 | */ |
AnnaBridge | 161:aa5281ff4a02 | 705 | |
AnnaBridge | 161:aa5281ff4a02 | 706 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 161:aa5281ff4a02 | 707 | /** @addtogroup OSPI_Exported_Functions |
AnnaBridge | 161:aa5281ff4a02 | 708 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 709 | */ |
AnnaBridge | 161:aa5281ff4a02 | 710 | |
AnnaBridge | 161:aa5281ff4a02 | 711 | /* Initialization/de-initialization functions ********************************/ |
AnnaBridge | 161:aa5281ff4a02 | 712 | /** @addtogroup OSPI_Exported_Functions_Group1 |
AnnaBridge | 161:aa5281ff4a02 | 713 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 714 | */ |
AnnaBridge | 161:aa5281ff4a02 | 715 | HAL_StatusTypeDef HAL_OSPI_Init (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 716 | void HAL_OSPI_MspInit (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 717 | HAL_StatusTypeDef HAL_OSPI_DeInit (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 718 | void HAL_OSPI_MspDeInit (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 719 | |
AnnaBridge | 161:aa5281ff4a02 | 720 | /** |
AnnaBridge | 161:aa5281ff4a02 | 721 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 722 | */ |
AnnaBridge | 161:aa5281ff4a02 | 723 | |
AnnaBridge | 161:aa5281ff4a02 | 724 | /* IO operation functions *****************************************************/ |
AnnaBridge | 161:aa5281ff4a02 | 725 | /** @addtogroup OSPI_Exported_Functions_Group2 |
AnnaBridge | 161:aa5281ff4a02 | 726 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 727 | */ |
AnnaBridge | 161:aa5281ff4a02 | 728 | /* OSPI IRQ handler function */ |
AnnaBridge | 161:aa5281ff4a02 | 729 | void HAL_OSPI_IRQHandler (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 730 | |
AnnaBridge | 161:aa5281ff4a02 | 731 | /* OSPI command configuration functions */ |
AnnaBridge | 161:aa5281ff4a02 | 732 | HAL_StatusTypeDef HAL_OSPI_Command (OSPI_HandleTypeDef *hospi, OSPI_RegularCmdTypeDef *cmd, uint32_t Timeout); |
AnnaBridge | 161:aa5281ff4a02 | 733 | HAL_StatusTypeDef HAL_OSPI_Command_IT (OSPI_HandleTypeDef *hospi, OSPI_RegularCmdTypeDef *cmd); |
AnnaBridge | 161:aa5281ff4a02 | 734 | HAL_StatusTypeDef HAL_OSPI_HyperbusCfg (OSPI_HandleTypeDef *hospi, OSPI_HyperbusCfgTypeDef *cfg, uint32_t Timeout); |
AnnaBridge | 161:aa5281ff4a02 | 735 | HAL_StatusTypeDef HAL_OSPI_HyperbusCmd (OSPI_HandleTypeDef *hospi, OSPI_HyperbusCmdTypeDef *cmd, uint32_t Timeout); |
AnnaBridge | 161:aa5281ff4a02 | 736 | |
AnnaBridge | 161:aa5281ff4a02 | 737 | /* OSPI indirect mode functions */ |
AnnaBridge | 161:aa5281ff4a02 | 738 | HAL_StatusTypeDef HAL_OSPI_Transmit (OSPI_HandleTypeDef *hospi, uint8_t *pData, uint32_t Timeout); |
AnnaBridge | 161:aa5281ff4a02 | 739 | HAL_StatusTypeDef HAL_OSPI_Receive (OSPI_HandleTypeDef *hospi, uint8_t *pData, uint32_t Timeout); |
AnnaBridge | 161:aa5281ff4a02 | 740 | HAL_StatusTypeDef HAL_OSPI_Transmit_IT (OSPI_HandleTypeDef *hospi, uint8_t *pData); |
AnnaBridge | 161:aa5281ff4a02 | 741 | HAL_StatusTypeDef HAL_OSPI_Receive_IT (OSPI_HandleTypeDef *hospi, uint8_t *pData); |
AnnaBridge | 161:aa5281ff4a02 | 742 | HAL_StatusTypeDef HAL_OSPI_Transmit_DMA (OSPI_HandleTypeDef *hospi, uint8_t *pData); |
AnnaBridge | 161:aa5281ff4a02 | 743 | HAL_StatusTypeDef HAL_OSPI_Receive_DMA (OSPI_HandleTypeDef *hospi, uint8_t *pData); |
AnnaBridge | 161:aa5281ff4a02 | 744 | |
AnnaBridge | 161:aa5281ff4a02 | 745 | /* OSPI status flag polling mode functions */ |
AnnaBridge | 161:aa5281ff4a02 | 746 | HAL_StatusTypeDef HAL_OSPI_AutoPolling (OSPI_HandleTypeDef *hospi, OSPI_AutoPollingTypeDef *cfg, uint32_t Timeout); |
AnnaBridge | 161:aa5281ff4a02 | 747 | HAL_StatusTypeDef HAL_OSPI_AutoPolling_IT (OSPI_HandleTypeDef *hospi, OSPI_AutoPollingTypeDef *cfg); |
AnnaBridge | 161:aa5281ff4a02 | 748 | |
AnnaBridge | 161:aa5281ff4a02 | 749 | /* OSPI memory-mapped mode functions */ |
AnnaBridge | 161:aa5281ff4a02 | 750 | HAL_StatusTypeDef HAL_OSPI_MemoryMapped (OSPI_HandleTypeDef *hospi, OSPI_MemoryMappedTypeDef *cfg); |
AnnaBridge | 161:aa5281ff4a02 | 751 | |
AnnaBridge | 161:aa5281ff4a02 | 752 | /* Callback functions in non-blocking modes ***********************************/ |
AnnaBridge | 161:aa5281ff4a02 | 753 | void HAL_OSPI_ErrorCallback (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 754 | void HAL_OSPI_AbortCpltCallback (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 755 | void HAL_OSPI_FifoThresholdCallback(OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 756 | |
AnnaBridge | 161:aa5281ff4a02 | 757 | /* OSPI indirect mode functions */ |
AnnaBridge | 161:aa5281ff4a02 | 758 | void HAL_OSPI_CmdCpltCallback (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 759 | void HAL_OSPI_RxCpltCallback (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 760 | void HAL_OSPI_TxCpltCallback (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 761 | void HAL_OSPI_RxHalfCpltCallback (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 762 | void HAL_OSPI_TxHalfCpltCallback (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 763 | |
AnnaBridge | 161:aa5281ff4a02 | 764 | /* OSPI status flag polling mode functions */ |
AnnaBridge | 161:aa5281ff4a02 | 765 | void HAL_OSPI_StatusMatchCallback (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 766 | |
AnnaBridge | 161:aa5281ff4a02 | 767 | /* OSPI memory-mapped mode functions */ |
AnnaBridge | 161:aa5281ff4a02 | 768 | void HAL_OSPI_TimeOutCallback (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 769 | |
AnnaBridge | 161:aa5281ff4a02 | 770 | /** |
AnnaBridge | 161:aa5281ff4a02 | 771 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 772 | */ |
AnnaBridge | 161:aa5281ff4a02 | 773 | |
AnnaBridge | 161:aa5281ff4a02 | 774 | /* Peripheral Control and State functions ************************************/ |
AnnaBridge | 161:aa5281ff4a02 | 775 | /** @addtogroup OSPI_Exported_Functions_Group3 |
AnnaBridge | 161:aa5281ff4a02 | 776 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 777 | */ |
AnnaBridge | 161:aa5281ff4a02 | 778 | HAL_StatusTypeDef HAL_OSPI_Abort (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 779 | HAL_StatusTypeDef HAL_OSPI_Abort_IT (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 780 | HAL_StatusTypeDef HAL_OSPI_SetFifoThreshold (OSPI_HandleTypeDef *hospi, uint32_t Threshold); |
AnnaBridge | 161:aa5281ff4a02 | 781 | uint32_t HAL_OSPI_GetFifoThreshold (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 782 | HAL_StatusTypeDef HAL_OSPI_SetTimeout (OSPI_HandleTypeDef *hospi, uint32_t Timeout); |
AnnaBridge | 161:aa5281ff4a02 | 783 | uint32_t HAL_OSPI_GetError (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 784 | uint32_t HAL_OSPI_GetState (OSPI_HandleTypeDef *hospi); |
AnnaBridge | 161:aa5281ff4a02 | 785 | |
AnnaBridge | 161:aa5281ff4a02 | 786 | /** |
AnnaBridge | 161:aa5281ff4a02 | 787 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 788 | */ |
AnnaBridge | 161:aa5281ff4a02 | 789 | |
AnnaBridge | 161:aa5281ff4a02 | 790 | /* OSPI IO Manager configuration function ************************************/ |
AnnaBridge | 161:aa5281ff4a02 | 791 | /** @addtogroup OSPI_Exported_Functions_Group4 |
AnnaBridge | 161:aa5281ff4a02 | 792 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 793 | */ |
AnnaBridge | 161:aa5281ff4a02 | 794 | HAL_StatusTypeDef HAL_OSPIM_Config (OSPI_HandleTypeDef *hospi, OSPIM_CfgTypeDef *cfg, uint32_t Timeout); |
AnnaBridge | 161:aa5281ff4a02 | 795 | |
AnnaBridge | 161:aa5281ff4a02 | 796 | /** |
AnnaBridge | 161:aa5281ff4a02 | 797 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 798 | */ |
AnnaBridge | 161:aa5281ff4a02 | 799 | |
AnnaBridge | 161:aa5281ff4a02 | 800 | /** |
AnnaBridge | 161:aa5281ff4a02 | 801 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 802 | */ |
AnnaBridge | 161:aa5281ff4a02 | 803 | /* End of exported functions -------------------------------------------------*/ |
AnnaBridge | 161:aa5281ff4a02 | 804 | |
AnnaBridge | 161:aa5281ff4a02 | 805 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 161:aa5281ff4a02 | 806 | /** |
AnnaBridge | 161:aa5281ff4a02 | 807 | @cond 0 |
AnnaBridge | 161:aa5281ff4a02 | 808 | */ |
AnnaBridge | 161:aa5281ff4a02 | 809 | #define IS_OSPI_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) >= 1) && ((THRESHOLD) <= 32)) |
AnnaBridge | 161:aa5281ff4a02 | 810 | |
AnnaBridge | 161:aa5281ff4a02 | 811 | #define IS_OSPI_DUALQUAD_MODE(MODE) (((MODE) == HAL_OSPI_DUALQUAD_DISABLE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 812 | ((MODE) == HAL_OSPI_DUALQUAD_ENABLE)) |
AnnaBridge | 161:aa5281ff4a02 | 813 | |
AnnaBridge | 161:aa5281ff4a02 | 814 | #define IS_OSPI_MEMORY_TYPE(TYPE) (((TYPE) == HAL_OSPI_MEMTYPE_MICRON) || \ |
AnnaBridge | 161:aa5281ff4a02 | 815 | ((TYPE) == HAL_OSPI_MEMTYPE_MACRONIX) || \ |
AnnaBridge | 161:aa5281ff4a02 | 816 | ((TYPE) == HAL_OSPI_MEMTYPE_HYPERBUS)) |
AnnaBridge | 161:aa5281ff4a02 | 817 | |
AnnaBridge | 161:aa5281ff4a02 | 818 | #define IS_OSPI_DEVICE_SIZE(SIZE) (((SIZE) >= 1) && ((SIZE) <= 32)) |
AnnaBridge | 161:aa5281ff4a02 | 819 | |
AnnaBridge | 161:aa5281ff4a02 | 820 | #define IS_OSPI_CS_HIGH_TIME(TIME) (((TIME) >= 1) && ((TIME) <= 8)) |
AnnaBridge | 161:aa5281ff4a02 | 821 | |
AnnaBridge | 161:aa5281ff4a02 | 822 | #define IS_OSPI_FREE_RUN_CLK(CLK) (((CLK) == HAL_OSPI_FREERUNCLK_DISABLE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 823 | ((CLK) == HAL_OSPI_FREERUNCLK_ENABLE)) |
AnnaBridge | 161:aa5281ff4a02 | 824 | |
AnnaBridge | 161:aa5281ff4a02 | 825 | #define IS_OSPI_CLOCK_MODE(MODE) (((MODE) == HAL_OSPI_CLOCK_MODE_0) || \ |
AnnaBridge | 161:aa5281ff4a02 | 826 | ((MODE) == HAL_OSPI_CLOCK_MODE_3)) |
AnnaBridge | 161:aa5281ff4a02 | 827 | |
AnnaBridge | 161:aa5281ff4a02 | 828 | #define IS_OSPI_WRAP_SIZE(SIZE) (((SIZE) == HAL_OSPI_WRAP_NOT_SUPPORTED) || \ |
AnnaBridge | 161:aa5281ff4a02 | 829 | ((SIZE) == HAL_OSPI_WRAP_16_BYTES) || \ |
AnnaBridge | 161:aa5281ff4a02 | 830 | ((SIZE) == HAL_OSPI_WRAP_32_BYTES) || \ |
AnnaBridge | 161:aa5281ff4a02 | 831 | ((SIZE) == HAL_OSPI_WRAP_64_BYTES) || \ |
AnnaBridge | 161:aa5281ff4a02 | 832 | ((SIZE) == HAL_OSPI_WRAP_128_BYTES)) |
AnnaBridge | 161:aa5281ff4a02 | 833 | |
AnnaBridge | 161:aa5281ff4a02 | 834 | #define IS_OSPI_CLK_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 256)) |
AnnaBridge | 161:aa5281ff4a02 | 835 | |
AnnaBridge | 161:aa5281ff4a02 | 836 | #define IS_OSPI_SAMPLE_SHIFTING(CYCLE) (((CYCLE) == HAL_OSPI_SAMPLE_SHIFTING_NONE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 837 | ((CYCLE) == HAL_OSPI_SAMPLE_SHIFTING_HALFCYCLE)) |
AnnaBridge | 161:aa5281ff4a02 | 838 | |
AnnaBridge | 161:aa5281ff4a02 | 839 | #define IS_OSPI_DHQC(CYCLE) (((CYCLE) == HAL_OSPI_DHQC_DISABLE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 840 | ((CYCLE) == HAL_OSPI_DHQC_ENABLE)) |
AnnaBridge | 161:aa5281ff4a02 | 841 | |
AnnaBridge | 161:aa5281ff4a02 | 842 | #define IS_OSPI_OPERATION_TYPE(TYPE) (((TYPE) == HAL_OSPI_OPTYPE_COMMON_CFG) || \ |
AnnaBridge | 161:aa5281ff4a02 | 843 | ((TYPE) == HAL_OSPI_OPTYPE_READ_CFG) || \ |
AnnaBridge | 161:aa5281ff4a02 | 844 | ((TYPE) == HAL_OSPI_OPTYPE_WRITE_CFG)) |
AnnaBridge | 161:aa5281ff4a02 | 845 | |
AnnaBridge | 161:aa5281ff4a02 | 846 | #define IS_OSPI_FLASH_ID(FLASH) (((FLASH) == HAL_OSPI_FLASH_ID_1) || \ |
AnnaBridge | 161:aa5281ff4a02 | 847 | ((FLASH) == HAL_OSPI_FLASH_ID_2)) |
AnnaBridge | 161:aa5281ff4a02 | 848 | |
AnnaBridge | 161:aa5281ff4a02 | 849 | #define IS_OSPI_INSTRUCTION_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_NONE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 850 | ((MODE) == HAL_OSPI_INSTRUCTION_1_LINE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 851 | ((MODE) == HAL_OSPI_INSTRUCTION_2_LINES) || \ |
AnnaBridge | 161:aa5281ff4a02 | 852 | ((MODE) == HAL_OSPI_INSTRUCTION_4_LINES) || \ |
AnnaBridge | 161:aa5281ff4a02 | 853 | ((MODE) == HAL_OSPI_INSTRUCTION_8_LINES)) |
AnnaBridge | 161:aa5281ff4a02 | 854 | |
AnnaBridge | 161:aa5281ff4a02 | 855 | #define IS_OSPI_INSTRUCTION_SIZE(SIZE) (((SIZE) == HAL_OSPI_INSTRUCTION_8_BITS) || \ |
AnnaBridge | 161:aa5281ff4a02 | 856 | ((SIZE) == HAL_OSPI_INSTRUCTION_16_BITS) || \ |
AnnaBridge | 161:aa5281ff4a02 | 857 | ((SIZE) == HAL_OSPI_INSTRUCTION_24_BITS) || \ |
AnnaBridge | 161:aa5281ff4a02 | 858 | ((SIZE) == HAL_OSPI_INSTRUCTION_32_BITS)) |
AnnaBridge | 161:aa5281ff4a02 | 859 | |
AnnaBridge | 161:aa5281ff4a02 | 860 | #define IS_OSPI_INSTRUCTION_DTR_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_DTR_DISABLE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 861 | ((MODE) == HAL_OSPI_INSTRUCTION_DTR_ENABLE)) |
AnnaBridge | 161:aa5281ff4a02 | 862 | |
AnnaBridge | 161:aa5281ff4a02 | 863 | #define IS_OSPI_ADDRESS_MODE(MODE) (((MODE) == HAL_OSPI_ADDRESS_NONE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 864 | ((MODE) == HAL_OSPI_ADDRESS_1_LINE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 865 | ((MODE) == HAL_OSPI_ADDRESS_2_LINES) || \ |
AnnaBridge | 161:aa5281ff4a02 | 866 | ((MODE) == HAL_OSPI_ADDRESS_4_LINES) || \ |
AnnaBridge | 161:aa5281ff4a02 | 867 | ((MODE) == HAL_OSPI_ADDRESS_8_LINES)) |
AnnaBridge | 161:aa5281ff4a02 | 868 | |
AnnaBridge | 161:aa5281ff4a02 | 869 | #define IS_OSPI_ADDRESS_SIZE(SIZE) (((SIZE) == HAL_OSPI_ADDRESS_8_BITS) || \ |
AnnaBridge | 161:aa5281ff4a02 | 870 | ((SIZE) == HAL_OSPI_ADDRESS_16_BITS) || \ |
AnnaBridge | 161:aa5281ff4a02 | 871 | ((SIZE) == HAL_OSPI_ADDRESS_24_BITS) || \ |
AnnaBridge | 161:aa5281ff4a02 | 872 | ((SIZE) == HAL_OSPI_ADDRESS_32_BITS)) |
AnnaBridge | 161:aa5281ff4a02 | 873 | |
AnnaBridge | 161:aa5281ff4a02 | 874 | #define IS_OSPI_ADDRESS_DTR_MODE(MODE) (((MODE) == HAL_OSPI_ADDRESS_DTR_DISABLE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 875 | ((MODE) == HAL_OSPI_ADDRESS_DTR_ENABLE)) |
AnnaBridge | 161:aa5281ff4a02 | 876 | |
AnnaBridge | 161:aa5281ff4a02 | 877 | #define IS_OSPI_ALT_BYTES_MODE(MODE) (((MODE) == HAL_OSPI_ALTERNATE_BYTES_NONE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 878 | ((MODE) == HAL_OSPI_ALTERNATE_BYTES_1_LINE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 879 | ((MODE) == HAL_OSPI_ALTERNATE_BYTES_2_LINES) || \ |
AnnaBridge | 161:aa5281ff4a02 | 880 | ((MODE) == HAL_OSPI_ALTERNATE_BYTES_4_LINES) || \ |
AnnaBridge | 161:aa5281ff4a02 | 881 | ((MODE) == HAL_OSPI_ALTERNATE_BYTES_8_LINES)) |
AnnaBridge | 161:aa5281ff4a02 | 882 | |
AnnaBridge | 161:aa5281ff4a02 | 883 | #define IS_OSPI_ALT_BYTES_SIZE(SIZE) (((SIZE) == HAL_OSPI_ALTERNATE_BYTES_8_BITS) || \ |
AnnaBridge | 161:aa5281ff4a02 | 884 | ((SIZE) == HAL_OSPI_ALTERNATE_BYTES_16_BITS) || \ |
AnnaBridge | 161:aa5281ff4a02 | 885 | ((SIZE) == HAL_OSPI_ALTERNATE_BYTES_24_BITS) || \ |
AnnaBridge | 161:aa5281ff4a02 | 886 | ((SIZE) == HAL_OSPI_ALTERNATE_BYTES_32_BITS)) |
AnnaBridge | 161:aa5281ff4a02 | 887 | |
AnnaBridge | 161:aa5281ff4a02 | 888 | #define IS_OSPI_ALT_BYTES_DTR_MODE(MODE) (((MODE) == HAL_OSPI_ALTERNATE_BYTES_DTR_DISABLE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 889 | ((MODE) == HAL_OSPI_ALTERNATE_BYTES_DTR_ENABLE)) |
AnnaBridge | 161:aa5281ff4a02 | 890 | |
AnnaBridge | 161:aa5281ff4a02 | 891 | #define IS_OSPI_DATA_MODE(MODE) (((MODE) == HAL_OSPI_DATA_NONE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 892 | ((MODE) == HAL_OSPI_DATA_1_LINE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 893 | ((MODE) == HAL_OSPI_DATA_2_LINES) || \ |
AnnaBridge | 161:aa5281ff4a02 | 894 | ((MODE) == HAL_OSPI_DATA_4_LINES) || \ |
AnnaBridge | 161:aa5281ff4a02 | 895 | ((MODE) == HAL_OSPI_DATA_8_LINES)) |
AnnaBridge | 161:aa5281ff4a02 | 896 | |
AnnaBridge | 161:aa5281ff4a02 | 897 | #define IS_OSPI_NUMBER_DATA(NUMBER) ((NUMBER) >= 1) |
AnnaBridge | 161:aa5281ff4a02 | 898 | |
AnnaBridge | 161:aa5281ff4a02 | 899 | #define IS_OSPI_DATA_DTR_MODE(MODE) (((MODE) == HAL_OSPI_DATA_DTR_DISABLE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 900 | ((MODE) == HAL_OSPI_DATA_DTR_ENABLE)) |
AnnaBridge | 161:aa5281ff4a02 | 901 | |
AnnaBridge | 161:aa5281ff4a02 | 902 | #define IS_OSPI_DUMMY_CYCLES(NUMBER) ((NUMBER) <= 31) |
AnnaBridge | 161:aa5281ff4a02 | 903 | |
AnnaBridge | 161:aa5281ff4a02 | 904 | #define IS_OSPI_DQS_MODE(MODE) (((MODE) == HAL_OSPI_DQS_DISABLE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 905 | ((MODE) == HAL_OSPI_DQS_ENABLE)) |
AnnaBridge | 161:aa5281ff4a02 | 906 | |
AnnaBridge | 161:aa5281ff4a02 | 907 | #define IS_OSPI_SIOO_MODE(MODE) (((MODE) == HAL_OSPI_SIOO_INST_EVERY_CMD) || \ |
AnnaBridge | 161:aa5281ff4a02 | 908 | ((MODE) == HAL_OSPI_SIOO_INST_ONLY_FIRST_CMD)) |
AnnaBridge | 161:aa5281ff4a02 | 909 | |
AnnaBridge | 161:aa5281ff4a02 | 910 | #define IS_OSPI_RW_RECOVERY_TIME(NUMBER) ((NUMBER) <= 255) |
AnnaBridge | 161:aa5281ff4a02 | 911 | |
AnnaBridge | 161:aa5281ff4a02 | 912 | #define IS_OSPI_ACCESS_TIME(NUMBER) ((NUMBER) <= 255) |
AnnaBridge | 161:aa5281ff4a02 | 913 | |
AnnaBridge | 161:aa5281ff4a02 | 914 | #define IS_OSPI_WRITE_ZERO_LATENCY(MODE) (((MODE) == HAL_OSPI_LATENCY_ON_WRITE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 915 | ((MODE) == HAL_OSPI_NO_LATENCY_ON_WRITE)) |
AnnaBridge | 161:aa5281ff4a02 | 916 | |
AnnaBridge | 161:aa5281ff4a02 | 917 | #define IS_OSPI_LATENCY_MODE(MODE) (((MODE) == HAL_OSPI_VARIABLE_LATENCY) || \ |
AnnaBridge | 161:aa5281ff4a02 | 918 | ((MODE) == HAL_OSPI_FIXED_LATENCY)) |
AnnaBridge | 161:aa5281ff4a02 | 919 | |
AnnaBridge | 161:aa5281ff4a02 | 920 | #define IS_OSPI_ADDRESS_SPACE(SPACE) (((SPACE) == HAL_OSPI_MEMORY_ADDRESS_SPACE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 921 | ((SPACE) == HAL_OSPI_REGISTER_ADDRESS_SPACE)) |
AnnaBridge | 161:aa5281ff4a02 | 922 | |
AnnaBridge | 161:aa5281ff4a02 | 923 | #define IS_OSPI_MATCH_MODE(MODE) (((MODE) == HAL_OSPI_MATCH_MODE_AND) || \ |
AnnaBridge | 161:aa5281ff4a02 | 924 | ((MODE) == HAL_OSPI_MATCH_MODE_OR)) |
AnnaBridge | 161:aa5281ff4a02 | 925 | |
AnnaBridge | 161:aa5281ff4a02 | 926 | #define IS_OSPI_AUTOMATIC_STOP(MODE) (((MODE) == HAL_OSPI_AUTOMATIC_STOP_ENABLE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 927 | ((MODE) == HAL_OSPI_AUTOMATIC_STOP_DISABLE)) |
AnnaBridge | 161:aa5281ff4a02 | 928 | |
AnnaBridge | 161:aa5281ff4a02 | 929 | #define IS_OSPI_INTERVAL(INTERVAL) ((INTERVAL) <= 0xFFFF) |
AnnaBridge | 161:aa5281ff4a02 | 930 | |
AnnaBridge | 161:aa5281ff4a02 | 931 | #define IS_OSPI_STATUS_BYTES_SIZE(SIZE) (((SIZE) >= 1) && ((SIZE) <= 4)) |
AnnaBridge | 161:aa5281ff4a02 | 932 | |
AnnaBridge | 161:aa5281ff4a02 | 933 | #define IS_OSPI_TIMEOUT_ACTIVATION(MODE) (((MODE) == HAL_OSPI_TIMEOUT_COUNTER_DISABLE) || \ |
AnnaBridge | 161:aa5281ff4a02 | 934 | ((MODE) == HAL_OSPI_TIMEOUT_COUNTER_ENABLE)) |
AnnaBridge | 161:aa5281ff4a02 | 935 | |
AnnaBridge | 161:aa5281ff4a02 | 936 | #define IS_OSPI_TIMEOUT_PERIOD(PERIOD) ((PERIOD) <= 0xFFFF) |
AnnaBridge | 161:aa5281ff4a02 | 937 | |
AnnaBridge | 161:aa5281ff4a02 | 938 | #define IS_OSPI_CS_BOUNDARY(BOUNDARY) ((BOUNDARY) <= 31) |
AnnaBridge | 161:aa5281ff4a02 | 939 | |
AnnaBridge | 161:aa5281ff4a02 | 940 | #define IS_OSPIM_PORT(NUMBER) (((NUMBER) >= 1) && ((NUMBER) <= 2)) |
AnnaBridge | 161:aa5281ff4a02 | 941 | |
AnnaBridge | 161:aa5281ff4a02 | 942 | #define IS_OSPIM_IO_PORT(PORT) (((PORT) == HAL_OSPIM_IOPORT_1_LOW) || \ |
AnnaBridge | 161:aa5281ff4a02 | 943 | ((PORT) == HAL_OSPIM_IOPORT_1_HIGH) || \ |
AnnaBridge | 161:aa5281ff4a02 | 944 | ((PORT) == HAL_OSPIM_IOPORT_2_LOW) || \ |
AnnaBridge | 161:aa5281ff4a02 | 945 | ((PORT) == HAL_OSPIM_IOPORT_2_HIGH)) |
AnnaBridge | 161:aa5281ff4a02 | 946 | /** |
AnnaBridge | 161:aa5281ff4a02 | 947 | @endcond |
AnnaBridge | 161:aa5281ff4a02 | 948 | */ |
AnnaBridge | 161:aa5281ff4a02 | 949 | |
AnnaBridge | 161:aa5281ff4a02 | 950 | /* End of private macros -----------------------------------------------------*/ |
AnnaBridge | 161:aa5281ff4a02 | 951 | |
AnnaBridge | 161:aa5281ff4a02 | 952 | /** |
AnnaBridge | 161:aa5281ff4a02 | 953 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 954 | */ |
AnnaBridge | 161:aa5281ff4a02 | 955 | |
AnnaBridge | 161:aa5281ff4a02 | 956 | /** |
AnnaBridge | 161:aa5281ff4a02 | 957 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 958 | */ |
AnnaBridge | 161:aa5281ff4a02 | 959 | |
AnnaBridge | 161:aa5281ff4a02 | 960 | #endif /* OCTOSPI || OCTOSPI1 || OCTOSPI2 */ |
AnnaBridge | 161:aa5281ff4a02 | 961 | |
AnnaBridge | 161:aa5281ff4a02 | 962 | #ifdef __cplusplus |
AnnaBridge | 161:aa5281ff4a02 | 963 | } |
AnnaBridge | 161:aa5281ff4a02 | 964 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 965 | |
AnnaBridge | 161:aa5281ff4a02 | 966 | #endif /* __STM32L4xx_HAL_OSPI_H */ |
AnnaBridge | 161:aa5281ff4a02 | 967 | |
AnnaBridge | 161:aa5281ff4a02 | 968 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |