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TARGET_NUCLEO_L152RE/TOOLCHAIN_IAR/stm32l1xx_hal_sd.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32l1xx_hal_sd.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of SD HAL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32L1xx_HAL_SD_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32L1xx_HAL_SD_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #if defined(STM32L151xD) || defined(STM32L152xD) || defined(STM32L162xD)
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 43 extern "C" {
AnnaBridge 171:3a7713b1edbc 44 #endif
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 47 #include "stm32l1xx_ll_sdmmc.h"
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /** @addtogroup STM32L1xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 50 * @{
AnnaBridge 171:3a7713b1edbc 51 */
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /** @defgroup SD SD
AnnaBridge 171:3a7713b1edbc 54 * @brief SD HAL module driver
AnnaBridge 171:3a7713b1edbc 55 * @{
AnnaBridge 171:3a7713b1edbc 56 */
AnnaBridge 171:3a7713b1edbc 57
AnnaBridge 171:3a7713b1edbc 58 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 59 /** @defgroup SD_Exported_Types SD Exported Types
AnnaBridge 171:3a7713b1edbc 60 * @{
AnnaBridge 171:3a7713b1edbc 61 */
AnnaBridge 171:3a7713b1edbc 62
AnnaBridge 171:3a7713b1edbc 63 /** @defgroup SD_Exported_Types_Group1 SD Handle Structure definition
AnnaBridge 171:3a7713b1edbc 64 * @{
AnnaBridge 171:3a7713b1edbc 65 */
AnnaBridge 171:3a7713b1edbc 66 #define SD_InitTypeDef SDIO_InitTypeDef
AnnaBridge 171:3a7713b1edbc 67 #define SD_TypeDef SDIO_TypeDef
AnnaBridge 171:3a7713b1edbc 68
AnnaBridge 171:3a7713b1edbc 69 /**
AnnaBridge 171:3a7713b1edbc 70 * @brief SDIO Handle Structure definition
AnnaBridge 171:3a7713b1edbc 71 */
AnnaBridge 171:3a7713b1edbc 72 typedef struct
AnnaBridge 171:3a7713b1edbc 73 {
AnnaBridge 171:3a7713b1edbc 74 SD_TypeDef *Instance; /*!< SDIO register base address */
AnnaBridge 171:3a7713b1edbc 75
AnnaBridge 171:3a7713b1edbc 76 SD_InitTypeDef Init; /*!< SD required parameters */
AnnaBridge 171:3a7713b1edbc 77
AnnaBridge 171:3a7713b1edbc 78 HAL_LockTypeDef Lock; /*!< SD locking object */
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 uint32_t CardType; /*!< SD card type */
AnnaBridge 171:3a7713b1edbc 81
AnnaBridge 171:3a7713b1edbc 82 uint32_t RCA; /*!< SD relative card address */
AnnaBridge 171:3a7713b1edbc 83
AnnaBridge 171:3a7713b1edbc 84 uint32_t CSD[4]; /*!< SD card specific data table */
AnnaBridge 171:3a7713b1edbc 85
AnnaBridge 171:3a7713b1edbc 86 uint32_t CID[4]; /*!< SD card identification number table */
AnnaBridge 171:3a7713b1edbc 87
AnnaBridge 171:3a7713b1edbc 88 __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */
AnnaBridge 171:3a7713b1edbc 89
AnnaBridge 171:3a7713b1edbc 90 __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */
AnnaBridge 171:3a7713b1edbc 91
AnnaBridge 171:3a7713b1edbc 92 __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */
AnnaBridge 171:3a7713b1edbc 93
AnnaBridge 171:3a7713b1edbc 94 __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */
AnnaBridge 171:3a7713b1edbc 95
AnnaBridge 171:3a7713b1edbc 96 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
AnnaBridge 171:3a7713b1edbc 97
AnnaBridge 171:3a7713b1edbc 98 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
AnnaBridge 171:3a7713b1edbc 99
AnnaBridge 171:3a7713b1edbc 100 }SD_HandleTypeDef;
AnnaBridge 171:3a7713b1edbc 101 /**
AnnaBridge 171:3a7713b1edbc 102 * @}
AnnaBridge 171:3a7713b1edbc 103 */
AnnaBridge 171:3a7713b1edbc 104
AnnaBridge 171:3a7713b1edbc 105 /** @defgroup SD_Exported_Types_Group2 Card Specific Data: CSD Register
AnnaBridge 171:3a7713b1edbc 106 * @{
AnnaBridge 171:3a7713b1edbc 107 */
AnnaBridge 171:3a7713b1edbc 108 typedef struct
AnnaBridge 171:3a7713b1edbc 109 {
AnnaBridge 171:3a7713b1edbc 110 __IO uint8_t CSDStruct; /*!< CSD structure */
AnnaBridge 171:3a7713b1edbc 111 __IO uint8_t SysSpecVersion; /*!< System specification version */
AnnaBridge 171:3a7713b1edbc 112 __IO uint8_t Reserved1; /*!< Reserved */
AnnaBridge 171:3a7713b1edbc 113 __IO uint8_t TAAC; /*!< Data read access time 1 */
AnnaBridge 171:3a7713b1edbc 114 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
AnnaBridge 171:3a7713b1edbc 115 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
AnnaBridge 171:3a7713b1edbc 116 __IO uint16_t CardComdClasses; /*!< Card command classes */
AnnaBridge 171:3a7713b1edbc 117 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
AnnaBridge 171:3a7713b1edbc 118 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
AnnaBridge 171:3a7713b1edbc 119 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
AnnaBridge 171:3a7713b1edbc 120 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
AnnaBridge 171:3a7713b1edbc 121 __IO uint8_t DSRImpl; /*!< DSR implemented */
AnnaBridge 171:3a7713b1edbc 122 __IO uint8_t Reserved2; /*!< Reserved */
AnnaBridge 171:3a7713b1edbc 123 __IO uint32_t DeviceSize; /*!< Device Size */
AnnaBridge 171:3a7713b1edbc 124 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
AnnaBridge 171:3a7713b1edbc 125 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
AnnaBridge 171:3a7713b1edbc 126 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
AnnaBridge 171:3a7713b1edbc 127 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
AnnaBridge 171:3a7713b1edbc 128 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
AnnaBridge 171:3a7713b1edbc 129 __IO uint8_t EraseGrSize; /*!< Erase group size */
AnnaBridge 171:3a7713b1edbc 130 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
AnnaBridge 171:3a7713b1edbc 131 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
AnnaBridge 171:3a7713b1edbc 132 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
AnnaBridge 171:3a7713b1edbc 133 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
AnnaBridge 171:3a7713b1edbc 134 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
AnnaBridge 171:3a7713b1edbc 135 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
AnnaBridge 171:3a7713b1edbc 136 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
AnnaBridge 171:3a7713b1edbc 137 __IO uint8_t Reserved3; /*!< Reserved */
AnnaBridge 171:3a7713b1edbc 138 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
AnnaBridge 171:3a7713b1edbc 139 __IO uint8_t FileFormatGrouop; /*!< File format group */
AnnaBridge 171:3a7713b1edbc 140 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
AnnaBridge 171:3a7713b1edbc 141 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
AnnaBridge 171:3a7713b1edbc 142 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
AnnaBridge 171:3a7713b1edbc 143 __IO uint8_t FileFormat; /*!< File format */
AnnaBridge 171:3a7713b1edbc 144 __IO uint8_t ECC; /*!< ECC code */
AnnaBridge 171:3a7713b1edbc 145 __IO uint8_t CSD_CRC; /*!< CSD CRC */
AnnaBridge 171:3a7713b1edbc 146 __IO uint8_t Reserved4; /*!< Always 1 */
AnnaBridge 171:3a7713b1edbc 147
AnnaBridge 171:3a7713b1edbc 148 }HAL_SD_CSDTypedef;
AnnaBridge 171:3a7713b1edbc 149 /**
AnnaBridge 171:3a7713b1edbc 150 * @}
AnnaBridge 171:3a7713b1edbc 151 */
AnnaBridge 171:3a7713b1edbc 152
AnnaBridge 171:3a7713b1edbc 153 /** @defgroup SD_Exported_Types_Group3 Card Identification Data: CID Register
AnnaBridge 171:3a7713b1edbc 154 * @{
AnnaBridge 171:3a7713b1edbc 155 */
AnnaBridge 171:3a7713b1edbc 156 typedef struct
AnnaBridge 171:3a7713b1edbc 157 {
AnnaBridge 171:3a7713b1edbc 158 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
AnnaBridge 171:3a7713b1edbc 159 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
AnnaBridge 171:3a7713b1edbc 160 __IO uint32_t ProdName1; /*!< Product Name part1 */
AnnaBridge 171:3a7713b1edbc 161 __IO uint8_t ProdName2; /*!< Product Name part2 */
AnnaBridge 171:3a7713b1edbc 162 __IO uint8_t ProdRev; /*!< Product Revision */
AnnaBridge 171:3a7713b1edbc 163 __IO uint32_t ProdSN; /*!< Product Serial Number */
AnnaBridge 171:3a7713b1edbc 164 __IO uint8_t Reserved1; /*!< Reserved1 */
AnnaBridge 171:3a7713b1edbc 165 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
AnnaBridge 171:3a7713b1edbc 166 __IO uint8_t CID_CRC; /*!< CID CRC */
AnnaBridge 171:3a7713b1edbc 167 __IO uint8_t Reserved2; /*!< Always 1 */
AnnaBridge 171:3a7713b1edbc 168
AnnaBridge 171:3a7713b1edbc 169 }HAL_SD_CIDTypedef;
AnnaBridge 171:3a7713b1edbc 170 /**
AnnaBridge 171:3a7713b1edbc 171 * @}
AnnaBridge 171:3a7713b1edbc 172 */
AnnaBridge 171:3a7713b1edbc 173
AnnaBridge 171:3a7713b1edbc 174 /** @defgroup SD_Exported_Types_Group4 SD Card Status returned by ACMD13
AnnaBridge 171:3a7713b1edbc 175 * @{
AnnaBridge 171:3a7713b1edbc 176 */
AnnaBridge 171:3a7713b1edbc 177 typedef struct
AnnaBridge 171:3a7713b1edbc 178 {
AnnaBridge 171:3a7713b1edbc 179 __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */
AnnaBridge 171:3a7713b1edbc 180 __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */
AnnaBridge 171:3a7713b1edbc 181 __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */
AnnaBridge 171:3a7713b1edbc 182 __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */
AnnaBridge 171:3a7713b1edbc 183 __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */
AnnaBridge 171:3a7713b1edbc 184 __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */
AnnaBridge 171:3a7713b1edbc 185 __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */
AnnaBridge 171:3a7713b1edbc 186 __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */
AnnaBridge 171:3a7713b1edbc 187 __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */
AnnaBridge 171:3a7713b1edbc 188 __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */
AnnaBridge 171:3a7713b1edbc 189
AnnaBridge 171:3a7713b1edbc 190 }HAL_SD_CardStatusTypedef;
AnnaBridge 171:3a7713b1edbc 191 /**
AnnaBridge 171:3a7713b1edbc 192 * @}
AnnaBridge 171:3a7713b1edbc 193 */
AnnaBridge 171:3a7713b1edbc 194
AnnaBridge 171:3a7713b1edbc 195 /** @defgroup SD_Exported_Types_Group5 SD Card information structure
AnnaBridge 171:3a7713b1edbc 196 * @{
AnnaBridge 171:3a7713b1edbc 197 */
AnnaBridge 171:3a7713b1edbc 198 typedef struct
AnnaBridge 171:3a7713b1edbc 199 {
AnnaBridge 171:3a7713b1edbc 200 HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */
AnnaBridge 171:3a7713b1edbc 201 HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */
AnnaBridge 171:3a7713b1edbc 202 uint64_t CardCapacity; /*!< Card capacity */
AnnaBridge 171:3a7713b1edbc 203 uint32_t CardBlockSize; /*!< Card block size */
AnnaBridge 171:3a7713b1edbc 204 uint16_t RCA; /*!< SD relative card address */
AnnaBridge 171:3a7713b1edbc 205 uint8_t CardType; /*!< SD card type */
AnnaBridge 171:3a7713b1edbc 206
AnnaBridge 171:3a7713b1edbc 207 }HAL_SD_CardInfoTypedef;
AnnaBridge 171:3a7713b1edbc 208 /**
AnnaBridge 171:3a7713b1edbc 209 * @}
AnnaBridge 171:3a7713b1edbc 210 */
AnnaBridge 171:3a7713b1edbc 211
AnnaBridge 171:3a7713b1edbc 212 /** @defgroup SD_Exported_Types_Group6 SD Error status enumeration Structure definition
AnnaBridge 171:3a7713b1edbc 213 * @{
AnnaBridge 171:3a7713b1edbc 214 */
AnnaBridge 171:3a7713b1edbc 215 typedef enum
AnnaBridge 171:3a7713b1edbc 216 {
AnnaBridge 171:3a7713b1edbc 217 /**
AnnaBridge 171:3a7713b1edbc 218 * @brief SD specific error defines
AnnaBridge 171:3a7713b1edbc 219 */
AnnaBridge 171:3a7713b1edbc 220 SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
AnnaBridge 171:3a7713b1edbc 221 SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */
AnnaBridge 171:3a7713b1edbc 222 SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
AnnaBridge 171:3a7713b1edbc 223 SD_DATA_TIMEOUT = (4), /*!< Data timeout */
AnnaBridge 171:3a7713b1edbc 224 SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */
AnnaBridge 171:3a7713b1edbc 225 SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */
AnnaBridge 171:3a7713b1edbc 226 SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */
AnnaBridge 171:3a7713b1edbc 227 SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */
AnnaBridge 171:3a7713b1edbc 228 SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */
AnnaBridge 171:3a7713b1edbc 229 SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
AnnaBridge 171:3a7713b1edbc 230 SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */
AnnaBridge 171:3a7713b1edbc 231 SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */
AnnaBridge 171:3a7713b1edbc 232 SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */
AnnaBridge 171:3a7713b1edbc 233 SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
AnnaBridge 171:3a7713b1edbc 234 SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */
AnnaBridge 171:3a7713b1edbc 235 SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */
AnnaBridge 171:3a7713b1edbc 236 SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */
AnnaBridge 171:3a7713b1edbc 237 SD_CC_ERROR = (18), /*!< Internal card controller error */
AnnaBridge 171:3a7713b1edbc 238 SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */
AnnaBridge 171:3a7713b1edbc 239 SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */
AnnaBridge 171:3a7713b1edbc 240 SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */
AnnaBridge 171:3a7713b1edbc 241 SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */
AnnaBridge 171:3a7713b1edbc 242 SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */
AnnaBridge 171:3a7713b1edbc 243 SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */
AnnaBridge 171:3a7713b1edbc 244 SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
AnnaBridge 171:3a7713b1edbc 245 SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */
AnnaBridge 171:3a7713b1edbc 246 SD_INVALID_VOLTRANGE = (27),
AnnaBridge 171:3a7713b1edbc 247 SD_ADDR_OUT_OF_RANGE = (28),
AnnaBridge 171:3a7713b1edbc 248 SD_SWITCH_ERROR = (29),
AnnaBridge 171:3a7713b1edbc 249 SD_SDIO_DISABLED = (30),
AnnaBridge 171:3a7713b1edbc 250 SD_SDIO_FUNCTION_BUSY = (31),
AnnaBridge 171:3a7713b1edbc 251 SD_SDIO_FUNCTION_FAILED = (32),
AnnaBridge 171:3a7713b1edbc 252 SD_SDIO_UNKNOWN_FUNCTION = (33),
AnnaBridge 171:3a7713b1edbc 253
AnnaBridge 171:3a7713b1edbc 254 /**
AnnaBridge 171:3a7713b1edbc 255 * @brief Standard error defines
AnnaBridge 171:3a7713b1edbc 256 */
AnnaBridge 171:3a7713b1edbc 257 SD_INTERNAL_ERROR = (34),
AnnaBridge 171:3a7713b1edbc 258 SD_NOT_CONFIGURED = (35),
AnnaBridge 171:3a7713b1edbc 259 SD_REQUEST_PENDING = (36),
AnnaBridge 171:3a7713b1edbc 260 SD_REQUEST_NOT_APPLICABLE = (37),
AnnaBridge 171:3a7713b1edbc 261 SD_INVALID_PARAMETER = (38),
AnnaBridge 171:3a7713b1edbc 262 SD_UNSUPPORTED_FEATURE = (39),
AnnaBridge 171:3a7713b1edbc 263 SD_UNSUPPORTED_HW = (40),
AnnaBridge 171:3a7713b1edbc 264 SD_ERROR = (41),
AnnaBridge 171:3a7713b1edbc 265 SD_OK = (0)
AnnaBridge 171:3a7713b1edbc 266
AnnaBridge 171:3a7713b1edbc 267 }HAL_SD_ErrorTypedef;
AnnaBridge 171:3a7713b1edbc 268 /**
AnnaBridge 171:3a7713b1edbc 269 * @}
AnnaBridge 171:3a7713b1edbc 270 */
AnnaBridge 171:3a7713b1edbc 271
AnnaBridge 171:3a7713b1edbc 272 /** @defgroup SD_Exported_Types_Group7 SD Transfer state enumeration structure
AnnaBridge 171:3a7713b1edbc 273 * @{
AnnaBridge 171:3a7713b1edbc 274 */
AnnaBridge 171:3a7713b1edbc 275 typedef enum
AnnaBridge 171:3a7713b1edbc 276 {
AnnaBridge 171:3a7713b1edbc 277 SD_TRANSFER_OK = 0, /*!< Transfer success */
AnnaBridge 171:3a7713b1edbc 278 SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */
AnnaBridge 171:3a7713b1edbc 279 SD_TRANSFER_ERROR = 2 /*!< Transfer failed */
AnnaBridge 171:3a7713b1edbc 280
AnnaBridge 171:3a7713b1edbc 281 }HAL_SD_TransferStateTypedef;
AnnaBridge 171:3a7713b1edbc 282 /**
AnnaBridge 171:3a7713b1edbc 283 * @}
AnnaBridge 171:3a7713b1edbc 284 */
AnnaBridge 171:3a7713b1edbc 285
AnnaBridge 171:3a7713b1edbc 286 /** @defgroup SD_Exported_Types_Group8 SD Card State enumeration structure
AnnaBridge 171:3a7713b1edbc 287 * @{
AnnaBridge 171:3a7713b1edbc 288 */
AnnaBridge 171:3a7713b1edbc 289 typedef enum
AnnaBridge 171:3a7713b1edbc 290 {
AnnaBridge 171:3a7713b1edbc 291 SD_CARD_READY = (0x00000001U), /*!< Card state is ready */
AnnaBridge 171:3a7713b1edbc 292 SD_CARD_IDENTIFICATION = (0x00000002U), /*!< Card is in identification state */
AnnaBridge 171:3a7713b1edbc 293 SD_CARD_STANDBY = (0x00000003U), /*!< Card is in standby state */
AnnaBridge 171:3a7713b1edbc 294 SD_CARD_TRANSFER = (0x00000004U), /*!< Card is in transfer state */
AnnaBridge 171:3a7713b1edbc 295 SD_CARD_SENDING = (0x00000005U), /*!< Card is sending an operation */
AnnaBridge 171:3a7713b1edbc 296 SD_CARD_RECEIVING = (0x00000006U), /*!< Card is receiving operation information */
AnnaBridge 171:3a7713b1edbc 297 SD_CARD_PROGRAMMING = (0x00000007U), /*!< Card is in programming state */
AnnaBridge 171:3a7713b1edbc 298 SD_CARD_DISCONNECTED = (0x00000008U), /*!< Card is disconnected */
AnnaBridge 171:3a7713b1edbc 299 SD_CARD_ERROR = (0x000000FFU) /*!< Card is in error state */
AnnaBridge 171:3a7713b1edbc 300
AnnaBridge 171:3a7713b1edbc 301 }HAL_SD_CardStateTypedef;
AnnaBridge 171:3a7713b1edbc 302 /**
AnnaBridge 171:3a7713b1edbc 303 * @}
AnnaBridge 171:3a7713b1edbc 304 */
AnnaBridge 171:3a7713b1edbc 305
AnnaBridge 171:3a7713b1edbc 306 /** @defgroup SD_Exported_Types_Group9 SD Operation enumeration structure
AnnaBridge 171:3a7713b1edbc 307 * @{
AnnaBridge 171:3a7713b1edbc 308 */
AnnaBridge 171:3a7713b1edbc 309 typedef enum
AnnaBridge 171:3a7713b1edbc 310 {
AnnaBridge 171:3a7713b1edbc 311 SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */
AnnaBridge 171:3a7713b1edbc 312 SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */
AnnaBridge 171:3a7713b1edbc 313 SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */
AnnaBridge 171:3a7713b1edbc 314 SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */
AnnaBridge 171:3a7713b1edbc 315
AnnaBridge 171:3a7713b1edbc 316 }HAL_SD_OperationTypedef;
AnnaBridge 171:3a7713b1edbc 317 /**
AnnaBridge 171:3a7713b1edbc 318 * @}
AnnaBridge 171:3a7713b1edbc 319 */
AnnaBridge 171:3a7713b1edbc 320
AnnaBridge 171:3a7713b1edbc 321 /**
AnnaBridge 171:3a7713b1edbc 322 * @}
AnnaBridge 171:3a7713b1edbc 323 */
AnnaBridge 171:3a7713b1edbc 324
AnnaBridge 171:3a7713b1edbc 325 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 326 /** @defgroup SD_Exported_Constants SD Exported Constants
AnnaBridge 171:3a7713b1edbc 327 * @{
AnnaBridge 171:3a7713b1edbc 328 */
AnnaBridge 171:3a7713b1edbc 329
AnnaBridge 171:3a7713b1edbc 330 /**
AnnaBridge 171:3a7713b1edbc 331 * @brief SD Commands Index
AnnaBridge 171:3a7713b1edbc 332 */
AnnaBridge 171:3a7713b1edbc 333 #define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */
AnnaBridge 171:3a7713b1edbc 334 #define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */
AnnaBridge 171:3a7713b1edbc 335 #define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
AnnaBridge 171:3a7713b1edbc 336 #define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */
AnnaBridge 171:3a7713b1edbc 337 #define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */
AnnaBridge 171:3a7713b1edbc 338 #define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
AnnaBridge 171:3a7713b1edbc 339 operating condition register (OCR) content in the response on the CMD line. */
AnnaBridge 171:3a7713b1edbc 340 #define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
AnnaBridge 171:3a7713b1edbc 341 #define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */
AnnaBridge 171:3a7713b1edbc 342 #define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
AnnaBridge 171:3a7713b1edbc 343 and asks the card whether card supports voltage. */
AnnaBridge 171:3a7713b1edbc 344 #define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
AnnaBridge 171:3a7713b1edbc 345 #define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */
AnnaBridge 171:3a7713b1edbc 346 #define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */
AnnaBridge 171:3a7713b1edbc 347 #define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */
AnnaBridge 171:3a7713b1edbc 348 #define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */
AnnaBridge 171:3a7713b1edbc 349 #define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
AnnaBridge 171:3a7713b1edbc 350 #define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */
AnnaBridge 171:3a7713b1edbc 351 #define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands
AnnaBridge 171:3a7713b1edbc 352 (read, write, lock). Default block length is fixed to 512 Bytes. Not effective
AnnaBridge 171:3a7713b1edbc 353 for SDHS and SDXC. */
AnnaBridge 171:3a7713b1edbc 354 #define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
AnnaBridge 171:3a7713b1edbc 355 fixed 512 bytes in case of SDHC and SDXC. */
AnnaBridge 171:3a7713b1edbc 356 #define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by
AnnaBridge 171:3a7713b1edbc 357 STOP_TRANSMISSION command. */
AnnaBridge 171:3a7713b1edbc 358 #define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
AnnaBridge 171:3a7713b1edbc 359 #define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */
AnnaBridge 171:3a7713b1edbc 360 #define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */
AnnaBridge 171:3a7713b1edbc 361 #define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
AnnaBridge 171:3a7713b1edbc 362 fixed 512 bytes in case of SDHC and SDXC. */
AnnaBridge 171:3a7713b1edbc 363 #define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
AnnaBridge 171:3a7713b1edbc 364 #define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */
AnnaBridge 171:3a7713b1edbc 365 #define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */
AnnaBridge 171:3a7713b1edbc 366 #define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */
AnnaBridge 171:3a7713b1edbc 367 #define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */
AnnaBridge 171:3a7713b1edbc 368 #define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */
AnnaBridge 171:3a7713b1edbc 369 #define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */
AnnaBridge 171:3a7713b1edbc 370 #define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */
AnnaBridge 171:3a7713b1edbc 371 #define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command
AnnaBridge 171:3a7713b1edbc 372 system set by switch function command (CMD6). */
AnnaBridge 171:3a7713b1edbc 373 #define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased.
AnnaBridge 171:3a7713b1edbc 374 Reserved for each command system set by switch function command (CMD6). */
AnnaBridge 171:3a7713b1edbc 375 #define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */
AnnaBridge 171:3a7713b1edbc 376 #define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */
AnnaBridge 171:3a7713b1edbc 377 #define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */
AnnaBridge 171:3a7713b1edbc 378 #define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
AnnaBridge 171:3a7713b1edbc 379 the SET_BLOCK_LEN command. */
AnnaBridge 171:3a7713b1edbc 380 #define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather
AnnaBridge 171:3a7713b1edbc 381 than a standard command. */
AnnaBridge 171:3a7713b1edbc 382 #define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card
AnnaBridge 171:3a7713b1edbc 383 for general purpose/application specific commands. */
AnnaBridge 171:3a7713b1edbc 384 #define SD_CMD_NO_CMD ((uint8_t)64)
AnnaBridge 171:3a7713b1edbc 385
AnnaBridge 171:3a7713b1edbc 386 /**
AnnaBridge 171:3a7713b1edbc 387 * @brief Following commands are SD Card Specific commands.
AnnaBridge 171:3a7713b1edbc 388 * SDIO_APP_CMD should be sent before sending these commands.
AnnaBridge 171:3a7713b1edbc 389 */
AnnaBridge 171:3a7713b1edbc 390 #define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
AnnaBridge 171:3a7713b1edbc 391 widths are given in SCR register. */
AnnaBridge 171:3a7713b1edbc 392 #define SD_CMD_SD_APP_STATUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */
AnnaBridge 171:3a7713b1edbc 393 #define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
AnnaBridge 171:3a7713b1edbc 394 32bit+CRC data block. */
AnnaBridge 171:3a7713b1edbc 395 #define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
AnnaBridge 171:3a7713b1edbc 396 send its operating condition register (OCR) content in the response on the CMD line. */
AnnaBridge 171:3a7713b1edbc 397 #define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
AnnaBridge 171:3a7713b1edbc 398 #define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */
AnnaBridge 171:3a7713b1edbc 399 #define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */
AnnaBridge 171:3a7713b1edbc 400 #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */
AnnaBridge 171:3a7713b1edbc 401
AnnaBridge 171:3a7713b1edbc 402 /**
AnnaBridge 171:3a7713b1edbc 403 * @brief Following commands are SD Card Specific security commands.
AnnaBridge 171:3a7713b1edbc 404 * SD_CMD_APP_CMD should be sent before sending these commands.
AnnaBridge 171:3a7713b1edbc 405 */
AnnaBridge 171:3a7713b1edbc 406 #define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */
AnnaBridge 171:3a7713b1edbc 407 #define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */
AnnaBridge 171:3a7713b1edbc 408 #define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */
AnnaBridge 171:3a7713b1edbc 409 #define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */
AnnaBridge 171:3a7713b1edbc 410 #define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */
AnnaBridge 171:3a7713b1edbc 411 #define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */
AnnaBridge 171:3a7713b1edbc 412 #define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */
AnnaBridge 171:3a7713b1edbc 413 #define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */
AnnaBridge 171:3a7713b1edbc 414 #define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */
AnnaBridge 171:3a7713b1edbc 415 #define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */
AnnaBridge 171:3a7713b1edbc 416 #define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */
AnnaBridge 171:3a7713b1edbc 417
AnnaBridge 171:3a7713b1edbc 418 /**
AnnaBridge 171:3a7713b1edbc 419 * @brief Supported SD Memory Cards
AnnaBridge 171:3a7713b1edbc 420 */
AnnaBridge 171:3a7713b1edbc 421 #define STD_CAPACITY_SD_CARD_V1_1 (0x00000000U)
AnnaBridge 171:3a7713b1edbc 422 #define STD_CAPACITY_SD_CARD_V2_0 (0x00000001U)
AnnaBridge 171:3a7713b1edbc 423 #define HIGH_CAPACITY_SD_CARD (0x00000002U)
AnnaBridge 171:3a7713b1edbc 424 #define MULTIMEDIA_CARD (0x00000003U)
AnnaBridge 171:3a7713b1edbc 425 #define SECURE_DIGITAL_IO_CARD (0x00000004U)
AnnaBridge 171:3a7713b1edbc 426 #define HIGH_SPEED_MULTIMEDIA_CARD (0x00000005U)
AnnaBridge 171:3a7713b1edbc 427 #define SECURE_DIGITAL_IO_COMBO_CARD (0x00000006U)
AnnaBridge 171:3a7713b1edbc 428 #define HIGH_CAPACITY_MMC_CARD (0x00000007U)
AnnaBridge 171:3a7713b1edbc 429 /**
AnnaBridge 171:3a7713b1edbc 430 * @}
AnnaBridge 171:3a7713b1edbc 431 */
AnnaBridge 171:3a7713b1edbc 432
AnnaBridge 171:3a7713b1edbc 433 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 434 /** @defgroup SD_Exported_macros SD Exported Macros
AnnaBridge 171:3a7713b1edbc 435 * @brief macros to handle interrupts and specific clock configurations
AnnaBridge 171:3a7713b1edbc 436 * @{
AnnaBridge 171:3a7713b1edbc 437 */
AnnaBridge 171:3a7713b1edbc 438
AnnaBridge 171:3a7713b1edbc 439 /**
AnnaBridge 171:3a7713b1edbc 440 * @brief Enable the SD device.
AnnaBridge 171:3a7713b1edbc 441 * @retval None
AnnaBridge 171:3a7713b1edbc 442 */
AnnaBridge 171:3a7713b1edbc 443 #define __HAL_SD_SDIO_ENABLE() __SDIO_ENABLE()
AnnaBridge 171:3a7713b1edbc 444
AnnaBridge 171:3a7713b1edbc 445 /**
AnnaBridge 171:3a7713b1edbc 446 * @brief Disable the SD device.
AnnaBridge 171:3a7713b1edbc 447 * @retval None
AnnaBridge 171:3a7713b1edbc 448 */
AnnaBridge 171:3a7713b1edbc 449 #define __HAL_SD_SDIO_DISABLE() __SDIO_DISABLE()
AnnaBridge 171:3a7713b1edbc 450
AnnaBridge 171:3a7713b1edbc 451 /**
AnnaBridge 171:3a7713b1edbc 452 * @brief Enable the SDIO DMA transfer.
AnnaBridge 171:3a7713b1edbc 453 * @retval None
AnnaBridge 171:3a7713b1edbc 454 */
AnnaBridge 171:3a7713b1edbc 455 #define __HAL_SD_SDIO_DMA_ENABLE() __SDIO_DMA_ENABLE()
AnnaBridge 171:3a7713b1edbc 456
AnnaBridge 171:3a7713b1edbc 457 /**
AnnaBridge 171:3a7713b1edbc 458 * @brief Disable the SDIO DMA transfer.
AnnaBridge 171:3a7713b1edbc 459 * @retval None
AnnaBridge 171:3a7713b1edbc 460 */
AnnaBridge 171:3a7713b1edbc 461 #define __HAL_SD_SDIO_DMA_DISABLE() __SDIO_DMA_DISABLE()
AnnaBridge 171:3a7713b1edbc 462
AnnaBridge 171:3a7713b1edbc 463 /**
AnnaBridge 171:3a7713b1edbc 464 * @brief Enable the SD device interrupt.
AnnaBridge 171:3a7713b1edbc 465 * @param __HANDLE__: SD Handle
AnnaBridge 171:3a7713b1edbc 466 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled.
AnnaBridge 171:3a7713b1edbc 467 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 468 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 469 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 470 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 471 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 472 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 473 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 474 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 475 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 476 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 477 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
AnnaBridge 171:3a7713b1edbc 478 * bus mode interrupt
AnnaBridge 171:3a7713b1edbc 479 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 480 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 171:3a7713b1edbc 481 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 171:3a7713b1edbc 482 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
AnnaBridge 171:3a7713b1edbc 483 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 171:3a7713b1edbc 484 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 171:3a7713b1edbc 485 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 486 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 487 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 488 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 489 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 171:3a7713b1edbc 490 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 171:3a7713b1edbc 491 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 492 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
AnnaBridge 171:3a7713b1edbc 493 * @retval None
AnnaBridge 171:3a7713b1edbc 494 */
AnnaBridge 171:3a7713b1edbc 495 #define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 496
AnnaBridge 171:3a7713b1edbc 497 /**
AnnaBridge 171:3a7713b1edbc 498 * @brief Disable the SD device interrupt.
AnnaBridge 171:3a7713b1edbc 499 * @param __HANDLE__: SD Handle
AnnaBridge 171:3a7713b1edbc 500 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled.
AnnaBridge 171:3a7713b1edbc 501 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 502 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 503 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 504 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 505 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 506 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 507 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 508 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 509 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 510 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 511 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
AnnaBridge 171:3a7713b1edbc 512 * bus mode interrupt
AnnaBridge 171:3a7713b1edbc 513 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 514 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 171:3a7713b1edbc 515 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 171:3a7713b1edbc 516 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
AnnaBridge 171:3a7713b1edbc 517 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 171:3a7713b1edbc 518 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 171:3a7713b1edbc 519 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 520 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 521 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 522 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 523 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 171:3a7713b1edbc 524 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 171:3a7713b1edbc 525 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 526 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
AnnaBridge 171:3a7713b1edbc 527 * @retval None
AnnaBridge 171:3a7713b1edbc 528 */
AnnaBridge 171:3a7713b1edbc 529 #define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 530
AnnaBridge 171:3a7713b1edbc 531 /**
AnnaBridge 171:3a7713b1edbc 532 * @brief Check whether the specified SD flag is set or not.
AnnaBridge 171:3a7713b1edbc 533 * @param __HANDLE__: SD Handle
AnnaBridge 171:3a7713b1edbc 534 * @param __FLAG__: specifies the flag to check.
AnnaBridge 171:3a7713b1edbc 535 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 536 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 537 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 538 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
AnnaBridge 171:3a7713b1edbc 539 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
AnnaBridge 171:3a7713b1edbc 540 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
AnnaBridge 171:3a7713b1edbc 541 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
AnnaBridge 171:3a7713b1edbc 542 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 543 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
AnnaBridge 171:3a7713b1edbc 544 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
AnnaBridge 171:3a7713b1edbc 545 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
AnnaBridge 171:3a7713b1edbc 546 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 547 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
AnnaBridge 171:3a7713b1edbc 548 * @arg SDIO_FLAG_TXACT: Data transmit in progress
AnnaBridge 171:3a7713b1edbc 549 * @arg SDIO_FLAG_RXACT: Data receive in progress
AnnaBridge 171:3a7713b1edbc 550 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
AnnaBridge 171:3a7713b1edbc 551 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
AnnaBridge 171:3a7713b1edbc 552 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
AnnaBridge 171:3a7713b1edbc 553 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
AnnaBridge 171:3a7713b1edbc 554 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
AnnaBridge 171:3a7713b1edbc 555 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
AnnaBridge 171:3a7713b1edbc 556 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
AnnaBridge 171:3a7713b1edbc 557 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
AnnaBridge 171:3a7713b1edbc 558 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
AnnaBridge 171:3a7713b1edbc 559 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
AnnaBridge 171:3a7713b1edbc 560 * @retval The new state of SD FLAG (SET or RESET).
AnnaBridge 171:3a7713b1edbc 561 */
AnnaBridge 171:3a7713b1edbc 562 #define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
AnnaBridge 171:3a7713b1edbc 563
AnnaBridge 171:3a7713b1edbc 564 /**
AnnaBridge 171:3a7713b1edbc 565 * @brief Clear the SD's pending flags.
AnnaBridge 171:3a7713b1edbc 566 * @param __HANDLE__: SD Handle
AnnaBridge 171:3a7713b1edbc 567 * @param __FLAG__: specifies the flag to clear.
AnnaBridge 171:3a7713b1edbc 568 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 569 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 570 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
AnnaBridge 171:3a7713b1edbc 571 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
AnnaBridge 171:3a7713b1edbc 572 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
AnnaBridge 171:3a7713b1edbc 573 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
AnnaBridge 171:3a7713b1edbc 574 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
AnnaBridge 171:3a7713b1edbc 575 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 576 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
AnnaBridge 171:3a7713b1edbc 577 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
AnnaBridge 171:3a7713b1edbc 578 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
AnnaBridge 171:3a7713b1edbc 579 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
AnnaBridge 171:3a7713b1edbc 580 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
AnnaBridge 171:3a7713b1edbc 581 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
AnnaBridge 171:3a7713b1edbc 582 * @retval None
AnnaBridge 171:3a7713b1edbc 583 */
AnnaBridge 171:3a7713b1edbc 584 #define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
AnnaBridge 171:3a7713b1edbc 585
AnnaBridge 171:3a7713b1edbc 586 /**
AnnaBridge 171:3a7713b1edbc 587 * @brief Check whether the specified SD interrupt has occurred or not.
AnnaBridge 171:3a7713b1edbc 588 * @param __HANDLE__: SD Handle
AnnaBridge 171:3a7713b1edbc 589 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
AnnaBridge 171:3a7713b1edbc 590 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 591 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 592 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 593 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 594 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 595 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 596 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 597 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 598 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 599 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 600 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
AnnaBridge 171:3a7713b1edbc 601 * bus mode interrupt
AnnaBridge 171:3a7713b1edbc 602 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 603 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 171:3a7713b1edbc 604 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 171:3a7713b1edbc 605 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
AnnaBridge 171:3a7713b1edbc 606 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 171:3a7713b1edbc 607 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 171:3a7713b1edbc 608 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 609 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 171:3a7713b1edbc 610 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 611 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 171:3a7713b1edbc 612 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 171:3a7713b1edbc 613 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 171:3a7713b1edbc 614 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 615 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
AnnaBridge 171:3a7713b1edbc 616 * @retval The new state of SD IT (SET or RESET).
AnnaBridge 171:3a7713b1edbc 617 */
AnnaBridge 171:3a7713b1edbc 618 #define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__)
AnnaBridge 171:3a7713b1edbc 619
AnnaBridge 171:3a7713b1edbc 620 /**
AnnaBridge 171:3a7713b1edbc 621 * @brief Clear the SD's interrupt pending bits.
AnnaBridge 171:3a7713b1edbc 622 * @param __HANDLE__ : SD Handle
AnnaBridge 171:3a7713b1edbc 623 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
AnnaBridge 171:3a7713b1edbc 624 * This parameter can be one or a combination of the following values:
AnnaBridge 171:3a7713b1edbc 625 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 626 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 171:3a7713b1edbc 627 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 171:3a7713b1edbc 628 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 171:3a7713b1edbc 629 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 171:3a7713b1edbc 630 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 171:3a7713b1edbc 631 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 171:3a7713b1edbc 632 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 171:3a7713b1edbc 633 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
AnnaBridge 171:3a7713b1edbc 634 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
AnnaBridge 171:3a7713b1edbc 635 * bus mode interrupt
AnnaBridge 171:3a7713b1edbc 636 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 171:3a7713b1edbc 637 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
AnnaBridge 171:3a7713b1edbc 638 * @retval None
AnnaBridge 171:3a7713b1edbc 639 */
AnnaBridge 171:3a7713b1edbc 640 #define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 641 /**
AnnaBridge 171:3a7713b1edbc 642 * @}
AnnaBridge 171:3a7713b1edbc 643 */
AnnaBridge 171:3a7713b1edbc 644
AnnaBridge 171:3a7713b1edbc 645 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 646 /** @defgroup SD_Exported_Functions SD Exported Functions
AnnaBridge 171:3a7713b1edbc 647 * @{
AnnaBridge 171:3a7713b1edbc 648 */
AnnaBridge 171:3a7713b1edbc 649
AnnaBridge 171:3a7713b1edbc 650 /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 171:3a7713b1edbc 651 * @{
AnnaBridge 171:3a7713b1edbc 652 */
AnnaBridge 171:3a7713b1edbc 653 HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo);
AnnaBridge 171:3a7713b1edbc 654 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 655 void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 656 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 657 /**
AnnaBridge 171:3a7713b1edbc 658 * @}
AnnaBridge 171:3a7713b1edbc 659 */
AnnaBridge 171:3a7713b1edbc 660
AnnaBridge 171:3a7713b1edbc 661 /** @defgroup SD_Exported_Functions_Group2 I/O operation functions
AnnaBridge 171:3a7713b1edbc 662 * @{
AnnaBridge 171:3a7713b1edbc 663 */
AnnaBridge 171:3a7713b1edbc 664 /* Blocking mode: Polling */
AnnaBridge 171:3a7713b1edbc 665 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 666 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 667 HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr);
AnnaBridge 171:3a7713b1edbc 668
AnnaBridge 171:3a7713b1edbc 669 /* Non-Blocking mode: Interrupt */
AnnaBridge 171:3a7713b1edbc 670 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 671
AnnaBridge 171:3a7713b1edbc 672 /* Callback in non blocking modes (DMA) */
AnnaBridge 171:3a7713b1edbc 673 void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 171:3a7713b1edbc 674 void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 171:3a7713b1edbc 675 void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 171:3a7713b1edbc 676 void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 171:3a7713b1edbc 677 void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 678 void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 679
AnnaBridge 171:3a7713b1edbc 680 /* Non-Blocking mode: DMA */
AnnaBridge 171:3a7713b1edbc 681 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 682 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
AnnaBridge 171:3a7713b1edbc 683 HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 684 HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 685 /**
AnnaBridge 171:3a7713b1edbc 686 * @}
AnnaBridge 171:3a7713b1edbc 687 */
AnnaBridge 171:3a7713b1edbc 688
AnnaBridge 171:3a7713b1edbc 689 /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 171:3a7713b1edbc 690 * @{
AnnaBridge 171:3a7713b1edbc 691 */
AnnaBridge 171:3a7713b1edbc 692 HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo);
AnnaBridge 171:3a7713b1edbc 693 HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode);
AnnaBridge 171:3a7713b1edbc 694 HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 695 HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 696 /**
AnnaBridge 171:3a7713b1edbc 697 * @}
AnnaBridge 171:3a7713b1edbc 698 */
AnnaBridge 171:3a7713b1edbc 699
AnnaBridge 171:3a7713b1edbc 700 /* Peripheral State functions ************************************************/
AnnaBridge 171:3a7713b1edbc 701 /** @defgroup SD_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 171:3a7713b1edbc 702 * @{
AnnaBridge 171:3a7713b1edbc 703 */
AnnaBridge 171:3a7713b1edbc 704 HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
AnnaBridge 171:3a7713b1edbc 705 HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus);
AnnaBridge 171:3a7713b1edbc 706 HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd);
AnnaBridge 171:3a7713b1edbc 707 /**
AnnaBridge 171:3a7713b1edbc 708 * @}
AnnaBridge 171:3a7713b1edbc 709 */
AnnaBridge 171:3a7713b1edbc 710
AnnaBridge 171:3a7713b1edbc 711 /**
AnnaBridge 171:3a7713b1edbc 712 * @}
AnnaBridge 171:3a7713b1edbc 713 */
AnnaBridge 171:3a7713b1edbc 714
AnnaBridge 171:3a7713b1edbc 715 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 716 /** @defgroup SD_Private_Types SD Private Types
AnnaBridge 171:3a7713b1edbc 717 * @{
AnnaBridge 171:3a7713b1edbc 718 */
AnnaBridge 171:3a7713b1edbc 719
AnnaBridge 171:3a7713b1edbc 720 /**
AnnaBridge 171:3a7713b1edbc 721 * @}
AnnaBridge 171:3a7713b1edbc 722 */
AnnaBridge 171:3a7713b1edbc 723
AnnaBridge 171:3a7713b1edbc 724 /* Private defines -----------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 725 /** @defgroup SD_Private_Defines SD Private Defines
AnnaBridge 171:3a7713b1edbc 726 * @{
AnnaBridge 171:3a7713b1edbc 727 */
AnnaBridge 171:3a7713b1edbc 728
AnnaBridge 171:3a7713b1edbc 729 /**
AnnaBridge 171:3a7713b1edbc 730 * @}
AnnaBridge 171:3a7713b1edbc 731 */
AnnaBridge 171:3a7713b1edbc 732
AnnaBridge 171:3a7713b1edbc 733 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 734 /** @defgroup SD_Private_Variables SD Private Variables
AnnaBridge 171:3a7713b1edbc 735 * @{
AnnaBridge 171:3a7713b1edbc 736 */
AnnaBridge 171:3a7713b1edbc 737
AnnaBridge 171:3a7713b1edbc 738 /**
AnnaBridge 171:3a7713b1edbc 739 * @}
AnnaBridge 171:3a7713b1edbc 740 */
AnnaBridge 171:3a7713b1edbc 741
AnnaBridge 171:3a7713b1edbc 742 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 743 /** @defgroup SD_Private_Constants SD Private Constants
AnnaBridge 171:3a7713b1edbc 744 * @{
AnnaBridge 171:3a7713b1edbc 745 */
AnnaBridge 171:3a7713b1edbc 746
AnnaBridge 171:3a7713b1edbc 747 /**
AnnaBridge 171:3a7713b1edbc 748 * @}
AnnaBridge 171:3a7713b1edbc 749 */
AnnaBridge 171:3a7713b1edbc 750
AnnaBridge 171:3a7713b1edbc 751 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 752 /** @defgroup SD_Private_Macros SD Private Macros
AnnaBridge 171:3a7713b1edbc 753 * @{
AnnaBridge 171:3a7713b1edbc 754 */
AnnaBridge 171:3a7713b1edbc 755
AnnaBridge 171:3a7713b1edbc 756 /**
AnnaBridge 171:3a7713b1edbc 757 * @}
AnnaBridge 171:3a7713b1edbc 758 */
AnnaBridge 171:3a7713b1edbc 759
AnnaBridge 171:3a7713b1edbc 760 /* Private functions prototypes ----------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 761 /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes
AnnaBridge 171:3a7713b1edbc 762 * @{
AnnaBridge 171:3a7713b1edbc 763 */
AnnaBridge 171:3a7713b1edbc 764
AnnaBridge 171:3a7713b1edbc 765 /**
AnnaBridge 171:3a7713b1edbc 766 * @}
AnnaBridge 171:3a7713b1edbc 767 */
AnnaBridge 171:3a7713b1edbc 768
AnnaBridge 171:3a7713b1edbc 769 /* Private functions ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 770 /** @defgroup SD_Private_Functions SD Private Functions
AnnaBridge 171:3a7713b1edbc 771 * @{
AnnaBridge 171:3a7713b1edbc 772 */
AnnaBridge 171:3a7713b1edbc 773
AnnaBridge 171:3a7713b1edbc 774 /**
AnnaBridge 171:3a7713b1edbc 775 * @}
AnnaBridge 171:3a7713b1edbc 776 */
AnnaBridge 171:3a7713b1edbc 777
AnnaBridge 171:3a7713b1edbc 778 /**
AnnaBridge 171:3a7713b1edbc 779 * @}
AnnaBridge 171:3a7713b1edbc 780 */
AnnaBridge 171:3a7713b1edbc 781
AnnaBridge 171:3a7713b1edbc 782 /**
AnnaBridge 171:3a7713b1edbc 783 * @}
AnnaBridge 171:3a7713b1edbc 784 */
AnnaBridge 171:3a7713b1edbc 785
AnnaBridge 171:3a7713b1edbc 786 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 787 }
AnnaBridge 171:3a7713b1edbc 788 #endif
AnnaBridge 171:3a7713b1edbc 789
AnnaBridge 171:3a7713b1edbc 790 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
AnnaBridge 171:3a7713b1edbc 791
AnnaBridge 171:3a7713b1edbc 792 #endif /* __STM32L1xx_HAL_SD_H */
AnnaBridge 171:3a7713b1edbc 793
AnnaBridge 171:3a7713b1edbc 794 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/